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Merge branch 'for-john' of git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885.h
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
d19770e5 24#include <linux/kdev_t.h>
5a0e3ad6 25#include <linux/slab.h>
d19770e5 26
c0714f6c 27#include <media/v4l2-device.h>
d19770e5
ST		 28#include <media/tuner.h>
29#include <media/tveeprom.h>
409d84f8
TP		 30#include <media/videobuf-dma-sg.h>
31#include <media/videobuf-dvb.h>
6bda9644 32#include <media/rc-core.h>
d19770e5
ST		 33
34#include "btcx-risc.h"
35#include "cx23885-reg.h"
b1b81f1d 36#include "media/cx2341x.h"
d19770e5 37
d19770e5
ST		 38#include <linux/mutex.h>
39
1990d50b 40#define CX23885_VERSION "0.0.3"
d19770e5
ST		 41
42#define UNSET (-1U)
43
44#define CX23885_MAXBOARDS 8
45
d19770e5
ST		 46/* Max number of inputs by card */
47#define MAX_CX23885_INPUT 8
7b888014
ST		 48#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49#define RESOURCE_OVERLAY 1
50#define RESOURCE_VIDEO 2
51#define RESOURCE_VBI 4
d19770e5 52
d19770e5
ST		 53#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55#define CX23885_BOARD_NOAUTO UNSET
56#define CX23885_BOARD_UNKNOWN 0
57#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc 59#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa 60#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55 61#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835 62#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166 63#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c 64#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373 65#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7 66#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186 67#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a 68#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
9bb1b7e8 69#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
96318d0c 70#define CX23885_BOARD_TBS_6920 14
579943f5 71#define CX23885_BOARD_TEVII_S470 15
c9b8b04b 72#define CX23885_BOARD_DVBWORLD_2005 16
5a23b076 73#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
2074dffa 74#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
d099becb 75#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
19bc5796 76#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
6b926eca 77#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
493b7127 78#define CX23885_BOARD_MYGICA_X8506 22
2365b2d3 79#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
13697380 80#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
34e383dd 81#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
aee0b24c 82#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
ea5697fe 83#define CX23885_BOARD_MYGICA_X8558PRO 27
0b32d65c 84#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
9028f58f 85#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
78db8547 86#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
0cf8af57 87#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
2cb9ccd4 88#define CX23885_BOARD_MPX885 32
87988753 89#define CX23885_BOARD_MYGICA_X8507 33
722c90eb 90#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
7b134e85 91#define CX23885_BOARD_TEVII_S471 35
0ac60acb 92#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
f667190b 93#define CX23885_BOARD_PROF_8000 37
d19770e5 94
6f8bee9b
ST		 95#define GPIO_0 0x00000001
96#define GPIO_1 0x00000002
97#define GPIO_2 0x00000004
98#define GPIO_3 0x00000008
99#define GPIO_4 0x00000010
100#define GPIO_5 0x00000020
101#define GPIO_6 0x00000040
102#define GPIO_7 0x00000080
103#define GPIO_8 0x00000100
104#define GPIO_9 0x00000200
f659c513
ST		 105#define GPIO_10 0x00000400
106#define GPIO_11 0x00000800
107#define GPIO_12 0x00001000
108#define GPIO_13 0x00002000
109#define GPIO_14 0x00004000
110#define GPIO_15 0x00008000
6f8bee9b 111
7b888014
ST		 112/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
113#define CX23885_NORMS (\
114 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
115 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
116 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
117 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
118
119struct cx23885_fmt {
120 char *name;
121 u32 fourcc; /* v4l2 format id */
122 int depth;
123 int flags;
124 u32 cxformat;
125};
126
127struct cx23885_ctrl {
128 struct v4l2_queryctrl v;
129 u32 off;
130 u32 reg;
131 u32 mask;
132 u32 shift;
133};
134
135struct cx23885_tvnorm {
136 char *name;
137 v4l2_std_id id;
138 u32 cxiformat;
139 u32 cxoformat;
140};
141
142struct cx23885_fh {
143 struct cx23885_dev *dev;
144 enum v4l2_buf_type type;
145 int radio;
146 u32 resources;
147
148 /* video overlay */
149 struct v4l2_window win;
150 struct v4l2_clip *clips;
151 unsigned int nclips;
152
153 /* video capture */
154 struct cx23885_fmt *fmt;
155 unsigned int width, height;
156
157 /* vbi capture */
158 struct videobuf_queue vidq;
159 struct videobuf_queue vbiq;
160
161 /* MPEG Encoder specifics ONLY */
162 struct videobuf_queue mpegq;
163 atomic_t v4l_reading;
164};
165
d19770e5
ST		 166enum cx23885_itype {
167 CX23885_VMUX_COMPOSITE1 = 1,
168 CX23885_VMUX_COMPOSITE2,
169 CX23885_VMUX_COMPOSITE3,
170 CX23885_VMUX_COMPOSITE4,
171 CX23885_VMUX_SVIDEO,
dac65fa1 172 CX23885_VMUX_COMPONENT,
d19770e5
ST		 173 CX23885_VMUX_TELEVISION,
174 CX23885_VMUX_CABLE,
175 CX23885_VMUX_DVB,
176 CX23885_VMUX_DEBUG,
177 CX23885_RADIO,
178};
179
579f1163
ST		 180enum cx23885_src_sel_type {
181 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
182 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
183};
184
d19770e5
ST		 185/* buffer for one video frame */
186struct cx23885_buffer {
187 /* common v4l buffer stuff -- must be first */
188 struct videobuf_buffer vb;
189
190 /* cx23885 specific */
191 unsigned int bpl;
192 struct btcx_riscmem risc;
193 struct cx23885_fmt *fmt;
194 u32 count;
195};
196
197struct cx23885_input {
198 enum cx23885_itype type;
199 unsigned int vmux;
8304be88 200 unsigned int amux;
d19770e5
ST		 201 u32 gpio0, gpio1, gpio2, gpio3;
202};
203
661c7e44
ST		 204typedef enum {
205 CX23885_MPEG_UNDEFINED = 0,
7b888014
ST		 206 CX23885_MPEG_DVB,
207 CX23885_ANALOG_VIDEO,
b1b81f1d 208 CX23885_MPEG_ENCODER,
661c7e44
ST		 209} port_t;
210
d19770e5
ST		 211struct cx23885_board {
212 char *name;
7b888014 213 port_t porta, portb, portc;
10d0dcd7 214 int num_fds_portb, num_fds_portc;
7b888014
ST		 215 unsigned int tuner_type;
216 unsigned int radio_type;
217 unsigned char tuner_addr;
218 unsigned char radio_addr;
557f48d5 219 unsigned int tuner_bus;
c7712613
ST		 220
221 /* Vendors can and do run the PCIe bridge at different
222 * clock rates, driven physically by crystals on the PCBs.
25985edc 223 * The core has to accommodate this. This allows the user
c7712613
ST		 224 * to add new boards with new frequencys. The value is
225 * expressed in Hz.
226 *
227 * The core framework will default this value based on
228 * current designs, but it can vary.
229 */
230 u32 clk_freq;
d19770e5 231 struct cx23885_input input[MAX_CX23885_INPUT];
78db8547 232 int ci_type; /* for NetUP */
35045137
ST		 233 /* Force bottom field first during DMA (888 workaround) */
234 u32 force_bff;
d19770e5
ST		 235};
236
237struct cx23885_subid {
238 u16 subvendor;
239 u16 subdevice;
240 u32 card;
241};
242
243struct cx23885_i2c {
244 struct cx23885_dev *dev;
245
246 int nr;
247
248 /* i2c i/o */
249 struct i2c_adapter i2c_adap;
d19770e5
ST		 250 struct i2c_client i2c_client;
251 u32 i2c_rc;
252
253 /* 885 registers used for raw addess */
254 u32 i2c_period;
255 u32 reg_ctrl;
256 u32 reg_stat;
257 u32 reg_addr;
258 u32 reg_rdata;
259 u32 reg_wdata;
260};
261
262struct cx23885_dmaqueue {
263 struct list_head active;
264 struct list_head queued;
265 struct timer_list timeout;
266 struct btcx_riscmem stopper;
267 u32 count;
268};
269
270struct cx23885_tsport {
271 struct cx23885_dev *dev;
272
273 int nr;
274 int sram_chno;
275
363c35fc 276 struct videobuf_dvb_frontends frontends;
d19770e5
ST		 277
278 /* dma queues */
279 struct cx23885_dmaqueue mpegq;
280 u32 ts_packet_size;
281 u32 ts_packet_count;
282
283 int width;
284 int height;
285
286 spinlock_t slock;
287
288 /* registers */
289 u32 reg_gpcnt;
290 u32 reg_gpcnt_ctl;
291 u32 reg_dma_ctl;
292 u32 reg_lngth;
293 u32 reg_hw_sop_ctrl;
294 u32 reg_gen_ctrl;
295 u32 reg_bd_pkt_status;
296 u32 reg_sop_status;
297 u32 reg_fifo_ovfl_stat;
298 u32 reg_vld_misc;
299 u32 reg_ts_clk_en;
300 u32 reg_ts_int_msk;
a6a3f140 301 u32 reg_ts_int_stat;
579f1163 302 u32 reg_src_sel;
d19770e5
ST		 303
304 /* Default register vals */
305 int pci_irqmask;
306 u32 dma_ctl_val;
307 u32 ts_int_msk_val;
308 u32 gen_ctrl_val;
309 u32 ts_clk_en_val;
579f1163 310 u32 src_sel_val;
b1b81f1d
ST		 311 u32 vld_misc_val;
312 u32 hw_sop_ctrl_val;
a739a7e4
ST		 313
314 /* Allow a single tsport to have multiple frontends */
315 u32 num_frontends;
78db8547 316 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
5a23b076 317 void *port_priv;
35045137
ST		 318
319 /* Workaround for a temp dvb_frontend that the tuner can attached to */
320 struct dvb_frontend analog_fe;
d19770e5
ST		 321};
322
43c24078
AW		 323struct cx23885_kernel_ir {
324 struct cx23885_dev *cx;
eeefae53
AW		 325 char *name;
326 char *phys;
327
d8b4b582 328 struct rc_dev *rc;
eeefae53
AW		 329};
330
9e44d632
MM		 331struct cx23885_audio_buffer {
332 unsigned int bpl;
333 struct btcx_riscmem risc;
334 struct videobuf_dmabuf dma;
335};
336
337struct cx23885_audio_dev {
338 struct cx23885_dev *dev;
339
340 struct pci_dev *pci;
341
342 struct snd_card *card;
343
344 spinlock_t lock;
345
346 atomic_t count;
347
348 unsigned int dma_size;
349 unsigned int period_size;
350 unsigned int num_periods;
351
352 struct videobuf_dmabuf *dma_risc;
353
354 struct cx23885_audio_buffer *buf;
355
356 struct snd_pcm_substream *substream;
357};
358
d19770e5 359struct cx23885_dev {
d19770e5 360 atomic_t refcount;
c0714f6c 361 struct v4l2_device v4l2_dev;
d19770e5
ST		 362
363 /* pci stuff */
364 struct pci_dev *pci;
365 unsigned char pci_rev, pci_lat;
366 int pci_bus, pci_slot;
367 u32 __iomem *lmmio;
368 u8 __iomem *bmmio;
d19770e5 369 int pci_irqmask;
dbe83a3b 370 spinlock_t pci_irqmask_lock; /* protects mask reg too */
0ac5881a 371 int hwrevision;
d19770e5 372
c7712613
ST		 373 /* This valud is board specific and is used to configure the
374 * AV core so we see nice clean and stable video and audio. */
375 u32 clk_freq;
376
44a6481d 377 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5
ST		 378 struct cx23885_i2c i2c_bus[3];
379
380 int nr;
381 struct mutex lock;
8386c27f 382 struct mutex gpio_lock;
d19770e5
ST		 383
384 /* board details */
385 unsigned int board;
386 char name[32];
387
a6a3f140 388 struct cx23885_tsport ts1, ts2;
d19770e5
ST		 389
390 /* sram configuration */
391 struct sram_channel *sram_channels;
e133be0f
ST		 392
393 enum {
394 CX23885_BRIDGE_UNDEFINED = 0,
395 CX23885_BRIDGE_885 = 885,
396 CX23885_BRIDGE_887 = 887,
25ea66e2 397 CX23885_BRIDGE_888 = 888,
e133be0f 398 } bridge;
7b888014
ST		 399
400 /* Analog video */
401 u32 resources;
402 unsigned int input;
fc1a889d 403 unsigned int audinput; /* Selectable audio input */
7b888014
ST		 404 u32 tvaudio;
405 v4l2_std_id tvnorm;
406 unsigned int tuner_type;
407 unsigned char tuner_addr;
557f48d5 408 unsigned int tuner_bus;
7b888014
ST		 409 unsigned int radio_type;
410 unsigned char radio_addr;
411 unsigned int has_radio;
0d5a19f1 412 struct v4l2_subdev *sd_cx25840;
e5514f10 413 struct work_struct cx25840_work;
f59ad611
AW		 414
415 /* Infrared */
416 struct v4l2_subdev *sd_ir;
417 struct work_struct ir_rx_work;
418 unsigned long ir_rx_notifications;
419 struct work_struct ir_tx_work;
420 unsigned long ir_tx_notifications;
7b888014 421
43c24078 422 struct cx23885_kernel_ir *kernel_ir;
dbda8f70
AW		 423 atomic_t ir_input_stopping;
424
7b888014
ST		 425 /* V4l */
426 u32 freq;
427 struct video_device *video_dev;
428 struct video_device *vbi_dev;
429 struct video_device *radio_dev;
430
431 struct cx23885_dmaqueue vidq;
432 struct cx23885_dmaqueue vbiq;
433 spinlock_t slock;
b1b81f1d
ST		 434
435 /* MPEG Encoder ONLY settings */
436 u32 cx23417_mailbox;
437 struct cx2341x_mpeg_params mpeg_params;
438 struct video_device *v4l_device;
439 atomic_t v4l_reader_count;
440 struct cx23885_tvnorm encodernorm;
441
9e44d632
MM		 442 /* Analog raw audio */
443 struct cx23885_audio_dev *audio_dev;
444
d19770e5
ST		 445};
446
c0714f6c
HV		 447static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
448{
449 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
450}
451
0d5a19f1
HV		 452#define call_all(dev, o, f, args...) \
453 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
454
d6b1850d
AW		 455#define CX23885_HW_888_IR (1 << 0)
456#define CX23885_HW_AV_CORE (1 << 1)
29f8a0a5
AW		 457
458#define call_hw(dev, grpid, o, f, args...) \
459 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
460
461extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
462
d19770e5
ST		 463#define SRAM_CH01 0 /* Video A */
464#define SRAM_CH02 1 /* VBI A */
465#define SRAM_CH03 2 /* Video B */
466#define SRAM_CH04 3 /* Transport via B */
467#define SRAM_CH05 4 /* VBI B */
468#define SRAM_CH06 5 /* Video C */
469#define SRAM_CH07 6 /* Transport via C */
470#define SRAM_CH08 7 /* Audio Internal A */
471#define SRAM_CH09 8 /* Audio Internal B */
472#define SRAM_CH10 9 /* Audio External */
473#define SRAM_CH11 10 /* COMB_3D_N */
474#define SRAM_CH12 11 /* Comb 3D N1 */
475#define SRAM_CH13 12 /* Comb 3D N2 */
476#define SRAM_CH14 13 /* MOE Vid */
477#define SRAM_CH15 14 /* MOE RSLT */
478
479struct sram_channel {
480 char *name;
481 u32 cmds_start;
482 u32 ctrl_start;
483 u32 cdt;
1ebcad77 484 u32 fifo_start;
d19770e5
ST		 485 u32 fifo_size;
486 u32 ptr1_reg;
487 u32 ptr2_reg;
488 u32 cnt1_reg;
489 u32 cnt2_reg;
490 u32 jumponly;
491};
492
493/* ----------------------------------------------------------- */
494
495#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
9c8ced51 496#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
d19770e5 497
9c8ced51 498#define cx_andor(reg, mask, value) \
d19770e5
ST		 499 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
500 ((value) & (mask)), dev->lmmio+((reg)>>2))
501
9c8ced51
ST		 502#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
503#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
d19770e5 504
d19770e5 505/* ----------------------------------------------------------- */
7b888014
ST		 506/* cx23885-core.c */
507
508extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
509 struct sram_channel *ch,
510 unsigned int bpl, u32 risc);
511
512extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
513 struct sram_channel *ch);
d19770e5 514
7b888014
ST		 515extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
516 u32 reg, u32 mask, u32 value);
517
518extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
519 struct scatterlist *sglist,
520 unsigned int top_offset, unsigned int bottom_offset,
521 unsigned int bpl, unsigned int padding, unsigned int lines);
522
5ab27e6d
ST		 523extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
524 struct btcx_riscmem *risc, struct scatterlist *sglist,
525 unsigned int top_offset, unsigned int bottom_offset,
526 unsigned int bpl, unsigned int padding, unsigned int lines);
527
7b888014
ST		 528void cx23885_cancel_buffers(struct cx23885_tsport *port);
529
530extern int cx23885_restart_queue(struct cx23885_tsport *port,
531 struct cx23885_dmaqueue *q);
532
533extern void cx23885_wakeup(struct cx23885_tsport *port,
534 struct cx23885_dmaqueue *q, u32 count);
535
6f8bee9b
ST		 536extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
537extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
09ea33e5 538extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
6f8bee9b
ST		 539extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
540 int asoutput);
541
dbe83a3b
AW		 542extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
543extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
544extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
545extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
7b888014
ST		 546
547/* ----------------------------------------------------------- */
548/* cx23885-cards.c */
d19770e5
ST		 549extern struct cx23885_board cx23885_boards[];
550extern const unsigned int cx23885_bcount;
551
552extern struct cx23885_subid cx23885_subids[];
553extern const unsigned int cx23885_idcount;
554
9c8ced51
ST		 555extern int cx23885_tuner_callback(void *priv, int component,
556 int command, int arg);
d19770e5 557extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 558extern int cx23885_ir_init(struct cx23885_dev *dev);
f59ad611
AW		 559extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
560extern void cx23885_ir_fini(struct cx23885_dev *dev);
a6a3f140 561extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5
ST		 562extern void cx23885_card_setup(struct cx23885_dev *dev);
563extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
564
565extern int cx23885_dvb_register(struct cx23885_tsport *port);
566extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
567
44a6481d
MK		 568extern int cx23885_buf_prepare(struct videobuf_queue *q,
569 struct cx23885_tsport *port,
570 struct cx23885_buffer *buf,
571 enum v4l2_field field);
44a6481d
MK		 572extern void cx23885_buf_queue(struct cx23885_tsport *port,
573 struct cx23885_buffer *buf);
574extern void cx23885_free_buffer(struct videobuf_queue *q,
575 struct cx23885_buffer *buf);
d19770e5
ST		 576
577/* ----------------------------------------------------------- */
7b888014
ST		 578/* cx23885-video.c */
579/* Video */
580extern int cx23885_video_register(struct cx23885_dev *dev);
581extern void cx23885_video_unregister(struct cx23885_dev *dev);
582extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
b5f74050
ST		 583extern void cx23885_video_wakeup(struct cx23885_dev *dev,
584 struct cx23885_dmaqueue *q, u32 count);
35045137
ST		 585int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
586int cx23885_set_input(struct file *file, void *priv, unsigned int i);
587int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
588int cx23885_set_frequency(struct file *file, void *priv, struct v4l2_frequency *f);
589int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
590int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
591int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
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ST		 592
593/* ----------------------------------------------------------- */
594/* cx23885-vbi.c */
595extern int cx23885_vbi_fmt(struct file *file, void *priv,
596 struct v4l2_format *f);
597extern void cx23885_vbi_timeout(unsigned long data);
598extern struct videobuf_queue_ops cx23885_vbi_qops;
b5f74050
ST		 599extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
600 struct cx23885_dmaqueue *q);
601extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
7b888014 602
d19770e5
ST		 603/* cx23885-i2c.c */
604extern int cx23885_i2c_register(struct cx23885_i2c *bus);
605extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
a589b665 606extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5 607
b1b81f1d
ST		 608/* ----------------------------------------------------------- */
609/* cx23885-417.c */
610extern int cx23885_417_register(struct cx23885_dev *dev);
611extern void cx23885_417_unregister(struct cx23885_dev *dev);
612extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
613extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
614extern void cx23885_mc417_init(struct cx23885_dev *dev);
615extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
616extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
74618244
AW		 617extern int mc417_register_read(struct cx23885_dev *dev,
618 u16 address, u32 *value);
619extern int mc417_register_write(struct cx23885_dev *dev,
620 u16 address, u32 value);
f659c513
ST		 621extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
622extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
623extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
b1b81f1d 624
9e44d632
MM		 625/* ----------------------------------------------------------- */
626/* cx23885-alsa.c */
efa762f5
ST		 627extern struct cx23885_audio_dev *cx23885_audio_register(
628 struct cx23885_dev *dev);
629extern void cx23885_audio_unregister(struct cx23885_dev *dev);
9e44d632
MM		 630extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
631extern int cx23885_risc_databuffer(struct pci_dev *pci,
632 struct btcx_riscmem *risc,
633 struct scatterlist *sglist,
634 unsigned int bpl,
635 unsigned int lines,
636 unsigned int lpi);
b1b81f1d 637
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ST		 638/* ----------------------------------------------------------- */
639/* tv norms */
640
641static inline unsigned int norm_maxw(v4l2_std_id norm)
642{
643 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
644}
645
646static inline unsigned int norm_maxh(v4l2_std_id norm)
647{
648 return (norm & V4L2_STD_625_50) ? 576 : 480;
649}
650
651static inline unsigned int norm_swidth(v4l2_std_id norm)
652{
653 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
654}
Linux kernel - Deliverables
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