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[media] v4l2: add const to argument of write-only s_frequency ioctl
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885.h
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
d19770e5 24#include <linux/kdev_t.h>
5a0e3ad6 25#include <linux/slab.h>
d19770e5 26
c0714f6c 27#include <media/v4l2-device.h>
d19770e5
ST		 28#include <media/tuner.h>
29#include <media/tveeprom.h>
409d84f8
TP		 30#include <media/videobuf-dma-sg.h>
31#include <media/videobuf-dvb.h>
6bda9644 32#include <media/rc-core.h>
d19770e5
ST		 33
34#include "btcx-risc.h"
35#include "cx23885-reg.h"
b1b81f1d 36#include "media/cx2341x.h"
d19770e5 37
d19770e5
ST		 38#include <linux/mutex.h>
39
1990d50b 40#define CX23885_VERSION "0.0.3"
d19770e5
ST		 41
42#define UNSET (-1U)
43
44#define CX23885_MAXBOARDS 8
45
d19770e5
ST		 46/* Max number of inputs by card */
47#define MAX_CX23885_INPUT 8
7b888014
ST		 48#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49#define RESOURCE_OVERLAY 1
50#define RESOURCE_VIDEO 2
51#define RESOURCE_VBI 4
d19770e5 52
d19770e5
ST		 53#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55#define CX23885_BOARD_NOAUTO UNSET
56#define CX23885_BOARD_UNKNOWN 0
57#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc 59#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa 60#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55 61#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835 62#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166 63#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c 64#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373 65#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7 66#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186 67#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a 68#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
9bb1b7e8 69#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
96318d0c 70#define CX23885_BOARD_TBS_6920 14
579943f5 71#define CX23885_BOARD_TEVII_S470 15
c9b8b04b 72#define CX23885_BOARD_DVBWORLD_2005 16
5a23b076 73#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
2074dffa 74#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
d099becb 75#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
19bc5796 76#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
6b926eca 77#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
493b7127 78#define CX23885_BOARD_MYGICA_X8506 22
2365b2d3 79#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
13697380 80#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
34e383dd 81#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
aee0b24c 82#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
ea5697fe 83#define CX23885_BOARD_MYGICA_X8558PRO 27
0b32d65c 84#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
9028f58f 85#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
78db8547 86#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
0cf8af57 87#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
2cb9ccd4 88#define CX23885_BOARD_MPX885 32
87988753 89#define CX23885_BOARD_MYGICA_X8507 33
722c90eb 90#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
7b134e85 91#define CX23885_BOARD_TEVII_S471 35
0ac60acb 92#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
f667190b 93#define CX23885_BOARD_PROF_8000 37
7c62f5a1 94#define CX23885_BOARD_HAUPPAUGE_HVR4400 38
e8d42373 95#define CX23885_BOARD_AVERMEDIA_HC81R 39
d19770e5 96
6f8bee9b
ST		 97#define GPIO_0 0x00000001
98#define GPIO_1 0x00000002
99#define GPIO_2 0x00000004
100#define GPIO_3 0x00000008
101#define GPIO_4 0x00000010
102#define GPIO_5 0x00000020
103#define GPIO_6 0x00000040
104#define GPIO_7 0x00000080
105#define GPIO_8 0x00000100
106#define GPIO_9 0x00000200
f659c513
ST		 107#define GPIO_10 0x00000400
108#define GPIO_11 0x00000800
109#define GPIO_12 0x00001000
110#define GPIO_13 0x00002000
111#define GPIO_14 0x00004000
112#define GPIO_15 0x00008000
6f8bee9b 113
7b888014
ST		 114/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
115#define CX23885_NORMS (\
116 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
117 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
118 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
119 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
120
121struct cx23885_fmt {
122 char *name;
123 u32 fourcc; /* v4l2 format id */
124 int depth;
125 int flags;
126 u32 cxformat;
127};
128
129struct cx23885_ctrl {
130 struct v4l2_queryctrl v;
131 u32 off;
132 u32 reg;
133 u32 mask;
134 u32 shift;
135};
136
137struct cx23885_tvnorm {
138 char *name;
139 v4l2_std_id id;
140 u32 cxiformat;
141 u32 cxoformat;
142};
143
144struct cx23885_fh {
145 struct cx23885_dev *dev;
146 enum v4l2_buf_type type;
147 int radio;
148 u32 resources;
149
150 /* video overlay */
151 struct v4l2_window win;
152 struct v4l2_clip *clips;
153 unsigned int nclips;
154
155 /* video capture */
156 struct cx23885_fmt *fmt;
157 unsigned int width, height;
158
159 /* vbi capture */
160 struct videobuf_queue vidq;
161 struct videobuf_queue vbiq;
162
163 /* MPEG Encoder specifics ONLY */
164 struct videobuf_queue mpegq;
165 atomic_t v4l_reading;
166};
167
d19770e5
ST		 168enum cx23885_itype {
169 CX23885_VMUX_COMPOSITE1 = 1,
170 CX23885_VMUX_COMPOSITE2,
171 CX23885_VMUX_COMPOSITE3,
172 CX23885_VMUX_COMPOSITE4,
173 CX23885_VMUX_SVIDEO,
dac65fa1 174 CX23885_VMUX_COMPONENT,
d19770e5
ST		 175 CX23885_VMUX_TELEVISION,
176 CX23885_VMUX_CABLE,
177 CX23885_VMUX_DVB,
178 CX23885_VMUX_DEBUG,
179 CX23885_RADIO,
180};
181
579f1163
ST		 182enum cx23885_src_sel_type {
183 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
184 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
185};
186
d19770e5
ST		 187/* buffer for one video frame */
188struct cx23885_buffer {
189 /* common v4l buffer stuff -- must be first */
190 struct videobuf_buffer vb;
191
192 /* cx23885 specific */
193 unsigned int bpl;
194 struct btcx_riscmem risc;
195 struct cx23885_fmt *fmt;
196 u32 count;
197};
198
199struct cx23885_input {
200 enum cx23885_itype type;
201 unsigned int vmux;
8304be88 202 unsigned int amux;
d19770e5
ST		 203 u32 gpio0, gpio1, gpio2, gpio3;
204};
205
661c7e44
ST		 206typedef enum {
207 CX23885_MPEG_UNDEFINED = 0,
7b888014
ST		 208 CX23885_MPEG_DVB,
209 CX23885_ANALOG_VIDEO,
b1b81f1d 210 CX23885_MPEG_ENCODER,
661c7e44
ST		 211} port_t;
212
d19770e5
ST		 213struct cx23885_board {
214 char *name;
7b888014 215 port_t porta, portb, portc;
10d0dcd7 216 int num_fds_portb, num_fds_portc;
7b888014
ST		 217 unsigned int tuner_type;
218 unsigned int radio_type;
219 unsigned char tuner_addr;
220 unsigned char radio_addr;
557f48d5 221 unsigned int tuner_bus;
c7712613
ST		 222
223 /* Vendors can and do run the PCIe bridge at different
224 * clock rates, driven physically by crystals on the PCBs.
25985edc 225 * The core has to accommodate this. This allows the user
c7712613
ST		 226 * to add new boards with new frequencys. The value is
227 * expressed in Hz.
228 *
229 * The core framework will default this value based on
230 * current designs, but it can vary.
231 */
232 u32 clk_freq;
d19770e5 233 struct cx23885_input input[MAX_CX23885_INPUT];
78db8547 234 int ci_type; /* for NetUP */
35045137
ST		 235 /* Force bottom field first during DMA (888 workaround) */
236 u32 force_bff;
d19770e5
ST		 237};
238
239struct cx23885_subid {
240 u16 subvendor;
241 u16 subdevice;
242 u32 card;
243};
244
245struct cx23885_i2c {
246 struct cx23885_dev *dev;
247
248 int nr;
249
250 /* i2c i/o */
251 struct i2c_adapter i2c_adap;
d19770e5
ST		 252 struct i2c_client i2c_client;
253 u32 i2c_rc;
254
255 /* 885 registers used for raw addess */
256 u32 i2c_period;
257 u32 reg_ctrl;
258 u32 reg_stat;
259 u32 reg_addr;
260 u32 reg_rdata;
261 u32 reg_wdata;
262};
263
264struct cx23885_dmaqueue {
265 struct list_head active;
266 struct list_head queued;
267 struct timer_list timeout;
268 struct btcx_riscmem stopper;
269 u32 count;
270};
271
272struct cx23885_tsport {
273 struct cx23885_dev *dev;
274
275 int nr;
276 int sram_chno;
277
363c35fc 278 struct videobuf_dvb_frontends frontends;
d19770e5
ST		 279
280 /* dma queues */
281 struct cx23885_dmaqueue mpegq;
282 u32 ts_packet_size;
283 u32 ts_packet_count;
284
285 int width;
286 int height;
287
288 spinlock_t slock;
289
290 /* registers */
291 u32 reg_gpcnt;
292 u32 reg_gpcnt_ctl;
293 u32 reg_dma_ctl;
294 u32 reg_lngth;
295 u32 reg_hw_sop_ctrl;
296 u32 reg_gen_ctrl;
297 u32 reg_bd_pkt_status;
298 u32 reg_sop_status;
299 u32 reg_fifo_ovfl_stat;
300 u32 reg_vld_misc;
301 u32 reg_ts_clk_en;
302 u32 reg_ts_int_msk;
a6a3f140 303 u32 reg_ts_int_stat;
579f1163 304 u32 reg_src_sel;
d19770e5
ST		 305
306 /* Default register vals */
307 int pci_irqmask;
308 u32 dma_ctl_val;
309 u32 ts_int_msk_val;
310 u32 gen_ctrl_val;
311 u32 ts_clk_en_val;
579f1163 312 u32 src_sel_val;
b1b81f1d
ST		 313 u32 vld_misc_val;
314 u32 hw_sop_ctrl_val;
a739a7e4
ST		 315
316 /* Allow a single tsport to have multiple frontends */
317 u32 num_frontends;
78db8547 318 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
5a23b076 319 void *port_priv;
35045137
ST		 320
321 /* Workaround for a temp dvb_frontend that the tuner can attached to */
322 struct dvb_frontend analog_fe;
d19770e5
ST		 323};
324
43c24078
AW		 325struct cx23885_kernel_ir {
326 struct cx23885_dev *cx;
eeefae53
AW		 327 char *name;
328 char *phys;
329
d8b4b582 330 struct rc_dev *rc;
eeefae53
AW		 331};
332
9e44d632
MM		 333struct cx23885_audio_buffer {
334 unsigned int bpl;
335 struct btcx_riscmem risc;
336 struct videobuf_dmabuf dma;
337};
338
339struct cx23885_audio_dev {
340 struct cx23885_dev *dev;
341
342 struct pci_dev *pci;
343
344 struct snd_card *card;
345
346 spinlock_t lock;
347
348 atomic_t count;
349
350 unsigned int dma_size;
351 unsigned int period_size;
352 unsigned int num_periods;
353
354 struct videobuf_dmabuf *dma_risc;
355
356 struct cx23885_audio_buffer *buf;
357
358 struct snd_pcm_substream *substream;
359};
360
d19770e5 361struct cx23885_dev {
d19770e5 362 atomic_t refcount;
c0714f6c 363 struct v4l2_device v4l2_dev;
d19770e5
ST		 364
365 /* pci stuff */
366 struct pci_dev *pci;
367 unsigned char pci_rev, pci_lat;
368 int pci_bus, pci_slot;
369 u32 __iomem *lmmio;
370 u8 __iomem *bmmio;
d19770e5 371 int pci_irqmask;
dbe83a3b 372 spinlock_t pci_irqmask_lock; /* protects mask reg too */
0ac5881a 373 int hwrevision;
d19770e5 374
c7712613
ST		 375 /* This valud is board specific and is used to configure the
376 * AV core so we see nice clean and stable video and audio. */
377 u32 clk_freq;
378
44a6481d 379 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5
ST		 380 struct cx23885_i2c i2c_bus[3];
381
382 int nr;
383 struct mutex lock;
8386c27f 384 struct mutex gpio_lock;
d19770e5
ST		 385
386 /* board details */
387 unsigned int board;
388 char name[32];
389
a6a3f140 390 struct cx23885_tsport ts1, ts2;
d19770e5
ST		 391
392 /* sram configuration */
393 struct sram_channel *sram_channels;
e133be0f
ST		 394
395 enum {
396 CX23885_BRIDGE_UNDEFINED = 0,
397 CX23885_BRIDGE_885 = 885,
398 CX23885_BRIDGE_887 = 887,
25ea66e2 399 CX23885_BRIDGE_888 = 888,
e133be0f 400 } bridge;
7b888014
ST		 401
402 /* Analog video */
403 u32 resources;
404 unsigned int input;
fc1a889d 405 unsigned int audinput; /* Selectable audio input */
7b888014
ST		 406 u32 tvaudio;
407 v4l2_std_id tvnorm;
408 unsigned int tuner_type;
409 unsigned char tuner_addr;
557f48d5 410 unsigned int tuner_bus;
7b888014
ST		 411 unsigned int radio_type;
412 unsigned char radio_addr;
413 unsigned int has_radio;
0d5a19f1 414 struct v4l2_subdev *sd_cx25840;
e5514f10 415 struct work_struct cx25840_work;
f59ad611
AW		 416
417 /* Infrared */
418 struct v4l2_subdev *sd_ir;
419 struct work_struct ir_rx_work;
420 unsigned long ir_rx_notifications;
421 struct work_struct ir_tx_work;
422 unsigned long ir_tx_notifications;
7b888014 423
43c24078 424 struct cx23885_kernel_ir *kernel_ir;
dbda8f70
AW		 425 atomic_t ir_input_stopping;
426
7b888014
ST		 427 /* V4l */
428 u32 freq;
429 struct video_device *video_dev;
430 struct video_device *vbi_dev;
431 struct video_device *radio_dev;
432
433 struct cx23885_dmaqueue vidq;
434 struct cx23885_dmaqueue vbiq;
435 spinlock_t slock;
b1b81f1d
ST		 436
437 /* MPEG Encoder ONLY settings */
438 u32 cx23417_mailbox;
439 struct cx2341x_mpeg_params mpeg_params;
440 struct video_device *v4l_device;
441 atomic_t v4l_reader_count;
442 struct cx23885_tvnorm encodernorm;
443
9e44d632
MM		 444 /* Analog raw audio */
445 struct cx23885_audio_dev *audio_dev;
446
d19770e5
ST		 447};
448
c0714f6c
HV		 449static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
450{
451 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
452}
453
0d5a19f1
HV		 454#define call_all(dev, o, f, args...) \
455 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
456
d6b1850d
AW		 457#define CX23885_HW_888_IR (1 << 0)
458#define CX23885_HW_AV_CORE (1 << 1)
29f8a0a5
AW		 459
460#define call_hw(dev, grpid, o, f, args...) \
461 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
462
463extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
464
d19770e5
ST		 465#define SRAM_CH01 0 /* Video A */
466#define SRAM_CH02 1 /* VBI A */
467#define SRAM_CH03 2 /* Video B */
468#define SRAM_CH04 3 /* Transport via B */
469#define SRAM_CH05 4 /* VBI B */
470#define SRAM_CH06 5 /* Video C */
471#define SRAM_CH07 6 /* Transport via C */
472#define SRAM_CH08 7 /* Audio Internal A */
473#define SRAM_CH09 8 /* Audio Internal B */
474#define SRAM_CH10 9 /* Audio External */
475#define SRAM_CH11 10 /* COMB_3D_N */
476#define SRAM_CH12 11 /* Comb 3D N1 */
477#define SRAM_CH13 12 /* Comb 3D N2 */
478#define SRAM_CH14 13 /* MOE Vid */
479#define SRAM_CH15 14 /* MOE RSLT */
480
481struct sram_channel {
482 char *name;
483 u32 cmds_start;
484 u32 ctrl_start;
485 u32 cdt;
1ebcad77 486 u32 fifo_start;
d19770e5
ST		 487 u32 fifo_size;
488 u32 ptr1_reg;
489 u32 ptr2_reg;
490 u32 cnt1_reg;
491 u32 cnt2_reg;
492 u32 jumponly;
493};
494
495/* ----------------------------------------------------------- */
496
497#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
9c8ced51 498#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
d19770e5 499
9c8ced51 500#define cx_andor(reg, mask, value) \
d19770e5
ST		 501 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
502 ((value) & (mask)), dev->lmmio+((reg)>>2))
503
9c8ced51
ST		 504#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
505#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
d19770e5 506
d19770e5 507/* ----------------------------------------------------------- */
7b888014
ST		 508/* cx23885-core.c */
509
510extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
511 struct sram_channel *ch,
512 unsigned int bpl, u32 risc);
513
514extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
515 struct sram_channel *ch);
d19770e5 516
7b888014
ST		 517extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
518 u32 reg, u32 mask, u32 value);
519
520extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
521 struct scatterlist *sglist,
522 unsigned int top_offset, unsigned int bottom_offset,
523 unsigned int bpl, unsigned int padding, unsigned int lines);
524
5ab27e6d
ST		 525extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
526 struct btcx_riscmem *risc, struct scatterlist *sglist,
527 unsigned int top_offset, unsigned int bottom_offset,
528 unsigned int bpl, unsigned int padding, unsigned int lines);
529
7b888014
ST		 530void cx23885_cancel_buffers(struct cx23885_tsport *port);
531
532extern int cx23885_restart_queue(struct cx23885_tsport *port,
533 struct cx23885_dmaqueue *q);
534
535extern void cx23885_wakeup(struct cx23885_tsport *port,
536 struct cx23885_dmaqueue *q, u32 count);
537
6f8bee9b
ST		 538extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
539extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
09ea33e5 540extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
6f8bee9b
ST		 541extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
542 int asoutput);
543
dbe83a3b
AW		 544extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
545extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
546extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
547extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
7b888014
ST		 548
549/* ----------------------------------------------------------- */
550/* cx23885-cards.c */
d19770e5
ST		 551extern struct cx23885_board cx23885_boards[];
552extern const unsigned int cx23885_bcount;
553
554extern struct cx23885_subid cx23885_subids[];
555extern const unsigned int cx23885_idcount;
556
9c8ced51
ST		 557extern int cx23885_tuner_callback(void *priv, int component,
558 int command, int arg);
d19770e5 559extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 560extern int cx23885_ir_init(struct cx23885_dev *dev);
f59ad611
AW		 561extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
562extern void cx23885_ir_fini(struct cx23885_dev *dev);
a6a3f140 563extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5
ST		 564extern void cx23885_card_setup(struct cx23885_dev *dev);
565extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
566
567extern int cx23885_dvb_register(struct cx23885_tsport *port);
568extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
569
44a6481d
MK		 570extern int cx23885_buf_prepare(struct videobuf_queue *q,
571 struct cx23885_tsport *port,
572 struct cx23885_buffer *buf,
573 enum v4l2_field field);
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MK		 574extern void cx23885_buf_queue(struct cx23885_tsport *port,
575 struct cx23885_buffer *buf);
576extern void cx23885_free_buffer(struct videobuf_queue *q,
577 struct cx23885_buffer *buf);
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ST		 578
579/* ----------------------------------------------------------- */
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ST		 580/* cx23885-video.c */
581/* Video */
582extern int cx23885_video_register(struct cx23885_dev *dev);
583extern void cx23885_video_unregister(struct cx23885_dev *dev);
584extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
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ST		 585extern void cx23885_video_wakeup(struct cx23885_dev *dev,
586 struct cx23885_dmaqueue *q, u32 count);
35045137
ST		 587int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
588int cx23885_set_input(struct file *file, void *priv, unsigned int i);
589int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
b530a447 590int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
35045137
ST		 591int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
592int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
593int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
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ST		 594
595/* ----------------------------------------------------------- */
596/* cx23885-vbi.c */
597extern int cx23885_vbi_fmt(struct file *file, void *priv,
598 struct v4l2_format *f);
599extern void cx23885_vbi_timeout(unsigned long data);
600extern struct videobuf_queue_ops cx23885_vbi_qops;
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ST		 601extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
602 struct cx23885_dmaqueue *q);
603extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
7b888014 604
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ST		 605/* cx23885-i2c.c */
606extern int cx23885_i2c_register(struct cx23885_i2c *bus);
607extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
a589b665 608extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5 609
b1b81f1d
ST		 610/* ----------------------------------------------------------- */
611/* cx23885-417.c */
612extern int cx23885_417_register(struct cx23885_dev *dev);
613extern void cx23885_417_unregister(struct cx23885_dev *dev);
614extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
615extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
616extern void cx23885_mc417_init(struct cx23885_dev *dev);
617extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
618extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
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AW		 619extern int mc417_register_read(struct cx23885_dev *dev,
620 u16 address, u32 *value);
621extern int mc417_register_write(struct cx23885_dev *dev,
622 u16 address, u32 value);
f659c513
ST		 623extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
624extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
625extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
b1b81f1d 626
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MM		 627/* ----------------------------------------------------------- */
628/* cx23885-alsa.c */
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ST		 629extern struct cx23885_audio_dev *cx23885_audio_register(
630 struct cx23885_dev *dev);
631extern void cx23885_audio_unregister(struct cx23885_dev *dev);
9e44d632
MM		 632extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
633extern int cx23885_risc_databuffer(struct pci_dev *pci,
634 struct btcx_riscmem *risc,
635 struct scatterlist *sglist,
636 unsigned int bpl,
637 unsigned int lines,
638 unsigned int lpi);
b1b81f1d 639
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ST		 640/* ----------------------------------------------------------- */
641/* tv norms */
642
643static inline unsigned int norm_maxw(v4l2_std_id norm)
644{
645 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
646}
647
648static inline unsigned int norm_maxh(v4l2_std_id norm)
649{
650 return (norm & V4L2_STD_625_50) ? 576 : 480;
651}
652
653static inline unsigned int norm_swidth(v4l2_std_id norm)
654{
655 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
656}
Linux kernel - Deliverables
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