[media] saa7134: fix CodingStyle issues on the lines touched by pr_foo refactor
[deliverable/linux.git] / drivers / media / pci / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
9a12ccfc
MCC
23#include "saa7134.h"
24#include "saa7134-reg.h"
25
1da177e4
LT
26#include <linux/init.h>
27#include <linux/list.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
1da177e4
LT
30#include <linux/delay.h>
31#include <linux/kthread.h>
32#include <linux/suspend.h>
33
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
2930992c 43#include "xc5000.h"
1da177e4 44
e2ac28fa
IL
45#include "tda10086.h"
46#include "tda826x.h"
8ce47dad 47#include "tda827x.h"
e2ac28fa 48#include "isl6421.h"
4b1431ca 49#include "isl6405.h"
6ab465a8 50#include "lnbp21.h"
cb89cd33 51#include "tuner-simple.h"
1bc7f51c 52#include "tda10048.h"
3abdedd8
MK
53#include "tda18271.h"
54#include "lgdt3305.h"
55#include "tda8290.h"
f0551efc 56#include "mb86a20s.h"
ce02704d 57#include "lgs8gxx.h"
8ce47dad 58
47aeba5a 59#include "zl10353.h"
dbe8740d 60#include "qt1010.h"
47aeba5a 61
04574185 62#include "zl10036.h"
ecfcfec8 63#include "zl10039.h"
04574185 64#include "mt312.h"
25fa2071 65#include "s5h1411.h"
04574185 66
1da177e4
LT
67MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
68MODULE_LICENSE("GPL");
69
ff699e6b 70static unsigned int antenna_pwr;
86ddd96f 71
1da177e4
LT
72module_param(antenna_pwr, int, 0444);
73MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
74
ff699e6b 75static int use_frontend;
b331daa0
SB
76module_param(use_frontend, int, 0644);
77MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 78
78e92006
JG
79DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
80
58ef4f92
HH
81/* ------------------------------------------------------------------
82 * mt352 based DVB-T cards
83 */
84
1da177e4
LT
85static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
86{
87 u32 ok;
88
89 if (!on) {
90 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
91 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
92 return 0;
93 }
94
95 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
96 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
97 udelay(10);
98
99 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
100 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
101 udelay(10);
102 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
103 udelay(10);
104 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
7516657a 105 pr_debug("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
106
107 if (!ok)
108 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
109 return ok;
110}
111
112static int mt352_pinnacle_init(struct dvb_frontend* fe)
113{
114 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
115 static u8 reset [] = { RESET, 0x80 };
116 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
117 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
118 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
119 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
120 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
121 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
122 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
1da177e4 123
7516657a 124 pr_debug("%s called\n", __func__);
1da177e4
LT
125
126 mt352_write(fe, clock_config, sizeof(clock_config));
127 udelay(200);
128 mt352_write(fe, reset, sizeof(reset));
129 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
130 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
131 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
132 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
133
134 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
135 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
136 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 137
1da177e4
LT
138 return 0;
139}
140
a78d0bfa
JAR
141static int mt352_aver777_init(struct dvb_frontend* fe)
142{
143 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
144 static u8 reset [] = { RESET, 0x80 };
145 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
146 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
147 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
148
149 mt352_write(fe, clock_config, sizeof(clock_config));
150 udelay(200);
151 mt352_write(fe, reset, sizeof(reset));
152 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
153 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
154 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
155
156 return 0;
157}
158
6e501a3f 159static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 160{
6e501a3f
TF
161 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
162 static u8 reset [] = { RESET, 0x80 };
163 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
164 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
165 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
166
167 mt352_write(fe, clock_config, sizeof(clock_config));
168 udelay(200);
169 mt352_write(fe, reset, sizeof(reset));
170 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
171 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
172 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
173 return 0;
174}
175
14d24d14 176static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe)
1da177e4 177{
b09cf61d 178 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
df8cf706
HH
179 u8 off[] = { 0x00, 0xf1};
180 u8 on[] = { 0x00, 0x71};
181 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
182
1da177e4
LT
183 struct saa7134_dev *dev = fe->dvb->priv;
184 struct v4l2_frequency f;
185
186 /* set frequency (mt2050) */
187 f.tuner = 0;
188 f.type = V4L2_TUNER_DIGITAL_TV;
b09cf61d 189 f.frequency = c->frequency / 1000 * 16 / 1000;
dea74869
PB
190 if (fe->ops.i2c_gate_ctrl)
191 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 192 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 193 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 194 msg.buf = on;
dea74869
PB
195 if (fe->ops.i2c_gate_ctrl)
196 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 197 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
198
199 pinnacle_antenna_pwr(dev, antenna_pwr);
200
201 /* mt352 setup */
0463f12c 202 return mt352_pinnacle_init(fe);
1da177e4
LT
203}
204
205static struct mt352_config pinnacle_300i = {
206 .demod_address = 0x3c >> 1,
207 .adc_clock = 20333,
208 .if2 = 36150,
209 .no_tuner = 1,
210 .demod_init = mt352_pinnacle_init,
1da177e4 211};
a78d0bfa
JAR
212
213static struct mt352_config avermedia_777 = {
214 .demod_address = 0xf,
215 .demod_init = mt352_aver777_init,
a78d0bfa 216};
1da177e4 217
6e501a3f 218static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
219 .demod_address = (0x1e >> 1),
220 .no_tuner = 1,
6e501a3f 221 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
222};
223
f0551efc
MCC
224static struct tda18271_std_map mb86a20s_tda18271_std_map = {
225 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
226 .if_lvl = 7, .rfagc_top = 0x37, },
227};
228
229static struct tda18271_config kworld_tda18271_config = {
230 .std_map = &mb86a20s_tda18271_std_map,
6a58bc0f 231 .gate = TDA18271_GATE_DIGITAL,
ecb71d26
MCC
232 .config = 3, /* Use tuner callback for AGC */
233
f0551efc
MCC
234};
235
236static const struct mb86a20s_config kworld_mb86a20s_config = {
237 .demod_address = 0x10,
238};
239
6a58bc0f
MCC
240static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable)
241{
242 struct saa7134_dev *dev = fe->dvb->priv;
243
244 unsigned char initmsg[] = {0x45, 0x97};
245 unsigned char msg_enable[] = {0x45, 0xc1};
246 unsigned char msg_disable[] = {0x45, 0x81};
247 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
248
249 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
ae618919 250 pr_warn("could not access the I2C gate\n");
6a58bc0f
MCC
251 return -EIO;
252 }
253 if (enable)
254 msg.buf = msg_enable;
255 else
256 msg.buf = msg_disable;
257 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
ae618919 258 pr_warn("could not access the I2C gate\n");
6a58bc0f
MCC
259 return -EIO;
260 }
261 msleep(20);
262 return 0;
263}
264
58ef4f92
HH
265/* ==================================================================
266 * tda1004x based DVB-T cards, helper functions
267 */
268
269static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
270 const struct firmware **fw, char *name)
1da177e4
LT
271{
272 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
273 return request_firmware(fw, name, &dev->pci->dev);
274}
275
58ef4f92
HH
276/* ------------------------------------------------------------------
277 * these tuners are tu1216, td1316(a)
278 */
279
14d24d14 280static int philips_tda6651_pll_set(struct dvb_frontend *fe)
58ef4f92 281{
b09cf61d 282 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
58ef4f92
HH
283 struct saa7134_dev *dev = fe->dvb->priv;
284 struct tda1004x_state *state = fe->demodulator_priv;
285 u8 addr = state->config->tuner_address;
86ddd96f 286 u8 tuner_buf[4];
2cf36ac4 287 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
288 sizeof(tuner_buf) };
289 int tuner_frequency = 0;
290 u8 band, cp, filter;
291
292 /* determine charge pump */
b09cf61d 293 tuner_frequency = c->frequency + 36166000;
86ddd96f
MCC
294 if (tuner_frequency < 87000000)
295 return -EINVAL;
296 else if (tuner_frequency < 130000000)
297 cp = 3;
298 else if (tuner_frequency < 160000000)
299 cp = 5;
300 else if (tuner_frequency < 200000000)
301 cp = 6;
302 else if (tuner_frequency < 290000000)
303 cp = 3;
304 else if (tuner_frequency < 420000000)
305 cp = 5;
306 else if (tuner_frequency < 480000000)
307 cp = 6;
308 else if (tuner_frequency < 620000000)
309 cp = 3;
310 else if (tuner_frequency < 830000000)
311 cp = 5;
312 else if (tuner_frequency < 895000000)
313 cp = 7;
314 else
315 return -EINVAL;
316
317 /* determine band */
b09cf61d 318 if (c->frequency < 49000000)
86ddd96f 319 return -EINVAL;
b09cf61d 320 else if (c->frequency < 161000000)
86ddd96f 321 band = 1;
b09cf61d 322 else if (c->frequency < 444000000)
86ddd96f 323 band = 2;
b09cf61d 324 else if (c->frequency < 861000000)
86ddd96f
MCC
325 band = 4;
326 else
327 return -EINVAL;
328
329 /* setup PLL filter */
b09cf61d
MCC
330 switch (c->bandwidth_hz) {
331 case 6000000:
86ddd96f
MCC
332 filter = 0;
333 break;
334
b09cf61d 335 case 7000000:
86ddd96f
MCC
336 filter = 0;
337 break;
338
b09cf61d 339 case 8000000:
86ddd96f
MCC
340 filter = 1;
341 break;
1da177e4 342
86ddd96f
MCC
343 default:
344 return -EINVAL;
345 }
346
347 /* calculate divisor
348 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 349 */
b09cf61d 350 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
86ddd96f
MCC
351
352 /* setup tuner buffer */
353 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
354 tuner_buf[1] = tuner_frequency & 0xff;
355 tuner_buf[2] = 0xca;
356 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
357
dea74869
PB
358 if (fe->ops.i2c_gate_ctrl)
359 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 360 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
ae618919 361 pr_warn("could not write to tuner at addr: 0x%02x\n",
cf3c34c8 362 addr << 1);
86ddd96f 363 return -EIO;
58ef4f92 364 }
2cf36ac4
HH
365 msleep(1);
366 return 0;
367}
368
58ef4f92 369static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
370{
371 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
372 struct tda1004x_state *state = fe->demodulator_priv;
373 u8 addr = state->config->tuner_address;
2cf36ac4
HH
374 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
375 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 376
2cf36ac4 377 /* setup PLL configuration */
dea74869
PB
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
380 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
381 return -EIO;
86ddd96f 382 msleep(1);
2cf36ac4 383
1da177e4
LT
384 return 0;
385}
386
2cf36ac4
HH
387/* ------------------------------------------------------------------ */
388
2cf36ac4 389static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
390 .demod_address = 0x8,
391 .invert = 1,
2cf36ac4 392 .invert_oclk = 0,
86ddd96f
MCC
393 .xtal_freq = TDA10046_XTAL_4M,
394 .agc_config = TDA10046_AGC_DEFAULT,
395 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
396 .tuner_address = 0x60,
397 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
398};
399
2cf36ac4
HH
400static struct tda1004x_config philips_tu1216_61_config = {
401
402 .demod_address = 0x8,
403 .invert = 1,
404 .invert_oclk = 0,
405 .xtal_freq = TDA10046_XTAL_4M,
406 .agc_config = TDA10046_AGC_DEFAULT,
407 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
408 .tuner_address = 0x61,
409 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
410};
411
412/* ------------------------------------------------------------------ */
413
cbb94521 414static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
415{
416 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
417 struct tda1004x_state *state = fe->demodulator_priv;
418 u8 addr = state->config->tuner_address;
2cf36ac4 419 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 420 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
421
422 /* setup PLL configuration */
dea74869
PB
423 if (fe->ops.i2c_gate_ctrl)
424 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
425 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
426 return -EIO;
2cf36ac4
HH
427 return 0;
428}
429
14d24d14 430static int philips_td1316_tuner_set_params(struct dvb_frontend *fe)
2cf36ac4 431{
14d24d14 432 return philips_tda6651_pll_set(fe);
58ef4f92
HH
433}
434
435static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
436{
437 struct saa7134_dev *dev = fe->dvb->priv;
438 struct tda1004x_state *state = fe->demodulator_priv;
439 u8 addr = state->config->tuner_address;
440 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
441 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
442
443 /* switch the tuner to analog mode */
444 if (fe->ops.i2c_gate_ctrl)
445 fe->ops.i2c_gate_ctrl(fe, 1);
446 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
447 return -EIO;
448 return 0;
2cf36ac4
HH
449}
450
58ef4f92
HH
451/* ------------------------------------------------------------------ */
452
cbb94521
HH
453static int philips_europa_tuner_init(struct dvb_frontend *fe)
454{
455 struct saa7134_dev *dev = fe->dvb->priv;
456 static u8 msg[] = { 0x00, 0x40};
457 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
458
459
460 if (philips_td1316_tuner_init(fe))
461 return -EIO;
462 msleep(1);
463 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
464 return -EIO;
465
466 return 0;
467}
468
a79ddae9 469static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
470{
471 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 472
58ef4f92
HH
473 static u8 msg[] = { 0x00, 0x14 };
474 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
475
476 if (philips_td1316_tuner_sleep(fe))
477 return -EIO;
2cf36ac4
HH
478
479 /* switch the board to analog mode */
dea74869
PB
480 if (fe->ops.i2c_gate_ctrl)
481 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 482 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
483 return 0;
484}
485
486static int philips_europa_demod_sleep(struct dvb_frontend *fe)
487{
488 struct saa7134_dev *dev = fe->dvb->priv;
489
490 if (dev->original_demod_sleep)
491 dev->original_demod_sleep(fe);
dea74869 492 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 493 return 0;
2cf36ac4
HH
494}
495
496static struct tda1004x_config philips_europa_config = {
497
498 .demod_address = 0x8,
499 .invert = 0,
500 .invert_oclk = 0,
501 .xtal_freq = TDA10046_XTAL_4M,
502 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
503 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
504 .tuner_address = 0x61,
505 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
506};
507
408b664a 508static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
509 .demod_address = 0x08,
510 .invert = 1,
511 .invert_oclk = 0,
512 .xtal_freq = TDA10046_XTAL_16M,
513 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
514 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
515 .tuner_address = 0x61,
516 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
517};
518
128fe95d
VC
519static struct tda1004x_config technotrend_budget_t3000_config = {
520 .demod_address = 0x8,
521 .invert = 1,
522 .invert_oclk = 0,
523 .xtal_freq = TDA10046_XTAL_4M,
524 .agc_config = TDA10046_AGC_DEFAULT,
525 .if_freq = TDA10046_FREQ_3617,
526 .tuner_address = 0x63,
527 .request_firmware = philips_tda1004x_request_firmware
528};
529
58ef4f92
HH
530/* ------------------------------------------------------------------
531 * tda 1004x based cards with philips silicon tuner
532 */
533
58ef4f92
HH
534static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
535{
58ef4f92
HH
536 struct tda1004x_state *state = fe->demodulator_priv;
537
538 u8 addr = state->config->i2c_gate;
539 static u8 tda8290_close[] = { 0x21, 0xc0};
540 static u8 tda8290_open[] = { 0x21, 0x80};
541 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
542 if (enable) {
543 tda8290_msg.buf = tda8290_close;
544 } else {
545 tda8290_msg.buf = tda8290_open;
546 }
06be3035 547 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
ae618919 548 pr_warn("could not access tda8290 I2C gate\n");
58ef4f92
HH
549 return -EIO;
550 }
551 msleep(20);
552 return 0;
553}
554
58ef4f92 555static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 556{
90e9df7f 557 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 558 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 559
58ef4f92 560 switch (state->config->antenna_switch) {
6139ebc6
MCC
561 case 0:
562 break;
563 case 1:
564 pr_debug("setting GPIO21 to 0 (TV antenna?)\n");
58ef4f92
HH
565 saa7134_set_gpio(dev, 21, 0);
566 break;
6139ebc6
MCC
567 case 2:
568 pr_debug("setting GPIO21 to 1 (Radio antenna?)\n");
58ef4f92
HH
569 saa7134_set_gpio(dev, 21, 1);
570 break;
587d2fd7 571 }
587d2fd7
HH
572 return 0;
573}
574
58ef4f92 575static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 576{
58ef4f92
HH
577 struct saa7134_dev *dev = fe->dvb->priv;
578 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 579
58ef4f92 580 switch (state->config->antenna_switch) {
6139ebc6
MCC
581 case 0:
582 break;
583 case 1:
584 pr_debug("setting GPIO21 to 1 (Radio antenna?)\n");
58ef4f92
HH
585 saa7134_set_gpio(dev, 21, 1);
586 break;
6139ebc6
MCC
587 case 2:
588 pr_debug("setting GPIO21 to 0 (TV antenna?)\n");
58ef4f92
HH
589 saa7134_set_gpio(dev, 21, 0);
590 break;
591 }
587d2fd7 592 return 0;
2d6b5f62 593}
90e9df7f 594
d557dab5
MCC
595static int configure_tda827x_fe(struct saa7134_dev *dev,
596 struct tda1004x_config *cdec_conf,
597 struct tda827x_config *tuner_conf)
90e9df7f 598{
2ada815f 599 struct vb2_dvb_frontend *fe0;
363c35fc 600
92abe9ee 601 /* Get the first frontend */
2ada815f 602 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc 603
37e310ed
PST
604 if (!fe0)
605 return -EINVAL;
606
363c35fc
ST
607 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
608 if (fe0->dvb.frontend) {
7bff4b4d 609 if (cdec_conf->i2c_gate)
363c35fc
ST
610 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
611 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC
612 cdec_conf->tuner_address,
613 &dev->i2c_adap, tuner_conf))
614 return 0;
615
ae618919 616 pr_warn("no tda827x tuner found at addr: %02x\n",
7bff4b4d 617 cdec_conf->tuner_address);
58ef4f92 618 }
d557dab5 619 return -EINVAL;
90e9df7f
HH
620}
621
58ef4f92 622/* ------------------------------------------------------------------ */
261f5081 623
7bff4b4d 624static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
625 .init = philips_tda827x_tuner_init,
626 .sleep = philips_tda827x_tuner_sleep,
627 .config = 0,
628 .switch_addr = 0
629};
630
631static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
632 .init = philips_tda827x_tuner_init,
633 .sleep = philips_tda827x_tuner_sleep,
634 .config = 1,
635 .switch_addr = 0x4b
636};
637
638static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
639 .init = philips_tda827x_tuner_init,
640 .sleep = philips_tda827x_tuner_sleep,
641 .config = 2,
642 .switch_addr = 0x4b
643};
644
645static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
646 .init = philips_tda827x_tuner_init,
647 .sleep = philips_tda827x_tuner_sleep,
648 .config = 2,
649 .switch_addr = 0x42
650};
651
652/* ------------------------------------------------------------------ */
653
58ef4f92 654static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
655 .demod_address = 0x08,
656 .invert = 1,
657 .invert_oclk = 0,
658 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
659 .agc_config = TDA10046_AGC_TDA827X,
660 .gpio_config = TDA10046_GP11_I,
550a9a5e 661 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
662 .tuner_address = 0x60,
663 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 664};
550a9a5e 665
58ef4f92
HH
666static struct tda1004x_config philips_tiger_config = {
667 .demod_address = 0x08,
668 .invert = 1,
669 .invert_oclk = 0,
670 .xtal_freq = TDA10046_XTAL_16M,
671 .agc_config = TDA10046_AGC_TDA827X,
672 .gpio_config = TDA10046_GP11_I,
673 .if_freq = TDA10046_FREQ_045,
674 .i2c_gate = 0x4b,
675 .tuner_address = 0x61,
58ef4f92
HH
676 .antenna_switch= 1,
677 .request_firmware = philips_tda1004x_request_firmware
678};
550a9a5e
HH
679
680static struct tda1004x_config cinergy_ht_config = {
681 .demod_address = 0x08,
682 .invert = 1,
683 .invert_oclk = 0,
684 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
685 .agc_config = TDA10046_AGC_TDA827X,
686 .gpio_config = TDA10046_GP01_I,
90e9df7f 687 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
688 .i2c_gate = 0x4b,
689 .tuner_address = 0x61,
58ef4f92 690 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
691};
692
58ef4f92
HH
693static struct tda1004x_config cinergy_ht_pci_config = {
694 .demod_address = 0x08,
695 .invert = 1,
696 .invert_oclk = 0,
697 .xtal_freq = TDA10046_XTAL_16M,
698 .agc_config = TDA10046_AGC_TDA827X,
699 .gpio_config = TDA10046_GP01_I,
700 .if_freq = TDA10046_FREQ_045,
701 .i2c_gate = 0x4b,
702 .tuner_address = 0x60,
58ef4f92
HH
703 .request_firmware = philips_tda1004x_request_firmware
704};
705
706static struct tda1004x_config philips_tiger_s_config = {
707 .demod_address = 0x08,
708 .invert = 1,
709 .invert_oclk = 0,
710 .xtal_freq = TDA10046_XTAL_16M,
711 .agc_config = TDA10046_AGC_TDA827X,
712 .gpio_config = TDA10046_GP01_I,
713 .if_freq = TDA10046_FREQ_045,
714 .i2c_gate = 0x4b,
715 .tuner_address = 0x61,
58ef4f92
HH
716 .antenna_switch= 1,
717 .request_firmware = philips_tda1004x_request_firmware
718};
df42eaf2 719
587d2fd7
HH
720static struct tda1004x_config pinnacle_pctv_310i_config = {
721 .demod_address = 0x08,
722 .invert = 1,
723 .invert_oclk = 0,
724 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
725 .agc_config = TDA10046_AGC_TDA827X,
726 .gpio_config = TDA10046_GP11_I,
587d2fd7 727 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
728 .i2c_gate = 0x4b,
729 .tuner_address = 0x61,
58ef4f92 730 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
731};
732
c6e53daf
TG
733static struct tda1004x_config hauppauge_hvr_1110_config = {
734 .demod_address = 0x08,
735 .invert = 1,
736 .invert_oclk = 0,
737 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
738 .agc_config = TDA10046_AGC_TDA827X,
739 .gpio_config = TDA10046_GP11_I,
c6e53daf 740 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
741 .i2c_gate = 0x4b,
742 .tuner_address = 0x61,
743 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
744};
745
83646817
HH
746static struct tda1004x_config asus_p7131_dual_config = {
747 .demod_address = 0x08,
748 .invert = 1,
749 .invert_oclk = 0,
750 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
751 .agc_config = TDA10046_AGC_TDA827X,
752 .gpio_config = TDA10046_GP11_I,
83646817 753 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
754 .i2c_gate = 0x4b,
755 .tuner_address = 0x61,
58ef4f92
HH
756 .antenna_switch= 2,
757 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
758};
759
420f32fe
NS
760static struct tda1004x_config lifeview_trio_config = {
761 .demod_address = 0x09,
762 .invert = 1,
763 .invert_oclk = 0,
764 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
765 .agc_config = TDA10046_AGC_TDA827X,
766 .gpio_config = TDA10046_GP00_I,
420f32fe 767 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
768 .tuner_address = 0x60,
769 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
770};
771
58ef4f92 772static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
773 .demod_address = 0x08,
774 .invert = 1,
775 .invert_oclk = 0,
776 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 777 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 778 .gpio_config = TDA10046_GP11_I,
df42eaf2 779 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
780 .tuner_address = 0x60,
781 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
782};
783
58ef4f92 784static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
785 .demod_address = 0x08,
786 .invert = 1,
787 .invert_oclk = 0,
788 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 789 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 790 .gpio_config = TDA10046_GP01_I,
3dfb729f 791 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
792 .i2c_gate = 0x4b,
793 .tuner_address = 0x60,
58ef4f92 794 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
795};
796
e06cea4c
HH
797static struct tda1004x_config asus_p7131_4871_config = {
798 .demod_address = 0x08,
799 .invert = 1,
800 .invert_oclk = 0,
801 .xtal_freq = TDA10046_XTAL_16M,
802 .agc_config = TDA10046_AGC_TDA827X,
803 .gpio_config = TDA10046_GP01_I,
804 .if_freq = TDA10046_FREQ_045,
805 .i2c_gate = 0x4b,
806 .tuner_address = 0x61,
e06cea4c
HH
807 .antenna_switch= 2,
808 .request_firmware = philips_tda1004x_request_firmware
809};
810
f3eec0c0 811static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
812 .demod_address = 0x08,
813 .invert = 1,
814 .invert_oclk = 0,
815 .xtal_freq = TDA10046_XTAL_16M,
816 .agc_config = TDA10046_AGC_TDA827X,
817 .gpio_config = TDA10046_GP11_I,
818 .if_freq = TDA10046_FREQ_045,
819 .i2c_gate = 0x4b,
820 .tuner_address = 0x61,
e06cea4c
HH
821 .antenna_switch= 2,
822 .request_firmware = philips_tda1004x_request_firmware
823};
261f5081 824
b39423a9
SF
825static struct tda1004x_config kworld_dvb_t_210_config = {
826 .demod_address = 0x08,
827 .invert = 1,
828 .invert_oclk = 0,
829 .xtal_freq = TDA10046_XTAL_16M,
830 .agc_config = TDA10046_AGC_TDA827X,
831 .gpio_config = TDA10046_GP11_I,
832 .if_freq = TDA10046_FREQ_045,
833 .i2c_gate = 0x4b,
834 .tuner_address = 0x61,
b39423a9
SF
835 .antenna_switch= 1,
836 .request_firmware = philips_tda1004x_request_firmware
837};
261f5081 838
d90d9f5a
ES
839static struct tda1004x_config avermedia_super_007_config = {
840 .demod_address = 0x08,
841 .invert = 1,
842 .invert_oclk = 0,
843 .xtal_freq = TDA10046_XTAL_16M,
844 .agc_config = TDA10046_AGC_TDA827X,
845 .gpio_config = TDA10046_GP01_I,
846 .if_freq = TDA10046_FREQ_045,
847 .i2c_gate = 0x4b,
848 .tuner_address = 0x60,
d90d9f5a
ES
849 .antenna_switch= 1,
850 .request_firmware = philips_tda1004x_request_firmware
851};
852
4ba24373
HP
853static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
854 .demod_address = 0x08,
855 .invert = 1,
856 .invert_oclk = 0,
857 .xtal_freq = TDA10046_XTAL_16M,
858 .agc_config = TDA10046_AGC_TDA827X,
859 .gpio_config = TDA10046_GP01_I,
860 .if_freq = TDA10046_FREQ_045,
861 .i2c_gate = 0x42,
862 .tuner_address = 0x61,
4ba24373
HP
863 .antenna_switch = 1,
864 .request_firmware = philips_tda1004x_request_firmware
865};
866
301e9d64 867static struct tda1004x_config asus_tiger_3in1_config = {
868 .demod_address = 0x0b,
869 .invert = 1,
870 .invert_oclk = 0,
871 .xtal_freq = TDA10046_XTAL_16M,
872 .agc_config = TDA10046_AGC_TDA827X,
873 .gpio_config = TDA10046_GP11_I,
874 .if_freq = TDA10046_FREQ_045,
875 .i2c_gate = 0x4b,
876 .tuner_address = 0x61,
877 .antenna_switch = 1,
878 .request_firmware = philips_tda1004x_request_firmware
879};
880
75c7dbca 881static struct tda1004x_config asus_ps3_100_config = {
882 .demod_address = 0x0b,
883 .invert = 1,
884 .invert_oclk = 0,
885 .xtal_freq = TDA10046_XTAL_16M,
886 .agc_config = TDA10046_AGC_TDA827X,
887 .gpio_config = TDA10046_GP11_I,
888 .if_freq = TDA10046_FREQ_045,
889 .i2c_gate = 0x4b,
890 .tuner_address = 0x61,
891 .antenna_switch = 1,
892 .request_firmware = philips_tda1004x_request_firmware
893};
894
58ef4f92
HH
895/* ------------------------------------------------------------------
896 * special case: this card uses saa713x GPIO22 for the mode switch
897 */
5eda227f 898
58ef4f92 899static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
900{
901 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
902 philips_tda827x_tuner_init(fe);
903 /* route TDA8275a AGC input to the channel decoder */
06be3035 904 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
905 return 0;
906}
907
58ef4f92 908static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 909{
5eda227f 910 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 911 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 912 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
913 philips_tda827x_tuner_sleep(fe);
914 return 0;
5eda227f
HH
915}
916
8ce47dad 917static struct tda827x_config ads_duo_cfg = {
8ce47dad 918 .init = ads_duo_tuner_init,
7bff4b4d
HH
919 .sleep = ads_duo_tuner_sleep,
920 .config = 0
8ce47dad
MK
921};
922
58ef4f92 923static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
924 .demod_address = 0x08,
925 .invert = 1,
926 .invert_oclk = 0,
927 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 928 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 929 .gpio_config = TDA10046_GP00_I,
5eda227f 930 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
931 .tuner_address = 0x61,
932 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
933};
934
47aeba5a
DB
935static struct zl10353_config behold_h6_config = {
936 .demod_address = 0x1e>>1,
937 .no_tuner = 1,
938 .parallel_ts = 1,
5f77af93 939 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB
940};
941
2930992c
BILDB
942static struct xc5000_config behold_x7_tunerconfig = {
943 .i2c_address = 0xc2>>1,
944 .if_khz = 4560,
2a0d0560 945 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB
946};
947
948static struct zl10353_config behold_x7_config = {
949 .demod_address = 0x1e>>1,
950 .if2 = 45600,
951 .no_tuner = 1,
952 .parallel_ts = 1,
953 .disable_i2c_gate_ctrl = 1,
954};
955
dbe8740d
CC
956static struct zl10353_config videomate_t750_zl10353_config = {
957 .demod_address = 0x0f,
958 .no_tuner = 1,
959 .parallel_ts = 1,
960 .disable_i2c_gate_ctrl = 1,
961};
962
963static struct qt1010_config videomate_t750_qt1010_config = {
964 .i2c_address = 0x62
965};
966
967
58ef4f92
HH
968/* ==================================================================
969 * tda10086 based DVB-S cards, helper functions
970 */
971
e2ac28fa
IL
972static struct tda10086_config flydvbs = {
973 .demod_address = 0x0e,
974 .invert = 0,
ea75baf4 975 .diseqc_tone = 0,
9a1b04e4
HH
976 .xtal_freq = TDA10086_XTAL_16M,
977};
978
979static struct tda10086_config sd1878_4m = {
980 .demod_address = 0x0e,
981 .invert = 0,
982 .diseqc_tone = 0,
983 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
984};
985
1b1cee35
HH
986/* ------------------------------------------------------------------
987 * special case: lnb supply is connected to the gated i2c
988 */
989
990static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
991{
992 int res = -EIO;
993 struct saa7134_dev *dev = fe->dvb->priv;
994 if (fe->ops.i2c_gate_ctrl) {
995 fe->ops.i2c_gate_ctrl(fe, 1);
996 if (dev->original_set_voltage)
997 res = dev->original_set_voltage(fe, voltage);
998 fe->ops.i2c_gate_ctrl(fe, 0);
999 }
1000 return res;
1001};
1002
1003static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
1004{
1005 int res = -EIO;
1006 struct saa7134_dev *dev = fe->dvb->priv;
1007 if (fe->ops.i2c_gate_ctrl) {
1008 fe->ops.i2c_gate_ctrl(fe, 1);
1009 if (dev->original_set_high_voltage)
1010 res = dev->original_set_high_voltage(fe, arg);
1011 fe->ops.i2c_gate_ctrl(fe, 0);
1012 }
1013 return res;
1014};
1015
5823b3a6
HH
1016static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
1017{
1018 struct saa7134_dev *dev = fe->dvb->priv;
1019 u8 wbuf[2] = { 0x1f, 00 };
1020 u8 rbuf;
1021 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
1022 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
1023
1024 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
1025 return -EIO;
1026 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
1027 if (voltage == SEC_VOLTAGE_18)
1028 wbuf[1] = rbuf | 0x10;
1029 else
1030 wbuf[1] = rbuf & 0xef;
1031 msg[0].len = 2;
1032 i2c_transfer(&dev->i2c_adap, msg, 1);
1033 return 0;
1034}
1035
1036static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
1037{
6139ebc6
MCC
1038 pr_warn("%s: sorry can't set high LNB supply voltage from here\n",
1039 __func__);
5823b3a6
HH
1040 return -EIO;
1041}
1042
58ef4f92
HH
1043/* ==================================================================
1044 * nxt200x based ATSC cards, helper functions
1045 */
90e9df7f 1046
3b64e8e2
MK
1047static struct nxt200x_config avertvhda180 = {
1048 .demod_address = 0x0a,
3b64e8e2 1049};
3e1410ad
AB
1050
1051static struct nxt200x_config kworldatsc110 = {
1052 .demod_address = 0x0a,
3e1410ad 1053};
3b64e8e2 1054
04574185
MS
1055/* ------------------------------------------------------------------ */
1056
1057static struct mt312_config avertv_a700_mt312 = {
1058 .demod_address = 0x0e,
1059 .voltage_inverted = 1,
1060};
1061
1062static struct zl10036_config avertv_a700_tuner = {
1063 .tuner_address = 0x60,
1064};
1065
ecfcfec8
IL
1066static struct mt312_config zl10313_compro_s350_config = {
1067 .demod_address = 0x0e,
1068};
1069
34fe2784
OZ
1070static struct mt312_config zl10313_avermedia_a706_config = {
1071 .demod_address = 0x0e,
1072};
1073
3abdedd8
MK
1074static struct lgdt3305_config hcw_lgdt3305_config = {
1075 .i2c_addr = 0x0e,
1076 .mpeg_mode = LGDT3305_MPEG_SERIAL,
1077 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
1078 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
1079 .deny_i2c_rptr = 1,
1080 .spectral_inversion = 1,
1081 .qam_if_khz = 4000,
1082 .vsb_if_khz = 3250,
1083};
1084
1bc7f51c
MK
1085static struct tda10048_config hcw_tda10048_config = {
1086 .demod_address = 0x10 >> 1,
1087 .output_mode = TDA10048_SERIAL_OUTPUT,
1088 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1089 .inversion = TDA10048_INVERSION_ON,
1090 .dtv6_if_freq_khz = TDA10048_IF_3300,
1091 .dtv7_if_freq_khz = TDA10048_IF_3500,
1092 .dtv8_if_freq_khz = TDA10048_IF_4000,
1093 .clk_freq_khz = TDA10048_CLK_16000,
1094 .disable_gate_access = 1,
1095};
1096
3abdedd8
MK
1097static struct tda18271_std_map hauppauge_tda18271_std_map = {
1098 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1099 .if_lvl = 1, .rfagc_top = 0x58, },
1100 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1101 .if_lvl = 1, .rfagc_top = 0x58, },
1102};
1103
1104static struct tda18271_config hcw_tda18271_config = {
1105 .std_map = &hauppauge_tda18271_std_map,
1106 .gate = TDA18271_GATE_ANALOG,
1107 .config = 3,
542cb057 1108 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK
1109};
1110
1111static struct tda829x_config tda829x_no_probe = {
1112 .probe_tuner = TDA829X_DONT_PROBE,
1113};
1114
6c119ff4
HV
1115static struct tda10048_config zolid_tda10048_config = {
1116 .demod_address = 0x10 >> 1,
1117 .output_mode = TDA10048_PARALLEL_OUTPUT,
1118 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1119 .inversion = TDA10048_INVERSION_ON,
1120 .dtv6_if_freq_khz = TDA10048_IF_3300,
1121 .dtv7_if_freq_khz = TDA10048_IF_3500,
1122 .dtv8_if_freq_khz = TDA10048_IF_4000,
1123 .clk_freq_khz = TDA10048_CLK_16000,
1124 .disable_gate_access = 1,
1125};
1126
1127static struct tda18271_config zolid_tda18271_config = {
1128 .gate = TDA18271_GATE_ANALOG,
1129};
1130
184e769f
MK
1131static struct tda10048_config dtv1000s_tda10048_config = {
1132 .demod_address = 0x10 >> 1,
1133 .output_mode = TDA10048_PARALLEL_OUTPUT,
1134 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1135 .inversion = TDA10048_INVERSION_ON,
1136 .dtv6_if_freq_khz = TDA10048_IF_3300,
1137 .dtv7_if_freq_khz = TDA10048_IF_3800,
1138 .dtv8_if_freq_khz = TDA10048_IF_4300,
1139 .clk_freq_khz = TDA10048_CLK_16000,
1140 .disable_gate_access = 1,
1141};
1142
1143static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1144 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1145 .if_lvl = 1, .rfagc_top = 0x37, },
1146 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1147 .if_lvl = 1, .rfagc_top = 0x37, },
1148 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1149 .if_lvl = 1, .rfagc_top = 0x37, },
1150};
1151
1152static struct tda18271_config dtv1000s_tda18271_config = {
1153 .std_map = &dtv1000s_tda18271_std_map,
1154 .gate = TDA18271_GATE_ANALOG,
1155};
1156
ce02704d
TL
1157static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = {
1158 .prod = LGS8GXX_PROD_LGS8G75,
1159 .demod_address = 0x1d,
1160 .serial_ts = 0,
1161 .ts_clk_pol = 1,
1162 .ts_clk_gated = 0,
1163 .if_clk_freq = 30400, /* 30.4 MHz */
1164 .if_freq = 4000, /* 4.00 MHz */
1165 .if_neg_center = 0,
1166 .ext_adc = 0,
1167 .adc_signed = 1,
1168 .adc_vpp = 3, /* 2.0 Vpp */
1169 .if_neg_edge = 1,
1170};
1171
1172static struct tda18271_config prohdtv_pro2_tda18271_config = {
1173 .gate = TDA18271_GATE_ANALOG,
1174 .output_opt = TDA18271_OUTPUT_LT_OFF,
1175};
1176
25fa2071
KS
1177static struct tda18271_std_map kworld_tda18271_std_map = {
1178 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 3,
1179 .if_lvl = 6, .rfagc_top = 0x37 },
1180 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
1181 .if_lvl = 6, .rfagc_top = 0x37 },
1182};
1183
1184static struct tda18271_config kworld_pc150u_tda18271_config = {
1185 .std_map = &kworld_tda18271_std_map,
1186 .gate = TDA18271_GATE_ANALOG,
1187 .output_opt = TDA18271_OUTPUT_LT_OFF,
1188 .config = 3, /* Use tuner callback for AGC */
1189 .rf_cal_on_startup = 1
1190};
1191
1192static struct s5h1411_config kworld_s5h1411_config = {
1193 .output_mode = S5H1411_PARALLEL_OUTPUT,
1194 .gpio = S5H1411_GPIO_OFF,
1195 .qam_if = S5H1411_IF_4000,
1196 .vsb_if = S5H1411_IF_3250,
1197 .inversion = S5H1411_INVERSION_ON,
1198 .status_mode = S5H1411_DEMODLOCKING,
1199 .mpeg_timing =
1200 S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
1201};
1202
1203
58ef4f92
HH
1204/* ==================================================================
1205 * Core code
1206 */
1da177e4
LT
1207
1208static int dvb_init(struct saa7134_dev *dev)
1209{
1c4f76ab 1210 int ret;
bc36a686 1211 int attach_xc3028 = 0;
2ada815f
HV
1212 struct vb2_dvb_frontend *fe0;
1213 struct vb2_queue *q;
363c35fc 1214
f972e0bd
DB
1215 /* FIXME: add support for multi-frontend */
1216 mutex_init(&dev->frontends.lock);
7bdf84fc 1217 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd 1218
83582009 1219 pr_info("%s() allocating 1 frontend\n", __func__);
2ada815f 1220 fe0 = vb2_dvb_alloc_frontend(&dev->frontends, 1);
f3f741e7 1221 if (!fe0) {
83582009 1222 pr_err("%s() failed to alloc\n", __func__);
f972e0bd
DB
1223 return -ENOMEM;
1224 }
1225
2ada815f 1226 /* init struct vb2_dvb */
1da177e4
LT
1227 dev->ts.nr_bufs = 32;
1228 dev->ts.nr_packets = 32*4;
363c35fc 1229 fe0->dvb.name = dev->name;
2ada815f
HV
1230 q = &fe0->dvb.dvbq;
1231 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1232 q->io_modes = VB2_MMAP | VB2_READ;
1233 q->drv_priv = &dev->ts_q;
1234 q->ops = &saa7134_ts_qops;
1235 q->mem_ops = &vb2_dma_sg_memops;
1236 q->buf_struct_size = sizeof(struct saa7134_buf);
1237 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1238 q->lock = &dev->lock;
1239 ret = vb2_queue_init(q);
1240 if (ret) {
1241 vb2_dvb_dealloc_frontends(&dev->frontends);
1242 return ret;
1243 }
1da177e4
LT
1244
1245 switch (dev->board) {
1246 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
7516657a 1247 pr_debug("pinnacle 300i dvb setup\n");
363c35fc 1248 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1249 &dev->i2c_adap);
363c35fc
ST
1250 if (fe0->dvb.frontend) {
1251 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1252 }
1da177e4 1253 break;
a78d0bfa 1254 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1255 case SAA7134_BOARD_AVERMEDIA_A16AR:
7516657a 1256 pr_debug("avertv 777 dvb setup\n");
363c35fc 1257 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1258 &dev->i2c_adap);
363c35fc
ST
1259 if (fe0->dvb.frontend) {
1260 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK
1261 &dev->i2c_adap, 0x61,
1262 TUNER_PHILIPS_TD1316);
6b3ccab7 1263 }
a78d0bfa 1264 break;
95a2fdb6 1265 case SAA7134_BOARD_AVERMEDIA_A16D:
7516657a 1266 pr_debug("AverMedia A16D dvb setup\n");
363c35fc 1267 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1268 &avermedia_xc3028_mt352_dev,
1269 &dev->i2c_adap);
95a2fdb6
MCC
1270 attach_xc3028 = 1;
1271 break;
1da177e4 1272 case SAA7134_BOARD_MD7134:
363c35fc 1273 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1274 &medion_cardbus,
1275 &dev->i2c_adap);
363c35fc
ST
1276 if (fe0->dvb.frontend) {
1277 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1278 &dev->i2c_adap, medion_cardbus.tuner_address,
1279 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1280 }
1da177e4 1281 break;
86ddd96f 1282 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1283 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1284 &philips_tu1216_60_config,
1285 &dev->i2c_adap);
363c35fc
ST
1286 if (fe0->dvb.frontend) {
1287 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1288 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1289 }
86ddd96f
MCC
1290 break;
1291 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1292 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1293 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1294 &tda827x_cfg_0) < 0)
91268a5e 1295 goto detach_frontend;
86ddd96f 1296 break;
2cf36ac4 1297 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1298 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1299 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1300 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1301 &philips_europa_config,
1302 &dev->i2c_adap);
363c35fc
ST
1303 if (fe0->dvb.frontend) {
1304 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1305 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1306 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1307 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1308 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1309 }
2cf36ac4 1310 break;
128fe95d
VC
1311 case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000:
1312 fe0->dvb.frontend = dvb_attach(tda10046_attach,
1313 &technotrend_budget_t3000_config,
1314 &dev->i2c_adap);
1315 if (fe0->dvb.frontend) {
1316 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1317 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1318 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1319 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1320 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1321 }
1322 break;
2cf36ac4 1323 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1324 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1325 &philips_tu1216_61_config,
1326 &dev->i2c_adap);
363c35fc
ST
1327 if (fe0->dvb.frontend) {
1328 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1329 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1330 }
2cf36ac4 1331 break;
b39423a9 1332 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1333 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1334 &tda827x_cfg_2) < 0)
91268a5e 1335 goto detach_frontend;
b39423a9 1336 break;
0e316ecf 1337 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK
1338 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1339 &hcw_tda10048_config,
1340 &dev->i2c_adap);
1341 if (fe0->dvb.frontend != NULL) {
1342 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1343 &dev->i2c_adap, 0x4b,
1344 &tda829x_no_probe);
1345 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1346 0x60, &dev->i2c_adap,
1347 &hcw_tda18271_config);
1348 }
1349 break;
90e9df7f 1350 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1351 if (configure_tda827x_fe(dev, &philips_tiger_config,
1352 &tda827x_cfg_0) < 0)
91268a5e 1353 goto detach_frontend;
587d2fd7
HH
1354 break;
1355 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1356 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1357 &tda827x_cfg_1) < 0)
91268a5e 1358 goto detach_frontend;
90e9df7f 1359 break;
c6e53daf 1360 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1361 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1362 &tda827x_cfg_1) < 0)
91268a5e 1363 goto detach_frontend;
c6e53daf 1364 break;
b5f05064 1365 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK
1366 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1367 &hcw_lgdt3305_config,
1368 &dev->i2c_adap);
1369 if (fe0->dvb.frontend) {
1370 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1371 &dev->i2c_adap, 0x4b,
1372 &tda829x_no_probe);
1373 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1374 0x60, &dev->i2c_adap,
1375 &hcw_tda18271_config);
1376 }
1377 break;
d4b0aba4 1378 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1379 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1380 &tda827x_cfg_0) < 0)
91268a5e 1381 goto detach_frontend;
d4b0aba4 1382 break;
3d8466ec 1383 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1384 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1385 &tda827x_cfg_0) < 0)
91268a5e 1386 goto detach_frontend;
3d8466ec 1387 break;
92abe9ee 1388 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1389 if (!use_frontend) { /* terrestrial */
1390 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1391 &tda827x_cfg_0) < 0)
91268a5e 1392 goto detach_frontend;
7bff4b4d 1393 } else { /* satellite */
363c35fc
ST
1394 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1395 if (fe0->dvb.frontend) {
1396 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1397 &dev->i2c_adap, 0) == NULL) {
6139ebc6
MCC
1398 pr_warn("%s: Lifeview Trio, No tda826x found!\n",
1399 __func__);
91268a5e 1400 goto detach_frontend;
1f683cd8 1401 }
48a8a03b
MCC
1402 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
1403 &dev->i2c_adap,
1404 0x08, 0, 0, false) == NULL) {
6139ebc6
MCC
1405 pr_warn("%s: Lifeview Trio, No ISL6421 found!\n",
1406 __func__);
91268a5e 1407 goto detach_frontend;
1f683cd8
NS
1408 }
1409 }
6b3ccab7 1410 }
420f32fe 1411 break;
df42eaf2 1412 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1413 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1414 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1415 &ads_tech_duo_config,
1416 &dev->i2c_adap);
363c35fc
ST
1417 if (fe0->dvb.frontend) {
1418 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH
1419 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1420 &ads_duo_cfg) == NULL) {
ae618919 1421 pr_warn("no tda827x tuner found at addr: %02x\n",
ede2200d 1422 ads_tech_duo_config.tuner_address);
91268a5e 1423 goto detach_frontend;
ede2200d 1424 }
bc36ec74 1425 } else
ae618919 1426 pr_warn("failed to attach tda10046\n");
df42eaf2 1427 break;
3dfb729f 1428 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1429 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1430 &tda827x_cfg_0) < 0)
91268a5e 1431 goto detach_frontend;
d95b8942 1432 break;
5eda227f 1433 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1434 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1435 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1436 &tda827x_cfg_0) < 0)
91268a5e 1437 goto detach_frontend;
4b1431ca 1438 } else { /* satellite */
363c35fc 1439 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1440 &flydvbs, &dev->i2c_adap);
363c35fc
ST
1441 if (fe0->dvb.frontend) {
1442 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH
1443 u8 dev_id = dev->eedata[2];
1444 u8 data = 0xc4;
1445 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1446
363c35fc 1447 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1448 0x60, &dev->i2c_adap, 0) == NULL) {
ae618919 1449 pr_warn("%s: Medion Quadro, no tda826x "
5823b3a6 1450 "found !\n", __func__);
91268a5e 1451 goto detach_frontend;
d557dab5 1452 }
5823b3a6
HH
1453 if (dev_id != 0x08) {
1454 /* we need to open the i2c gate (we know it exists) */
1455 fe->ops.i2c_gate_ctrl(fe, 1);
1456 if (dvb_attach(isl6405_attach, fe,
d557dab5 1457 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
ae618919 1458 pr_warn("%s: Medion Quadro, no ISL6405 "
5823b3a6 1459 "found !\n", __func__);
91268a5e 1460 goto detach_frontend;
d557dab5 1461 }
e9c1ac9d
HH
1462 if (dev_id == 0x07) {
1463 /* fire up the 2nd section of the LNB supply since
1464 we can't do this from the other section */
1465 msg.buf = &data;
1466 i2c_transfer(&dev->i2c_adap, &msg, 1);
1467 }
5823b3a6
HH
1468 fe->ops.i2c_gate_ctrl(fe, 0);
1469 dev->original_set_voltage = fe->ops.set_voltage;
1470 fe->ops.set_voltage = md8800_set_voltage;
1471 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1472 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1473 } else {
1474 fe->ops.set_voltage = md8800_set_voltage2;
1475 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1476 }
4b1431ca
HH
1477 }
1478 }
5eda227f 1479 break;
3b64e8e2 1480 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1481 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1482 &dev->i2c_adap);
363c35fc
ST
1483 if (fe0->dvb.frontend)
1484 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1485 NULL, DVB_PLL_TDHU2);
3b64e8e2 1486 break;
f689d908 1487 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1488 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1489 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1490 &dev->i2c_adap);
363c35fc
ST
1491 if (fe0->dvb.frontend)
1492 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK
1493 &dev->i2c_adap, 0x61,
1494 TUNER_PHILIPS_TUV1236D);
3e1410ad 1495 break;
25fa2071
KS
1496 case SAA7134_BOARD_KWORLD_PC150U:
1497 saa7134_set_gpio(dev, 18, 1); /* Switch to digital mode */
1498 saa7134_tuner_callback(dev, 0,
1499 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
1500 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1501 &kworld_s5h1411_config,
1502 &dev->i2c_adap);
1503 if (fe0->dvb.frontend != NULL) {
1504 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1505 &dev->i2c_adap, 0x4b,
1506 &tda829x_no_probe);
1507 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1508 0x60, &dev->i2c_adap,
1509 &kworld_pc150u_tda18271_config);
1510 }
1511 break;
e2ac28fa 1512 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1513 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1514 &dev->i2c_adap);
363c35fc
ST
1515 if (fe0->dvb.frontend) {
1516 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1517 &dev->i2c_adap, 0) == NULL) {
ae618919 1518 pr_warn("%s: No tda826x found!\n", __func__);
91268a5e 1519 goto detach_frontend;
e2ac28fa 1520 }
363c35fc 1521 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
48a8a03b
MCC
1522 &dev->i2c_adap,
1523 0x08, 0, 0, false) == NULL) {
ae618919 1524 pr_warn("%s: No ISL6421 found!\n", __func__);
91268a5e 1525 goto detach_frontend;
e2ac28fa
IL
1526 }
1527 }
1528 break;
cf146ca4 1529 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1530 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS
1531 &medion_cardbus,
1532 &dev->i2c_adap);
363c35fc
ST
1533 if (fe0->dvb.frontend) {
1534 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1535 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1536
363c35fc 1537 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1538 &dev->i2c_adap, medion_cardbus.tuner_address,
1539 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1540 }
1541 break;
cbb94521 1542 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1543 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH
1544 &philips_europa_config,
1545 &dev->i2c_adap);
363c35fc
ST
1546 if (fe0->dvb.frontend) {
1547 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1548 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH
1549 }
1550 break;
550a9a5e 1551 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1552 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1553 &tda827x_cfg_0) < 0)
91268a5e 1554 goto detach_frontend;
9de271e6
MK
1555 break;
1556 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1557 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1558 &tda827x_cfg_0) < 0)
91268a5e 1559 goto detach_frontend;
58ef4f92
HH
1560 break;
1561 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1562 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1563 &tda827x_cfg_2) < 0)
91268a5e 1564 goto detach_frontend;
550a9a5e 1565 break;
e06cea4c 1566 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1567 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1568 &tda827x_cfg_2) < 0)
91268a5e 1569 goto detach_frontend;
e06cea4c 1570 break;
f3eec0c0 1571 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1572 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1573 &tda827x_cfg_2) < 0)
91268a5e 1574 goto detach_frontend;
e06cea4c 1575 break;
d90d9f5a 1576 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1577 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1578 &tda827x_cfg_0) < 0)
91268a5e 1579 goto detach_frontend;
d90d9f5a 1580 break;
4ba24373 1581 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1582 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1583 &tda827x_cfg_2_sw42) < 0)
91268a5e 1584 goto detach_frontend;
4ba24373 1585 break;
6ab465a8 1586 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1587 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1588 &dev->i2c_adap);
363c35fc
ST
1589 if (fe0->dvb.frontend) {
1590 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1591 &dev->i2c_adap, 0) == NULL) {
ae618919 1592 pr_warn("%s: No tda826x found!\n", __func__);
91268a5e 1593 goto detach_frontend;
d557dab5 1594 }
363c35fc 1595 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1596 &dev->i2c_adap, 0, 0) == NULL) {
ae618919 1597 pr_warn("%s: No lnbp21 found!\n", __func__);
91268a5e 1598 goto detach_frontend;
d557dab5 1599 }
6ab465a8
HH
1600 }
1601 break;
7b5b3f17 1602 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1603 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1604 &tda827x_cfg_0) < 0)
91268a5e 1605 goto detach_frontend;
7b5b3f17 1606 break;
6a6179b6 1607 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1608 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1609 &tda827x_cfg_2) < 0)
91268a5e 1610 goto detach_frontend;
6a6179b6 1611 break;
bc36a686 1612 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
7516657a 1613 pr_debug("AverMedia E506R dvb setup\n");
6e501a3f
TF
1614 saa7134_set_gpio(dev, 25, 0);
1615 msleep(10);
1616 saa7134_set_gpio(dev, 25, 1);
363c35fc 1617 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1618 &avermedia_xc3028_mt352_dev,
1619 &dev->i2c_adap);
bc36a686 1620 attach_xc3028 = 1;
e2fc00c2 1621 break;
637afdb5 1622 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1623 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1624 &sd1878_4m, &dev->i2c_adap);
363c35fc 1625 if (fe0->dvb.frontend) {
637afdb5 1626 struct dvb_frontend *fe;
363c35fc 1627 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1628 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
ae618919 1629 pr_warn("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1630 "found !\n", __func__);
91268a5e 1631 goto detach_frontend;
d557dab5 1632 }
637afdb5 1633 /* we need to open the i2c gate (we know it exists) */
363c35fc 1634 fe = fe0->dvb.frontend;
637afdb5
HH
1635 fe->ops.i2c_gate_ctrl(fe, 1);
1636 if (dvb_attach(isl6405_attach, fe,
d557dab5 1637 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
ae618919 1638 pr_warn("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1639 "found !\n", __func__);
91268a5e 1640 goto detach_frontend;
d557dab5 1641 }
637afdb5
HH
1642 fe->ops.i2c_gate_ctrl(fe, 0);
1643 dev->original_set_voltage = fe->ops.set_voltage;
1644 fe->ops.set_voltage = md8800_set_voltage;
1645 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1646 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1647 }
1648 break;
e2fc00c2
MP
1649 case SAA7134_BOARD_AVERMEDIA_M103:
1650 saa7134_set_gpio(dev, 25, 0);
1651 msleep(10);
1652 saa7134_set_gpio(dev, 25, 1);
363c35fc 1653 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP
1654 &avermedia_xc3028_mt352_dev,
1655 &dev->i2c_adap);
1656 attach_xc3028 = 1;
1657 break;
301e9d64 1658 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1659 if (!use_frontend) { /* terrestrial */
1660 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1661 &tda827x_cfg_2) < 0)
91268a5e 1662 goto detach_frontend;
301e9d64 1663 } else { /* satellite */
363c35fc 1664 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1665 &flydvbs, &dev->i2c_adap);
363c35fc 1666 if (fe0->dvb.frontend) {
301e9d64 1667 if (dvb_attach(tda826x_attach,
363c35fc 1668 fe0->dvb.frontend, 0x60,
301e9d64 1669 &dev->i2c_adap, 0) == NULL) {
ae618919 1670 pr_warn("%s: Asus Tiger 3in1, no "
301e9d64 1671 "tda826x found!\n", __func__);
91268a5e 1672 goto detach_frontend;
301e9d64 1673 }
363c35fc 1674 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1675 &dev->i2c_adap, 0, 0) == NULL) {
ae618919 1676 pr_warn("%s: Asus Tiger 3in1, no lnbp21"
301e9d64 1677 " found!\n", __func__);
3c2580f9 1678 goto detach_frontend;
75c7dbca 1679 }
1680 }
1681 }
1682 break;
1683 case SAA7134_BOARD_ASUSTeK_PS3_100:
1684 if (!use_frontend) { /* terrestrial */
1685 if (configure_tda827x_fe(dev, &asus_ps3_100_config,
1686 &tda827x_cfg_2) < 0)
91268a5e 1687 goto detach_frontend;
75c7dbca 1688 } else { /* satellite */
1689 fe0->dvb.frontend = dvb_attach(tda10086_attach,
1690 &flydvbs, &dev->i2c_adap);
1691 if (fe0->dvb.frontend) {
1692 if (dvb_attach(tda826x_attach,
1693 fe0->dvb.frontend, 0x60,
1694 &dev->i2c_adap, 0) == NULL) {
ae618919 1695 pr_warn("%s: Asus My Cinema PS3-100, no "
75c7dbca 1696 "tda826x found!\n", __func__);
91268a5e 1697 goto detach_frontend;
75c7dbca 1698 }
1699 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
1700 &dev->i2c_adap, 0, 0) == NULL) {
ae618919 1701 pr_warn("%s: Asus My Cinema PS3-100, no lnbp21"
75c7dbca 1702 " found!\n", __func__);
91268a5e 1703 goto detach_frontend;
301e9d64 1704 }
1705 }
1706 }
1707 break;
028165a3
HP
1708 case SAA7134_BOARD_ASUSTeK_TIGER:
1709 if (configure_tda827x_fe(dev, &philips_tiger_config,
1710 &tda827x_cfg_0) < 0)
91268a5e 1711 goto detach_frontend;
028165a3 1712 break;
47aeba5a 1713 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1714 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB
1715 &behold_h6_config,
1716 &dev->i2c_adap);
b0c4be8c
MCC
1717 if (fe0->dvb.frontend) {
1718 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1719 &dev->i2c_adap, 0x61,
4786dd65 1720 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1721 }
04574185 1722 break;
2930992c
BILDB
1723 case SAA7134_BOARD_BEHOLD_X7:
1724 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1725 &behold_x7_config,
1726 &dev->i2c_adap);
1727 if (fe0->dvb.frontend) {
1728 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1729 &dev->i2c_adap, &behold_x7_tunerconfig);
1730 }
1731 break;
0faa2ed5
DB
1732 case SAA7134_BOARD_BEHOLD_H7:
1733 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1734 &behold_x7_config,
1735 &dev->i2c_adap);
1736 if (fe0->dvb.frontend) {
1737 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1738 &dev->i2c_adap, &behold_x7_tunerconfig);
1739 }
1740 break;
04574185
MS
1741 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1742 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1743 /* Zarlink ZL10313 */
1744 fe0->dvb.frontend = dvb_attach(mt312_attach,
1745 &avertv_a700_mt312, &dev->i2c_adap);
1746 if (fe0->dvb.frontend) {
1747 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1748 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
ae618919 1749 pr_warn("%s: No zl10036 found!\n",
04574185
MS
1750 __func__);
1751 }
1752 }
ecfcfec8
IL
1753 break;
1754 case SAA7134_BOARD_VIDEOMATE_S350:
1755 fe0->dvb.frontend = dvb_attach(mt312_attach,
1756 &zl10313_compro_s350_config, &dev->i2c_adap);
1757 if (fe0->dvb.frontend)
1758 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1759 0x60, &dev->i2c_adap) == NULL)
ae618919 1760 pr_warn("%s: No zl10039 found!\n",
ecfcfec8
IL
1761 __func__);
1762
dbe8740d
CC
1763 break;
1764 case SAA7134_BOARD_VIDEOMATE_T750:
1765 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1766 &videomate_t750_zl10353_config,
1767 &dev->i2c_adap);
1768 if (fe0->dvb.frontend != NULL) {
1769 if (dvb_attach(qt1010_attach,
1770 fe0->dvb.frontend,
1771 &dev->i2c_adap,
1772 &videomate_t750_qt1010_config) == NULL)
ae618919 1773 pr_warn("error attaching QT1010\n");
dbe8740d 1774 }
6c119ff4
HV
1775 break;
1776 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1777 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1778 &zolid_tda10048_config,
1779 &dev->i2c_adap);
1780 if (fe0->dvb.frontend != NULL) {
1781 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1782 &dev->i2c_adap, 0x4b,
1783 &tda829x_no_probe);
1784 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1785 0x60, &dev->i2c_adap,
1786 &zolid_tda18271_config);
1787 }
47aeba5a 1788 break;
184e769f
MK
1789 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1790 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1791 &dtv1000s_tda10048_config,
1792 &dev->i2c_adap);
1793 if (fe0->dvb.frontend != NULL) {
1794 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1795 &dev->i2c_adap, 0x4b,
1796 &tda829x_no_probe);
1797 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1798 0x60, &dev->i2c_adap,
1799 &dtv1000s_tda18271_config);
1800 }
1801 break;
f0551efc 1802 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
ecb71d26
MCC
1803 /* Switch to digital mode */
1804 saa7134_tuner_callback(dev, 0,
1805 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
f0551efc
MCC
1806 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1807 &kworld_mb86a20s_config,
1808 &dev->i2c_adap);
f0551efc 1809 if (fe0->dvb.frontend != NULL) {
6a58bc0f
MCC
1810 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1811 &dev->i2c_adap, 0x4b,
1812 &tda829x_no_probe);
b08deebe 1813 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl;
f0551efc
MCC
1814 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1815 0x60, &dev->i2c_adap,
1816 &kworld_tda18271_config);
f0551efc 1817 }
6a58bc0f
MCC
1818
1819 /* mb86a20s need to use the I2C gateway */
f0551efc 1820 break;
ce02704d
TL
1821 case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2:
1822 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1823 &prohdtv_pro2_lgs8g75_config,
1824 &dev->i2c_adap);
1825 if (fe0->dvb.frontend != NULL) {
1826 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1827 &dev->i2c_adap, 0x4b,
1828 &tda829x_no_probe);
1829 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1830 0x60, &dev->i2c_adap,
1831 &prohdtv_pro2_tda18271_config);
1832 }
34fe2784
OZ
1833 break;
1834 case SAA7134_BOARD_AVERMEDIA_A706:
1835 /* Enable all DVB-S devices now */
1836 /* CE5039 DVB-S tuner SLEEP pin low */
1837 saa7134_set_gpio(dev, 23, 0);
1838 /* CE6313 DVB-S demod SLEEP pin low */
1839 saa7134_set_gpio(dev, 9, 0);
1840 /* CE6313 DVB-S demod RESET# pin high */
1841 saa7134_set_gpio(dev, 25, 1);
1842 msleep(1);
1843 fe0->dvb.frontend = dvb_attach(mt312_attach,
1844 &zl10313_avermedia_a706_config, &dev->i2c_adap);
1845 if (fe0->dvb.frontend) {
1846 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1847 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1848 0x60, &dev->i2c_adap) == NULL)
ae618919 1849 pr_warn("%s: No zl10039 found!\n",
34fe2784
OZ
1850 __func__);
1851 }
ce02704d 1852 break;
1da177e4 1853 default:
ae618919 1854 pr_warn("Huh? unknown DVB card?\n");
1da177e4
LT
1855 break;
1856 }
1857
bc36a686
MCC
1858 if (attach_xc3028) {
1859 struct dvb_frontend *fe;
1860 struct xc2028_config cfg = {
1861 .i2c_adap = &dev->i2c_adap,
1862 .i2c_addr = 0x61,
bc36a686 1863 };
95a2fdb6 1864
363c35fc 1865 if (!fe0->dvb.frontend)
91268a5e 1866 goto detach_frontend;
95a2fdb6 1867
363c35fc 1868 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686 1869 if (!fe) {
83582009 1870 pr_err("%s/2: xc3028 attach failed\n",
bc36a686 1871 dev->name);
91268a5e 1872 goto detach_frontend;
bc36a686
MCC
1873 }
1874 }
1875
363c35fc 1876 if (NULL == fe0->dvb.frontend) {
83582009 1877 pr_err("%s/dvb: frontend initialization failed\n", dev->name);
91268a5e 1878 goto detach_frontend;
1da177e4 1879 }
d7cba043 1880 /* define general-purpose callback pointer */
363c35fc 1881 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1882
1883 /* register everything else */
2ada815f 1884 ret = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
9adf6132 1885 &dev->pci->dev, adapter_nr, 0);
1c4f76ab
HH
1886
1887 /* this sequence is necessary to make the tda1004x load its firmware
1888 * and to enter analog mode of hybrid boards
1889 */
1890 if (!ret) {
363c35fc
ST
1891 if (fe0->dvb.frontend->ops.init)
1892 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1893 if (fe0->dvb.frontend->ops.sleep)
1894 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1895 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1896 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH
1897 }
1898 return ret;
d557dab5 1899
91268a5e 1900detach_frontend:
2ada815f
HV
1901 vb2_dvb_dealloc_frontends(&dev->frontends);
1902 vb2_queue_release(&fe0->dvb.dvbq);
f3f741e7 1903 return -EINVAL;
1da177e4
LT
1904}
1905
1906static int dvb_fini(struct saa7134_dev *dev)
1907{
2ada815f 1908 struct vb2_dvb_frontend *fe0;
363c35fc
ST
1909
1910 /* Get the first frontend */
2ada815f 1911 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
1912 if (!fe0)
1913 return -EINVAL;
1914
7f171123
MCC
1915 /* FIXME: I suspect that this code is bogus, since the entry for
1916 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1917 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1918 */
1919 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1920 struct v4l2_priv_tun_config tda9887_cfg;
1921 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1922
1923 tda9887_cfg.tuner = TUNER_TDA9887;
1924 tda9887_cfg.priv = &on;
1da177e4 1925
1da177e4 1926 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1927 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1928 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1929 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1930 /* turn off the 2nd lnb supply */
1931 u8 data = 0x80;
1932 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1933 struct dvb_frontend *fe;
363c35fc 1934 fe = fe0->dvb.frontend;
5823b3a6
HH
1935 if (fe->ops.i2c_gate_ctrl) {
1936 fe->ops.i2c_gate_ctrl(fe, 1);
1937 i2c_transfer(&dev->i2c_adap, &msg, 1);
1938 fe->ops.i2c_gate_ctrl(fe, 0);
1939 }
1940 }
7f171123 1941 }
2ada815f
HV
1942 vb2_dvb_unregister_bus(&dev->frontends);
1943 vb2_queue_release(&fe0->dvb.dvbq);
1da177e4
LT
1944 return 0;
1945}
1946
1947static struct saa7134_mpeg_ops dvb_ops = {
1948 .type = SAA7134_MPEG_DVB,
1949 .init = dvb_init,
1950 .fini = dvb_fini,
1951};
1952
1953static int __init dvb_register(void)
1954{
1955 return saa7134_ts_register(&dvb_ops);
1956}
1957
1958static void __exit dvb_unregister(void)
1959{
1960 saa7134_ts_unregister(&dvb_ops);
1961}
1962
1963module_init(dvb_register);
1964module_exit(dvb_unregister);
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