[media] sta2x11: use monotonic timestamp
[deliverable/linux.git] / drivers / media / pci / sta2x11 / sta2x11_vip.c
CommitLineData
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1/*
2 * This is the driver for the STA2x11 Video Input Port.
3 *
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4 * Copyright (C) 2012 ST Microelectronics
5 * author: Federico Vaga <federico.vaga@gmail.com>
efeb98b4 6 * Copyright (C) 2010 WindRiver Systems, Inc.
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7 * authors: Andreas Kies <andreas.kies@windriver.com>
8 * Vlad Lungu <vlad.lungu@windriver.com>
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9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * The full GNU General Public License is included in this distribution in
24 * the file called "COPYING".
25 *
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26 */
27
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/init.h>
efeb98b4 32#include <linux/videodev2.h>
efeb98b4 33#include <linux/kmod.h>
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34#include <linux/pci.h>
35#include <linux/interrupt.h>
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36#include <linux/io.h>
37#include <linux/gpio.h>
38#include <linux/i2c.h>
39#include <linux/delay.h>
40#include <media/v4l2-common.h>
41#include <media/v4l2-device.h>
8dc97ea2 42#include <media/v4l2-ctrls.h>
efeb98b4 43#include <media/v4l2-ioctl.h>
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44#include <media/v4l2-fh.h>
45#include <media/v4l2-event.h>
46#include <media/videobuf2-dma-contig.h>
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47
48#include "sta2x11_vip.h"
49
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50#define DRV_VERSION "1.3"
51
52#ifndef PCI_DEVICE_ID_STMICRO_VIP
53#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
54#endif
55
56#define MAX_FRAMES 4
57
58/*Register offsets*/
59#define DVP_CTL 0x00
60#define DVP_TFO 0x04
61#define DVP_TFS 0x08
62#define DVP_BFO 0x0C
63#define DVP_BFS 0x10
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64#define DVP_VTP 0x14
65#define DVP_VBP 0x18
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66#define DVP_VMP 0x1C
67#define DVP_ITM 0x98
68#define DVP_ITS 0x9C
69#define DVP_STA 0xA0
70#define DVP_HLFLN 0xA8
71#define DVP_RGB 0xC0
72#define DVP_PKZ 0xF0
73
74/*Register fields*/
75#define DVP_CTL_ENA 0x00000001
76#define DVP_CTL_RST 0x80000000
77#define DVP_CTL_DIS (~0x00040001)
78
79#define DVP_IT_VSB 0x00000008
80#define DVP_IT_VST 0x00000010
81#define DVP_IT_FIFO 0x00000020
82
83#define DVP_HLFLN_SD 0x00000001
84
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85#define SAVE_COUNT 8
86#define AUX_COUNT 3
87#define IRQ_COUNT 1
88
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89
90struct vip_buffer {
91 struct vb2_buffer vb;
92 struct list_head list;
93 dma_addr_t dma;
94};
95static inline struct vip_buffer *to_vip_buffer(struct vb2_buffer *vb2)
96{
97 return container_of(vb2, struct vip_buffer, vb);
98}
99
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100/**
101 * struct sta2x11_vip - All internal data for one instance of device
102 * @v4l2_dev: device registered in v4l layer
103 * @video_dev: properties of our device
104 * @pdev: PCI device
105 * @adapter: contains I2C adapter information
106 * @register_save_area: All relevant register are saved here during suspend
107 * @decoder: contains information about video DAC
8dc97ea2 108 * @ctrl_hdl: handler for control framework
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109 * @format: pixel format, fixed UYVY
110 * @std: video standard (e.g. PAL/NTSC)
111 * @input: input line for video signal ( 0 or 1 )
efeb98b4 112 * @disabled: Device is in power down state
efeb98b4 113 * @slock: for excluse acces of registers
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114 * @alloc_ctx: context for videobuf2
115 * @vb_vidq: queue maintained by videobuf2 layer
116 * @buffer_list: list of buffer in use
117 * @sequence: sequence number of acquired buffer
118 * @active: current active buffer
119 * @lock: used in videobuf2 callback
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120 * @tcount: Number of top frames
121 * @bcount: Number of bottom frames
122 * @overflow: Number of FIFO overflows
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123 * @iomem: hardware base address
124 * @config: I2C and gpio config from platform
125 *
126 * All non-local data is accessed via this structure.
127 */
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128struct sta2x11_vip {
129 struct v4l2_device v4l2_dev;
4db4ca74 130 struct video_device video_dev;
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131 struct pci_dev *pdev;
132 struct i2c_adapter *adapter;
133 unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];
134 struct v4l2_subdev *decoder;
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135 struct v4l2_ctrl_handler ctrl_hdl;
136
137
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138 struct v4l2_pix_format format;
139 v4l2_std_id std;
140 unsigned int input;
efeb98b4 141 int disabled;
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142 spinlock_t slock;
143
144 struct vb2_alloc_ctx *alloc_ctx;
145 struct vb2_queue vb_vidq;
146 struct list_head buffer_list;
147 unsigned int sequence;
148 struct vip_buffer *active; /* current active buffer */
149 spinlock_t lock; /* Used in videobuf2 callback */
150
151 /* Interrupt counters */
152 int tcount, bcount;
efeb98b4 153 int overflow;
8dc97ea2 154
87f4ebcd 155 void __iomem *iomem; /* I/O Memory */
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156 struct vip_config *config;
157};
158
159static const unsigned int registers_to_save[AUX_COUNT] = {
160 DVP_HLFLN, DVP_RGB, DVP_PKZ
161};
162
163static struct v4l2_pix_format formats_50[] = {
164 { /*PAL interlaced */
165 .width = 720,
166 .height = 576,
167 .pixelformat = V4L2_PIX_FMT_UYVY,
168 .field = V4L2_FIELD_INTERLACED,
169 .bytesperline = 720 * 2,
170 .sizeimage = 720 * 2 * 576,
171 .colorspace = V4L2_COLORSPACE_SMPTE170M},
172 { /*PAL top */
173 .width = 720,
174 .height = 288,
175 .pixelformat = V4L2_PIX_FMT_UYVY,
176 .field = V4L2_FIELD_TOP,
177 .bytesperline = 720 * 2,
178 .sizeimage = 720 * 2 * 288,
179 .colorspace = V4L2_COLORSPACE_SMPTE170M},
180 { /*PAL bottom */
181 .width = 720,
182 .height = 288,
183 .pixelformat = V4L2_PIX_FMT_UYVY,
184 .field = V4L2_FIELD_BOTTOM,
185 .bytesperline = 720 * 2,
186 .sizeimage = 720 * 2 * 288,
187 .colorspace = V4L2_COLORSPACE_SMPTE170M},
188
189};
190
191static struct v4l2_pix_format formats_60[] = {
192 { /*NTSC interlaced */
193 .width = 720,
194 .height = 480,
195 .pixelformat = V4L2_PIX_FMT_UYVY,
196 .field = V4L2_FIELD_INTERLACED,
197 .bytesperline = 720 * 2,
198 .sizeimage = 720 * 2 * 480,
199 .colorspace = V4L2_COLORSPACE_SMPTE170M},
200 { /*NTSC top */
201 .width = 720,
202 .height = 240,
203 .pixelformat = V4L2_PIX_FMT_UYVY,
204 .field = V4L2_FIELD_TOP,
205 .bytesperline = 720 * 2,
206 .sizeimage = 720 * 2 * 240,
207 .colorspace = V4L2_COLORSPACE_SMPTE170M},
208 { /*NTSC bottom */
209 .width = 720,
210 .height = 240,
211 .pixelformat = V4L2_PIX_FMT_UYVY,
212 .field = V4L2_FIELD_BOTTOM,
213 .bytesperline = 720 * 2,
214 .sizeimage = 720 * 2 * 240,
215 .colorspace = V4L2_COLORSPACE_SMPTE170M},
216};
217
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218/* Write VIP register */
219static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
efeb98b4 220{
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221 iowrite32((val), (vip->iomem)+(reg));
222}
223/* Read VIP register */
224static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
efeb98b4 225{
8dc97ea2 226 return ioread32((vip->iomem)+(reg));
efeb98b4 227}
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228/* Start DMA acquisition */
229static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
efeb98b4 230{
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231 unsigned long offset = 0;
232
233 if (vip->format.field == V4L2_FIELD_INTERLACED)
234 offset = vip->format.width * 2;
efeb98b4 235
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236 spin_lock_irq(&vip->slock);
237 /* Enable acquisition */
238 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
239 /* Set Top and Bottom Field memory address */
240 reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
241 reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
242 spin_unlock_irq(&vip->slock);
243}
efeb98b4 244
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245/* Fetch the next buffer to activate */
246static void vip_active_buf_next(struct sta2x11_vip *vip)
247{
248 /* Get the next buffer */
249 spin_lock(&vip->lock);
250 if (list_empty(&vip->buffer_list)) {/* No available buffer */
251 spin_unlock(&vip->lock);
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252 return;
253 }
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254 vip->active = list_first_entry(&vip->buffer_list,
255 struct vip_buffer,
256 list);
257 /* Reset Top and Bottom counter */
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258 vip->tcount = 0;
259 vip->bcount = 0;
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260 spin_unlock(&vip->lock);
261 if (vb2_is_streaming(&vip->vb_vidq)) { /* streaming is on */
262 start_dma(vip, vip->active); /* start dma capture */
263 }
264}
efeb98b4 265
efeb98b4 266
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267/* Videobuf2 Operations */
268static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
269 unsigned int *nbuffers, unsigned int *nplanes,
270 unsigned int sizes[], void *alloc_ctxs[])
271{
272 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 273
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274 if (!(*nbuffers) || *nbuffers < MAX_FRAMES)
275 *nbuffers = MAX_FRAMES;
efeb98b4 276
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277 *nplanes = 1;
278 sizes[0] = vip->format.sizeimage;
279 alloc_ctxs[0] = vip->alloc_ctx;
efeb98b4 280
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281 vip->sequence = 0;
282 vip->active = NULL;
283 vip->tcount = 0;
284 vip->bcount = 0;
efeb98b4 285
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286 return 0;
287};
288static int buffer_init(struct vb2_buffer *vb)
efeb98b4 289{
8dc97ea2 290 struct vip_buffer *vip_buf = to_vip_buffer(vb);
efeb98b4 291
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292 vip_buf->dma = vb2_dma_contig_plane_dma_addr(vb, 0);
293 INIT_LIST_HEAD(&vip_buf->list);
294 return 0;
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295}
296
8dc97ea2 297static int buffer_prepare(struct vb2_buffer *vb)
efeb98b4 298{
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299 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
300 struct vip_buffer *vip_buf = to_vip_buffer(vb);
301 unsigned long size;
302
303 size = vip->format.sizeimage;
304 if (vb2_plane_size(vb, 0) < size) {
305 v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
306 vb2_plane_size(vb, 0), size);
307 return -EINVAL;
308 }
efeb98b4 309
8dc97ea2 310 vb2_set_plane_payload(&vip_buf->vb, 0, size);
efeb98b4 311
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312 return 0;
313}
314static void buffer_queue(struct vb2_buffer *vb)
315{
316 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
317 struct vip_buffer *vip_buf = to_vip_buffer(vb);
318
319 spin_lock(&vip->lock);
320 list_add_tail(&vip_buf->list, &vip->buffer_list);
321 if (!vip->active) { /* No active buffer, active the first one */
322 vip->active = list_first_entry(&vip->buffer_list,
323 struct vip_buffer,
324 list);
325 if (vb2_is_streaming(&vip->vb_vidq)) /* streaming is on */
326 start_dma(vip, vip_buf); /* start dma capture */
efeb98b4 327 }
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328 spin_unlock(&vip->lock);
329}
06470642 330static void buffer_finish(struct vb2_buffer *vb)
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331{
332 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
333 struct vip_buffer *vip_buf = to_vip_buffer(vb);
efeb98b4 334
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335 /* Buffer handled, remove it from the list */
336 spin_lock(&vip->lock);
337 list_del_init(&vip_buf->list);
338 spin_unlock(&vip->lock);
efeb98b4 339
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340 if (vb2_is_streaming(vb->vb2_queue))
341 vip_active_buf_next(vip);
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342}
343
8dc97ea2 344static int start_streaming(struct vb2_queue *vq, unsigned int count)
efeb98b4 345{
8dc97ea2 346 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 347
efeb98b4 348 spin_lock_irq(&vip->slock);
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349 /* Enable interrupt VSYNC Top and Bottom*/
350 reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
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351 spin_unlock_irq(&vip->slock);
352
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353 if (count)
354 start_dma(vip, vip->active);
efeb98b4 355
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356 return 0;
357}
358
8dc97ea2 359/* abort streaming and wait for last buffer */
e37559b2 360static void stop_streaming(struct vb2_queue *vq)
efeb98b4 361{
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362 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
363 struct vip_buffer *vip_buf, *node;
364
365 /* Disable acquisition */
366 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
367 /* Disable all interrupts */
368 reg_write(vip, DVP_ITM, 0);
369
370 /* Release all active buffers */
371 spin_lock(&vip->lock);
372 list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
373 vb2_buffer_done(&vip_buf->vb, VB2_BUF_STATE_ERROR);
374 list_del(&vip_buf->list);
375 }
376 spin_unlock(&vip->lock);
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377}
378
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379static struct vb2_ops vip_video_qops = {
380 .queue_setup = queue_setup,
381 .buf_init = buffer_init,
382 .buf_prepare = buffer_prepare,
383 .buf_finish = buffer_finish,
384 .buf_queue = buffer_queue,
385 .start_streaming = start_streaming,
386 .stop_streaming = stop_streaming,
387};
efeb98b4 388
efeb98b4 389
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390/* File Operations */
391static const struct v4l2_file_operations vip_fops = {
392 .owner = THIS_MODULE,
393 .open = v4l2_fh_open,
394 .release = vb2_fop_release,
395 .unlocked_ioctl = video_ioctl2,
396 .read = vb2_fop_read,
397 .mmap = vb2_fop_mmap,
398 .poll = vb2_fop_poll
399};
efeb98b4 400
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401
402/**
403 * vidioc_querycap - return capabilities of device
8dc97ea2 404 * @file: descriptor of device
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405 * @cap: contains return values
406 *
407 * the capabilities of the device are returned
408 *
409 * return value: 0, no error.
410 */
411static int vidioc_querycap(struct file *file, void *priv,
412 struct v4l2_capability *cap)
413{
8dc97ea2 414 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 415
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416 strcpy(cap->driver, KBUILD_MODNAME);
417 strcpy(cap->card, KBUILD_MODNAME);
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418 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
419 pci_name(vip->pdev));
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420 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
421 V4L2_CAP_STREAMING;
422 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
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423
424 return 0;
425}
426
427/**
428 * vidioc_s_std - set video standard
8dc97ea2 429 * @file: descriptor of device
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430 * @std: contains standard to be set
431 *
432 * the video standard is set
433 *
434 * return value: 0, no error.
435 *
436 * -EIO, no input signal detected
437 *
438 * other, returned from video DAC.
439 */
314527ac 440static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id std)
efeb98b4 441{
8dc97ea2 442 struct sta2x11_vip *vip = video_drvdata(file);
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443 v4l2_std_id oldstd = vip->std, newstd;
444 int status;
445
314527ac 446 if (V4L2_STD_ALL == std) {
8774bed9 447 v4l2_subdev_call(vip->decoder, video, s_std, std);
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448 ssleep(2);
449 v4l2_subdev_call(vip->decoder, video, querystd, &newstd);
450 v4l2_subdev_call(vip->decoder, video, g_input_status, &status);
451 if (status & V4L2_IN_ST_NO_SIGNAL)
452 return -EIO;
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453 std = vip->std = newstd;
454 if (oldstd != std) {
455 if (V4L2_STD_525_60 & std)
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456 vip->format = formats_60[0];
457 else
458 vip->format = formats_50[0];
459 }
460 return 0;
461 }
462
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463 if (oldstd != std) {
464 if (V4L2_STD_525_60 & std)
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465 vip->format = formats_60[0];
466 else
467 vip->format = formats_50[0];
468 }
469
8774bed9 470 return v4l2_subdev_call(vip->decoder, video, s_std, std);
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471}
472
473/**
474 * vidioc_g_std - get video standard
8dc97ea2 475 * @file: descriptor of device
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476 * @std: contains return values
477 *
478 * the current video standard is returned
479 *
480 * return value: 0, no error.
481 */
482static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)
483{
8dc97ea2 484 struct sta2x11_vip *vip = video_drvdata(file);
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485
486 *std = vip->std;
487 return 0;
488}
489
490/**
491 * vidioc_querystd - get possible video standards
8dc97ea2 492 * @file: descriptor of device
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493 * @std: contains return values
494 *
495 * all possible video standards are returned
496 *
497 * return value: delivered by video DAC routine.
498 */
499static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)
500{
8dc97ea2 501 struct sta2x11_vip *vip = video_drvdata(file);
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502
503 return v4l2_subdev_call(vip->decoder, video, querystd, std);
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504}
505
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506static int vidioc_enum_input(struct file *file, void *priv,
507 struct v4l2_input *inp)
508{
509 if (inp->index > 1)
510 return -EINVAL;
511
512 inp->type = V4L2_INPUT_TYPE_CAMERA;
513 inp->std = V4L2_STD_ALL;
514 sprintf(inp->name, "Camera %u", inp->index);
515
516 return 0;
517}
518
519/**
520 * vidioc_s_input - set input line
8dc97ea2 521 * @file: descriptor of device
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522 * @i: new input line number
523 *
524 * the current active input line is set
525 *
526 * return value: 0, no error.
527 *
528 * -EINVAL, line number out of range
529 */
530static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
531{
8dc97ea2 532 struct sta2x11_vip *vip = video_drvdata(file);
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533 int ret;
534
535 if (i > 1)
536 return -EINVAL;
537 ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
538
539 if (!ret)
540 vip->input = i;
541
542 return 0;
543}
544
545/**
546 * vidioc_g_input - return input line
8dc97ea2 547 * @file: descriptor of device
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548 * @i: returned input line number
549 *
550 * the current active input line is returned
551 *
552 * return value: always 0.
553 */
554static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
555{
8dc97ea2 556 struct sta2x11_vip *vip = video_drvdata(file);
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557
558 *i = vip->input;
559 return 0;
560}
561
562/**
563 * vidioc_enum_fmt_vid_cap - return video capture format
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564 * @f: returned format information
565 *
566 * returns name and format of video capture
567 * Only UYVY is supported by hardware.
568 *
569 * return value: always 0.
570 */
571static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
572 struct v4l2_fmtdesc *f)
573{
574
575 if (f->index != 0)
576 return -EINVAL;
577
578 strcpy(f->description, "4:2:2, packed, UYVY");
579 f->pixelformat = V4L2_PIX_FMT_UYVY;
580 f->flags = 0;
581 return 0;
582}
583
584/**
585 * vidioc_try_fmt_vid_cap - set video capture format
8dc97ea2 586 * @file: descriptor of device
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587 * @f: new format
588 *
589 * new video format is set which includes width and
590 * field type. width is fixed to 720, no scaling.
591 * Only UYVY is supported by this hardware.
592 * the minimum height is 200, the maximum is 576 (PAL)
593 *
594 * return value: 0, no error
595 *
596 * -EINVAL, pixel or field format not supported
597 *
598 */
599static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
600 struct v4l2_format *f)
601{
8dc97ea2 602 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
FV
603 int interlace_lim;
604
8dc97ea2
FV
605 if (V4L2_PIX_FMT_UYVY != f->fmt.pix.pixelformat) {
606 v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
efeb98b4 607 return -EINVAL;
8dc97ea2 608 }
efeb98b4 609
6ae009a8 610 if (V4L2_STD_525_60 & vip->std)
efeb98b4
FV
611 interlace_lim = 240;
612 else
613 interlace_lim = 288;
614
615 switch (f->fmt.pix.field) {
8dc97ea2 616 default:
efeb98b4
FV
617 case V4L2_FIELD_ANY:
618 if (interlace_lim < f->fmt.pix.height)
619 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
620 else
621 f->fmt.pix.field = V4L2_FIELD_BOTTOM;
622 break;
623 case V4L2_FIELD_TOP:
624 case V4L2_FIELD_BOTTOM:
625 if (interlace_lim < f->fmt.pix.height)
626 f->fmt.pix.height = interlace_lim;
627 break;
628 case V4L2_FIELD_INTERLACED:
629 break;
efeb98b4
FV
630 }
631
8dc97ea2
FV
632 /* It is the only supported format */
633 f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
efeb98b4
FV
634 f->fmt.pix.height &= ~1;
635 if (2 * interlace_lim < f->fmt.pix.height)
636 f->fmt.pix.height = 2 * interlace_lim;
637 if (200 > f->fmt.pix.height)
638 f->fmt.pix.height = 200;
639 f->fmt.pix.width = 720;
640 f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
641 f->fmt.pix.sizeimage = f->fmt.pix.width * 2 * f->fmt.pix.height;
642 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
efeb98b4
FV
643 return 0;
644}
645
646/**
647 * vidioc_s_fmt_vid_cap - set current video format parameters
8dc97ea2 648 * @file: descriptor of device
efeb98b4
FV
649 * @f: returned format information
650 *
651 * set new capture format
652 * return value: 0, no error
653 *
654 * other, delivered by video DAC routine.
655 */
656static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
657 struct v4l2_format *f)
658{
8dc97ea2
FV
659 struct sta2x11_vip *vip = video_drvdata(file);
660 unsigned int t_stop, b_stop, pitch;
efeb98b4
FV
661 int ret;
662
663 ret = vidioc_try_fmt_vid_cap(file, priv, f);
664 if (ret)
665 return ret;
666
8dc97ea2
FV
667 if (vb2_is_busy(&vip->vb_vidq)) {
668 /* Can't change format during acquisition */
669 v4l2_err(&vip->v4l2_dev, "device busy\n");
670 return -EBUSY;
671 }
672 vip->format = f->fmt.pix;
673 switch (vip->format.field) {
674 case V4L2_FIELD_INTERLACED:
675 t_stop = ((vip->format.height / 2 - 1) << 16) |
676 (2 * vip->format.width - 1);
677 b_stop = t_stop;
678 pitch = 4 * vip->format.width;
679 break;
680 case V4L2_FIELD_TOP:
681 t_stop = ((vip->format.height - 1) << 16) |
682 (2 * vip->format.width - 1);
683 b_stop = (0 << 16) | (2 * vip->format.width - 1);
684 pitch = 2 * vip->format.width;
685 break;
686 case V4L2_FIELD_BOTTOM:
687 t_stop = (0 << 16) | (2 * vip->format.width - 1);
688 b_stop = (vip->format.height << 16) |
689 (2 * vip->format.width - 1);
690 pitch = 2 * vip->format.width;
691 break;
692 default:
693 v4l2_err(&vip->v4l2_dev, "unknown field format\n");
694 return -EINVAL;
695 }
696
697 spin_lock_irq(&vip->slock);
698 /* Y-X Top Field Offset */
699 reg_write(vip, DVP_TFO, 0);
700 /* Y-X Bottom Field Offset */
701 reg_write(vip, DVP_BFO, 0);
702 /* Y-X Top Field Stop*/
703 reg_write(vip, DVP_TFS, t_stop);
704 /* Y-X Bottom Field Stop */
705 reg_write(vip, DVP_BFS, b_stop);
706 /* Video Memory Pitch */
707 reg_write(vip, DVP_VMP, pitch);
708 spin_unlock_irq(&vip->slock);
709
efeb98b4
FV
710 return 0;
711}
712
713/**
714 * vidioc_g_fmt_vid_cap - get current video format parameters
8dc97ea2 715 * @file: descriptor of device
efeb98b4
FV
716 * @f: contains format information
717 *
718 * returns current video format parameters
719 *
720 * return value: 0, always successful
721 */
722static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
723 struct v4l2_format *f)
724{
8dc97ea2 725 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 726
8dc97ea2 727 f->fmt.pix = vip->format;
efeb98b4 728
8dc97ea2 729 return 0;
efeb98b4
FV
730}
731
efeb98b4
FV
732static const struct v4l2_ioctl_ops vip_ioctl_ops = {
733 .vidioc_querycap = vidioc_querycap,
8dc97ea2
FV
734 /* FMT handling */
735 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
736 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
737 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
738 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
739 /* Buffer handlers */
740 .vidioc_create_bufs = vb2_ioctl_create_bufs,
741 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
742 .vidioc_reqbufs = vb2_ioctl_reqbufs,
743 .vidioc_querybuf = vb2_ioctl_querybuf,
744 .vidioc_qbuf = vb2_ioctl_qbuf,
745 .vidioc_dqbuf = vb2_ioctl_dqbuf,
746 /* Stream on/off */
747 .vidioc_streamon = vb2_ioctl_streamon,
748 .vidioc_streamoff = vb2_ioctl_streamoff,
749 /* Standard handling */
efeb98b4 750 .vidioc_g_std = vidioc_g_std,
8dc97ea2 751 .vidioc_s_std = vidioc_s_std,
efeb98b4 752 .vidioc_querystd = vidioc_querystd,
8dc97ea2 753 /* Input handling */
efeb98b4 754 .vidioc_enum_input = vidioc_enum_input,
efeb98b4 755 .vidioc_g_input = vidioc_g_input,
8dc97ea2
FV
756 .vidioc_s_input = vidioc_s_input,
757 /* Log status ioctl */
758 .vidioc_log_status = v4l2_ctrl_log_status,
759 /* Event handling */
760 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
761 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
efeb98b4
FV
762};
763
764static struct video_device video_dev_template = {
8dc97ea2 765 .name = KBUILD_MODNAME,
4db4ca74 766 .release = video_device_release_empty,
efeb98b4
FV
767 .fops = &vip_fops,
768 .ioctl_ops = &vip_ioctl_ops,
769 .tvnorms = V4L2_STD_ALL,
770};
771
772/**
773 * vip_irq - interrupt routine
774 * @irq: Number of interrupt ( not used, correct number is assumed )
775 * @vip: local data structure containing all information
776 *
777 * check for both frame interrupts set ( top and bottom ).
778 * check FIFO overflow, but limit number of log messages after open.
8dc97ea2 779 * signal a complete buffer if done
efeb98b4
FV
780 *
781 * return value: IRQ_NONE, interrupt was not generated by VIP
782 *
783 * IRQ_HANDLED, interrupt done.
784 */
785static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
786{
8dc97ea2 787 unsigned int status;
efeb98b4 788
8dc97ea2 789 status = reg_read(vip, DVP_ITS);
efeb98b4 790
8dc97ea2 791 if (!status) /* No interrupt to handle */
efeb98b4 792 return IRQ_NONE;
efeb98b4 793
8dc97ea2
FV
794 if (status & DVP_IT_FIFO)
795 if (vip->overflow++ > 5)
796 pr_info("VIP: fifo overflow\n");
efeb98b4 797
8dc97ea2 798 if ((status & DVP_IT_VST) && (status & DVP_IT_VSB)) {
efeb98b4
FV
799 /* this is bad, we are too slow, hope the condition is gone
800 * on the next frame */
efeb98b4
FV
801 return IRQ_HANDLED;
802 }
803
8dc97ea2
FV
804 if (status & DVP_IT_VST)
805 if ((++vip->tcount) < 2)
806 return IRQ_HANDLED;
807 if (status & DVP_IT_VSB) {
808 vip->bcount++;
809 return IRQ_HANDLED;
efeb98b4
FV
810 }
811
8dc97ea2
FV
812 if (vip->active) { /* Acquisition is over on this buffer */
813 /* Disable acquisition */
814 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
815 /* Remove the active buffer from the list */
b59b100c 816 v4l2_get_timestamp(&vip->active->vb.v4l2_buf.timestamp);
8dc97ea2
FV
817 vip->active->vb.v4l2_buf.sequence = vip->sequence++;
818 vb2_buffer_done(&vip->active->vb, VB2_BUF_STATE_DONE);
819 }
efeb98b4 820
8dc97ea2
FV
821 return IRQ_HANDLED;
822}
efeb98b4 823
8dc97ea2
FV
824static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
825{
826 /* Register initialization */
827 spin_lock_irq(&vip->slock);
828 /* Clean interrupt */
829 reg_read(vip, DVP_ITS);
830 /* Enable Half Line per vertical */
831 reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
832 /* Reset VIP control */
833 reg_write(vip, DVP_CTL, DVP_CTL_RST);
834 /* Clear VIP control */
835 reg_write(vip, DVP_CTL, 0);
836 spin_unlock_irq(&vip->slock);
837}
838static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
839{
840 spin_lock_irq(&vip->slock);
841 /* Disable interrupt */
842 reg_write(vip, DVP_ITM, 0);
843 /* Reset VIP Control */
844 reg_write(vip, DVP_CTL, DVP_CTL_RST);
845 /* Clear VIP Control */
846 reg_write(vip, DVP_CTL, 0);
847 /* Clean VIP Interrupt */
848 reg_read(vip, DVP_ITS);
849 spin_unlock_irq(&vip->slock);
850}
851static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
852{
853 int err;
efeb98b4 854
8dc97ea2
FV
855 err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
856 if (err) {
857 v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
858 return err;
efeb98b4 859 }
8dc97ea2
FV
860 memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
861 vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
862 vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
863 vip->vb_vidq.drv_priv = vip;
864 vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
865 vip->vb_vidq.ops = &vip_video_qops;
866 vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
b59b100c 867 vip->vb_vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
8dc97ea2
FV
868 err = vb2_queue_init(&vip->vb_vidq);
869 if (err)
870 return err;
871 INIT_LIST_HEAD(&vip->buffer_list);
872 spin_lock_init(&vip->lock);
873
874
875 vip->alloc_ctx = vb2_dma_contig_init_ctx(&vip->pdev->dev);
876 if (IS_ERR(vip->alloc_ctx)) {
877 v4l2_err(&vip->v4l2_dev, "Can't allocate buffer context");
878 return PTR_ERR(vip->alloc_ctx);
efeb98b4 879 }
8dc97ea2
FV
880
881 return 0;
882}
883static void sta2x11_vip_release_buffer(struct sta2x11_vip *vip)
884{
885 vb2_dma_contig_cleanup_ctx(vip->alloc_ctx);
886}
887static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
888{
889 /*
890 * Inititialize an empty control so VIP can inerithing controls
891 * from ADV7180
892 */
893 v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
894
895 vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
896 if (vip->ctrl_hdl.error) {
897 int err = vip->ctrl_hdl.error;
898
899 v4l2_ctrl_handler_free(&vip->ctrl_hdl);
900 return err;
901 }
902
903 return 0;
efeb98b4
FV
904}
905
906/**
907 * vip_gpio_reserve - reserve gpio pin
908 * @dev: device
909 * @pin: GPIO pin number
910 * @dir: direction, input or output
911 * @name: GPIO pin name
912 *
913 */
914static int vip_gpio_reserve(struct device *dev, int pin, int dir,
915 const char *name)
916{
917 int ret;
918
919 if (pin == -1)
920 return 0;
921
922 ret = gpio_request(pin, name);
923 if (ret) {
924 dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);
925 return ret;
926 }
927
928 ret = gpio_direction_output(pin, dir);
929 if (ret) {
930 dev_err(dev, "Failed to set direction for pin %d (%s)\n",
931 pin, name);
932 gpio_free(pin);
933 return ret;
934 }
935
936 ret = gpio_export(pin, false);
937 if (ret) {
938 dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);
939 gpio_free(pin);
940 return ret;
941 }
942
943 return 0;
944}
945
946/**
947 * vip_gpio_release - release gpio pin
948 * @dev: device
949 * @pin: GPIO pin number
950 * @name: GPIO pin name
951 *
952 */
953static void vip_gpio_release(struct device *dev, int pin, const char *name)
954{
955 if (pin != -1) {
956 dev_dbg(dev, "releasing pin %d (%s)\n", pin, name);
957 gpio_unexport(pin);
958 gpio_free(pin);
959 }
960}
961
962/**
963 * sta2x11_vip_init_one - init one instance of video device
964 * @pdev: PCI device
965 * @ent: (not used)
966 *
967 * allocate reset pins for DAC.
968 * Reset video DAC, this is done via reset line.
969 * allocate memory for managing device
970 * request interrupt
971 * map IO region
972 * register device
973 * find and initialize video DAC
974 *
975 * return value: 0, no error
976 *
977 * -ENOMEM, no memory
978 *
979 * -ENODEV, device could not be detected or registered
980 */
4c62e976
GKH
981static int sta2x11_vip_init_one(struct pci_dev *pdev,
982 const struct pci_device_id *ent)
efeb98b4
FV
983{
984 int ret;
985 struct sta2x11_vip *vip;
986 struct vip_config *config;
987
8dc97ea2
FV
988 /* Check if hardware support 26-bit DMA */
989 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(26))) {
990 dev_err(&pdev->dev, "26-bit DMA addressing not available\n");
991 return -EINVAL;
992 }
993 /* Enable PCI */
efeb98b4
FV
994 ret = pci_enable_device(pdev);
995 if (ret)
996 return ret;
997
8dc97ea2 998 /* Get VIP platform data */
efeb98b4
FV
999 config = dev_get_platdata(&pdev->dev);
1000 if (!config) {
1001 dev_info(&pdev->dev, "VIP slot disabled\n");
1002 ret = -EINVAL;
1003 goto disable;
1004 }
1005
8dc97ea2 1006 /* Power configuration */
efeb98b4
FV
1007 ret = vip_gpio_reserve(&pdev->dev, config->pwr_pin, 0,
1008 config->pwr_name);
1009 if (ret)
1010 goto disable;
1011
1012 if (config->reset_pin >= 0) {
1013 ret = vip_gpio_reserve(&pdev->dev, config->reset_pin, 0,
1014 config->reset_name);
1015 if (ret) {
1016 vip_gpio_release(&pdev->dev, config->pwr_pin,
1017 config->pwr_name);
1018 goto disable;
1019 }
1020 }
efeb98b4
FV
1021 if (config->pwr_pin != -1) {
1022 /* Datasheet says 5ms between PWR and RST */
1023 usleep_range(5000, 25000);
1024 ret = gpio_direction_output(config->pwr_pin, 1);
1025 }
1026
1027 if (config->reset_pin != -1) {
1028 /* Datasheet says 5ms between PWR and RST */
1029 usleep_range(5000, 25000);
1030 ret = gpio_direction_output(config->reset_pin, 1);
1031 }
1032 usleep_range(5000, 25000);
1033
8dc97ea2 1034 /* Allocate a new VIP instance */
efeb98b4
FV
1035 vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1036 if (!vip) {
1037 ret = -ENOMEM;
1038 goto release_gpios;
1039 }
efeb98b4
FV
1040 vip->pdev = pdev;
1041 vip->std = V4L2_STD_PAL;
1042 vip->format = formats_50[0];
1043 vip->config = config;
1044
8dc97ea2
FV
1045 ret = sta2x11_vip_init_controls(vip);
1046 if (ret)
1047 goto free_mem;
d017650b
WY
1048 ret = v4l2_device_register(&pdev->dev, &vip->v4l2_dev);
1049 if (ret)
efeb98b4
FV
1050 goto free_mem;
1051
1052 dev_dbg(&pdev->dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",
1053 (unsigned long)pci_resource_start(pdev, 0),
1054 (unsigned long)pci_resource_len(pdev, 0), pdev->irq);
1055
1056 pci_set_master(pdev);
1057
8dc97ea2 1058 ret = pci_request_regions(pdev, KBUILD_MODNAME);
efeb98b4
FV
1059 if (ret)
1060 goto unreg;
1061
1062 vip->iomem = pci_iomap(pdev, 0, 0x100);
1063 if (!vip->iomem) {
8dc97ea2 1064 ret = -ENOMEM;
efeb98b4
FV
1065 goto release;
1066 }
1067
1068 pci_enable_msi(pdev);
1069
8dc97ea2
FV
1070 /* Initialize buffer */
1071 ret = sta2x11_vip_init_buffer(vip);
1072 if (ret)
1073 goto unmap;
1074
efeb98b4 1075 spin_lock_init(&vip->slock);
efeb98b4
FV
1076
1077 ret = request_irq(pdev->irq,
1078 (irq_handler_t) vip_irq,
8dc97ea2 1079 IRQF_SHARED, KBUILD_MODNAME, vip);
efeb98b4
FV
1080 if (ret) {
1081 dev_err(&pdev->dev, "request_irq failed\n");
1082 ret = -ENODEV;
8dc97ea2 1083 goto release_buf;
efeb98b4
FV
1084 }
1085
4db4ca74
HV
1086 /* Initialize and register video device */
1087 vip->video_dev = video_dev_template;
1088 vip->video_dev.v4l2_dev = &vip->v4l2_dev;
1089 vip->video_dev.queue = &vip->vb_vidq;
1090 video_set_drvdata(&vip->video_dev, vip);
efeb98b4 1091
4db4ca74 1092 ret = video_register_device(&vip->video_dev, VFL_TYPE_GRABBER, -1);
efeb98b4
FV
1093 if (ret)
1094 goto vrelease;
1095
8dc97ea2 1096 /* Get ADV7180 subdevice */
efeb98b4
FV
1097 vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1098 if (!vip->adapter) {
1099 ret = -ENODEV;
1100 dev_err(&pdev->dev, "no I2C adapter found\n");
1101 goto vunreg;
1102 }
1103
1104 vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1105 "adv7180", vip->config->i2c_addr,
1106 NULL);
1107 if (!vip->decoder) {
1108 ret = -ENODEV;
1109 dev_err(&pdev->dev, "no decoder found\n");
1110 goto vunreg;
1111 }
1112
1113 i2c_put_adapter(vip->adapter);
efeb98b4
FV
1114 v4l2_subdev_call(vip->decoder, core, init, 0);
1115
8dc97ea2
FV
1116 sta2x11_vip_init_register(vip);
1117
1118 dev_info(&pdev->dev, "STA2X11 Video Input Port (VIP) loaded\n");
efeb98b4
FV
1119 return 0;
1120
1121vunreg:
4db4ca74 1122 video_set_drvdata(&vip->video_dev, NULL);
efeb98b4 1123vrelease:
4db4ca74 1124 video_unregister_device(&vip->video_dev);
efeb98b4 1125 free_irq(pdev->irq, vip);
8dc97ea2
FV
1126release_buf:
1127 sta2x11_vip_release_buffer(vip);
efeb98b4
FV
1128 pci_disable_msi(pdev);
1129unmap:
8dc97ea2 1130 vb2_queue_release(&vip->vb_vidq);
efeb98b4 1131 pci_iounmap(pdev, vip->iomem);
efeb98b4
FV
1132release:
1133 pci_release_regions(pdev);
1134unreg:
1135 v4l2_device_unregister(&vip->v4l2_dev);
1136free_mem:
1137 kfree(vip);
1138release_gpios:
1139 vip_gpio_release(&pdev->dev, config->reset_pin, config->reset_name);
1140 vip_gpio_release(&pdev->dev, config->pwr_pin, config->pwr_name);
1141disable:
1142 /*
1143 * do not call pci_disable_device on sta2x11 because it break all
1144 * other Bus masters on this EP
1145 */
1146 return ret;
1147}
1148
1149/**
1150 * sta2x11_vip_remove_one - release device
1151 * @pdev: PCI device
1152 *
1153 * Undo everything done in .._init_one
1154 *
1155 * unregister video device
1156 * free interrupt
1157 * unmap ioadresses
1158 * free memory
1159 * free GPIO pins
1160 */
4c62e976 1161static void sta2x11_vip_remove_one(struct pci_dev *pdev)
efeb98b4
FV
1162{
1163 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1164 struct sta2x11_vip *vip =
1165 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1166
8dc97ea2
FV
1167 sta2x11_vip_clear_register(vip);
1168
4db4ca74
HV
1169 video_set_drvdata(&vip->video_dev, NULL);
1170 video_unregister_device(&vip->video_dev);
efeb98b4
FV
1171 free_irq(pdev->irq, vip);
1172 pci_disable_msi(pdev);
8dc97ea2 1173 vb2_queue_release(&vip->vb_vidq);
efeb98b4
FV
1174 pci_iounmap(pdev, vip->iomem);
1175 pci_release_regions(pdev);
1176
1177 v4l2_device_unregister(&vip->v4l2_dev);
efeb98b4
FV
1178
1179 vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1180 vip->config->pwr_name);
1181 vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1182 vip->config->reset_name);
1183
1184 kfree(vip);
1185 /*
1186 * do not call pci_disable_device on sta2x11 because it break all
1187 * other Bus masters on this EP
1188 */
1189}
1190
1191#ifdef CONFIG_PM
1192
1193/**
1194 * sta2x11_vip_suspend - set device into power save mode
1195 * @pdev: PCI device
1196 * @state: new state of device
1197 *
1198 * all relevant registers are saved and an attempt to set a new state is made.
1199 *
1200 * return value: 0 always indicate success,
1201 * even if device could not be disabled. (workaround for hardware problem)
efeb98b4
FV
1202 */
1203static int sta2x11_vip_suspend(struct pci_dev *pdev, pm_message_t state)
1204{
1205 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1206 struct sta2x11_vip *vip =
1207 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1208 unsigned long flags;
1209 int i;
1210
1211 spin_lock_irqsave(&vip->slock, flags);
8dc97ea2
FV
1212 vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1213 reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1214 vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1215 reg_write(vip, DVP_ITM, 0);
efeb98b4 1216 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1217 vip->register_save_area[i] = reg_read(vip, 4 * i);
efeb98b4
FV
1218 for (i = 0; i < AUX_COUNT; i++)
1219 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
8dc97ea2 1220 reg_read(vip, registers_to_save[i]);
efeb98b4
FV
1221 spin_unlock_irqrestore(&vip->slock, flags);
1222 /* save pci state */
1223 pci_save_state(pdev);
1224 if (pci_set_power_state(pdev, pci_choose_state(pdev, state))) {
1225 /*
1226 * do not call pci_disable_device on sta2x11 because it
1227 * break all other Bus masters on this EP
1228 */
1229 vip->disabled = 1;
1230 }
1231
1232 pr_info("VIP: suspend\n");
1233 return 0;
1234}
1235
1236/**
1237 * sta2x11_vip_resume - resume device operation
1238 * @pdev : PCI device
1239 *
1240 * re-enable device, set PCI state to powered and restore registers.
1241 * resume normal device operation afterwards.
1242 *
1243 * return value: 0, no error.
1244 *
1245 * other, could not set device to power on state.
1246 */
1247static int sta2x11_vip_resume(struct pci_dev *pdev)
1248{
1249 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1250 struct sta2x11_vip *vip =
1251 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1252 unsigned long flags;
1253 int ret, i;
1254
1255 pr_info("VIP: resume\n");
1256 /* restore pci state */
1257 if (vip->disabled) {
1258 ret = pci_enable_device(pdev);
1259 if (ret) {
8dc97ea2 1260 pr_warn("VIP: Can't enable device.\n");
efeb98b4
FV
1261 return ret;
1262 }
1263 vip->disabled = 0;
1264 }
1265 ret = pci_set_power_state(pdev, PCI_D0);
1266 if (ret) {
1267 /*
1268 * do not call pci_disable_device on sta2x11 because it
1269 * break all other Bus masters on this EP
1270 */
8dc97ea2 1271 pr_warn("VIP: Can't enable device.\n");
efeb98b4
FV
1272 vip->disabled = 1;
1273 return ret;
1274 }
1275
1276 pci_restore_state(pdev);
1277
1278 spin_lock_irqsave(&vip->slock, flags);
1279 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1280 reg_write(vip, 4 * i, vip->register_save_area[i]);
efeb98b4 1281 for (i = 0; i < AUX_COUNT; i++)
8dc97ea2 1282 reg_write(vip, registers_to_save[i],
efeb98b4 1283 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
8dc97ea2
FV
1284 reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1285 reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
efeb98b4
FV
1286 spin_unlock_irqrestore(&vip->slock, flags);
1287 return 0;
1288}
1289
1290#endif
1291
f1b84d36 1292static const struct pci_device_id sta2x11_vip_pci_tbl[] = {
efeb98b4
FV
1293 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},
1294 {0,}
1295};
1296
1297static struct pci_driver sta2x11_vip_driver = {
8dc97ea2 1298 .name = KBUILD_MODNAME,
efeb98b4 1299 .probe = sta2x11_vip_init_one,
4c62e976 1300 .remove = sta2x11_vip_remove_one,
efeb98b4
FV
1301 .id_table = sta2x11_vip_pci_tbl,
1302#ifdef CONFIG_PM
1303 .suspend = sta2x11_vip_suspend,
1304 .resume = sta2x11_vip_resume,
1305#endif
1306};
1307
1308static int __init sta2x11_vip_init_module(void)
1309{
1310 return pci_register_driver(&sta2x11_vip_driver);
1311}
1312
1313static void __exit sta2x11_vip_exit_module(void)
1314{
1315 pci_unregister_driver(&sta2x11_vip_driver);
1316}
1317
1318#ifdef MODULE
1319module_init(sta2x11_vip_init_module);
1320module_exit(sta2x11_vip_exit_module);
1321#else
1322late_initcall_sync(sta2x11_vip_init_module);
1323#endif
1324
1325MODULE_DESCRIPTION("STA2X11 Video Input Port driver");
1326MODULE_AUTHOR("Wind River");
1327MODULE_LICENSE("GPL v2");
1328MODULE_SUPPORTED_DEVICE("sta2x11 video input");
1329MODULE_VERSION(DRV_VERSION);
1330MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);
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