[deliverable/linux.git] / drivers / media / platform / blackfin / ppi.c

/*
 * ppi.c Analog Devices Parallel Peripheral Interface driver
 *
 * Copyright (c) 2011 Analog Devices Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>

#include <asm/bfin_ppi.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <asm/dma.h>
#include <asm/portmux.h>

#include <media/blackfin/ppi.h>

static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
static void ppi_detach_irq(struct ppi_if *ppi);
static int ppi_start(struct ppi_if *ppi);
static int ppi_stop(struct ppi_if *ppi);
static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);

static const struct ppi_ops ppi_ops = {
	.attach_irq = ppi_attach_irq,
	.detach_irq = ppi_detach_irq,
	.start = ppi_start,
	.stop = ppi_stop,
	.set_params = ppi_set_params,
	.update_addr = ppi_update_addr,
};

static irqreturn_t ppi_irq_err(int irq, void *dev_id)
{
	struct ppi_if *ppi = dev_id;
	const struct ppi_info *info = ppi->info;

	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		unsigned short status;

		/* register on bf561 is cleared when read 
		 * others are W1C
		 */
		status = bfin_read16(&reg->status);
		if (status & 0x3000)
			ppi->err = true;
		bfin_write16(&reg->status, 0xff00);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		unsigned short status;

		status = bfin_read16(&reg->status);
		if (status & 0x2)
			ppi->err = true;
		bfin_write16(&reg->status, 0xffff);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;
		unsigned long stat;

		stat = bfin_read32(&reg->stat);
		if (stat & 0x2)
			ppi->err = true;
		bfin_write32(&reg->stat, 0xc0ff);
		break;
	}
	default:
		break;
	}

	return IRQ_HANDLED;
}

static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
{
	const struct ppi_info *info = ppi->info;
	int ret;

	ret = request_dma(info->dma_ch, "PPI_DMA");

	if (ret) {
		pr_err("Unable to allocate DMA channel for PPI\n");
		return ret;
	}
	set_dma_callback(info->dma_ch, handler, ppi);

	if (ppi->err_int) {
		ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
		if (ret) {
			pr_err("Unable to allocate IRQ for PPI\n");
			free_dma(info->dma_ch);
		}
	}
	return ret;
}

static void ppi_detach_irq(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	if (ppi->err_int)
		free_irq(info->irq_err, ppi);
	free_dma(info->dma_ch);
}

static int ppi_start(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	/* enable DMA */
	enable_dma(info->dma_ch);

	/* enable PPI */
	ppi->ppi_control |= PORT_EN;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		bfin_write16(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		bfin_write32(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;
		bfin_write32(&reg->ctl, ppi->ppi_control);
		break;
	}
	default:
		return -EINVAL;
	}

	SSYNC();
	return 0;
}

static int ppi_stop(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	/* disable PPI */
	ppi->ppi_control &= ~PORT_EN;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		bfin_write16(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		bfin_write32(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;
		bfin_write32(&reg->ctl, ppi->ppi_control);
		break;
	}
	default:
		return -EINVAL;
	}

	/* disable DMA */
	clear_dma_irqstat(info->dma_ch);
	disable_dma(info->dma_ch);

	SSYNC();
	return 0;
}

static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
{
	const struct ppi_info *info = ppi->info;
	int dma32 = 0;
	int dma_config, bytes_per_line;
	int hcount, hdelay, samples_per_line;

	bytes_per_line = params->width * params->bpp / 8;
	/* convert parameters unit from pixels to samples */
	hcount = params->width * params->bpp / params->dlen;
	hdelay = params->hdelay * params->bpp / params->dlen;
	samples_per_line = params->line * params->bpp / params->dlen;
	if (params->int_mask == 0xFFFFFFFF)
		ppi->err_int = false;
	else
		ppi->err_int = true;

	dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
	ppi->ppi_control = params->ppi_control & ~PORT_EN;
	if (!(ppi->ppi_control & PORT_DIR))
		dma_config |= WNR;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;

		if (params->ppi_control & DMA32)
			dma32 = 1;

		bfin_write16(&reg->control, ppi->ppi_control);
		bfin_write16(&reg->count, samples_per_line - 1);
		bfin_write16(&reg->frame, params->frame);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;

		if ((params->ppi_control & PACK_EN)
			|| (params->ppi_control & 0x38000) > DLEN_16)
			dma32 = 1;

		bfin_write32(&reg->control, ppi->ppi_control);
		bfin_write16(&reg->line, samples_per_line);
		bfin_write16(&reg->frame, params->frame);
		bfin_write16(&reg->hdelay, hdelay);
		bfin_write16(&reg->vdelay, params->vdelay);
		bfin_write16(&reg->hcount, hcount);
		bfin_write16(&reg->vcount, params->height);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;

		if ((params->ppi_control & PACK_EN)
			|| (params->ppi_control & 0x70000) > DLEN_16)
			dma32 = 1;

		bfin_write32(&reg->ctl, ppi->ppi_control);
		bfin_write32(&reg->line, samples_per_line);
		bfin_write32(&reg->frame, params->frame);
		bfin_write32(&reg->hdly, hdelay);
		bfin_write32(&reg->vdly, params->vdelay);
		bfin_write32(&reg->hcnt, hcount);
		bfin_write32(&reg->vcnt, params->height);
		if (params->int_mask)
			bfin_write32(&reg->imsk, params->int_mask & 0xFF);
		if (ppi->ppi_control & PORT_DIR) {
			u32 hsync_width, vsync_width, vsync_period;

			hsync_width = params->hsync
					* params->bpp / params->dlen;
			vsync_width = params->vsync * samples_per_line;
			vsync_period = samples_per_line * params->frame;
			bfin_write32(&reg->fs1_wlhb, hsync_width);
			bfin_write32(&reg->fs1_paspl, samples_per_line);
			bfin_write32(&reg->fs2_wlvb, vsync_width);
			bfin_write32(&reg->fs2_palpf, vsync_period);
		}
		break;
	}
	default:
		return -EINVAL;
	}

	if (dma32) {
		dma_config |= WDSIZE_32 | PSIZE_32;
		set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
		set_dma_x_modify(info->dma_ch, 4);
		set_dma_y_modify(info->dma_ch, 4);
	} else {
		dma_config |= WDSIZE_16 | PSIZE_16;
		set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
		set_dma_x_modify(info->dma_ch, 2);
		set_dma_y_modify(info->dma_ch, 2);
	}
	set_dma_y_count(info->dma_ch, params->height);
	set_dma_config(info->dma_ch, dma_config);

	SSYNC();
	return 0;
}

static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
{
	set_dma_start_addr(ppi->info->dma_ch, addr);
}

struct ppi_if *ppi_create_instance(struct platform_device *pdev,
			const struct ppi_info *info)
{
	struct ppi_if *ppi;

	if (!info || !info->pin_req)
		return NULL;

	if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
		dev_err(&pdev->dev, "request peripheral failed\n");
		return NULL;
	}

	ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
	if (!ppi) {
		peripheral_free_list(info->pin_req);
		dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n");
		return NULL;
	}
	ppi->ops = &ppi_ops;
	ppi->info = info;

	pr_info("ppi probe success\n");
	return ppi;
}
EXPORT_SYMBOL(ppi_create_instance);

void ppi_delete_instance(struct ppi_if *ppi)
{
	peripheral_free_list(ppi->info->pin_req);
	kfree(ppi);
}
EXPORT_SYMBOL(ppi_delete_instance);

MODULE_DESCRIPTION("Analog Devices PPI driver");
MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
63b1a90d SJ	1	/*
	2	* ppi.c Analog Devices Parallel Peripheral Interface driver
	3	*
	4	* Copyright (c) 2011 Analog Devices Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	18	*/
	19
fab0e8fa	20	#include <linux/module.h>
63b1a90d	21	#include <linux/slab.h>
f7d0e6d6	22	#include <linux/platform_device.h>
63b1a90d SJ	23
	24	#include <asm/bfin_ppi.h>
	25	#include <asm/blackfin.h>
	26	#include <asm/cacheflush.h>
	27	#include <asm/dma.h>
	28	#include <asm/portmux.h>
	29
	30	#include <media/blackfin/ppi.h>
	31
	32	static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
	33	static void ppi_detach_irq(struct ppi_if *ppi);
	34	static int ppi_start(struct ppi_if *ppi);
	35	static int ppi_stop(struct ppi_if *ppi);
	36	static int ppi_set_params(struct ppi_if ppi, struct ppi_params params);
	37	static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
	38
	39	static const struct ppi_ops ppi_ops = {
	40	.attach_irq = ppi_attach_irq,
	41	.detach_irq = ppi_detach_irq,
	42	.start = ppi_start,
	43	.stop = ppi_stop,
	44	.set_params = ppi_set_params,
	45	.update_addr = ppi_update_addr,
	46	};
	47
	48	static irqreturn_t ppi_irq_err(int irq, void *dev_id)
	49	{
	50	struct ppi_if *ppi = dev_id;
	51	const struct ppi_info *info = ppi->info;
	52
	53	switch (info->type) {
	54	case PPI_TYPE_PPI:
	55	{
	56	struct bfin_ppi_regs *reg = info->base;
	57	unsigned short status;
	58
	59	/* register on bf561 is cleared when read
	60	* others are W1C
	61	*/
	62	status = bfin_read16(&reg->status);
d78a4882 SJ	63	if (status & 0x3000)
d78a4882 SJ	64	ppi->err = true;
63b1a90d SJ	65	bfin_write16(&reg->status, 0xff00);
	66	break;
	67	}
	68	case PPI_TYPE_EPPI:
	69	{
	70	struct bfin_eppi_regs *reg = info->base;
d78a4882 SJ	71	unsigned short status;
	72
	73	status = bfin_read16(&reg->status);
	74	if (status & 0x2)
	75	ppi->err = true;
63b1a90d SJ	76	bfin_write16(&reg->status, 0xffff);
	77	break;
	78	}
45b82596 SJ	79	case PPI_TYPE_EPPI3:
	80	{
	81	struct bfin_eppi3_regs *reg = info->base;
d78a4882	82	unsigned long stat;
45b82596	83
d78a4882 SJ	84	stat = bfin_read32(&reg->stat);
	85	if (stat & 0x2)
	86	ppi->err = true;
45b82596 SJ	87	bfin_write32(&reg->stat, 0xc0ff);
	88	break;
	89	}
63b1a90d SJ	90	default:
	91	break;
	92	}
	93
	94	return IRQ_HANDLED;
	95	}
	96
	97	static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
	98	{
	99	const struct ppi_info *info = ppi->info;
	100	int ret;
	101
	102	ret = request_dma(info->dma_ch, "PPI_DMA");
	103
	104	if (ret) {
	105	pr_err("Unable to allocate DMA channel for PPI\n");
	106	return ret;
	107	}
	108	set_dma_callback(info->dma_ch, handler, ppi);
	109
	110	if (ppi->err_int) {
	111	ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
	112	if (ret) {
	113	pr_err("Unable to allocate IRQ for PPI\n");
	114	free_dma(info->dma_ch);
	115	}
	116	}
	117	return ret;
	118	}
	119
	120	static void ppi_detach_irq(struct ppi_if *ppi)
	121	{
	122	const struct ppi_info *info = ppi->info;
	123
	124	if (ppi->err_int)
	125	free_irq(info->irq_err, ppi);
	126	free_dma(info->dma_ch);
	127	}
	128
	129	static int ppi_start(struct ppi_if *ppi)
	130	{
	131	const struct ppi_info *info = ppi->info;
	132
	133	/* enable DMA */
	134	enable_dma(info->dma_ch);
	135
	136	/* enable PPI */
	137	ppi->ppi_control \|= PORT_EN;
	138	switch (info->type) {
	139	case PPI_TYPE_PPI:
	140	{
	141	struct bfin_ppi_regs *reg = info->base;
	142	bfin_write16(&reg->control, ppi->ppi_control);
	143	break;
	144	}
	145	case PPI_TYPE_EPPI:
	146	{
	147	struct bfin_eppi_regs *reg = info->base;
	148	bfin_write32(&reg->control, ppi->ppi_control);
	149	break;
	150	}
45b82596 SJ	151	case PPI_TYPE_EPPI3:
	152	{
	153	struct bfin_eppi3_regs *reg = info->base;
	154	bfin_write32(&reg->ctl, ppi->ppi_control);
	155	break;
	156	}
63b1a90d SJ	157	default:
	158	return -EINVAL;
	159	}
	160
	161	SSYNC();
	162	return 0;
	163	}
	164
	165	static int ppi_stop(struct ppi_if *ppi)
	166	{
	167	const struct ppi_info *info = ppi->info;
	168
	169	/* disable PPI */
	170	ppi->ppi_control &= ~PORT_EN;
	171	switch (info->type) {
	172	case PPI_TYPE_PPI:
	173	{
	174	struct bfin_ppi_regs *reg = info->base;
	175	bfin_write16(&reg->control, ppi->ppi_control);
	176	break;
	177	}
	178	case PPI_TYPE_EPPI:
	179	{
	180	struct bfin_eppi_regs *reg = info->base;
	181	bfin_write32(&reg->control, ppi->ppi_control);
	182	break;
	183	}
45b82596 SJ	184	case PPI_TYPE_EPPI3:
	185	{
	186	struct bfin_eppi3_regs *reg = info->base;
	187	bfin_write32(&reg->ctl, ppi->ppi_control);
	188	break;
	189	}
63b1a90d SJ	190	default:
	191	return -EINVAL;
	192	}
	193
	194	/* disable DMA */
	195	clear_dma_irqstat(info->dma_ch);
	196	disable_dma(info->dma_ch);
	197
	198	SSYNC();
	199	return 0;
	200	}
	201
	202	static int ppi_set_params(struct ppi_if ppi, struct ppi_params params)
	203	{
	204	const struct ppi_info *info = ppi->info;
	205	int dma32 = 0;
45b82596 SJ	206	int dma_config, bytes_per_line;
45b82596 SJ	207	int hcount, hdelay, samples_per_line;
63b1a90d SJ	208
63b1a90d SJ	209	bytes_per_line = params->width * params->bpp / 8;
45b82596 SJ	210	/* convert parameters unit from pixels to samples */
	211	hcount = params->width * params->bpp / params->dlen;
	212	hdelay = params->hdelay * params->bpp / params->dlen;
	213	samples_per_line = params->line * params->bpp / params->dlen;
63b1a90d SJ	214	if (params->int_mask == 0xFFFFFFFF)
	215	ppi->err_int = false;
	216	else
	217	ppi->err_int = true;
	218
45b82596	219	dma_config = (DMA_FLOW_STOP \| RESTART \| DMA2D \| DI_EN_Y);
63b1a90d	220	ppi->ppi_control = params->ppi_control & ~PORT_EN;
45b82596 SJ	221	if (!(ppi->ppi_control & PORT_DIR))
45b82596 SJ	222	dma_config \|= WNR;
63b1a90d SJ	223	switch (info->type) {
	224	case PPI_TYPE_PPI:
	225	{
	226	struct bfin_ppi_regs *reg = info->base;
	227
	228	if (params->ppi_control & DMA32)
	229	dma32 = 1;
	230
	231	bfin_write16(&reg->control, ppi->ppi_control);
45b82596 SJ	232	bfin_write16(&reg->count, samples_per_line - 1);
45b82596 SJ	233	bfin_write16(&reg->frame, params->frame);
63b1a90d SJ	234	break;
	235	}
	236	case PPI_TYPE_EPPI:
	237	{
	238	struct bfin_eppi_regs *reg = info->base;
	239
	240	if ((params->ppi_control & PACK_EN)
	241	\|\| (params->ppi_control & 0x38000) > DLEN_16)
	242	dma32 = 1;
	243
	244	bfin_write32(&reg->control, ppi->ppi_control);
45b82596 SJ	245	bfin_write16(&reg->line, samples_per_line);
	246	bfin_write16(&reg->frame, params->frame);
	247	bfin_write16(&reg->hdelay, hdelay);
	248	bfin_write16(&reg->vdelay, params->vdelay);
	249	bfin_write16(&reg->hcount, hcount);
	250	bfin_write16(&reg->vcount, params->height);
	251	break;
	252	}
	253	case PPI_TYPE_EPPI3:
	254	{
	255	struct bfin_eppi3_regs *reg = info->base;
	256
	257	if ((params->ppi_control & PACK_EN)
	258	\|\| (params->ppi_control & 0x70000) > DLEN_16)
	259	dma32 = 1;
	260
	261	bfin_write32(&reg->ctl, ppi->ppi_control);
	262	bfin_write32(&reg->line, samples_per_line);
	263	bfin_write32(&reg->frame, params->frame);
	264	bfin_write32(&reg->hdly, hdelay);
	265	bfin_write32(&reg->vdly, params->vdelay);
	266	bfin_write32(&reg->hcnt, hcount);
	267	bfin_write32(&reg->vcnt, params->height);
	268	if (params->int_mask)
	269	bfin_write32(&reg->imsk, params->int_mask & 0xFF);
968bd2e7 SJ	270	if (ppi->ppi_control & PORT_DIR) {
	271	u32 hsync_width, vsync_width, vsync_period;
	272
	273	hsync_width = params->hsync
	274	* params->bpp / params->dlen;
	275	vsync_width = params->vsync * samples_per_line;
	276	vsync_period = samples_per_line * params->frame;
	277	bfin_write32(&reg->fs1_wlhb, hsync_width);
	278	bfin_write32(&reg->fs1_paspl, samples_per_line);
	279	bfin_write32(&reg->fs2_wlvb, vsync_width);
	280	bfin_write32(&reg->fs2_palpf, vsync_period);
	281	}
63b1a90d SJ	282	break;
	283	}
	284	default:
	285	return -EINVAL;
	286	}
	287
	288	if (dma32) {
45b82596	289	dma_config \|= WDSIZE_32 \| PSIZE_32;
63b1a90d SJ	290	set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
	291	set_dma_x_modify(info->dma_ch, 4);
	292	set_dma_y_modify(info->dma_ch, 4);
	293	} else {
45b82596	294	dma_config \|= WDSIZE_16 \| PSIZE_16;
63b1a90d SJ	295	set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
	296	set_dma_x_modify(info->dma_ch, 2);
	297	set_dma_y_modify(info->dma_ch, 2);
	298	}
45b82596	299	set_dma_y_count(info->dma_ch, params->height);
63b1a90d SJ	300	set_dma_config(info->dma_ch, dma_config);
	301
	302	SSYNC();
	303	return 0;
	304	}
	305
	306	static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
	307	{
	308	set_dma_start_addr(ppi->info->dma_ch, addr);
	309	}
	310
f7d0e6d6 SZ	311	struct ppi_if ppi_create_instance(struct platform_device pdev,
f7d0e6d6 SZ	312	const struct ppi_info *info)
63b1a90d SJ	313	{
	314	struct ppi_if *ppi;
	315
	316	if (!info \|\| !info->pin_req)
	317	return NULL;
	318
	319	if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
f7d0e6d6	320	dev_err(&pdev->dev, "request peripheral failed\n");
63b1a90d SJ	321	return NULL;
	322	}
	323
	324	ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
	325	if (!ppi) {
	326	peripheral_free_list(info->pin_req);
f7d0e6d6	327	dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n");
63b1a90d SJ	328	return NULL;
	329	}
	330	ppi->ops = &ppi_ops;
	331	ppi->info = info;
	332
	333	pr_info("ppi probe success\n");
	334	return ppi;
	335	}
fab0e8fa	336	EXPORT_SYMBOL(ppi_create_instance);
63b1a90d SJ	337
	338	void ppi_delete_instance(struct ppi_if *ppi)
	339	{
	340	peripheral_free_list(ppi->info->pin_req);
	341	kfree(ppi);
	342	}
fab0e8fa SJ	343	EXPORT_SYMBOL(ppi_delete_instance);
	344
	345	MODULE_DESCRIPTION("Analog Devices PPI driver");
	346	MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
	347	MODULE_LICENSE("GPL v2");