Commit | Line | Data |
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186b250a JM |
1 | /* |
2 | * Coda multi-standard codec IP | |
3 | * | |
4 | * Copyright (C) 2012 Vista Silicon S.L. | |
5 | * Javier Martin, <javier.martin@vista-silicon.com> | |
6 | * Xavier Duret | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/firmware.h> | |
657eee7d | 17 | #include <linux/genalloc.h> |
186b250a JM |
18 | #include <linux/interrupt.h> |
19 | #include <linux/io.h> | |
20 | #include <linux/irq.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/of_device.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/videodev2.h> | |
26 | #include <linux/of.h> | |
657eee7d | 27 | #include <linux/platform_data/coda.h> |
186b250a JM |
28 | |
29 | #include <media/v4l2-ctrls.h> | |
30 | #include <media/v4l2-device.h> | |
31 | #include <media/v4l2-ioctl.h> | |
32 | #include <media/v4l2-mem2mem.h> | |
33 | #include <media/videobuf2-core.h> | |
34 | #include <media/videobuf2-dma-contig.h> | |
35 | ||
36 | #include "coda.h" | |
37 | ||
38 | #define CODA_NAME "coda" | |
39 | ||
40 | #define CODA_MAX_INSTANCES 4 | |
41 | ||
42 | #define CODA_FMO_BUF_SIZE 32 | |
43 | #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024) | |
44 | #define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024) | |
45 | #define CODA_PARA_BUF_SIZE (10 * 1024) | |
46 | #define CODA_ISRAM_SIZE (2048 * 2) | |
657eee7d | 47 | #define CODADX6_IRAM_SIZE 0xb000 |
1043667b | 48 | #define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */ |
186b250a | 49 | |
ec25f68d | 50 | #define CODA_MAX_FRAMEBUFFERS 2 |
186b250a JM |
51 | |
52 | #define MAX_W 720 | |
53 | #define MAX_H 576 | |
54 | #define CODA_MAX_FRAME_SIZE 0x90000 | |
55 | #define FMO_SLICE_SAVE_BUF_SIZE (32) | |
56 | #define CODA_DEFAULT_GAMMA 4096 | |
57 | ||
58 | #define MIN_W 176 | |
59 | #define MIN_H 144 | |
60 | #define MAX_W 720 | |
61 | #define MAX_H 576 | |
62 | ||
63 | #define S_ALIGN 1 /* multiple of 2 */ | |
64 | #define W_ALIGN 1 /* multiple of 2 */ | |
65 | #define H_ALIGN 1 /* multiple of 2 */ | |
66 | ||
67 | #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh) | |
68 | ||
69 | static int coda_debug; | |
70 | module_param(coda_debug, int, 0); | |
71 | MODULE_PARM_DESC(coda_debug, "Debug level (0-1)"); | |
72 | ||
73 | enum { | |
74 | V4L2_M2M_SRC = 0, | |
75 | V4L2_M2M_DST = 1, | |
76 | }; | |
77 | ||
78 | enum coda_fmt_type { | |
79 | CODA_FMT_ENC, | |
80 | CODA_FMT_RAW, | |
81 | }; | |
82 | ||
83 | enum coda_inst_type { | |
84 | CODA_INST_ENCODER, | |
85 | CODA_INST_DECODER, | |
86 | }; | |
87 | ||
88 | enum coda_product { | |
89 | CODA_DX6 = 0xf001, | |
df1e74cc | 90 | CODA_7541 = 0xf012, |
186b250a JM |
91 | }; |
92 | ||
93 | struct coda_fmt { | |
94 | char *name; | |
95 | u32 fourcc; | |
96 | enum coda_fmt_type type; | |
97 | }; | |
98 | ||
99 | struct coda_devtype { | |
100 | char *firmware; | |
101 | enum coda_product product; | |
102 | struct coda_fmt *formats; | |
103 | unsigned int num_formats; | |
104 | size_t workbuf_size; | |
105 | }; | |
106 | ||
107 | /* Per-queue, driver-specific private data */ | |
108 | struct coda_q_data { | |
109 | unsigned int width; | |
110 | unsigned int height; | |
111 | unsigned int sizeimage; | |
112 | struct coda_fmt *fmt; | |
113 | }; | |
114 | ||
115 | struct coda_aux_buf { | |
116 | void *vaddr; | |
117 | dma_addr_t paddr; | |
118 | u32 size; | |
119 | }; | |
120 | ||
121 | struct coda_dev { | |
122 | struct v4l2_device v4l2_dev; | |
123 | struct video_device vfd; | |
124 | struct platform_device *plat_dev; | |
c06d8752 | 125 | const struct coda_devtype *devtype; |
186b250a JM |
126 | |
127 | void __iomem *regs_base; | |
128 | struct clk *clk_per; | |
129 | struct clk *clk_ahb; | |
130 | ||
131 | struct coda_aux_buf codebuf; | |
132 | struct coda_aux_buf workbuf; | |
657eee7d PZ |
133 | struct gen_pool *iram_pool; |
134 | long unsigned int iram_vaddr; | |
1043667b | 135 | long unsigned int iram_paddr; |
657eee7d | 136 | unsigned long iram_size; |
186b250a JM |
137 | |
138 | spinlock_t irqlock; | |
139 | struct mutex dev_mutex; | |
140 | struct v4l2_m2m_dev *m2m_dev; | |
141 | struct vb2_alloc_ctx *alloc_ctx; | |
e11f3e6e PZ |
142 | struct list_head instances; |
143 | unsigned long instance_mask; | |
2fb57f06 | 144 | struct delayed_work timeout; |
62bed14c | 145 | struct completion done; |
186b250a JM |
146 | }; |
147 | ||
148 | struct coda_params { | |
8f35c7bc | 149 | u8 rot_mode; |
186b250a JM |
150 | u8 h264_intra_qp; |
151 | u8 h264_inter_qp; | |
152 | u8 mpeg4_intra_qp; | |
153 | u8 mpeg4_inter_qp; | |
154 | u8 gop_size; | |
155 | int codec_mode; | |
156 | enum v4l2_mpeg_video_multi_slice_mode slice_mode; | |
157 | u32 framerate; | |
158 | u16 bitrate; | |
c566c789 | 159 | u32 slice_max_bits; |
186b250a JM |
160 | u32 slice_max_mb; |
161 | }; | |
162 | ||
163 | struct coda_ctx { | |
164 | struct coda_dev *dev; | |
e11f3e6e | 165 | struct list_head list; |
186b250a JM |
166 | int aborting; |
167 | int rawstreamon; | |
168 | int compstreamon; | |
169 | u32 isequence; | |
170 | struct coda_q_data q_data[2]; | |
171 | enum coda_inst_type inst_type; | |
172 | enum v4l2_colorspace colorspace; | |
173 | struct coda_params params; | |
174 | struct v4l2_m2m_ctx *m2m_ctx; | |
175 | struct v4l2_ctrl_handler ctrls; | |
176 | struct v4l2_fh fh; | |
186b250a JM |
177 | int gopcounter; |
178 | char vpu_header[3][64]; | |
179 | int vpu_header_size[3]; | |
180 | struct coda_aux_buf parabuf; | |
ec25f68d PZ |
181 | struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS]; |
182 | int num_internal_frames; | |
186b250a JM |
183 | int idx; |
184 | }; | |
185 | ||
832fbb5a JM |
186 | static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff, |
187 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 }; | |
188 | static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 }; | |
3f3f5c7f | 189 | |
186b250a JM |
190 | static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg) |
191 | { | |
192 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, | |
193 | "%s: data=0x%x, reg=0x%x\n", __func__, data, reg); | |
194 | writel(data, dev->regs_base + reg); | |
195 | } | |
196 | ||
197 | static inline unsigned int coda_read(struct coda_dev *dev, u32 reg) | |
198 | { | |
199 | u32 data; | |
200 | data = readl(dev->regs_base + reg); | |
201 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, | |
202 | "%s: data=0x%x, reg=0x%x\n", __func__, data, reg); | |
203 | return data; | |
204 | } | |
205 | ||
206 | static inline unsigned long coda_isbusy(struct coda_dev *dev) | |
207 | { | |
208 | return coda_read(dev, CODA_REG_BIT_BUSY); | |
209 | } | |
210 | ||
211 | static inline int coda_is_initialized(struct coda_dev *dev) | |
212 | { | |
213 | return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0); | |
214 | } | |
215 | ||
216 | static int coda_wait_timeout(struct coda_dev *dev) | |
217 | { | |
218 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | |
219 | ||
220 | while (coda_isbusy(dev)) { | |
221 | if (time_after(jiffies, timeout)) | |
222 | return -ETIMEDOUT; | |
223 | } | |
224 | return 0; | |
225 | } | |
226 | ||
227 | static void coda_command_async(struct coda_ctx *ctx, int cmd) | |
228 | { | |
229 | struct coda_dev *dev = ctx->dev; | |
230 | coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); | |
231 | ||
232 | coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX); | |
233 | coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD); | |
234 | coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND); | |
235 | } | |
236 | ||
237 | static int coda_command_sync(struct coda_ctx *ctx, int cmd) | |
238 | { | |
239 | struct coda_dev *dev = ctx->dev; | |
240 | ||
241 | coda_command_async(ctx, cmd); | |
242 | return coda_wait_timeout(dev); | |
243 | } | |
244 | ||
245 | static struct coda_q_data *get_q_data(struct coda_ctx *ctx, | |
246 | enum v4l2_buf_type type) | |
247 | { | |
248 | switch (type) { | |
249 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: | |
250 | return &(ctx->q_data[V4L2_M2M_SRC]); | |
251 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
252 | return &(ctx->q_data[V4L2_M2M_DST]); | |
253 | default: | |
254 | BUG(); | |
255 | } | |
256 | return NULL; | |
257 | } | |
258 | ||
259 | /* | |
260 | * Add one array of supported formats for each version of Coda: | |
261 | * i.MX27 -> codadx6 | |
262 | * i.MX51 -> coda7 | |
263 | * i.MX6 -> coda960 | |
264 | */ | |
265 | static struct coda_fmt codadx6_formats[] = { | |
266 | { | |
267 | .name = "YUV 4:2:0 Planar", | |
268 | .fourcc = V4L2_PIX_FMT_YUV420, | |
269 | .type = CODA_FMT_RAW, | |
270 | }, | |
271 | { | |
272 | .name = "H264 Encoded Stream", | |
273 | .fourcc = V4L2_PIX_FMT_H264, | |
274 | .type = CODA_FMT_ENC, | |
275 | }, | |
276 | { | |
277 | .name = "MPEG4 Encoded Stream", | |
278 | .fourcc = V4L2_PIX_FMT_MPEG4, | |
279 | .type = CODA_FMT_ENC, | |
280 | }, | |
281 | }; | |
282 | ||
df1e74cc PZ |
283 | static struct coda_fmt coda7_formats[] = { |
284 | { | |
285 | .name = "YUV 4:2:0 Planar", | |
286 | .fourcc = V4L2_PIX_FMT_YUV420, | |
287 | .type = CODA_FMT_RAW, | |
288 | }, | |
289 | { | |
290 | .name = "H264 Encoded Stream", | |
291 | .fourcc = V4L2_PIX_FMT_H264, | |
292 | .type = CODA_FMT_ENC, | |
293 | }, | |
294 | { | |
295 | .name = "MPEG4 Encoded Stream", | |
296 | .fourcc = V4L2_PIX_FMT_MPEG4, | |
297 | .type = CODA_FMT_ENC, | |
298 | }, | |
299 | }; | |
300 | ||
186b250a JM |
301 | static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f) |
302 | { | |
303 | struct coda_fmt *formats = dev->devtype->formats; | |
304 | int num_formats = dev->devtype->num_formats; | |
305 | unsigned int k; | |
306 | ||
307 | for (k = 0; k < num_formats; k++) { | |
308 | if (formats[k].fourcc == f->fmt.pix.pixelformat) | |
309 | break; | |
310 | } | |
311 | ||
312 | if (k == num_formats) | |
313 | return NULL; | |
314 | ||
315 | return &formats[k]; | |
316 | } | |
317 | ||
318 | /* | |
319 | * V4L2 ioctl() operations. | |
320 | */ | |
321 | static int vidioc_querycap(struct file *file, void *priv, | |
322 | struct v4l2_capability *cap) | |
323 | { | |
324 | strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver)); | |
325 | strlcpy(cap->card, CODA_NAME, sizeof(cap->card)); | |
326 | strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info)); | |
c3aac8be SN |
327 | /* |
328 | * This is only a mem-to-mem video device. The capture and output | |
329 | * device capability flags are left only for backward compatibility | |
330 | * and are scheduled for removal. | |
331 | */ | |
332 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | | |
333 | V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING; | |
186b250a JM |
334 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | static int enum_fmt(void *priv, struct v4l2_fmtdesc *f, | |
340 | enum coda_fmt_type type) | |
341 | { | |
342 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
343 | struct coda_dev *dev = ctx->dev; | |
344 | struct coda_fmt *formats = dev->devtype->formats; | |
345 | struct coda_fmt *fmt; | |
346 | int num_formats = dev->devtype->num_formats; | |
347 | int i, num = 0; | |
348 | ||
349 | for (i = 0; i < num_formats; i++) { | |
350 | if (formats[i].type == type) { | |
351 | if (num == f->index) | |
352 | break; | |
353 | ++num; | |
354 | } | |
355 | } | |
356 | ||
357 | if (i < num_formats) { | |
358 | fmt = &formats[i]; | |
359 | strlcpy(f->description, fmt->name, sizeof(f->description)); | |
360 | f->pixelformat = fmt->fourcc; | |
361 | return 0; | |
362 | } | |
363 | ||
364 | /* Format not found */ | |
365 | return -EINVAL; | |
366 | } | |
367 | ||
368 | static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, | |
369 | struct v4l2_fmtdesc *f) | |
370 | { | |
371 | return enum_fmt(priv, f, CODA_FMT_ENC); | |
372 | } | |
373 | ||
374 | static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, | |
375 | struct v4l2_fmtdesc *f) | |
376 | { | |
377 | return enum_fmt(priv, f, CODA_FMT_RAW); | |
378 | } | |
379 | ||
380 | static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) | |
381 | { | |
382 | struct vb2_queue *vq; | |
383 | struct coda_q_data *q_data; | |
384 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
385 | ||
386 | vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); | |
387 | if (!vq) | |
388 | return -EINVAL; | |
389 | ||
390 | q_data = get_q_data(ctx, f->type); | |
391 | ||
392 | f->fmt.pix.field = V4L2_FIELD_NONE; | |
393 | f->fmt.pix.pixelformat = q_data->fmt->fourcc; | |
394 | f->fmt.pix.width = q_data->width; | |
395 | f->fmt.pix.height = q_data->height; | |
396 | if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) | |
397 | f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2); | |
398 | else /* encoded formats h.264/mpeg4 */ | |
399 | f->fmt.pix.bytesperline = 0; | |
400 | ||
401 | f->fmt.pix.sizeimage = q_data->sizeimage; | |
402 | f->fmt.pix.colorspace = ctx->colorspace; | |
403 | ||
404 | return 0; | |
405 | } | |
406 | ||
407 | static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f) | |
408 | { | |
409 | enum v4l2_field field; | |
410 | ||
411 | field = f->fmt.pix.field; | |
412 | if (field == V4L2_FIELD_ANY) | |
413 | field = V4L2_FIELD_NONE; | |
414 | else if (V4L2_FIELD_NONE != field) | |
415 | return -EINVAL; | |
416 | ||
417 | /* V4L2 specification suggests the driver corrects the format struct | |
418 | * if any of the dimensions is unsupported */ | |
419 | f->fmt.pix.field = field; | |
420 | ||
421 | if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) { | |
422 | v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W, | |
423 | W_ALIGN, &f->fmt.pix.height, | |
424 | MIN_H, MAX_H, H_ALIGN, S_ALIGN); | |
425 | f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2); | |
451d43ad PZ |
426 | f->fmt.pix.sizeimage = f->fmt.pix.width * |
427 | f->fmt.pix.height * 3 / 2; | |
186b250a JM |
428 | } else { /*encoded formats h.264/mpeg4 */ |
429 | f->fmt.pix.bytesperline = 0; | |
430 | f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE; | |
431 | } | |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, | |
437 | struct v4l2_format *f) | |
438 | { | |
439 | int ret; | |
440 | struct coda_fmt *fmt; | |
441 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
442 | ||
443 | fmt = find_format(ctx->dev, f); | |
444 | /* | |
445 | * Since decoding support is not implemented yet do not allow | |
446 | * CODA_FMT_RAW formats in the capture interface. | |
447 | */ | |
448 | if (!fmt || !(fmt->type == CODA_FMT_ENC)) | |
449 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; | |
450 | ||
451 | f->fmt.pix.colorspace = ctx->colorspace; | |
452 | ||
453 | ret = vidioc_try_fmt(ctx->dev, f); | |
454 | if (ret < 0) | |
455 | return ret; | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
460 | static int vidioc_try_fmt_vid_out(struct file *file, void *priv, | |
461 | struct v4l2_format *f) | |
462 | { | |
463 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
464 | struct coda_fmt *fmt; | |
465 | int ret; | |
466 | ||
467 | fmt = find_format(ctx->dev, f); | |
468 | /* | |
469 | * Since decoding support is not implemented yet do not allow | |
470 | * CODA_FMT formats in the capture interface. | |
471 | */ | |
472 | if (!fmt || !(fmt->type == CODA_FMT_RAW)) | |
473 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; | |
474 | ||
475 | if (!f->fmt.pix.colorspace) | |
476 | f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709; | |
477 | ||
478 | ret = vidioc_try_fmt(ctx->dev, f); | |
479 | if (ret < 0) | |
480 | return ret; | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
485 | static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f) | |
486 | { | |
487 | struct coda_q_data *q_data; | |
488 | struct vb2_queue *vq; | |
489 | int ret; | |
490 | ||
491 | vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); | |
492 | if (!vq) | |
493 | return -EINVAL; | |
494 | ||
495 | q_data = get_q_data(ctx, f->type); | |
496 | if (!q_data) | |
497 | return -EINVAL; | |
498 | ||
499 | if (vb2_is_busy(vq)) { | |
500 | v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__); | |
501 | return -EBUSY; | |
502 | } | |
503 | ||
504 | ret = vidioc_try_fmt(ctx->dev, f); | |
505 | if (ret) | |
506 | return ret; | |
507 | ||
508 | q_data->fmt = find_format(ctx->dev, f); | |
509 | q_data->width = f->fmt.pix.width; | |
510 | q_data->height = f->fmt.pix.height; | |
451d43ad | 511 | q_data->sizeimage = f->fmt.pix.sizeimage; |
186b250a JM |
512 | |
513 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
514 | "Setting format for type %d, wxh: %dx%d, fmt: %d\n", | |
515 | f->type, q_data->width, q_data->height, q_data->fmt->fourcc); | |
516 | ||
517 | return 0; | |
518 | } | |
519 | ||
520 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | |
521 | struct v4l2_format *f) | |
522 | { | |
523 | int ret; | |
524 | ||
525 | ret = vidioc_try_fmt_vid_cap(file, priv, f); | |
526 | if (ret) | |
527 | return ret; | |
528 | ||
529 | return vidioc_s_fmt(fh_to_ctx(priv), f); | |
530 | } | |
531 | ||
532 | static int vidioc_s_fmt_vid_out(struct file *file, void *priv, | |
533 | struct v4l2_format *f) | |
534 | { | |
535 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
536 | int ret; | |
537 | ||
538 | ret = vidioc_try_fmt_vid_out(file, priv, f); | |
539 | if (ret) | |
540 | return ret; | |
541 | ||
8d621472 | 542 | ret = vidioc_s_fmt(ctx, f); |
186b250a JM |
543 | if (ret) |
544 | ctx->colorspace = f->fmt.pix.colorspace; | |
545 | ||
546 | return ret; | |
547 | } | |
548 | ||
549 | static int vidioc_reqbufs(struct file *file, void *priv, | |
550 | struct v4l2_requestbuffers *reqbufs) | |
551 | { | |
552 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
553 | ||
554 | return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs); | |
555 | } | |
556 | ||
557 | static int vidioc_querybuf(struct file *file, void *priv, | |
558 | struct v4l2_buffer *buf) | |
559 | { | |
560 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
561 | ||
562 | return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf); | |
563 | } | |
564 | ||
565 | static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | |
566 | { | |
567 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
568 | ||
569 | return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf); | |
570 | } | |
571 | ||
572 | static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | |
573 | { | |
574 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
575 | ||
576 | return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf); | |
577 | } | |
578 | ||
8fdf94a2 PZ |
579 | static int vidioc_create_bufs(struct file *file, void *priv, |
580 | struct v4l2_create_buffers *create) | |
581 | { | |
582 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
583 | ||
584 | return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create); | |
585 | } | |
586 | ||
186b250a JM |
587 | static int vidioc_streamon(struct file *file, void *priv, |
588 | enum v4l2_buf_type type) | |
589 | { | |
590 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
591 | ||
592 | return v4l2_m2m_streamon(file, ctx->m2m_ctx, type); | |
593 | } | |
594 | ||
595 | static int vidioc_streamoff(struct file *file, void *priv, | |
596 | enum v4l2_buf_type type) | |
597 | { | |
598 | struct coda_ctx *ctx = fh_to_ctx(priv); | |
599 | ||
600 | return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type); | |
601 | } | |
602 | ||
603 | static const struct v4l2_ioctl_ops coda_ioctl_ops = { | |
604 | .vidioc_querycap = vidioc_querycap, | |
605 | ||
606 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, | |
607 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt, | |
608 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, | |
609 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, | |
610 | ||
611 | .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out, | |
612 | .vidioc_g_fmt_vid_out = vidioc_g_fmt, | |
613 | .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out, | |
614 | .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out, | |
615 | ||
616 | .vidioc_reqbufs = vidioc_reqbufs, | |
617 | .vidioc_querybuf = vidioc_querybuf, | |
618 | ||
619 | .vidioc_qbuf = vidioc_qbuf, | |
620 | .vidioc_dqbuf = vidioc_dqbuf, | |
8fdf94a2 | 621 | .vidioc_create_bufs = vidioc_create_bufs, |
186b250a JM |
622 | |
623 | .vidioc_streamon = vidioc_streamon, | |
624 | .vidioc_streamoff = vidioc_streamoff, | |
625 | }; | |
626 | ||
627 | /* | |
628 | * Mem-to-mem operations. | |
629 | */ | |
630 | static void coda_device_run(void *m2m_priv) | |
631 | { | |
632 | struct coda_ctx *ctx = m2m_priv; | |
633 | struct coda_q_data *q_data_src, *q_data_dst; | |
634 | struct vb2_buffer *src_buf, *dst_buf; | |
635 | struct coda_dev *dev = ctx->dev; | |
636 | int force_ipicture; | |
637 | int quant_param = 0; | |
638 | u32 picture_y, picture_cb, picture_cr; | |
639 | u32 pic_stream_buffer_addr, pic_stream_buffer_size; | |
640 | u32 dst_fourcc; | |
641 | ||
642 | src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); | |
643 | dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); | |
644 | q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | |
645 | q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); | |
646 | dst_fourcc = q_data_dst->fmt->fourcc; | |
647 | ||
648 | src_buf->v4l2_buf.sequence = ctx->isequence; | |
649 | dst_buf->v4l2_buf.sequence = ctx->isequence; | |
650 | ctx->isequence++; | |
651 | ||
652 | /* | |
653 | * Workaround coda firmware BUG that only marks the first | |
654 | * frame as IDR. This is a problem for some decoders that can't | |
655 | * recover when a frame is lost. | |
656 | */ | |
657 | if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) { | |
658 | src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; | |
659 | src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; | |
660 | } else { | |
661 | src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; | |
662 | src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; | |
663 | } | |
664 | ||
665 | /* | |
666 | * Copy headers at the beginning of the first frame for H.264 only. | |
667 | * In MPEG4 they are already copied by the coda. | |
668 | */ | |
669 | if (src_buf->v4l2_buf.sequence == 0) { | |
670 | pic_stream_buffer_addr = | |
671 | vb2_dma_contig_plane_dma_addr(dst_buf, 0) + | |
672 | ctx->vpu_header_size[0] + | |
673 | ctx->vpu_header_size[1] + | |
674 | ctx->vpu_header_size[2]; | |
675 | pic_stream_buffer_size = CODA_MAX_FRAME_SIZE - | |
676 | ctx->vpu_header_size[0] - | |
677 | ctx->vpu_header_size[1] - | |
678 | ctx->vpu_header_size[2]; | |
679 | memcpy(vb2_plane_vaddr(dst_buf, 0), | |
680 | &ctx->vpu_header[0][0], ctx->vpu_header_size[0]); | |
681 | memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0], | |
682 | &ctx->vpu_header[1][0], ctx->vpu_header_size[1]); | |
683 | memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] + | |
684 | ctx->vpu_header_size[1], &ctx->vpu_header[2][0], | |
685 | ctx->vpu_header_size[2]); | |
686 | } else { | |
687 | pic_stream_buffer_addr = | |
688 | vb2_dma_contig_plane_dma_addr(dst_buf, 0); | |
689 | pic_stream_buffer_size = CODA_MAX_FRAME_SIZE; | |
690 | } | |
691 | ||
692 | if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) { | |
693 | force_ipicture = 1; | |
694 | switch (dst_fourcc) { | |
695 | case V4L2_PIX_FMT_H264: | |
696 | quant_param = ctx->params.h264_intra_qp; | |
697 | break; | |
698 | case V4L2_PIX_FMT_MPEG4: | |
699 | quant_param = ctx->params.mpeg4_intra_qp; | |
700 | break; | |
701 | default: | |
702 | v4l2_warn(&ctx->dev->v4l2_dev, | |
703 | "cannot set intra qp, fmt not supported\n"); | |
704 | break; | |
705 | } | |
706 | } else { | |
707 | force_ipicture = 0; | |
708 | switch (dst_fourcc) { | |
709 | case V4L2_PIX_FMT_H264: | |
710 | quant_param = ctx->params.h264_inter_qp; | |
711 | break; | |
712 | case V4L2_PIX_FMT_MPEG4: | |
713 | quant_param = ctx->params.mpeg4_inter_qp; | |
714 | break; | |
715 | default: | |
716 | v4l2_warn(&ctx->dev->v4l2_dev, | |
717 | "cannot set inter qp, fmt not supported\n"); | |
718 | break; | |
719 | } | |
720 | } | |
721 | ||
722 | /* submit */ | |
8f35c7bc | 723 | coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE); |
186b250a JM |
724 | coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS); |
725 | ||
726 | ||
727 | picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0); | |
728 | picture_cb = picture_y + q_data_src->width * q_data_src->height; | |
729 | picture_cr = picture_cb + q_data_src->width / 2 * | |
730 | q_data_src->height / 2; | |
731 | ||
732 | coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y); | |
733 | coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB); | |
734 | coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR); | |
735 | coda_write(dev, force_ipicture << 1 & 0x2, | |
736 | CODA_CMD_ENC_PIC_OPTION); | |
737 | ||
738 | coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START); | |
739 | coda_write(dev, pic_stream_buffer_size / 1024, | |
740 | CODA_CMD_ENC_PIC_BB_SIZE); | |
1043667b PZ |
741 | |
742 | if (dev->devtype->product == CODA_7541) { | |
743 | coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE | | |
744 | CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE, | |
745 | CODA7_REG_BIT_AXI_SRAM_USE); | |
746 | } | |
747 | ||
2fb57f06 PZ |
748 | /* 1 second timeout in case CODA locks up */ |
749 | schedule_delayed_work(&dev->timeout, HZ); | |
750 | ||
62bed14c | 751 | INIT_COMPLETION(dev->done); |
186b250a JM |
752 | coda_command_async(ctx, CODA_COMMAND_PIC_RUN); |
753 | } | |
754 | ||
755 | static int coda_job_ready(void *m2m_priv) | |
756 | { | |
757 | struct coda_ctx *ctx = m2m_priv; | |
758 | ||
759 | /* | |
760 | * For both 'P' and 'key' frame cases 1 picture | |
761 | * and 1 frame are needed. | |
762 | */ | |
763 | if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) || | |
764 | !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) { | |
765 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
766 | "not ready: not enough video buffers.\n"); | |
767 | return 0; | |
768 | } | |
769 | ||
186b250a JM |
770 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, |
771 | "job ready\n"); | |
772 | return 1; | |
773 | } | |
774 | ||
775 | static void coda_job_abort(void *priv) | |
776 | { | |
777 | struct coda_ctx *ctx = priv; | |
778 | struct coda_dev *dev = ctx->dev; | |
779 | ||
780 | ctx->aborting = 1; | |
781 | ||
782 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
783 | "Aborting task\n"); | |
784 | ||
785 | v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx); | |
786 | } | |
787 | ||
788 | static void coda_lock(void *m2m_priv) | |
789 | { | |
790 | struct coda_ctx *ctx = m2m_priv; | |
791 | struct coda_dev *pcdev = ctx->dev; | |
792 | mutex_lock(&pcdev->dev_mutex); | |
793 | } | |
794 | ||
795 | static void coda_unlock(void *m2m_priv) | |
796 | { | |
797 | struct coda_ctx *ctx = m2m_priv; | |
798 | struct coda_dev *pcdev = ctx->dev; | |
799 | mutex_unlock(&pcdev->dev_mutex); | |
800 | } | |
801 | ||
802 | static struct v4l2_m2m_ops coda_m2m_ops = { | |
803 | .device_run = coda_device_run, | |
804 | .job_ready = coda_job_ready, | |
805 | .job_abort = coda_job_abort, | |
806 | .lock = coda_lock, | |
807 | .unlock = coda_unlock, | |
808 | }; | |
809 | ||
810 | static void set_default_params(struct coda_ctx *ctx) | |
811 | { | |
812 | struct coda_dev *dev = ctx->dev; | |
813 | ||
814 | ctx->params.codec_mode = CODA_MODE_INVALID; | |
815 | ctx->colorspace = V4L2_COLORSPACE_REC709; | |
816 | ctx->params.framerate = 30; | |
186b250a JM |
817 | ctx->aborting = 0; |
818 | ||
819 | /* Default formats for output and input queues */ | |
820 | ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0]; | |
821 | ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1]; | |
822 | ctx->q_data[V4L2_M2M_SRC].width = MAX_W; | |
823 | ctx->q_data[V4L2_M2M_SRC].height = MAX_H; | |
824 | ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2; | |
825 | ctx->q_data[V4L2_M2M_DST].width = MAX_W; | |
826 | ctx->q_data[V4L2_M2M_DST].height = MAX_H; | |
827 | ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE; | |
828 | } | |
829 | ||
830 | /* | |
831 | * Queue operations | |
832 | */ | |
833 | static int coda_queue_setup(struct vb2_queue *vq, | |
834 | const struct v4l2_format *fmt, | |
835 | unsigned int *nbuffers, unsigned int *nplanes, | |
836 | unsigned int sizes[], void *alloc_ctxs[]) | |
837 | { | |
838 | struct coda_ctx *ctx = vb2_get_drv_priv(vq); | |
e34db066 | 839 | struct coda_q_data *q_data; |
186b250a JM |
840 | unsigned int size; |
841 | ||
e34db066 PZ |
842 | q_data = get_q_data(ctx, vq->type); |
843 | size = q_data->sizeimage; | |
186b250a JM |
844 | |
845 | *nplanes = 1; | |
846 | sizes[0] = size; | |
847 | ||
848 | alloc_ctxs[0] = ctx->dev->alloc_ctx; | |
849 | ||
850 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
851 | "get %d buffer(s) of size %d each.\n", *nbuffers, size); | |
852 | ||
853 | return 0; | |
854 | } | |
855 | ||
856 | static int coda_buf_prepare(struct vb2_buffer *vb) | |
857 | { | |
858 | struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | |
859 | struct coda_q_data *q_data; | |
860 | ||
861 | q_data = get_q_data(ctx, vb->vb2_queue->type); | |
862 | ||
863 | if (vb2_plane_size(vb, 0) < q_data->sizeimage) { | |
864 | v4l2_warn(&ctx->dev->v4l2_dev, | |
865 | "%s data will not fit into plane (%lu < %lu)\n", | |
866 | __func__, vb2_plane_size(vb, 0), | |
867 | (long)q_data->sizeimage); | |
868 | return -EINVAL; | |
869 | } | |
870 | ||
871 | vb2_set_plane_payload(vb, 0, q_data->sizeimage); | |
872 | ||
873 | return 0; | |
874 | } | |
875 | ||
876 | static void coda_buf_queue(struct vb2_buffer *vb) | |
877 | { | |
878 | struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | |
879 | v4l2_m2m_buf_queue(ctx->m2m_ctx, vb); | |
880 | } | |
881 | ||
882 | static void coda_wait_prepare(struct vb2_queue *q) | |
883 | { | |
884 | struct coda_ctx *ctx = vb2_get_drv_priv(q); | |
885 | coda_unlock(ctx); | |
886 | } | |
887 | ||
888 | static void coda_wait_finish(struct vb2_queue *q) | |
889 | { | |
890 | struct coda_ctx *ctx = vb2_get_drv_priv(q); | |
891 | coda_lock(ctx); | |
892 | } | |
893 | ||
ec25f68d PZ |
894 | static void coda_free_framebuffers(struct coda_ctx *ctx) |
895 | { | |
896 | int i; | |
897 | ||
898 | for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) { | |
899 | if (ctx->internal_frames[i].vaddr) { | |
900 | dma_free_coherent(&ctx->dev->plat_dev->dev, | |
901 | ctx->internal_frames[i].size, | |
902 | ctx->internal_frames[i].vaddr, | |
903 | ctx->internal_frames[i].paddr); | |
904 | ctx->internal_frames[i].vaddr = NULL; | |
905 | } | |
906 | } | |
907 | } | |
908 | ||
909 | static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc) | |
910 | { | |
911 | struct coda_dev *dev = ctx->dev; | |
912 | ||
913 | int height = q_data->height; | |
914 | int width = q_data->width; | |
915 | u32 *p; | |
916 | int i; | |
917 | ||
918 | /* Allocate frame buffers */ | |
919 | ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS; | |
920 | for (i = 0; i < ctx->num_internal_frames; i++) { | |
921 | ctx->internal_frames[i].size = q_data->sizeimage; | |
922 | if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6) | |
923 | ctx->internal_frames[i].size += width / 2 * height / 2; | |
924 | ctx->internal_frames[i].vaddr = dma_alloc_coherent( | |
925 | &dev->plat_dev->dev, ctx->internal_frames[i].size, | |
926 | &ctx->internal_frames[i].paddr, GFP_KERNEL); | |
927 | if (!ctx->internal_frames[i].vaddr) { | |
928 | coda_free_framebuffers(ctx); | |
929 | return -ENOMEM; | |
930 | } | |
931 | } | |
932 | ||
933 | /* Register frame buffers in the parameter buffer */ | |
934 | p = ctx->parabuf.vaddr; | |
935 | ||
936 | if (dev->devtype->product == CODA_DX6) { | |
937 | for (i = 0; i < ctx->num_internal_frames; i++) { | |
938 | p[i * 3] = ctx->internal_frames[i].paddr; /* Y */ | |
939 | p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */ | |
940 | p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */ | |
941 | } | |
942 | } else { | |
943 | for (i = 0; i < ctx->num_internal_frames; i += 2) { | |
944 | p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */ | |
945 | p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */ | |
946 | p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */ | |
947 | ||
948 | if (fourcc == V4L2_PIX_FMT_H264) | |
949 | p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2); | |
950 | ||
951 | if (i + 1 < ctx->num_internal_frames) { | |
952 | p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */ | |
953 | p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */ | |
954 | p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */ | |
955 | ||
956 | if (fourcc == V4L2_PIX_FMT_H264) | |
957 | p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2); | |
958 | } | |
959 | } | |
960 | } | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
3f3f5c7f JM |
965 | static int coda_h264_padding(int size, char *p) |
966 | { | |
3f3f5c7f JM |
967 | int nal_size; |
968 | int diff; | |
969 | ||
832fbb5a | 970 | diff = size - (size & ~0x7); |
3f3f5c7f JM |
971 | if (diff == 0) |
972 | return 0; | |
973 | ||
832fbb5a | 974 | nal_size = coda_filler_size[diff]; |
3f3f5c7f JM |
975 | memcpy(p, coda_filler_nal, nal_size); |
976 | ||
977 | /* Add rbsp stop bit and trailing at the end */ | |
978 | *(p + nal_size - 1) = 0x80; | |
979 | ||
980 | return nal_size; | |
981 | } | |
982 | ||
186b250a JM |
983 | static int coda_start_streaming(struct vb2_queue *q, unsigned int count) |
984 | { | |
985 | struct coda_ctx *ctx = vb2_get_drv_priv(q); | |
986 | struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev; | |
987 | u32 bitstream_buf, bitstream_size; | |
988 | struct coda_dev *dev = ctx->dev; | |
989 | struct coda_q_data *q_data_src, *q_data_dst; | |
186b250a | 990 | struct vb2_buffer *buf; |
ec25f68d | 991 | u32 dst_fourcc; |
186b250a | 992 | u32 value; |
ec25f68d | 993 | int ret; |
186b250a JM |
994 | |
995 | if (count < 1) | |
996 | return -EINVAL; | |
997 | ||
998 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) | |
999 | ctx->rawstreamon = 1; | |
1000 | else | |
1001 | ctx->compstreamon = 1; | |
1002 | ||
1003 | /* Don't start the coda unless both queues are on */ | |
1004 | if (!(ctx->rawstreamon & ctx->compstreamon)) | |
1005 | return 0; | |
1006 | ||
62bed14c PZ |
1007 | if (coda_isbusy(dev)) |
1008 | if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) | |
1009 | return -EBUSY; | |
1010 | ||
186b250a JM |
1011 | ctx->gopcounter = ctx->params.gop_size - 1; |
1012 | ||
1013 | q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | |
1014 | buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); | |
1015 | bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0); | |
1016 | q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); | |
1017 | bitstream_size = q_data_dst->sizeimage; | |
1018 | dst_fourcc = q_data_dst->fmt->fourcc; | |
1019 | ||
1020 | /* Find out whether coda must encode or decode */ | |
1021 | if (q_data_src->fmt->type == CODA_FMT_RAW && | |
1022 | q_data_dst->fmt->type == CODA_FMT_ENC) { | |
1023 | ctx->inst_type = CODA_INST_ENCODER; | |
1024 | } else if (q_data_src->fmt->type == CODA_FMT_ENC && | |
1025 | q_data_dst->fmt->type == CODA_FMT_RAW) { | |
1026 | ctx->inst_type = CODA_INST_DECODER; | |
1027 | v4l2_err(v4l2_dev, "decoding not supported.\n"); | |
1028 | return -EINVAL; | |
1029 | } else { | |
1030 | v4l2_err(v4l2_dev, "couldn't tell instance type.\n"); | |
1031 | return -EINVAL; | |
1032 | } | |
1033 | ||
1034 | if (!coda_is_initialized(dev)) { | |
1035 | v4l2_err(v4l2_dev, "coda is not initialized.\n"); | |
1036 | return -EFAULT; | |
1037 | } | |
1038 | coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR); | |
1039 | coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx)); | |
1040 | coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx)); | |
1041 | switch (dev->devtype->product) { | |
1042 | case CODA_DX6: | |
1043 | coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN | | |
1044 | CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); | |
1045 | break; | |
1046 | default: | |
1047 | coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN | | |
1048 | CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); | |
1049 | } | |
1050 | ||
1043667b PZ |
1051 | if (dev->devtype->product == CODA_DX6) { |
1052 | /* Configure the coda */ | |
1053 | coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR); | |
1054 | } | |
186b250a JM |
1055 | |
1056 | /* Could set rotation here if needed */ | |
1057 | switch (dev->devtype->product) { | |
1058 | case CODA_DX6: | |
1059 | value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET; | |
1060 | break; | |
1061 | default: | |
1062 | value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET; | |
1063 | } | |
1064 | value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; | |
1065 | coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE); | |
1066 | coda_write(dev, ctx->params.framerate, | |
1067 | CODA_CMD_ENC_SEQ_SRC_F_RATE); | |
1068 | ||
1069 | switch (dst_fourcc) { | |
1070 | case V4L2_PIX_FMT_MPEG4: | |
1071 | if (dev->devtype->product == CODA_DX6) | |
1072 | ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4; | |
1073 | else | |
1074 | ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4; | |
1075 | ||
1076 | coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD); | |
1077 | coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA); | |
1078 | break; | |
1079 | case V4L2_PIX_FMT_H264: | |
1080 | if (dev->devtype->product == CODA_DX6) | |
1081 | ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264; | |
1082 | else | |
1083 | ctx->params.codec_mode = CODA7_MODE_ENCODE_H264; | |
1084 | ||
1085 | coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD); | |
1086 | coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA); | |
1087 | break; | |
1088 | default: | |
1089 | v4l2_err(v4l2_dev, | |
1090 | "dst format (0x%08x) invalid.\n", dst_fourcc); | |
1091 | return -EINVAL; | |
1092 | } | |
1093 | ||
c566c789 PZ |
1094 | switch (ctx->params.slice_mode) { |
1095 | case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE: | |
1096 | value = 0; | |
1097 | break; | |
1098 | case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB: | |
1099 | value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; | |
1100 | value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; | |
1101 | value |= 1 & CODA_SLICING_MODE_MASK; | |
1102 | break; | |
1103 | case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES: | |
1104 | value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; | |
1105 | value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; | |
186b250a | 1106 | value |= 1 & CODA_SLICING_MODE_MASK; |
c566c789 PZ |
1107 | break; |
1108 | } | |
186b250a | 1109 | coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE); |
c566c789 | 1110 | value = ctx->params.gop_size & CODA_GOP_SIZE_MASK; |
186b250a JM |
1111 | coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE); |
1112 | ||
1113 | if (ctx->params.bitrate) { | |
1114 | /* Rate control enabled */ | |
1115 | value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET; | |
1116 | value |= 1 & CODA_RATECONTROL_ENABLE_MASK; | |
1117 | } else { | |
1118 | value = 0; | |
1119 | } | |
1120 | coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA); | |
1121 | ||
1122 | coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE); | |
1123 | coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH); | |
1124 | ||
1125 | coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START); | |
1126 | coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE); | |
1127 | ||
1128 | /* set default gamma */ | |
1129 | value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET; | |
1130 | coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA); | |
1131 | ||
1132 | value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET; | |
1133 | value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET; | |
1134 | coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION); | |
1135 | ||
1136 | if (dst_fourcc == V4L2_PIX_FMT_H264) { | |
1137 | value = (FMO_SLICE_SAVE_BUF_SIZE << 7); | |
1138 | value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET; | |
1139 | value |= 0 & CODA_FMOPARAM_SLICENUM_MASK; | |
1043667b PZ |
1140 | if (dev->devtype->product == CODA_DX6) { |
1141 | coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO); | |
1142 | } else { | |
1143 | coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE); | |
1144 | coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE); | |
1145 | } | |
186b250a JM |
1146 | } |
1147 | ||
1148 | if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) { | |
1149 | v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n"); | |
1150 | return -ETIMEDOUT; | |
1151 | } | |
1152 | ||
1153 | if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) | |
1154 | return -EFAULT; | |
1155 | ||
ec25f68d PZ |
1156 | ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc); |
1157 | if (ret < 0) | |
1158 | return ret; | |
186b250a | 1159 | |
ec25f68d | 1160 | coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM); |
1043667b PZ |
1161 | coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE); |
1162 | if (dev->devtype->product != CODA_DX6) { | |
1163 | coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE); | |
1164 | coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR); | |
1165 | coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR); | |
1166 | coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR); | |
1167 | coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR); | |
1168 | coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR); | |
1169 | } | |
186b250a JM |
1170 | if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) { |
1171 | v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n"); | |
1172 | return -ETIMEDOUT; | |
1173 | } | |
1174 | ||
1175 | /* Save stream headers */ | |
1176 | buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); | |
1177 | switch (dst_fourcc) { | |
1178 | case V4L2_PIX_FMT_H264: | |
1179 | /* | |
1180 | * Get SPS in the first frame and copy it to an | |
1181 | * intermediate buffer. | |
1182 | */ | |
1183 | coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START); | |
1184 | coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE); | |
1185 | coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE); | |
1186 | if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) { | |
1187 | v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n"); | |
1188 | return -ETIMEDOUT; | |
1189 | } | |
1190 | ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) - | |
1191 | coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); | |
1192 | memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0), | |
1193 | ctx->vpu_header_size[0]); | |
1194 | ||
1195 | /* | |
1196 | * Get PPS in the first frame and copy it to an | |
1197 | * intermediate buffer. | |
1198 | */ | |
1199 | coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START); | |
1200 | coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE); | |
1201 | coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE); | |
1202 | if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) { | |
1203 | v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n"); | |
1204 | return -ETIMEDOUT; | |
1205 | } | |
1206 | ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) - | |
1207 | coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); | |
1208 | memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0), | |
1209 | ctx->vpu_header_size[1]); | |
3f3f5c7f JM |
1210 | /* |
1211 | * Length of H.264 headers is variable and thus it might not be | |
1212 | * aligned for the coda to append the encoded frame. In that is | |
1213 | * the case a filler NAL must be added to header 2. | |
1214 | */ | |
1215 | ctx->vpu_header_size[2] = coda_h264_padding( | |
1216 | (ctx->vpu_header_size[0] + | |
1217 | ctx->vpu_header_size[1]), | |
1218 | ctx->vpu_header[2]); | |
186b250a JM |
1219 | break; |
1220 | case V4L2_PIX_FMT_MPEG4: | |
1221 | /* | |
1222 | * Get VOS in the first frame and copy it to an | |
1223 | * intermediate buffer | |
1224 | */ | |
1225 | coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START); | |
1226 | coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE); | |
1227 | coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE); | |
1228 | if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) { | |
1229 | v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n"); | |
1230 | return -ETIMEDOUT; | |
1231 | } | |
1232 | ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) - | |
1233 | coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); | |
1234 | memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0), | |
1235 | ctx->vpu_header_size[0]); | |
1236 | ||
1237 | coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START); | |
1238 | coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE); | |
1239 | coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE); | |
1240 | if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) { | |
1241 | v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n"); | |
1242 | return -ETIMEDOUT; | |
1243 | } | |
1244 | ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) - | |
1245 | coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); | |
1246 | memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0), | |
1247 | ctx->vpu_header_size[1]); | |
1248 | ||
1249 | coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START); | |
1250 | coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE); | |
1251 | coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE); | |
1252 | if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) { | |
1253 | v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n"); | |
1254 | return -ETIMEDOUT; | |
1255 | } | |
1256 | ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) - | |
1257 | coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); | |
1258 | memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0), | |
1259 | ctx->vpu_header_size[2]); | |
1260 | break; | |
1261 | default: | |
1262 | /* No more formats need to save headers at the moment */ | |
1263 | break; | |
1264 | } | |
1265 | ||
1266 | return 0; | |
1267 | } | |
1268 | ||
1269 | static int coda_stop_streaming(struct vb2_queue *q) | |
1270 | { | |
1271 | struct coda_ctx *ctx = vb2_get_drv_priv(q); | |
2fb57f06 | 1272 | struct coda_dev *dev = ctx->dev; |
186b250a JM |
1273 | |
1274 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) { | |
1275 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1276 | "%s: output\n", __func__); | |
1277 | ctx->rawstreamon = 0; | |
1278 | } else { | |
1279 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1280 | "%s: capture\n", __func__); | |
1281 | ctx->compstreamon = 0; | |
1282 | } | |
1283 | ||
62bed14c PZ |
1284 | /* Don't stop the coda unless both queues are off */ |
1285 | if (ctx->rawstreamon || ctx->compstreamon) | |
1286 | return 0; | |
2fb57f06 | 1287 | |
62bed14c PZ |
1288 | if (coda_isbusy(dev)) { |
1289 | if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) { | |
1290 | v4l2_warn(&dev->v4l2_dev, | |
1291 | "%s: timeout, sending SEQ_END anyway\n", __func__); | |
186b250a | 1292 | } |
62bed14c PZ |
1293 | } |
1294 | ||
1295 | cancel_delayed_work(&dev->timeout); | |
ec25f68d | 1296 | |
62bed14c PZ |
1297 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, |
1298 | "%s: sent command 'SEQ_END' to coda\n", __func__); | |
1299 | if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) { | |
1300 | v4l2_err(&dev->v4l2_dev, | |
1301 | "CODA_COMMAND_SEQ_END failed\n"); | |
1302 | return -ETIMEDOUT; | |
186b250a JM |
1303 | } |
1304 | ||
62bed14c PZ |
1305 | coda_free_framebuffers(ctx); |
1306 | ||
186b250a JM |
1307 | return 0; |
1308 | } | |
1309 | ||
1310 | static struct vb2_ops coda_qops = { | |
1311 | .queue_setup = coda_queue_setup, | |
1312 | .buf_prepare = coda_buf_prepare, | |
1313 | .buf_queue = coda_buf_queue, | |
1314 | .wait_prepare = coda_wait_prepare, | |
1315 | .wait_finish = coda_wait_finish, | |
1316 | .start_streaming = coda_start_streaming, | |
1317 | .stop_streaming = coda_stop_streaming, | |
1318 | }; | |
1319 | ||
1320 | static int coda_s_ctrl(struct v4l2_ctrl *ctrl) | |
1321 | { | |
1322 | struct coda_ctx *ctx = | |
1323 | container_of(ctrl->handler, struct coda_ctx, ctrls); | |
1324 | ||
1325 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1326 | "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val); | |
1327 | ||
1328 | switch (ctrl->id) { | |
8f35c7bc PZ |
1329 | case V4L2_CID_HFLIP: |
1330 | if (ctrl->val) | |
1331 | ctx->params.rot_mode |= CODA_MIR_HOR; | |
1332 | else | |
1333 | ctx->params.rot_mode &= ~CODA_MIR_HOR; | |
1334 | break; | |
1335 | case V4L2_CID_VFLIP: | |
1336 | if (ctrl->val) | |
1337 | ctx->params.rot_mode |= CODA_MIR_VER; | |
1338 | else | |
1339 | ctx->params.rot_mode &= ~CODA_MIR_VER; | |
1340 | break; | |
186b250a JM |
1341 | case V4L2_CID_MPEG_VIDEO_BITRATE: |
1342 | ctx->params.bitrate = ctrl->val / 1000; | |
1343 | break; | |
1344 | case V4L2_CID_MPEG_VIDEO_GOP_SIZE: | |
1345 | ctx->params.gop_size = ctrl->val; | |
1346 | break; | |
1347 | case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: | |
1348 | ctx->params.h264_intra_qp = ctrl->val; | |
1349 | break; | |
1350 | case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: | |
1351 | ctx->params.h264_inter_qp = ctrl->val; | |
1352 | break; | |
1353 | case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: | |
1354 | ctx->params.mpeg4_intra_qp = ctrl->val; | |
1355 | break; | |
1356 | case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: | |
1357 | ctx->params.mpeg4_inter_qp = ctrl->val; | |
1358 | break; | |
1359 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: | |
1360 | ctx->params.slice_mode = ctrl->val; | |
1361 | break; | |
1362 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB: | |
1363 | ctx->params.slice_max_mb = ctrl->val; | |
1364 | break; | |
c566c789 PZ |
1365 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES: |
1366 | ctx->params.slice_max_bits = ctrl->val * 8; | |
1367 | break; | |
186b250a JM |
1368 | case V4L2_CID_MPEG_VIDEO_HEADER_MODE: |
1369 | break; | |
1370 | default: | |
1371 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1372 | "Invalid control, id=%d, val=%d\n", | |
1373 | ctrl->id, ctrl->val); | |
1374 | return -EINVAL; | |
1375 | } | |
1376 | ||
1377 | return 0; | |
1378 | } | |
1379 | ||
1380 | static struct v4l2_ctrl_ops coda_ctrl_ops = { | |
1381 | .s_ctrl = coda_s_ctrl, | |
1382 | }; | |
1383 | ||
1384 | static int coda_ctrls_setup(struct coda_ctx *ctx) | |
1385 | { | |
1386 | v4l2_ctrl_handler_init(&ctx->ctrls, 9); | |
1387 | ||
8f35c7bc PZ |
1388 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, |
1389 | V4L2_CID_HFLIP, 0, 1, 1, 0); | |
1390 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1391 | V4L2_CID_VFLIP, 0, 1, 1, 0); | |
186b250a JM |
1392 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, |
1393 | V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0); | |
1394 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1395 | V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16); | |
1396 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1397 | V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25); | |
1398 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1399 | V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25); | |
1400 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1401 | V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2); | |
1402 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | |
1403 | V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2); | |
1404 | v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops, | |
1405 | V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, | |
c566c789 PZ |
1406 | V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0, |
1407 | V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE); | |
186b250a JM |
1408 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, |
1409 | V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1); | |
c566c789 PZ |
1410 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, |
1411 | V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500); | |
186b250a JM |
1412 | v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops, |
1413 | V4L2_CID_MPEG_VIDEO_HEADER_MODE, | |
1414 | V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, | |
1415 | (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE), | |
1416 | V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME); | |
1417 | ||
1418 | if (ctx->ctrls.error) { | |
1419 | v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)", | |
1420 | ctx->ctrls.error); | |
1421 | return -EINVAL; | |
1422 | } | |
1423 | ||
1424 | return v4l2_ctrl_handler_setup(&ctx->ctrls); | |
1425 | } | |
1426 | ||
1427 | static int coda_queue_init(void *priv, struct vb2_queue *src_vq, | |
1428 | struct vb2_queue *dst_vq) | |
1429 | { | |
1430 | struct coda_ctx *ctx = priv; | |
1431 | int ret; | |
1432 | ||
186b250a | 1433 | src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; |
09ae956f | 1434 | src_vq->io_modes = VB2_MMAP | VB2_USERPTR; |
186b250a JM |
1435 | src_vq->drv_priv = ctx; |
1436 | src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); | |
1437 | src_vq->ops = &coda_qops; | |
1438 | src_vq->mem_ops = &vb2_dma_contig_memops; | |
ccd571cb | 1439 | src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY; |
186b250a JM |
1440 | |
1441 | ret = vb2_queue_init(src_vq); | |
1442 | if (ret) | |
1443 | return ret; | |
1444 | ||
186b250a | 1445 | dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
09ae956f | 1446 | dst_vq->io_modes = VB2_MMAP | VB2_USERPTR; |
186b250a JM |
1447 | dst_vq->drv_priv = ctx; |
1448 | dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); | |
1449 | dst_vq->ops = &coda_qops; | |
1450 | dst_vq->mem_ops = &vb2_dma_contig_memops; | |
ccd571cb | 1451 | dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY; |
186b250a JM |
1452 | |
1453 | return vb2_queue_init(dst_vq); | |
1454 | } | |
1455 | ||
e11f3e6e PZ |
1456 | static int coda_next_free_instance(struct coda_dev *dev) |
1457 | { | |
1458 | return ffz(dev->instance_mask); | |
1459 | } | |
1460 | ||
186b250a JM |
1461 | static int coda_open(struct file *file) |
1462 | { | |
1463 | struct coda_dev *dev = video_drvdata(file); | |
1464 | struct coda_ctx *ctx = NULL; | |
1465 | int ret = 0; | |
e11f3e6e | 1466 | int idx; |
186b250a | 1467 | |
e11f3e6e PZ |
1468 | idx = coda_next_free_instance(dev); |
1469 | if (idx >= CODA_MAX_INSTANCES) | |
186b250a | 1470 | return -EBUSY; |
e11f3e6e | 1471 | set_bit(idx, &dev->instance_mask); |
186b250a JM |
1472 | |
1473 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); | |
1474 | if (!ctx) | |
1475 | return -ENOMEM; | |
1476 | ||
1477 | v4l2_fh_init(&ctx->fh, video_devdata(file)); | |
1478 | file->private_data = &ctx->fh; | |
1479 | v4l2_fh_add(&ctx->fh); | |
1480 | ctx->dev = dev; | |
e11f3e6e | 1481 | ctx->idx = idx; |
186b250a JM |
1482 | |
1483 | set_default_params(ctx); | |
1484 | ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, | |
1485 | &coda_queue_init); | |
1486 | if (IS_ERR(ctx->m2m_ctx)) { | |
1487 | int ret = PTR_ERR(ctx->m2m_ctx); | |
1488 | ||
1489 | v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n", | |
1490 | __func__, ret); | |
1491 | goto err; | |
1492 | } | |
1493 | ret = coda_ctrls_setup(ctx); | |
1494 | if (ret) { | |
1495 | v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n"); | |
1496 | goto err; | |
1497 | } | |
1498 | ||
1499 | ctx->fh.ctrl_handler = &ctx->ctrls; | |
1500 | ||
1501 | ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev, | |
1502 | CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL); | |
1503 | if (!ctx->parabuf.vaddr) { | |
1504 | v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf"); | |
1505 | ret = -ENOMEM; | |
1506 | goto err; | |
1507 | } | |
1508 | ||
1509 | coda_lock(ctx); | |
e11f3e6e | 1510 | list_add(&ctx->list, &dev->instances); |
186b250a JM |
1511 | coda_unlock(ctx); |
1512 | ||
1513 | clk_prepare_enable(dev->clk_per); | |
1514 | clk_prepare_enable(dev->clk_ahb); | |
1515 | ||
1516 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n", | |
1517 | ctx->idx, ctx); | |
1518 | ||
1519 | return 0; | |
1520 | ||
1521 | err: | |
1522 | v4l2_fh_del(&ctx->fh); | |
1523 | v4l2_fh_exit(&ctx->fh); | |
1524 | kfree(ctx); | |
1525 | return ret; | |
1526 | } | |
1527 | ||
1528 | static int coda_release(struct file *file) | |
1529 | { | |
1530 | struct coda_dev *dev = video_drvdata(file); | |
1531 | struct coda_ctx *ctx = fh_to_ctx(file->private_data); | |
1532 | ||
1533 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n", | |
1534 | ctx); | |
1535 | ||
1536 | coda_lock(ctx); | |
e11f3e6e | 1537 | list_del(&ctx->list); |
186b250a JM |
1538 | coda_unlock(ctx); |
1539 | ||
1540 | dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE, | |
1541 | ctx->parabuf.vaddr, ctx->parabuf.paddr); | |
1542 | v4l2_m2m_ctx_release(ctx->m2m_ctx); | |
1543 | v4l2_ctrl_handler_free(&ctx->ctrls); | |
1544 | clk_disable_unprepare(dev->clk_per); | |
1545 | clk_disable_unprepare(dev->clk_ahb); | |
1546 | v4l2_fh_del(&ctx->fh); | |
1547 | v4l2_fh_exit(&ctx->fh); | |
e11f3e6e | 1548 | clear_bit(ctx->idx, &dev->instance_mask); |
186b250a JM |
1549 | kfree(ctx); |
1550 | ||
1551 | return 0; | |
1552 | } | |
1553 | ||
1554 | static unsigned int coda_poll(struct file *file, | |
1555 | struct poll_table_struct *wait) | |
1556 | { | |
1557 | struct coda_ctx *ctx = fh_to_ctx(file->private_data); | |
1558 | int ret; | |
1559 | ||
1560 | coda_lock(ctx); | |
1561 | ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait); | |
1562 | coda_unlock(ctx); | |
1563 | return ret; | |
1564 | } | |
1565 | ||
1566 | static int coda_mmap(struct file *file, struct vm_area_struct *vma) | |
1567 | { | |
1568 | struct coda_ctx *ctx = fh_to_ctx(file->private_data); | |
1569 | ||
1570 | return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma); | |
1571 | } | |
1572 | ||
1573 | static const struct v4l2_file_operations coda_fops = { | |
1574 | .owner = THIS_MODULE, | |
1575 | .open = coda_open, | |
1576 | .release = coda_release, | |
1577 | .poll = coda_poll, | |
1578 | .unlocked_ioctl = video_ioctl2, | |
1579 | .mmap = coda_mmap, | |
1580 | }; | |
1581 | ||
1582 | static irqreturn_t coda_irq_handler(int irq, void *data) | |
1583 | { | |
ec25f68d | 1584 | struct vb2_buffer *src_buf, *dst_buf; |
186b250a JM |
1585 | struct coda_dev *dev = data; |
1586 | u32 wr_ptr, start_ptr; | |
1587 | struct coda_ctx *ctx; | |
1588 | ||
2249b457 | 1589 | cancel_delayed_work(&dev->timeout); |
2fb57f06 | 1590 | |
186b250a JM |
1591 | /* read status register to attend the IRQ */ |
1592 | coda_read(dev, CODA_REG_BIT_INT_STATUS); | |
1593 | coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET, | |
1594 | CODA_REG_BIT_INT_CLEAR); | |
1595 | ||
1596 | ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); | |
1597 | if (ctx == NULL) { | |
1598 | v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n"); | |
1599 | return IRQ_HANDLED; | |
1600 | } | |
1601 | ||
1602 | if (ctx->aborting) { | |
1603 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1604 | "task has been aborted\n"); | |
1605 | return IRQ_HANDLED; | |
1606 | } | |
1607 | ||
1608 | if (coda_isbusy(ctx->dev)) { | |
1609 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, | |
1610 | "coda is still busy!!!!\n"); | |
1611 | return IRQ_NONE; | |
1612 | } | |
1613 | ||
62bed14c PZ |
1614 | complete(&dev->done); |
1615 | ||
ec25f68d PZ |
1616 | src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); |
1617 | dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx); | |
186b250a JM |
1618 | |
1619 | /* Get results from the coda */ | |
1620 | coda_read(dev, CODA_RET_ENC_PIC_TYPE); | |
1621 | start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START); | |
1622 | wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)); | |
1623 | /* Calculate bytesused field */ | |
1624 | if (dst_buf->v4l2_buf.sequence == 0) { | |
1625 | dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) + | |
1626 | ctx->vpu_header_size[0] + | |
1627 | ctx->vpu_header_size[1] + | |
1628 | ctx->vpu_header_size[2]; | |
1629 | } else { | |
1630 | dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr); | |
1631 | } | |
1632 | ||
1633 | v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n", | |
1634 | wr_ptr - start_ptr); | |
1635 | ||
1636 | coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM); | |
1637 | coda_read(dev, CODA_RET_ENC_PIC_FLAG); | |
1638 | ||
1639 | if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) { | |
1640 | dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; | |
1641 | dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; | |
1642 | } else { | |
1643 | dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; | |
1644 | dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; | |
1645 | } | |
1646 | ||
ccd571cb KD |
1647 | dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp; |
1648 | dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode; | |
1649 | ||
ec25f68d | 1650 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); |
186b250a JM |
1651 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); |
1652 | ||
1653 | ctx->gopcounter--; | |
1654 | if (ctx->gopcounter < 0) | |
1655 | ctx->gopcounter = ctx->params.gop_size - 1; | |
1656 | ||
1657 | v4l2_dbg(1, coda_debug, &dev->v4l2_dev, | |
1658 | "job finished: encoding frame (%d) (%s)\n", | |
1659 | dst_buf->v4l2_buf.sequence, | |
1660 | (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ? | |
1661 | "KEYFRAME" : "PFRAME"); | |
1662 | ||
1663 | v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx); | |
1664 | ||
1665 | return IRQ_HANDLED; | |
1666 | } | |
1667 | ||
2fb57f06 PZ |
1668 | static void coda_timeout(struct work_struct *work) |
1669 | { | |
1670 | struct coda_ctx *ctx; | |
1671 | struct coda_dev *dev = container_of(to_delayed_work(work), | |
1672 | struct coda_dev, timeout); | |
1673 | ||
62bed14c PZ |
1674 | if (completion_done(&dev->done)) |
1675 | return; | |
1676 | ||
1677 | complete(&dev->done); | |
1678 | ||
2fb57f06 PZ |
1679 | v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n"); |
1680 | ||
1681 | mutex_lock(&dev->dev_mutex); | |
1682 | list_for_each_entry(ctx, &dev->instances, list) { | |
1683 | v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | |
1684 | v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); | |
1685 | } | |
1686 | mutex_unlock(&dev->dev_mutex); | |
1687 | } | |
1688 | ||
186b250a JM |
1689 | static u32 coda_supported_firmwares[] = { |
1690 | CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5), | |
df1e74cc | 1691 | CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29), |
186b250a JM |
1692 | }; |
1693 | ||
1694 | static bool coda_firmware_supported(u32 vernum) | |
1695 | { | |
1696 | int i; | |
1697 | ||
1698 | for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++) | |
1699 | if (vernum == coda_supported_firmwares[i]) | |
1700 | return true; | |
1701 | return false; | |
1702 | } | |
1703 | ||
1704 | static char *coda_product_name(int product) | |
1705 | { | |
1706 | static char buf[9]; | |
1707 | ||
1708 | switch (product) { | |
1709 | case CODA_DX6: | |
1710 | return "CodaDx6"; | |
df1e74cc PZ |
1711 | case CODA_7541: |
1712 | return "CODA7541"; | |
186b250a JM |
1713 | default: |
1714 | snprintf(buf, sizeof(buf), "(0x%04x)", product); | |
1715 | return buf; | |
1716 | } | |
1717 | } | |
1718 | ||
87048bb4 | 1719 | static int coda_hw_init(struct coda_dev *dev) |
186b250a JM |
1720 | { |
1721 | u16 product, major, minor, release; | |
1722 | u32 data; | |
1723 | u16 *p; | |
1724 | int i; | |
1725 | ||
1726 | clk_prepare_enable(dev->clk_per); | |
1727 | clk_prepare_enable(dev->clk_ahb); | |
1728 | ||
186b250a JM |
1729 | /* |
1730 | * Copy the first CODA_ISRAM_SIZE in the internal SRAM. | |
87048bb4 PZ |
1731 | * The 16-bit chars in the code buffer are in memory access |
1732 | * order, re-sort them to CODA order for register download. | |
186b250a JM |
1733 | * Data in this SRAM survives a reboot. |
1734 | */ | |
87048bb4 PZ |
1735 | p = (u16 *)dev->codebuf.vaddr; |
1736 | if (dev->devtype->product == CODA_DX6) { | |
1737 | for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) { | |
1738 | data = CODA_DOWN_ADDRESS_SET(i) | | |
1739 | CODA_DOWN_DATA_SET(p[i ^ 1]); | |
1740 | coda_write(dev, data, CODA_REG_BIT_CODE_DOWN); | |
1741 | } | |
1742 | } else { | |
1743 | for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) { | |
1744 | data = CODA_DOWN_ADDRESS_SET(i) | | |
1745 | CODA_DOWN_DATA_SET(p[round_down(i, 4) + | |
1746 | 3 - (i % 4)]); | |
1747 | coda_write(dev, data, CODA_REG_BIT_CODE_DOWN); | |
1748 | } | |
186b250a | 1749 | } |
186b250a JM |
1750 | |
1751 | /* Tell the BIT where to find everything it needs */ | |
1752 | coda_write(dev, dev->workbuf.paddr, | |
1753 | CODA_REG_BIT_WORK_BUF_ADDR); | |
1754 | coda_write(dev, dev->codebuf.paddr, | |
1755 | CODA_REG_BIT_CODE_BUF_ADDR); | |
1756 | coda_write(dev, 0, CODA_REG_BIT_CODE_RUN); | |
1757 | ||
1758 | /* Set default values */ | |
1759 | switch (dev->devtype->product) { | |
1760 | case CODA_DX6: | |
1761 | coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL); | |
1762 | break; | |
1763 | default: | |
1764 | coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL); | |
1765 | } | |
1766 | coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL); | |
1043667b PZ |
1767 | |
1768 | if (dev->devtype->product != CODA_DX6) | |
1769 | coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE); | |
1770 | ||
186b250a JM |
1771 | coda_write(dev, CODA_INT_INTERRUPT_ENABLE, |
1772 | CODA_REG_BIT_INT_ENABLE); | |
1773 | ||
1774 | /* Reset VPU and start processor */ | |
1775 | data = coda_read(dev, CODA_REG_BIT_CODE_RESET); | |
1776 | data |= CODA_REG_RESET_ENABLE; | |
1777 | coda_write(dev, data, CODA_REG_BIT_CODE_RESET); | |
1778 | udelay(10); | |
1779 | data &= ~CODA_REG_RESET_ENABLE; | |
1780 | coda_write(dev, data, CODA_REG_BIT_CODE_RESET); | |
1781 | coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN); | |
1782 | ||
1783 | /* Load firmware */ | |
1784 | coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM); | |
1785 | coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); | |
1786 | coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX); | |
1787 | coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD); | |
1788 | coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND); | |
1789 | if (coda_wait_timeout(dev)) { | |
1790 | clk_disable_unprepare(dev->clk_per); | |
1791 | clk_disable_unprepare(dev->clk_ahb); | |
1792 | v4l2_err(&dev->v4l2_dev, "firmware get command error\n"); | |
1793 | return -EIO; | |
1794 | } | |
1795 | ||
1796 | /* Check we are compatible with the loaded firmware */ | |
1797 | data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM); | |
1798 | product = CODA_FIRMWARE_PRODUCT(data); | |
1799 | major = CODA_FIRMWARE_MAJOR(data); | |
1800 | minor = CODA_FIRMWARE_MINOR(data); | |
1801 | release = CODA_FIRMWARE_RELEASE(data); | |
1802 | ||
1803 | clk_disable_unprepare(dev->clk_per); | |
1804 | clk_disable_unprepare(dev->clk_ahb); | |
1805 | ||
1806 | if (product != dev->devtype->product) { | |
1807 | v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s," | |
1808 | " Version: %u.%u.%u\n", | |
1809 | coda_product_name(dev->devtype->product), | |
1810 | coda_product_name(product), major, minor, release); | |
1811 | return -EINVAL; | |
1812 | } | |
1813 | ||
1814 | v4l2_info(&dev->v4l2_dev, "Initialized %s.\n", | |
1815 | coda_product_name(product)); | |
1816 | ||
1817 | if (coda_firmware_supported(data)) { | |
1818 | v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n", | |
1819 | major, minor, release); | |
1820 | } else { | |
1821 | v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: " | |
1822 | "%u.%u.%u\n", major, minor, release); | |
1823 | } | |
1824 | ||
1825 | return 0; | |
1826 | } | |
1827 | ||
1828 | static void coda_fw_callback(const struct firmware *fw, void *context) | |
1829 | { | |
1830 | struct coda_dev *dev = context; | |
1831 | struct platform_device *pdev = dev->plat_dev; | |
1832 | int ret; | |
1833 | ||
1834 | if (!fw) { | |
1835 | v4l2_err(&dev->v4l2_dev, "firmware request failed\n"); | |
1836 | return; | |
1837 | } | |
1838 | ||
1839 | /* allocate auxiliary per-device code buffer for the BIT processor */ | |
1840 | dev->codebuf.size = fw->size; | |
1841 | dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size, | |
1842 | &dev->codebuf.paddr, | |
1843 | GFP_KERNEL); | |
1844 | if (!dev->codebuf.vaddr) { | |
1845 | dev_err(&pdev->dev, "failed to allocate code buffer\n"); | |
1846 | return; | |
1847 | } | |
1848 | ||
87048bb4 PZ |
1849 | /* Copy the whole firmware image to the code buffer */ |
1850 | memcpy(dev->codebuf.vaddr, fw->data, fw->size); | |
1851 | release_firmware(fw); | |
1852 | ||
1853 | ret = coda_hw_init(dev); | |
186b250a JM |
1854 | if (ret) { |
1855 | v4l2_err(&dev->v4l2_dev, "HW initialization failed\n"); | |
1856 | return; | |
1857 | } | |
1858 | ||
1859 | dev->vfd.fops = &coda_fops, | |
1860 | dev->vfd.ioctl_ops = &coda_ioctl_ops; | |
1861 | dev->vfd.release = video_device_release_empty, | |
1862 | dev->vfd.lock = &dev->dev_mutex; | |
1863 | dev->vfd.v4l2_dev = &dev->v4l2_dev; | |
954f340f | 1864 | dev->vfd.vfl_dir = VFL_DIR_M2M; |
186b250a JM |
1865 | snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME); |
1866 | video_set_drvdata(&dev->vfd, dev); | |
1867 | ||
1868 | dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | |
1869 | if (IS_ERR(dev->alloc_ctx)) { | |
1870 | v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n"); | |
1871 | return; | |
1872 | } | |
1873 | ||
1874 | dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops); | |
1875 | if (IS_ERR(dev->m2m_dev)) { | |
1876 | v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n"); | |
1877 | goto rel_ctx; | |
1878 | } | |
1879 | ||
1880 | ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0); | |
1881 | if (ret) { | |
1882 | v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); | |
1883 | goto rel_m2m; | |
1884 | } | |
1885 | v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n", | |
1886 | dev->vfd.num); | |
1887 | ||
1888 | return; | |
1889 | ||
1890 | rel_m2m: | |
1891 | v4l2_m2m_release(dev->m2m_dev); | |
1892 | rel_ctx: | |
1893 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx); | |
1894 | } | |
1895 | ||
1896 | static int coda_firmware_request(struct coda_dev *dev) | |
1897 | { | |
1898 | char *fw = dev->devtype->firmware; | |
1899 | ||
1900 | dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw, | |
1901 | coda_product_name(dev->devtype->product)); | |
1902 | ||
1903 | return request_firmware_nowait(THIS_MODULE, true, | |
1904 | fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback); | |
1905 | } | |
1906 | ||
1907 | enum coda_platform { | |
1908 | CODA_IMX27, | |
df1e74cc | 1909 | CODA_IMX53, |
186b250a JM |
1910 | }; |
1911 | ||
c06d8752 | 1912 | static const struct coda_devtype coda_devdata[] = { |
186b250a JM |
1913 | [CODA_IMX27] = { |
1914 | .firmware = "v4l-codadx6-imx27.bin", | |
1915 | .product = CODA_DX6, | |
1916 | .formats = codadx6_formats, | |
1917 | .num_formats = ARRAY_SIZE(codadx6_formats), | |
1918 | }, | |
df1e74cc PZ |
1919 | [CODA_IMX53] = { |
1920 | .firmware = "v4l-coda7541-imx53.bin", | |
1921 | .product = CODA_7541, | |
1922 | .formats = coda7_formats, | |
1923 | .num_formats = ARRAY_SIZE(coda7_formats), | |
1924 | }, | |
186b250a JM |
1925 | }; |
1926 | ||
1927 | static struct platform_device_id coda_platform_ids[] = { | |
1928 | { .name = "coda-imx27", .driver_data = CODA_IMX27 }, | |
4e44cd08 | 1929 | { .name = "coda-imx53", .driver_data = CODA_IMX53 }, |
186b250a JM |
1930 | { /* sentinel */ } |
1931 | }; | |
1932 | MODULE_DEVICE_TABLE(platform, coda_platform_ids); | |
1933 | ||
1934 | #ifdef CONFIG_OF | |
1935 | static const struct of_device_id coda_dt_ids[] = { | |
1936 | { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] }, | |
df1e74cc | 1937 | { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] }, |
186b250a JM |
1938 | { /* sentinel */ } |
1939 | }; | |
1940 | MODULE_DEVICE_TABLE(of, coda_dt_ids); | |
1941 | #endif | |
1942 | ||
4c62e976 | 1943 | static int coda_probe(struct platform_device *pdev) |
186b250a JM |
1944 | { |
1945 | const struct of_device_id *of_id = | |
1946 | of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev); | |
1947 | const struct platform_device_id *pdev_id; | |
657eee7d PZ |
1948 | struct coda_platform_data *pdata = pdev->dev.platform_data; |
1949 | struct device_node *np = pdev->dev.of_node; | |
1950 | struct gen_pool *pool; | |
186b250a JM |
1951 | struct coda_dev *dev; |
1952 | struct resource *res; | |
1953 | int ret, irq; | |
1954 | ||
1955 | dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL); | |
1956 | if (!dev) { | |
1957 | dev_err(&pdev->dev, "Not enough memory for %s\n", | |
1958 | CODA_NAME); | |
1959 | return -ENOMEM; | |
1960 | } | |
1961 | ||
1962 | spin_lock_init(&dev->irqlock); | |
e11f3e6e | 1963 | INIT_LIST_HEAD(&dev->instances); |
2fb57f06 | 1964 | INIT_DELAYED_WORK(&dev->timeout, coda_timeout); |
62bed14c PZ |
1965 | init_completion(&dev->done); |
1966 | complete(&dev->done); | |
186b250a JM |
1967 | |
1968 | dev->plat_dev = pdev; | |
1969 | dev->clk_per = devm_clk_get(&pdev->dev, "per"); | |
1970 | if (IS_ERR(dev->clk_per)) { | |
1971 | dev_err(&pdev->dev, "Could not get per clock\n"); | |
1972 | return PTR_ERR(dev->clk_per); | |
1973 | } | |
1974 | ||
1975 | dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); | |
1976 | if (IS_ERR(dev->clk_ahb)) { | |
1977 | dev_err(&pdev->dev, "Could not get ahb clock\n"); | |
1978 | return PTR_ERR(dev->clk_ahb); | |
1979 | } | |
1980 | ||
1981 | /* Get memory for physical registers */ | |
1982 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1983 | if (res == NULL) { | |
1984 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
1985 | return -ENOENT; | |
1986 | } | |
1987 | ||
1988 | if (devm_request_mem_region(&pdev->dev, res->start, | |
1989 | resource_size(res), CODA_NAME) == NULL) { | |
1990 | dev_err(&pdev->dev, "failed to request memory region\n"); | |
1991 | return -ENOENT; | |
1992 | } | |
1993 | dev->regs_base = devm_ioremap(&pdev->dev, res->start, | |
1994 | resource_size(res)); | |
1995 | if (!dev->regs_base) { | |
1996 | dev_err(&pdev->dev, "failed to ioremap address region\n"); | |
1997 | return -ENOENT; | |
1998 | } | |
1999 | ||
2000 | /* IRQ */ | |
2001 | irq = platform_get_irq(pdev, 0); | |
2002 | if (irq < 0) { | |
2003 | dev_err(&pdev->dev, "failed to get irq resource\n"); | |
2004 | return -ENOENT; | |
2005 | } | |
2006 | ||
2007 | if (devm_request_irq(&pdev->dev, irq, coda_irq_handler, | |
2008 | 0, CODA_NAME, dev) < 0) { | |
2009 | dev_err(&pdev->dev, "failed to request irq\n"); | |
2010 | return -ENOENT; | |
2011 | } | |
2012 | ||
657eee7d PZ |
2013 | /* Get IRAM pool from device tree or platform data */ |
2014 | pool = of_get_named_gen_pool(np, "iram", 0); | |
2015 | if (!pool && pdata) | |
2016 | pool = dev_get_gen_pool(pdata->iram_dev); | |
2017 | if (!pool) { | |
2018 | dev_err(&pdev->dev, "iram pool not available\n"); | |
2019 | return -ENOMEM; | |
2020 | } | |
2021 | dev->iram_pool = pool; | |
2022 | ||
186b250a JM |
2023 | ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); |
2024 | if (ret) | |
2025 | return ret; | |
2026 | ||
2027 | mutex_init(&dev->dev_mutex); | |
2028 | ||
2029 | pdev_id = of_id ? of_id->data : platform_get_device_id(pdev); | |
2030 | ||
2031 | if (of_id) { | |
2032 | dev->devtype = of_id->data; | |
2033 | } else if (pdev_id) { | |
2034 | dev->devtype = &coda_devdata[pdev_id->driver_data]; | |
2035 | } else { | |
2036 | v4l2_device_unregister(&dev->v4l2_dev); | |
2037 | return -EINVAL; | |
2038 | } | |
2039 | ||
2040 | /* allocate auxiliary per-device buffers for the BIT processor */ | |
2041 | switch (dev->devtype->product) { | |
2042 | case CODA_DX6: | |
2043 | dev->workbuf.size = CODADX6_WORK_BUF_SIZE; | |
2044 | break; | |
2045 | default: | |
2046 | dev->workbuf.size = CODA7_WORK_BUF_SIZE; | |
2047 | } | |
2048 | dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size, | |
2049 | &dev->workbuf.paddr, | |
2050 | GFP_KERNEL); | |
2051 | if (!dev->workbuf.vaddr) { | |
2052 | dev_err(&pdev->dev, "failed to allocate work buffer\n"); | |
2053 | v4l2_device_unregister(&dev->v4l2_dev); | |
2054 | return -ENOMEM; | |
2055 | } | |
2056 | ||
657eee7d PZ |
2057 | if (dev->devtype->product == CODA_DX6) |
2058 | dev->iram_size = CODADX6_IRAM_SIZE; | |
2059 | else | |
2060 | dev->iram_size = CODA7_IRAM_SIZE; | |
2061 | dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size); | |
2062 | if (!dev->iram_vaddr) { | |
2063 | dev_err(&pdev->dev, "unable to alloc iram\n"); | |
2064 | return -ENOMEM; | |
1043667b | 2065 | } |
657eee7d PZ |
2066 | dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool, |
2067 | dev->iram_vaddr); | |
1043667b | 2068 | |
186b250a JM |
2069 | platform_set_drvdata(pdev, dev); |
2070 | ||
2071 | return coda_firmware_request(dev); | |
2072 | } | |
2073 | ||
2074 | static int coda_remove(struct platform_device *pdev) | |
2075 | { | |
2076 | struct coda_dev *dev = platform_get_drvdata(pdev); | |
2077 | ||
2078 | video_unregister_device(&dev->vfd); | |
2079 | if (dev->m2m_dev) | |
2080 | v4l2_m2m_release(dev->m2m_dev); | |
2081 | if (dev->alloc_ctx) | |
2082 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx); | |
2083 | v4l2_device_unregister(&dev->v4l2_dev); | |
657eee7d PZ |
2084 | if (dev->iram_vaddr) |
2085 | gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size); | |
186b250a JM |
2086 | if (dev->codebuf.vaddr) |
2087 | dma_free_coherent(&pdev->dev, dev->codebuf.size, | |
2088 | &dev->codebuf.vaddr, dev->codebuf.paddr); | |
2089 | if (dev->workbuf.vaddr) | |
2090 | dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr, | |
2091 | dev->workbuf.paddr); | |
2092 | return 0; | |
2093 | } | |
2094 | ||
2095 | static struct platform_driver coda_driver = { | |
2096 | .probe = coda_probe, | |
4c62e976 | 2097 | .remove = coda_remove, |
186b250a JM |
2098 | .driver = { |
2099 | .name = CODA_NAME, | |
2100 | .owner = THIS_MODULE, | |
2101 | .of_match_table = of_match_ptr(coda_dt_ids), | |
2102 | }, | |
2103 | .id_table = coda_platform_ids, | |
2104 | }; | |
2105 | ||
2106 | module_platform_driver(coda_driver); | |
2107 | ||
2108 | MODULE_LICENSE("GPL"); | |
2109 | MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>"); | |
2110 | MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver"); |