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[media] media: coda: wait for picture run completion in start/stop_streaming
[deliverable/linux.git] / drivers / media / platform / coda.c
CommitLineData
186b250a
JM		 1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/firmware.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/module.h>
21#include <linux/of_device.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/videodev2.h>
25#include <linux/of.h>
26
1043667b 27#include <mach/iram.h>
186b250a
JM		 28#include <media/v4l2-ctrls.h>
29#include <media/v4l2-device.h>
30#include <media/v4l2-ioctl.h>
31#include <media/v4l2-mem2mem.h>
32#include <media/videobuf2-core.h>
33#include <media/videobuf2-dma-contig.h>
34
35#include "coda.h"
36
37#define CODA_NAME "coda"
38
39#define CODA_MAX_INSTANCES 4
40
41#define CODA_FMO_BUF_SIZE 32
42#define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
43#define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
44#define CODA_PARA_BUF_SIZE (10 * 1024)
45#define CODA_ISRAM_SIZE (2048 * 2)
1043667b 46#define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
186b250a 47
ec25f68d 48#define CODA_MAX_FRAMEBUFFERS 2
186b250a
JM		 49
50#define MAX_W 720
51#define MAX_H 576
52#define CODA_MAX_FRAME_SIZE 0x90000
53#define FMO_SLICE_SAVE_BUF_SIZE (32)
54#define CODA_DEFAULT_GAMMA 4096
55
56#define MIN_W 176
57#define MIN_H 144
58#define MAX_W 720
59#define MAX_H 576
60
61#define S_ALIGN 1 /* multiple of 2 */
62#define W_ALIGN 1 /* multiple of 2 */
63#define H_ALIGN 1 /* multiple of 2 */
64
65#define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
66
67static int coda_debug;
68module_param(coda_debug, int, 0);
69MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
70
71enum {
72 V4L2_M2M_SRC = 0,
73 V4L2_M2M_DST = 1,
74};
75
76enum coda_fmt_type {
77 CODA_FMT_ENC,
78 CODA_FMT_RAW,
79};
80
81enum coda_inst_type {
82 CODA_INST_ENCODER,
83 CODA_INST_DECODER,
84};
85
86enum coda_product {
87 CODA_DX6 = 0xf001,
df1e74cc 88 CODA_7541 = 0xf012,
186b250a
JM		 89};
90
91struct coda_fmt {
92 char *name;
93 u32 fourcc;
94 enum coda_fmt_type type;
95};
96
97struct coda_devtype {
98 char *firmware;
99 enum coda_product product;
100 struct coda_fmt *formats;
101 unsigned int num_formats;
102 size_t workbuf_size;
103};
104
105/* Per-queue, driver-specific private data */
106struct coda_q_data {
107 unsigned int width;
108 unsigned int height;
109 unsigned int sizeimage;
110 struct coda_fmt *fmt;
111};
112
113struct coda_aux_buf {
114 void *vaddr;
115 dma_addr_t paddr;
116 u32 size;
117};
118
119struct coda_dev {
120 struct v4l2_device v4l2_dev;
121 struct video_device vfd;
122 struct platform_device *plat_dev;
c06d8752 123 const struct coda_devtype *devtype;
186b250a
JM		 124
125 void __iomem *regs_base;
126 struct clk *clk_per;
127 struct clk *clk_ahb;
128
129 struct coda_aux_buf codebuf;
130 struct coda_aux_buf workbuf;
1043667b 131 long unsigned int iram_paddr;
186b250a
JM		 132
133 spinlock_t irqlock;
134 struct mutex dev_mutex;
135 struct v4l2_m2m_dev *m2m_dev;
136 struct vb2_alloc_ctx *alloc_ctx;
e11f3e6e
PZ		 137 struct list_head instances;
138 unsigned long instance_mask;
2fb57f06 139 struct delayed_work timeout;
62bed14c 140 struct completion done;
186b250a
JM		 141};
142
143struct coda_params {
144 u8 h264_intra_qp;
145 u8 h264_inter_qp;
146 u8 mpeg4_intra_qp;
147 u8 mpeg4_inter_qp;
148 u8 gop_size;
149 int codec_mode;
150 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
151 u32 framerate;
152 u16 bitrate;
153 u32 slice_max_mb;
154};
155
156struct coda_ctx {
157 struct coda_dev *dev;
e11f3e6e 158 struct list_head list;
186b250a
JM		 159 int aborting;
160 int rawstreamon;
161 int compstreamon;
162 u32 isequence;
163 struct coda_q_data q_data[2];
164 enum coda_inst_type inst_type;
165 enum v4l2_colorspace colorspace;
166 struct coda_params params;
167 struct v4l2_m2m_ctx *m2m_ctx;
168 struct v4l2_ctrl_handler ctrls;
169 struct v4l2_fh fh;
186b250a
JM		 170 int gopcounter;
171 char vpu_header[3][64];
172 int vpu_header_size[3];
173 struct coda_aux_buf parabuf;
ec25f68d
PZ		 174 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
175 int num_internal_frames;
186b250a
JM		 176 int idx;
177};
178
179static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
180{
181 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
182 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
183 writel(data, dev->regs_base + reg);
184}
185
186static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
187{
188 u32 data;
189 data = readl(dev->regs_base + reg);
190 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
191 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
192 return data;
193}
194
195static inline unsigned long coda_isbusy(struct coda_dev *dev)
196{
197 return coda_read(dev, CODA_REG_BIT_BUSY);
198}
199
200static inline int coda_is_initialized(struct coda_dev *dev)
201{
202 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
203}
204
205static int coda_wait_timeout(struct coda_dev *dev)
206{
207 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
208
209 while (coda_isbusy(dev)) {
210 if (time_after(jiffies, timeout))
211 return -ETIMEDOUT;
212 }
213 return 0;
214}
215
216static void coda_command_async(struct coda_ctx *ctx, int cmd)
217{
218 struct coda_dev *dev = ctx->dev;
219 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
220
221 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
222 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
223 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
224}
225
226static int coda_command_sync(struct coda_ctx *ctx, int cmd)
227{
228 struct coda_dev *dev = ctx->dev;
229
230 coda_command_async(ctx, cmd);
231 return coda_wait_timeout(dev);
232}
233
234static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
235 enum v4l2_buf_type type)
236{
237 switch (type) {
238 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
239 return &(ctx->q_data[V4L2_M2M_SRC]);
240 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
241 return &(ctx->q_data[V4L2_M2M_DST]);
242 default:
243 BUG();
244 }
245 return NULL;
246}
247
248/*
249 * Add one array of supported formats for each version of Coda:
250 * i.MX27 -> codadx6
251 * i.MX51 -> coda7
252 * i.MX6 -> coda960
253 */
254static struct coda_fmt codadx6_formats[] = {
255 {
256 .name = "YUV 4:2:0 Planar",
257 .fourcc = V4L2_PIX_FMT_YUV420,
258 .type = CODA_FMT_RAW,
259 },
260 {
261 .name = "H264 Encoded Stream",
262 .fourcc = V4L2_PIX_FMT_H264,
263 .type = CODA_FMT_ENC,
264 },
265 {
266 .name = "MPEG4 Encoded Stream",
267 .fourcc = V4L2_PIX_FMT_MPEG4,
268 .type = CODA_FMT_ENC,
269 },
270};
271
df1e74cc
PZ		 272static struct coda_fmt coda7_formats[] = {
273 {
274 .name = "YUV 4:2:0 Planar",
275 .fourcc = V4L2_PIX_FMT_YUV420,
276 .type = CODA_FMT_RAW,
277 },
278 {
279 .name = "H264 Encoded Stream",
280 .fourcc = V4L2_PIX_FMT_H264,
281 .type = CODA_FMT_ENC,
282 },
283 {
284 .name = "MPEG4 Encoded Stream",
285 .fourcc = V4L2_PIX_FMT_MPEG4,
286 .type = CODA_FMT_ENC,
287 },
288};
289
186b250a
JM		 290static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
291{
292 struct coda_fmt *formats = dev->devtype->formats;
293 int num_formats = dev->devtype->num_formats;
294 unsigned int k;
295
296 for (k = 0; k < num_formats; k++) {
297 if (formats[k].fourcc == f->fmt.pix.pixelformat)
298 break;
299 }
300
301 if (k == num_formats)
302 return NULL;
303
304 return &formats[k];
305}
306
307/*
308 * V4L2 ioctl() operations.
309 */
310static int vidioc_querycap(struct file *file, void *priv,
311 struct v4l2_capability *cap)
312{
313 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
314 strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
315 strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
c3aac8be
SN		 316 /*
317 * This is only a mem-to-mem video device. The capture and output
318 * device capability flags are left only for backward compatibility
319 * and are scheduled for removal.
320 */
321 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
322 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
186b250a
JM		 323 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
324
325 return 0;
326}
327
328static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
329 enum coda_fmt_type type)
330{
331 struct coda_ctx *ctx = fh_to_ctx(priv);
332 struct coda_dev *dev = ctx->dev;
333 struct coda_fmt *formats = dev->devtype->formats;
334 struct coda_fmt *fmt;
335 int num_formats = dev->devtype->num_formats;
336 int i, num = 0;
337
338 for (i = 0; i < num_formats; i++) {
339 if (formats[i].type == type) {
340 if (num == f->index)
341 break;
342 ++num;
343 }
344 }
345
346 if (i < num_formats) {
347 fmt = &formats[i];
348 strlcpy(f->description, fmt->name, sizeof(f->description));
349 f->pixelformat = fmt->fourcc;
350 return 0;
351 }
352
353 /* Format not found */
354 return -EINVAL;
355}
356
357static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
358 struct v4l2_fmtdesc *f)
359{
360 return enum_fmt(priv, f, CODA_FMT_ENC);
361}
362
363static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
364 struct v4l2_fmtdesc *f)
365{
366 return enum_fmt(priv, f, CODA_FMT_RAW);
367}
368
369static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
370{
371 struct vb2_queue *vq;
372 struct coda_q_data *q_data;
373 struct coda_ctx *ctx = fh_to_ctx(priv);
374
375 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
376 if (!vq)
377 return -EINVAL;
378
379 q_data = get_q_data(ctx, f->type);
380
381 f->fmt.pix.field = V4L2_FIELD_NONE;
382 f->fmt.pix.pixelformat = q_data->fmt->fourcc;
383 f->fmt.pix.width = q_data->width;
384 f->fmt.pix.height = q_data->height;
385 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
386 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
387 else /* encoded formats h.264/mpeg4 */
388 f->fmt.pix.bytesperline = 0;
389
390 f->fmt.pix.sizeimage = q_data->sizeimage;
391 f->fmt.pix.colorspace = ctx->colorspace;
392
393 return 0;
394}
395
396static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
397{
398 enum v4l2_field field;
399
400 field = f->fmt.pix.field;
401 if (field == V4L2_FIELD_ANY)
402 field = V4L2_FIELD_NONE;
403 else if (V4L2_FIELD_NONE != field)
404 return -EINVAL;
405
406 /* V4L2 specification suggests the driver corrects the format struct
407 * if any of the dimensions is unsupported */
408 f->fmt.pix.field = field;
409
410 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
411 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
412 W_ALIGN, &f->fmt.pix.height,
413 MIN_H, MAX_H, H_ALIGN, S_ALIGN);
414 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
415 f->fmt.pix.sizeimage = f->fmt.pix.height *
416 f->fmt.pix.bytesperline;
417 } else { /*encoded formats h.264/mpeg4 */
418 f->fmt.pix.bytesperline = 0;
419 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
420 }
421
422 return 0;
423}
424
425static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
426 struct v4l2_format *f)
427{
428 int ret;
429 struct coda_fmt *fmt;
430 struct coda_ctx *ctx = fh_to_ctx(priv);
431
432 fmt = find_format(ctx->dev, f);
433 /*
434 * Since decoding support is not implemented yet do not allow
435 * CODA_FMT_RAW formats in the capture interface.
436 */
437 if (!fmt || !(fmt->type == CODA_FMT_ENC))
438 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
439
440 f->fmt.pix.colorspace = ctx->colorspace;
441
442 ret = vidioc_try_fmt(ctx->dev, f);
443 if (ret < 0)
444 return ret;
445
446 return 0;
447}
448
449static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
450 struct v4l2_format *f)
451{
452 struct coda_ctx *ctx = fh_to_ctx(priv);
453 struct coda_fmt *fmt;
454 int ret;
455
456 fmt = find_format(ctx->dev, f);
457 /*
458 * Since decoding support is not implemented yet do not allow
459 * CODA_FMT formats in the capture interface.
460 */
461 if (!fmt || !(fmt->type == CODA_FMT_RAW))
462 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
463
464 if (!f->fmt.pix.colorspace)
465 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
466
467 ret = vidioc_try_fmt(ctx->dev, f);
468 if (ret < 0)
469 return ret;
470
471 return 0;
472}
473
474static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
475{
476 struct coda_q_data *q_data;
477 struct vb2_queue *vq;
478 int ret;
479
480 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
481 if (!vq)
482 return -EINVAL;
483
484 q_data = get_q_data(ctx, f->type);
485 if (!q_data)
486 return -EINVAL;
487
488 if (vb2_is_busy(vq)) {
489 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
490 return -EBUSY;
491 }
492
493 ret = vidioc_try_fmt(ctx->dev, f);
494 if (ret)
495 return ret;
496
497 q_data->fmt = find_format(ctx->dev, f);
498 q_data->width = f->fmt.pix.width;
499 q_data->height = f->fmt.pix.height;
500 if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420) {
501 q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
502 } else { /* encoded format h.264/mpeg-4 */
503 q_data->sizeimage = CODA_MAX_FRAME_SIZE;
504 }
505
506 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
507 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
508 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
509
510 return 0;
511}
512
513static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
514 struct v4l2_format *f)
515{
516 int ret;
517
518 ret = vidioc_try_fmt_vid_cap(file, priv, f);
519 if (ret)
520 return ret;
521
522 return vidioc_s_fmt(fh_to_ctx(priv), f);
523}
524
525static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
526 struct v4l2_format *f)
527{
528 struct coda_ctx *ctx = fh_to_ctx(priv);
529 int ret;
530
531 ret = vidioc_try_fmt_vid_out(file, priv, f);
532 if (ret)
533 return ret;
534
8d621472 535 ret = vidioc_s_fmt(ctx, f);
186b250a
JM		 536 if (ret)
537 ctx->colorspace = f->fmt.pix.colorspace;
538
539 return ret;
540}
541
542static int vidioc_reqbufs(struct file *file, void *priv,
543 struct v4l2_requestbuffers *reqbufs)
544{
545 struct coda_ctx *ctx = fh_to_ctx(priv);
546
547 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
548}
549
550static int vidioc_querybuf(struct file *file, void *priv,
551 struct v4l2_buffer *buf)
552{
553 struct coda_ctx *ctx = fh_to_ctx(priv);
554
555 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
556}
557
558static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
559{
560 struct coda_ctx *ctx = fh_to_ctx(priv);
561
562 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
563}
564
565static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
566{
567 struct coda_ctx *ctx = fh_to_ctx(priv);
568
569 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
570}
571
572static int vidioc_streamon(struct file *file, void *priv,
573 enum v4l2_buf_type type)
574{
575 struct coda_ctx *ctx = fh_to_ctx(priv);
576
577 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
578}
579
580static int vidioc_streamoff(struct file *file, void *priv,
581 enum v4l2_buf_type type)
582{
583 struct coda_ctx *ctx = fh_to_ctx(priv);
584
585 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
586}
587
588static const struct v4l2_ioctl_ops coda_ioctl_ops = {
589 .vidioc_querycap = vidioc_querycap,
590
591 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
592 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
593 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
594 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
595
596 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
597 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
598 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
599 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
600
601 .vidioc_reqbufs = vidioc_reqbufs,
602 .vidioc_querybuf = vidioc_querybuf,
603
604 .vidioc_qbuf = vidioc_qbuf,
605 .vidioc_dqbuf = vidioc_dqbuf,
606
607 .vidioc_streamon = vidioc_streamon,
608 .vidioc_streamoff = vidioc_streamoff,
609};
610
611/*
612 * Mem-to-mem operations.
613 */
614static void coda_device_run(void *m2m_priv)
615{
616 struct coda_ctx *ctx = m2m_priv;
617 struct coda_q_data *q_data_src, *q_data_dst;
618 struct vb2_buffer *src_buf, *dst_buf;
619 struct coda_dev *dev = ctx->dev;
620 int force_ipicture;
621 int quant_param = 0;
622 u32 picture_y, picture_cb, picture_cr;
623 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
624 u32 dst_fourcc;
625
626 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
627 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
628 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
629 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
630 dst_fourcc = q_data_dst->fmt->fourcc;
631
632 src_buf->v4l2_buf.sequence = ctx->isequence;
633 dst_buf->v4l2_buf.sequence = ctx->isequence;
634 ctx->isequence++;
635
636 /*
637 * Workaround coda firmware BUG that only marks the first
638 * frame as IDR. This is a problem for some decoders that can't
639 * recover when a frame is lost.
640 */
641 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
642 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
643 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
644 } else {
645 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
646 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
647 }
648
649 /*
650 * Copy headers at the beginning of the first frame for H.264 only.
651 * In MPEG4 they are already copied by the coda.
652 */
653 if (src_buf->v4l2_buf.sequence == 0) {
654 pic_stream_buffer_addr =
655 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
656 ctx->vpu_header_size[0] +
657 ctx->vpu_header_size[1] +
658 ctx->vpu_header_size[2];
659 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
660 ctx->vpu_header_size[0] -
661 ctx->vpu_header_size[1] -
662 ctx->vpu_header_size[2];
663 memcpy(vb2_plane_vaddr(dst_buf, 0),
664 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
665 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
666 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
667 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
668 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
669 ctx->vpu_header_size[2]);
670 } else {
671 pic_stream_buffer_addr =
672 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
673 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
674 }
675
676 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
677 force_ipicture = 1;
678 switch (dst_fourcc) {
679 case V4L2_PIX_FMT_H264:
680 quant_param = ctx->params.h264_intra_qp;
681 break;
682 case V4L2_PIX_FMT_MPEG4:
683 quant_param = ctx->params.mpeg4_intra_qp;
684 break;
685 default:
686 v4l2_warn(&ctx->dev->v4l2_dev,
687 "cannot set intra qp, fmt not supported\n");
688 break;
689 }
690 } else {
691 force_ipicture = 0;
692 switch (dst_fourcc) {
693 case V4L2_PIX_FMT_H264:
694 quant_param = ctx->params.h264_inter_qp;
695 break;
696 case V4L2_PIX_FMT_MPEG4:
697 quant_param = ctx->params.mpeg4_inter_qp;
698 break;
699 default:
700 v4l2_warn(&ctx->dev->v4l2_dev,
701 "cannot set inter qp, fmt not supported\n");
702 break;
703 }
704 }
705
706 /* submit */
707 coda_write(dev, 0, CODA_CMD_ENC_PIC_ROT_MODE);
708 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
709
710
711 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
712 picture_cb = picture_y + q_data_src->width * q_data_src->height;
713 picture_cr = picture_cb + q_data_src->width / 2 *
714 q_data_src->height / 2;
715
716 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
717 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
718 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
719 coda_write(dev, force_ipicture << 1 & 0x2,
720 CODA_CMD_ENC_PIC_OPTION);
721
722 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
723 coda_write(dev, pic_stream_buffer_size / 1024,
724 CODA_CMD_ENC_PIC_BB_SIZE);
1043667b
PZ		 725
726 if (dev->devtype->product == CODA_7541) {
727 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
728 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
729 CODA7_REG_BIT_AXI_SRAM_USE);
730 }
731
2fb57f06
PZ		 732 /* 1 second timeout in case CODA locks up */
733 schedule_delayed_work(&dev->timeout, HZ);
734
62bed14c 735 INIT_COMPLETION(dev->done);
186b250a
JM		 736 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
737}
738
739static int coda_job_ready(void *m2m_priv)
740{
741 struct coda_ctx *ctx = m2m_priv;
742
743 /*
744 * For both 'P' and 'key' frame cases 1 picture
745 * and 1 frame are needed.
746 */
747 if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
748 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
749 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
750 "not ready: not enough video buffers.\n");
751 return 0;
752 }
753
186b250a
JM		 754 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
755 "job ready\n");
756 return 1;
757}
758
759static void coda_job_abort(void *priv)
760{
761 struct coda_ctx *ctx = priv;
762 struct coda_dev *dev = ctx->dev;
763
764 ctx->aborting = 1;
765
766 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
767 "Aborting task\n");
768
769 v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
770}
771
772static void coda_lock(void *m2m_priv)
773{
774 struct coda_ctx *ctx = m2m_priv;
775 struct coda_dev *pcdev = ctx->dev;
776 mutex_lock(&pcdev->dev_mutex);
777}
778
779static void coda_unlock(void *m2m_priv)
780{
781 struct coda_ctx *ctx = m2m_priv;
782 struct coda_dev *pcdev = ctx->dev;
783 mutex_unlock(&pcdev->dev_mutex);
784}
785
786static struct v4l2_m2m_ops coda_m2m_ops = {
787 .device_run = coda_device_run,
788 .job_ready = coda_job_ready,
789 .job_abort = coda_job_abort,
790 .lock = coda_lock,
791 .unlock = coda_unlock,
792};
793
794static void set_default_params(struct coda_ctx *ctx)
795{
796 struct coda_dev *dev = ctx->dev;
797
798 ctx->params.codec_mode = CODA_MODE_INVALID;
799 ctx->colorspace = V4L2_COLORSPACE_REC709;
800 ctx->params.framerate = 30;
186b250a
JM		 801 ctx->aborting = 0;
802
803 /* Default formats for output and input queues */
804 ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
805 ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
806 ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
807 ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
808 ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
809 ctx->q_data[V4L2_M2M_DST].width = MAX_W;
810 ctx->q_data[V4L2_M2M_DST].height = MAX_H;
811 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
812}
813
814/*
815 * Queue operations
816 */
817static int coda_queue_setup(struct vb2_queue *vq,
818 const struct v4l2_format *fmt,
819 unsigned int *nbuffers, unsigned int *nplanes,
820 unsigned int sizes[], void *alloc_ctxs[])
821{
822 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
823 unsigned int size;
824
825 if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
186b250a
JM		 826 if (fmt)
827 size = fmt->fmt.pix.width *
828 fmt->fmt.pix.height * 3 / 2;
829 else
830 size = MAX_W *
831 MAX_H * 3 / 2;
832 } else {
186b250a
JM		 833 size = CODA_MAX_FRAME_SIZE;
834 }
835
836 *nplanes = 1;
837 sizes[0] = size;
838
839 alloc_ctxs[0] = ctx->dev->alloc_ctx;
840
841 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
842 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
843
844 return 0;
845}
846
847static int coda_buf_prepare(struct vb2_buffer *vb)
848{
849 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
850 struct coda_q_data *q_data;
851
852 q_data = get_q_data(ctx, vb->vb2_queue->type);
853
854 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
855 v4l2_warn(&ctx->dev->v4l2_dev,
856 "%s data will not fit into plane (%lu < %lu)\n",
857 __func__, vb2_plane_size(vb, 0),
858 (long)q_data->sizeimage);
859 return -EINVAL;
860 }
861
862 vb2_set_plane_payload(vb, 0, q_data->sizeimage);
863
864 return 0;
865}
866
867static void coda_buf_queue(struct vb2_buffer *vb)
868{
869 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
870 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
871}
872
873static void coda_wait_prepare(struct vb2_queue *q)
874{
875 struct coda_ctx *ctx = vb2_get_drv_priv(q);
876 coda_unlock(ctx);
877}
878
879static void coda_wait_finish(struct vb2_queue *q)
880{
881 struct coda_ctx *ctx = vb2_get_drv_priv(q);
882 coda_lock(ctx);
883}
884
ec25f68d
PZ		 885static void coda_free_framebuffers(struct coda_ctx *ctx)
886{
887 int i;
888
889 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
890 if (ctx->internal_frames[i].vaddr) {
891 dma_free_coherent(&ctx->dev->plat_dev->dev,
892 ctx->internal_frames[i].size,
893 ctx->internal_frames[i].vaddr,
894 ctx->internal_frames[i].paddr);
895 ctx->internal_frames[i].vaddr = NULL;
896 }
897 }
898}
899
900static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
901{
902 struct coda_dev *dev = ctx->dev;
903
904 int height = q_data->height;
905 int width = q_data->width;
906 u32 *p;
907 int i;
908
909 /* Allocate frame buffers */
910 ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
911 for (i = 0; i < ctx->num_internal_frames; i++) {
912 ctx->internal_frames[i].size = q_data->sizeimage;
913 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
914 ctx->internal_frames[i].size += width / 2 * height / 2;
915 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
916 &dev->plat_dev->dev, ctx->internal_frames[i].size,
917 &ctx->internal_frames[i].paddr, GFP_KERNEL);
918 if (!ctx->internal_frames[i].vaddr) {
919 coda_free_framebuffers(ctx);
920 return -ENOMEM;
921 }
922 }
923
924 /* Register frame buffers in the parameter buffer */
925 p = ctx->parabuf.vaddr;
926
927 if (dev->devtype->product == CODA_DX6) {
928 for (i = 0; i < ctx->num_internal_frames; i++) {
929 p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
930 p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
931 p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
932 }
933 } else {
934 for (i = 0; i < ctx->num_internal_frames; i += 2) {
935 p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
936 p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
937 p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
938
939 if (fourcc == V4L2_PIX_FMT_H264)
940 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
941
942 if (i + 1 < ctx->num_internal_frames) {
943 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
944 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
945 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
946
947 if (fourcc == V4L2_PIX_FMT_H264)
948 p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
949 }
950 }
951 }
952
953 return 0;
954}
955
186b250a
JM		 956static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
957{
958 struct coda_ctx *ctx = vb2_get_drv_priv(q);
959 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
960 u32 bitstream_buf, bitstream_size;
961 struct coda_dev *dev = ctx->dev;
962 struct coda_q_data *q_data_src, *q_data_dst;
186b250a 963 struct vb2_buffer *buf;
ec25f68d 964 u32 dst_fourcc;
186b250a 965 u32 value;
ec25f68d 966 int ret;
186b250a
JM		 967
968 if (count < 1)
969 return -EINVAL;
970
971 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
972 ctx->rawstreamon = 1;
973 else
974 ctx->compstreamon = 1;
975
976 /* Don't start the coda unless both queues are on */
977 if (!(ctx->rawstreamon & ctx->compstreamon))
978 return 0;
979
62bed14c
PZ		 980 if (coda_isbusy(dev))
981 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
982 return -EBUSY;
983
186b250a
JM		 984 ctx->gopcounter = ctx->params.gop_size - 1;
985
986 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
987 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
988 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
989 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
990 bitstream_size = q_data_dst->sizeimage;
991 dst_fourcc = q_data_dst->fmt->fourcc;
992
993 /* Find out whether coda must encode or decode */
994 if (q_data_src->fmt->type == CODA_FMT_RAW &&
995 q_data_dst->fmt->type == CODA_FMT_ENC) {
996 ctx->inst_type = CODA_INST_ENCODER;
997 } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
998 q_data_dst->fmt->type == CODA_FMT_RAW) {
999 ctx->inst_type = CODA_INST_DECODER;
1000 v4l2_err(v4l2_dev, "decoding not supported.\n");
1001 return -EINVAL;
1002 } else {
1003 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1004 return -EINVAL;
1005 }
1006
1007 if (!coda_is_initialized(dev)) {
1008 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1009 return -EFAULT;
1010 }
1011 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1012 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1013 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1014 switch (dev->devtype->product) {
1015 case CODA_DX6:
1016 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1017 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1018 break;
1019 default:
1020 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1021 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1022 }
1023
1043667b
PZ		 1024 if (dev->devtype->product == CODA_DX6) {
1025 /* Configure the coda */
1026 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1027 }
186b250a
JM		 1028
1029 /* Could set rotation here if needed */
1030 switch (dev->devtype->product) {
1031 case CODA_DX6:
1032 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1033 break;
1034 default:
1035 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1036 }
1037 value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1038 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1039 coda_write(dev, ctx->params.framerate,
1040 CODA_CMD_ENC_SEQ_SRC_F_RATE);
1041
1042 switch (dst_fourcc) {
1043 case V4L2_PIX_FMT_MPEG4:
1044 if (dev->devtype->product == CODA_DX6)
1045 ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1046 else
1047 ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1048
1049 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1050 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1051 break;
1052 case V4L2_PIX_FMT_H264:
1053 if (dev->devtype->product == CODA_DX6)
1054 ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1055 else
1056 ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1057
1058 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1059 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1060 break;
1061 default:
1062 v4l2_err(v4l2_dev,
1063 "dst format (0x%08x) invalid.\n", dst_fourcc);
1064 return -EINVAL;
1065 }
1066
1067 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1068 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1069 if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
1070 value |= 1 & CODA_SLICING_MODE_MASK;
1071 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1072 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1073 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1074
1075 if (ctx->params.bitrate) {
1076 /* Rate control enabled */
1077 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1078 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
1079 } else {
1080 value = 0;
1081 }
1082 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1083
1084 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1085 coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1086
1087 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1088 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1089
1090 /* set default gamma */
1091 value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1092 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1093
1094 value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1095 value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1096 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1097
1098 if (dst_fourcc == V4L2_PIX_FMT_H264) {
1099 value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1100 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1101 value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
1043667b
PZ		 1102 if (dev->devtype->product == CODA_DX6) {
1103 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1104 } else {
1105 coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1106 coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1107 }
186b250a
JM		 1108 }
1109
1110 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1111 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1112 return -ETIMEDOUT;
1113 }
1114
1115 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1116 return -EFAULT;
1117
ec25f68d
PZ		 1118 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1119 if (ret < 0)
1120 return ret;
186b250a 1121
ec25f68d 1122 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1043667b
PZ		 1123 coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1124 if (dev->devtype->product != CODA_DX6) {
1125 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1126 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1127 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1128 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1129 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1130 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1131 }
186b250a
JM		 1132 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1133 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1134 return -ETIMEDOUT;
1135 }
1136
1137 /* Save stream headers */
1138 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1139 switch (dst_fourcc) {
1140 case V4L2_PIX_FMT_H264:
1141 /*
1142 * Get SPS in the first frame and copy it to an
1143 * intermediate buffer.
1144 */
1145 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1146 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1147 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1148 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1149 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1150 return -ETIMEDOUT;
1151 }
1152 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1153 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1154 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1155 ctx->vpu_header_size[0]);
1156
1157 /*
1158 * Get PPS in the first frame and copy it to an
1159 * intermediate buffer.
1160 */
1161 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1162 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1163 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1164 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1165 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1166 return -ETIMEDOUT;
1167 }
1168 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1169 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1170 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1171 ctx->vpu_header_size[1]);
1172 ctx->vpu_header_size[2] = 0;
1173 break;
1174 case V4L2_PIX_FMT_MPEG4:
1175 /*
1176 * Get VOS in the first frame and copy it to an
1177 * intermediate buffer
1178 */
1179 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1180 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1181 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1182 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1183 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1184 return -ETIMEDOUT;
1185 }
1186 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1187 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1188 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1189 ctx->vpu_header_size[0]);
1190
1191 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1192 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1193 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1194 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1195 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1196 return -ETIMEDOUT;
1197 }
1198 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1199 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1200 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1201 ctx->vpu_header_size[1]);
1202
1203 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1204 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1205 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1206 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1207 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1208 return -ETIMEDOUT;
1209 }
1210 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1211 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1212 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1213 ctx->vpu_header_size[2]);
1214 break;
1215 default:
1216 /* No more formats need to save headers at the moment */
1217 break;
1218 }
1219
1220 return 0;
1221}
1222
1223static int coda_stop_streaming(struct vb2_queue *q)
1224{
1225 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2fb57f06 1226 struct coda_dev *dev = ctx->dev;
186b250a
JM		 1227
1228 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1229 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1230 "%s: output\n", __func__);
1231 ctx->rawstreamon = 0;
1232 } else {
1233 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1234 "%s: capture\n", __func__);
1235 ctx->compstreamon = 0;
1236 }
1237
62bed14c
PZ		 1238 /* Don't stop the coda unless both queues are off */
1239 if (ctx->rawstreamon || ctx->compstreamon)
1240 return 0;
2fb57f06 1241
62bed14c
PZ		 1242 if (coda_isbusy(dev)) {
1243 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1244 v4l2_warn(&dev->v4l2_dev,
1245 "%s: timeout, sending SEQ_END anyway\n", __func__);
186b250a 1246 }
62bed14c
PZ		 1247 }
1248
1249 cancel_delayed_work(&dev->timeout);
ec25f68d 1250
62bed14c
PZ		 1251 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1252 "%s: sent command 'SEQ_END' to coda\n", __func__);
1253 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1254 v4l2_err(&dev->v4l2_dev,
1255 "CODA_COMMAND_SEQ_END failed\n");
1256 return -ETIMEDOUT;
186b250a
JM		 1257 }
1258
62bed14c
PZ		 1259 coda_free_framebuffers(ctx);
1260
186b250a
JM		 1261 return 0;
1262}
1263
1264static struct vb2_ops coda_qops = {
1265 .queue_setup = coda_queue_setup,
1266 .buf_prepare = coda_buf_prepare,
1267 .buf_queue = coda_buf_queue,
1268 .wait_prepare = coda_wait_prepare,
1269 .wait_finish = coda_wait_finish,
1270 .start_streaming = coda_start_streaming,
1271 .stop_streaming = coda_stop_streaming,
1272};
1273
1274static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1275{
1276 struct coda_ctx *ctx =
1277 container_of(ctrl->handler, struct coda_ctx, ctrls);
1278
1279 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1280 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1281
1282 switch (ctrl->id) {
1283 case V4L2_CID_MPEG_VIDEO_BITRATE:
1284 ctx->params.bitrate = ctrl->val / 1000;
1285 break;
1286 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1287 ctx->params.gop_size = ctrl->val;
1288 break;
1289 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1290 ctx->params.h264_intra_qp = ctrl->val;
1291 break;
1292 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1293 ctx->params.h264_inter_qp = ctrl->val;
1294 break;
1295 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1296 ctx->params.mpeg4_intra_qp = ctrl->val;
1297 break;
1298 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1299 ctx->params.mpeg4_inter_qp = ctrl->val;
1300 break;
1301 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1302 ctx->params.slice_mode = ctrl->val;
1303 break;
1304 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1305 ctx->params.slice_max_mb = ctrl->val;
1306 break;
1307 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1308 break;
1309 default:
1310 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1311 "Invalid control, id=%d, val=%d\n",
1312 ctrl->id, ctrl->val);
1313 return -EINVAL;
1314 }
1315
1316 return 0;
1317}
1318
1319static struct v4l2_ctrl_ops coda_ctrl_ops = {
1320 .s_ctrl = coda_s_ctrl,
1321};
1322
1323static int coda_ctrls_setup(struct coda_ctx *ctx)
1324{
1325 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1326
1327 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1328 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1329 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1330 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1331 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1332 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1333 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1334 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1335 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1336 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1337 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1338 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1339 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1340 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1341 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
1342 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
1343 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1344 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1345 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1346 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1347 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1348 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1349 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1350
1351 if (ctx->ctrls.error) {
1352 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1353 ctx->ctrls.error);
1354 return -EINVAL;
1355 }
1356
1357 return v4l2_ctrl_handler_setup(&ctx->ctrls);
1358}
1359
1360static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1361 struct vb2_queue *dst_vq)
1362{
1363 struct coda_ctx *ctx = priv;
1364 int ret;
1365
186b250a 1366 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
09ae956f 1367 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
186b250a
JM		 1368 src_vq->drv_priv = ctx;
1369 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1370 src_vq->ops = &coda_qops;
1371 src_vq->mem_ops = &vb2_dma_contig_memops;
1372
1373 ret = vb2_queue_init(src_vq);
1374 if (ret)
1375 return ret;
1376
186b250a 1377 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
09ae956f 1378 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
186b250a
JM		 1379 dst_vq->drv_priv = ctx;
1380 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1381 dst_vq->ops = &coda_qops;
1382 dst_vq->mem_ops = &vb2_dma_contig_memops;
1383
1384 return vb2_queue_init(dst_vq);
1385}
1386
e11f3e6e
PZ		 1387static int coda_next_free_instance(struct coda_dev *dev)
1388{
1389 return ffz(dev->instance_mask);
1390}
1391
186b250a
JM		 1392static int coda_open(struct file *file)
1393{
1394 struct coda_dev *dev = video_drvdata(file);
1395 struct coda_ctx *ctx = NULL;
1396 int ret = 0;
e11f3e6e 1397 int idx;
186b250a 1398
e11f3e6e
PZ		 1399 idx = coda_next_free_instance(dev);
1400 if (idx >= CODA_MAX_INSTANCES)
186b250a 1401 return -EBUSY;
e11f3e6e 1402 set_bit(idx, &dev->instance_mask);
186b250a
JM		 1403
1404 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1405 if (!ctx)
1406 return -ENOMEM;
1407
1408 v4l2_fh_init(&ctx->fh, video_devdata(file));
1409 file->private_data = &ctx->fh;
1410 v4l2_fh_add(&ctx->fh);
1411 ctx->dev = dev;
e11f3e6e 1412 ctx->idx = idx;
186b250a
JM		 1413
1414 set_default_params(ctx);
1415 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1416 &coda_queue_init);
1417 if (IS_ERR(ctx->m2m_ctx)) {
1418 int ret = PTR_ERR(ctx->m2m_ctx);
1419
1420 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1421 __func__, ret);
1422 goto err;
1423 }
1424 ret = coda_ctrls_setup(ctx);
1425 if (ret) {
1426 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1427 goto err;
1428 }
1429
1430 ctx->fh.ctrl_handler = &ctx->ctrls;
1431
1432 ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1433 CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1434 if (!ctx->parabuf.vaddr) {
1435 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1436 ret = -ENOMEM;
1437 goto err;
1438 }
1439
1440 coda_lock(ctx);
e11f3e6e 1441 list_add(&ctx->list, &dev->instances);
186b250a
JM		 1442 coda_unlock(ctx);
1443
1444 clk_prepare_enable(dev->clk_per);
1445 clk_prepare_enable(dev->clk_ahb);
1446
1447 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1448 ctx->idx, ctx);
1449
1450 return 0;
1451
1452err:
1453 v4l2_fh_del(&ctx->fh);
1454 v4l2_fh_exit(&ctx->fh);
1455 kfree(ctx);
1456 return ret;
1457}
1458
1459static int coda_release(struct file *file)
1460{
1461 struct coda_dev *dev = video_drvdata(file);
1462 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1463
1464 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1465 ctx);
1466
1467 coda_lock(ctx);
e11f3e6e 1468 list_del(&ctx->list);
186b250a
JM		 1469 coda_unlock(ctx);
1470
1471 dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1472 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1473 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1474 v4l2_ctrl_handler_free(&ctx->ctrls);
1475 clk_disable_unprepare(dev->clk_per);
1476 clk_disable_unprepare(dev->clk_ahb);
1477 v4l2_fh_del(&ctx->fh);
1478 v4l2_fh_exit(&ctx->fh);
e11f3e6e 1479 clear_bit(ctx->idx, &dev->instance_mask);
186b250a
JM		 1480 kfree(ctx);
1481
1482 return 0;
1483}
1484
1485static unsigned int coda_poll(struct file *file,
1486 struct poll_table_struct *wait)
1487{
1488 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1489 int ret;
1490
1491 coda_lock(ctx);
1492 ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1493 coda_unlock(ctx);
1494 return ret;
1495}
1496
1497static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1498{
1499 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1500
1501 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1502}
1503
1504static const struct v4l2_file_operations coda_fops = {
1505 .owner = THIS_MODULE,
1506 .open = coda_open,
1507 .release = coda_release,
1508 .poll = coda_poll,
1509 .unlocked_ioctl = video_ioctl2,
1510 .mmap = coda_mmap,
1511};
1512
1513static irqreturn_t coda_irq_handler(int irq, void *data)
1514{
ec25f68d 1515 struct vb2_buffer *src_buf, *dst_buf;
186b250a
JM		 1516 struct coda_dev *dev = data;
1517 u32 wr_ptr, start_ptr;
1518 struct coda_ctx *ctx;
1519
2fb57f06
PZ		 1520 __cancel_delayed_work(&dev->timeout);
1521
186b250a
JM		 1522 /* read status register to attend the IRQ */
1523 coda_read(dev, CODA_REG_BIT_INT_STATUS);
1524 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1525 CODA_REG_BIT_INT_CLEAR);
1526
1527 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1528 if (ctx == NULL) {
1529 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1530 return IRQ_HANDLED;
1531 }
1532
1533 if (ctx->aborting) {
1534 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1535 "task has been aborted\n");
1536 return IRQ_HANDLED;
1537 }
1538
1539 if (coda_isbusy(ctx->dev)) {
1540 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1541 "coda is still busy!!!!\n");
1542 return IRQ_NONE;
1543 }
1544
62bed14c
PZ		 1545 complete(&dev->done);
1546
ec25f68d
PZ		 1547 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1548 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
186b250a
JM		 1549
1550 /* Get results from the coda */
1551 coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1552 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1553 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1554 /* Calculate bytesused field */
1555 if (dst_buf->v4l2_buf.sequence == 0) {
1556 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1557 ctx->vpu_header_size[0] +
1558 ctx->vpu_header_size[1] +
1559 ctx->vpu_header_size[2];
1560 } else {
1561 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1562 }
1563
1564 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1565 wr_ptr - start_ptr);
1566
1567 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1568 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1569
1570 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1571 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1572 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1573 } else {
1574 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1575 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1576 }
1577
ec25f68d 1578 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
186b250a
JM		 1579 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1580
1581 ctx->gopcounter--;
1582 if (ctx->gopcounter < 0)
1583 ctx->gopcounter = ctx->params.gop_size - 1;
1584
1585 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1586 "job finished: encoding frame (%d) (%s)\n",
1587 dst_buf->v4l2_buf.sequence,
1588 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1589 "KEYFRAME" : "PFRAME");
1590
1591 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1592
1593 return IRQ_HANDLED;
1594}
1595
2fb57f06
PZ		 1596static void coda_timeout(struct work_struct *work)
1597{
1598 struct coda_ctx *ctx;
1599 struct coda_dev *dev = container_of(to_delayed_work(work),
1600 struct coda_dev, timeout);
1601
62bed14c
PZ		 1602 if (completion_done(&dev->done))
1603 return;
1604
1605 complete(&dev->done);
1606
2fb57f06
PZ		 1607 v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1608
1609 mutex_lock(&dev->dev_mutex);
1610 list_for_each_entry(ctx, &dev->instances, list) {
1611 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1612 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1613 }
1614 mutex_unlock(&dev->dev_mutex);
1615}
1616
186b250a
JM		 1617static u32 coda_supported_firmwares[] = {
1618 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
df1e74cc 1619 CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
186b250a
JM		 1620};
1621
1622static bool coda_firmware_supported(u32 vernum)
1623{
1624 int i;
1625
1626 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1627 if (vernum == coda_supported_firmwares[i])
1628 return true;
1629 return false;
1630}
1631
1632static char *coda_product_name(int product)
1633{
1634 static char buf[9];
1635
1636 switch (product) {
1637 case CODA_DX6:
1638 return "CodaDx6";
df1e74cc
PZ		 1639 case CODA_7541:
1640 return "CODA7541";
186b250a
JM		 1641 default:
1642 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1643 return buf;
1644 }
1645}
1646
87048bb4 1647static int coda_hw_init(struct coda_dev *dev)
186b250a
JM		 1648{
1649 u16 product, major, minor, release;
1650 u32 data;
1651 u16 *p;
1652 int i;
1653
1654 clk_prepare_enable(dev->clk_per);
1655 clk_prepare_enable(dev->clk_ahb);
1656
186b250a
JM		 1657 /*
1658 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
87048bb4
PZ		 1659 * The 16-bit chars in the code buffer are in memory access
1660 * order, re-sort them to CODA order for register download.
186b250a
JM		 1661 * Data in this SRAM survives a reboot.
1662 */
87048bb4
PZ		 1663 p = (u16 *)dev->codebuf.vaddr;
1664 if (dev->devtype->product == CODA_DX6) {
1665 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1666 data = CODA_DOWN_ADDRESS_SET(i) |
1667 CODA_DOWN_DATA_SET(p[i ^ 1]);
1668 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1669 }
1670 } else {
1671 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1672 data = CODA_DOWN_ADDRESS_SET(i) |
1673 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1674 3 - (i % 4)]);
1675 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1676 }
186b250a 1677 }
186b250a
JM		 1678
1679 /* Tell the BIT where to find everything it needs */
1680 coda_write(dev, dev->workbuf.paddr,
1681 CODA_REG_BIT_WORK_BUF_ADDR);
1682 coda_write(dev, dev->codebuf.paddr,
1683 CODA_REG_BIT_CODE_BUF_ADDR);
1684 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1685
1686 /* Set default values */
1687 switch (dev->devtype->product) {
1688 case CODA_DX6:
1689 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1690 break;
1691 default:
1692 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1693 }
1694 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1043667b
PZ		 1695
1696 if (dev->devtype->product != CODA_DX6)
1697 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1698
186b250a
JM		 1699 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1700 CODA_REG_BIT_INT_ENABLE);
1701
1702 /* Reset VPU and start processor */
1703 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1704 data |= CODA_REG_RESET_ENABLE;
1705 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1706 udelay(10);
1707 data &= ~CODA_REG_RESET_ENABLE;
1708 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1709 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1710
1711 /* Load firmware */
1712 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1713 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1714 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1715 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1716 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1717 if (coda_wait_timeout(dev)) {
1718 clk_disable_unprepare(dev->clk_per);
1719 clk_disable_unprepare(dev->clk_ahb);
1720 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1721 return -EIO;
1722 }
1723
1724 /* Check we are compatible with the loaded firmware */
1725 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1726 product = CODA_FIRMWARE_PRODUCT(data);
1727 major = CODA_FIRMWARE_MAJOR(data);
1728 minor = CODA_FIRMWARE_MINOR(data);
1729 release = CODA_FIRMWARE_RELEASE(data);
1730
1731 clk_disable_unprepare(dev->clk_per);
1732 clk_disable_unprepare(dev->clk_ahb);
1733
1734 if (product != dev->devtype->product) {
1735 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1736 " Version: %u.%u.%u\n",
1737 coda_product_name(dev->devtype->product),
1738 coda_product_name(product), major, minor, release);
1739 return -EINVAL;
1740 }
1741
1742 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1743 coda_product_name(product));
1744
1745 if (coda_firmware_supported(data)) {
1746 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1747 major, minor, release);
1748 } else {
1749 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1750 "%u.%u.%u\n", major, minor, release);
1751 }
1752
1753 return 0;
1754}
1755
1756static void coda_fw_callback(const struct firmware *fw, void *context)
1757{
1758 struct coda_dev *dev = context;
1759 struct platform_device *pdev = dev->plat_dev;
1760 int ret;
1761
1762 if (!fw) {
1763 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1764 return;
1765 }
1766
1767 /* allocate auxiliary per-device code buffer for the BIT processor */
1768 dev->codebuf.size = fw->size;
1769 dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1770 &dev->codebuf.paddr,
1771 GFP_KERNEL);
1772 if (!dev->codebuf.vaddr) {
1773 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1774 return;
1775 }
1776
87048bb4
PZ		 1777 /* Copy the whole firmware image to the code buffer */
1778 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1779 release_firmware(fw);
1780
1781 ret = coda_hw_init(dev);
186b250a
JM		 1782 if (ret) {
1783 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1784 return;
1785 }
1786
1787 dev->vfd.fops = &coda_fops,
1788 dev->vfd.ioctl_ops = &coda_ioctl_ops;
1789 dev->vfd.release = video_device_release_empty,
1790 dev->vfd.lock = &dev->dev_mutex;
1791 dev->vfd.v4l2_dev = &dev->v4l2_dev;
954f340f 1792 dev->vfd.vfl_dir = VFL_DIR_M2M;
186b250a
JM		 1793 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1794 video_set_drvdata(&dev->vfd, dev);
1795
1796 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1797 if (IS_ERR(dev->alloc_ctx)) {
1798 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1799 return;
1800 }
1801
1802 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1803 if (IS_ERR(dev->m2m_dev)) {
1804 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1805 goto rel_ctx;
1806 }
1807
1808 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1809 if (ret) {
1810 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1811 goto rel_m2m;
1812 }
1813 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1814 dev->vfd.num);
1815
1816 return;
1817
1818rel_m2m:
1819 v4l2_m2m_release(dev->m2m_dev);
1820rel_ctx:
1821 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1822}
1823
1824static int coda_firmware_request(struct coda_dev *dev)
1825{
1826 char *fw = dev->devtype->firmware;
1827
1828 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1829 coda_product_name(dev->devtype->product));
1830
1831 return request_firmware_nowait(THIS_MODULE, true,
1832 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1833}
1834
1835enum coda_platform {
1836 CODA_IMX27,
df1e74cc 1837 CODA_IMX53,
186b250a
JM		 1838};
1839
c06d8752 1840static const struct coda_devtype coda_devdata[] = {
186b250a
JM		 1841 [CODA_IMX27] = {
1842 .firmware = "v4l-codadx6-imx27.bin",
1843 .product = CODA_DX6,
1844 .formats = codadx6_formats,
1845 .num_formats = ARRAY_SIZE(codadx6_formats),
1846 },
df1e74cc
PZ		 1847 [CODA_IMX53] = {
1848 .firmware = "v4l-coda7541-imx53.bin",
1849 .product = CODA_7541,
1850 .formats = coda7_formats,
1851 .num_formats = ARRAY_SIZE(coda7_formats),
1852 },
186b250a
JM		 1853};
1854
1855static struct platform_device_id coda_platform_ids[] = {
1856 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
df1e74cc 1857 { .name = "coda-imx53", .driver_data = CODA_7541 },
186b250a
JM		 1858 { /* sentinel */ }
1859};
1860MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1861
1862#ifdef CONFIG_OF
1863static const struct of_device_id coda_dt_ids[] = {
1864 { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
df1e74cc 1865 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
186b250a
JM		 1866 { /* sentinel */ }
1867};
1868MODULE_DEVICE_TABLE(of, coda_dt_ids);
1869#endif
1870
1871static int __devinit coda_probe(struct platform_device *pdev)
1872{
1873 const struct of_device_id *of_id =
1874 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1875 const struct platform_device_id *pdev_id;
1876 struct coda_dev *dev;
1877 struct resource *res;
1878 int ret, irq;
1879
1880 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1881 if (!dev) {
1882 dev_err(&pdev->dev, "Not enough memory for %s\n",
1883 CODA_NAME);
1884 return -ENOMEM;
1885 }
1886
1887 spin_lock_init(&dev->irqlock);
e11f3e6e 1888 INIT_LIST_HEAD(&dev->instances);
2fb57f06 1889 INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
62bed14c
PZ		 1890 init_completion(&dev->done);
1891 complete(&dev->done);
186b250a
JM		 1892
1893 dev->plat_dev = pdev;
1894 dev->clk_per = devm_clk_get(&pdev->dev, "per");
1895 if (IS_ERR(dev->clk_per)) {
1896 dev_err(&pdev->dev, "Could not get per clock\n");
1897 return PTR_ERR(dev->clk_per);
1898 }
1899
1900 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1901 if (IS_ERR(dev->clk_ahb)) {
1902 dev_err(&pdev->dev, "Could not get ahb clock\n");
1903 return PTR_ERR(dev->clk_ahb);
1904 }
1905
1906 /* Get memory for physical registers */
1907 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1908 if (res == NULL) {
1909 dev_err(&pdev->dev, "failed to get memory region resource\n");
1910 return -ENOENT;
1911 }
1912
1913 if (devm_request_mem_region(&pdev->dev, res->start,
1914 resource_size(res), CODA_NAME) == NULL) {
1915 dev_err(&pdev->dev, "failed to request memory region\n");
1916 return -ENOENT;
1917 }
1918 dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1919 resource_size(res));
1920 if (!dev->regs_base) {
1921 dev_err(&pdev->dev, "failed to ioremap address region\n");
1922 return -ENOENT;
1923 }
1924
1925 /* IRQ */
1926 irq = platform_get_irq(pdev, 0);
1927 if (irq < 0) {
1928 dev_err(&pdev->dev, "failed to get irq resource\n");
1929 return -ENOENT;
1930 }
1931
1932 if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1933 0, CODA_NAME, dev) < 0) {
1934 dev_err(&pdev->dev, "failed to request irq\n");
1935 return -ENOENT;
1936 }
1937
1938 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1939 if (ret)
1940 return ret;
1941
1942 mutex_init(&dev->dev_mutex);
1943
1944 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1945
1946 if (of_id) {
1947 dev->devtype = of_id->data;
1948 } else if (pdev_id) {
1949 dev->devtype = &coda_devdata[pdev_id->driver_data];
1950 } else {
1951 v4l2_device_unregister(&dev->v4l2_dev);
1952 return -EINVAL;
1953 }
1954
1955 /* allocate auxiliary per-device buffers for the BIT processor */
1956 switch (dev->devtype->product) {
1957 case CODA_DX6:
1958 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1959 break;
1960 default:
1961 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1962 }
1963 dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1964 &dev->workbuf.paddr,
1965 GFP_KERNEL);
1966 if (!dev->workbuf.vaddr) {
1967 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1968 v4l2_device_unregister(&dev->v4l2_dev);
1969 return -ENOMEM;
1970 }
1971
1043667b
PZ		 1972 if (dev->devtype->product == CODA_DX6) {
1973 dev->iram_paddr = 0xffff4c00;
1974 } else {
1975 void __iomem *iram_vaddr;
1976
1977 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
1978 &dev->iram_paddr);
1979 if (!iram_vaddr) {
1980 dev_err(&pdev->dev, "unable to alloc iram\n");
1981 return -ENOMEM;
1982 }
1983 }
1984
186b250a
JM		 1985 platform_set_drvdata(pdev, dev);
1986
1987 return coda_firmware_request(dev);
1988}
1989
1990static int coda_remove(struct platform_device *pdev)
1991{
1992 struct coda_dev *dev = platform_get_drvdata(pdev);
1993
1994 video_unregister_device(&dev->vfd);
1995 if (dev->m2m_dev)
1996 v4l2_m2m_release(dev->m2m_dev);
1997 if (dev->alloc_ctx)
1998 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1999 v4l2_device_unregister(&dev->v4l2_dev);
1043667b
PZ		 2000 if (dev->iram_paddr)
2001 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
186b250a
JM		 2002 if (dev->codebuf.vaddr)
2003 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2004 &dev->codebuf.vaddr, dev->codebuf.paddr);
2005 if (dev->workbuf.vaddr)
2006 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2007 dev->workbuf.paddr);
2008 return 0;
2009}
2010
2011static struct platform_driver coda_driver = {
2012 .probe = coda_probe,
2013 .remove = __devexit_p(coda_remove),
2014 .driver = {
2015 .name = CODA_NAME,
2016 .owner = THIS_MODULE,
2017 .of_match_table = of_match_ptr(coda_dt_ids),
2018 },
2019 .id_table = coda_platform_ids,
2020};
2021
2022module_platform_driver(coda_driver);
2023
2024MODULE_LICENSE("GPL");
2025MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2026MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
Linux kernel - Deliverables
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