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[media] media: coda: add horizontal / vertical flipping support
[deliverable/linux.git] / drivers / media / platform / coda.c
CommitLineData
186b250a
JM		 1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/firmware.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/module.h>
21#include <linux/of_device.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/videodev2.h>
25#include <linux/of.h>
26
1043667b 27#include <mach/iram.h>
186b250a
JM		 28#include <media/v4l2-ctrls.h>
29#include <media/v4l2-device.h>
30#include <media/v4l2-ioctl.h>
31#include <media/v4l2-mem2mem.h>
32#include <media/videobuf2-core.h>
33#include <media/videobuf2-dma-contig.h>
34
35#include "coda.h"
36
37#define CODA_NAME "coda"
38
39#define CODA_MAX_INSTANCES 4
40
41#define CODA_FMO_BUF_SIZE 32
42#define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
43#define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
44#define CODA_PARA_BUF_SIZE (10 * 1024)
45#define CODA_ISRAM_SIZE (2048 * 2)
1043667b 46#define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
186b250a 47
ec25f68d 48#define CODA_MAX_FRAMEBUFFERS 2
186b250a
JM		 49
50#define MAX_W 720
51#define MAX_H 576
52#define CODA_MAX_FRAME_SIZE 0x90000
53#define FMO_SLICE_SAVE_BUF_SIZE (32)
54#define CODA_DEFAULT_GAMMA 4096
55
56#define MIN_W 176
57#define MIN_H 144
58#define MAX_W 720
59#define MAX_H 576
60
61#define S_ALIGN 1 /* multiple of 2 */
62#define W_ALIGN 1 /* multiple of 2 */
63#define H_ALIGN 1 /* multiple of 2 */
64
65#define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
66
67static int coda_debug;
68module_param(coda_debug, int, 0);
69MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
70
71enum {
72 V4L2_M2M_SRC = 0,
73 V4L2_M2M_DST = 1,
74};
75
76enum coda_fmt_type {
77 CODA_FMT_ENC,
78 CODA_FMT_RAW,
79};
80
81enum coda_inst_type {
82 CODA_INST_ENCODER,
83 CODA_INST_DECODER,
84};
85
86enum coda_product {
87 CODA_DX6 = 0xf001,
df1e74cc 88 CODA_7541 = 0xf012,
186b250a
JM		 89};
90
91struct coda_fmt {
92 char *name;
93 u32 fourcc;
94 enum coda_fmt_type type;
95};
96
97struct coda_devtype {
98 char *firmware;
99 enum coda_product product;
100 struct coda_fmt *formats;
101 unsigned int num_formats;
102 size_t workbuf_size;
103};
104
105/* Per-queue, driver-specific private data */
106struct coda_q_data {
107 unsigned int width;
108 unsigned int height;
109 unsigned int sizeimage;
110 struct coda_fmt *fmt;
111};
112
113struct coda_aux_buf {
114 void *vaddr;
115 dma_addr_t paddr;
116 u32 size;
117};
118
119struct coda_dev {
120 struct v4l2_device v4l2_dev;
121 struct video_device vfd;
122 struct platform_device *plat_dev;
c06d8752 123 const struct coda_devtype *devtype;
186b250a
JM		 124
125 void __iomem *regs_base;
126 struct clk *clk_per;
127 struct clk *clk_ahb;
128
129 struct coda_aux_buf codebuf;
130 struct coda_aux_buf workbuf;
1043667b 131 long unsigned int iram_paddr;
186b250a
JM		 132
133 spinlock_t irqlock;
134 struct mutex dev_mutex;
135 struct v4l2_m2m_dev *m2m_dev;
136 struct vb2_alloc_ctx *alloc_ctx;
e11f3e6e
PZ		 137 struct list_head instances;
138 unsigned long instance_mask;
2fb57f06 139 struct delayed_work timeout;
62bed14c 140 struct completion done;
186b250a
JM		 141};
142
143struct coda_params {
8f35c7bc 144 u8 rot_mode;
186b250a
JM		 145 u8 h264_intra_qp;
146 u8 h264_inter_qp;
147 u8 mpeg4_intra_qp;
148 u8 mpeg4_inter_qp;
149 u8 gop_size;
150 int codec_mode;
151 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
152 u32 framerate;
153 u16 bitrate;
154 u32 slice_max_mb;
155};
156
157struct coda_ctx {
158 struct coda_dev *dev;
e11f3e6e 159 struct list_head list;
186b250a
JM		 160 int aborting;
161 int rawstreamon;
162 int compstreamon;
163 u32 isequence;
164 struct coda_q_data q_data[2];
165 enum coda_inst_type inst_type;
166 enum v4l2_colorspace colorspace;
167 struct coda_params params;
168 struct v4l2_m2m_ctx *m2m_ctx;
169 struct v4l2_ctrl_handler ctrls;
170 struct v4l2_fh fh;
186b250a
JM		 171 int gopcounter;
172 char vpu_header[3][64];
173 int vpu_header_size[3];
174 struct coda_aux_buf parabuf;
ec25f68d
PZ		 175 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
176 int num_internal_frames;
186b250a
JM		 177 int idx;
178};
179
180static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
181{
182 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
183 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
184 writel(data, dev->regs_base + reg);
185}
186
187static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
188{
189 u32 data;
190 data = readl(dev->regs_base + reg);
191 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
192 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
193 return data;
194}
195
196static inline unsigned long coda_isbusy(struct coda_dev *dev)
197{
198 return coda_read(dev, CODA_REG_BIT_BUSY);
199}
200
201static inline int coda_is_initialized(struct coda_dev *dev)
202{
203 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
204}
205
206static int coda_wait_timeout(struct coda_dev *dev)
207{
208 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
209
210 while (coda_isbusy(dev)) {
211 if (time_after(jiffies, timeout))
212 return -ETIMEDOUT;
213 }
214 return 0;
215}
216
217static void coda_command_async(struct coda_ctx *ctx, int cmd)
218{
219 struct coda_dev *dev = ctx->dev;
220 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
221
222 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
223 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
224 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
225}
226
227static int coda_command_sync(struct coda_ctx *ctx, int cmd)
228{
229 struct coda_dev *dev = ctx->dev;
230
231 coda_command_async(ctx, cmd);
232 return coda_wait_timeout(dev);
233}
234
235static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
236 enum v4l2_buf_type type)
237{
238 switch (type) {
239 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
240 return &(ctx->q_data[V4L2_M2M_SRC]);
241 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
242 return &(ctx->q_data[V4L2_M2M_DST]);
243 default:
244 BUG();
245 }
246 return NULL;
247}
248
249/*
250 * Add one array of supported formats for each version of Coda:
251 * i.MX27 -> codadx6
252 * i.MX51 -> coda7
253 * i.MX6 -> coda960
254 */
255static struct coda_fmt codadx6_formats[] = {
256 {
257 .name = "YUV 4:2:0 Planar",
258 .fourcc = V4L2_PIX_FMT_YUV420,
259 .type = CODA_FMT_RAW,
260 },
261 {
262 .name = "H264 Encoded Stream",
263 .fourcc = V4L2_PIX_FMT_H264,
264 .type = CODA_FMT_ENC,
265 },
266 {
267 .name = "MPEG4 Encoded Stream",
268 .fourcc = V4L2_PIX_FMT_MPEG4,
269 .type = CODA_FMT_ENC,
270 },
271};
272
df1e74cc
PZ		 273static struct coda_fmt coda7_formats[] = {
274 {
275 .name = "YUV 4:2:0 Planar",
276 .fourcc = V4L2_PIX_FMT_YUV420,
277 .type = CODA_FMT_RAW,
278 },
279 {
280 .name = "H264 Encoded Stream",
281 .fourcc = V4L2_PIX_FMT_H264,
282 .type = CODA_FMT_ENC,
283 },
284 {
285 .name = "MPEG4 Encoded Stream",
286 .fourcc = V4L2_PIX_FMT_MPEG4,
287 .type = CODA_FMT_ENC,
288 },
289};
290
186b250a
JM		 291static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
292{
293 struct coda_fmt *formats = dev->devtype->formats;
294 int num_formats = dev->devtype->num_formats;
295 unsigned int k;
296
297 for (k = 0; k < num_formats; k++) {
298 if (formats[k].fourcc == f->fmt.pix.pixelformat)
299 break;
300 }
301
302 if (k == num_formats)
303 return NULL;
304
305 return &formats[k];
306}
307
308/*
309 * V4L2 ioctl() operations.
310 */
311static int vidioc_querycap(struct file *file, void *priv,
312 struct v4l2_capability *cap)
313{
314 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
315 strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
316 strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
c3aac8be
SN		 317 /*
318 * This is only a mem-to-mem video device. The capture and output
319 * device capability flags are left only for backward compatibility
320 * and are scheduled for removal.
321 */
322 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
323 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
186b250a
JM		 324 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
325
326 return 0;
327}
328
329static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
330 enum coda_fmt_type type)
331{
332 struct coda_ctx *ctx = fh_to_ctx(priv);
333 struct coda_dev *dev = ctx->dev;
334 struct coda_fmt *formats = dev->devtype->formats;
335 struct coda_fmt *fmt;
336 int num_formats = dev->devtype->num_formats;
337 int i, num = 0;
338
339 for (i = 0; i < num_formats; i++) {
340 if (formats[i].type == type) {
341 if (num == f->index)
342 break;
343 ++num;
344 }
345 }
346
347 if (i < num_formats) {
348 fmt = &formats[i];
349 strlcpy(f->description, fmt->name, sizeof(f->description));
350 f->pixelformat = fmt->fourcc;
351 return 0;
352 }
353
354 /* Format not found */
355 return -EINVAL;
356}
357
358static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
359 struct v4l2_fmtdesc *f)
360{
361 return enum_fmt(priv, f, CODA_FMT_ENC);
362}
363
364static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
365 struct v4l2_fmtdesc *f)
366{
367 return enum_fmt(priv, f, CODA_FMT_RAW);
368}
369
370static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
371{
372 struct vb2_queue *vq;
373 struct coda_q_data *q_data;
374 struct coda_ctx *ctx = fh_to_ctx(priv);
375
376 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
377 if (!vq)
378 return -EINVAL;
379
380 q_data = get_q_data(ctx, f->type);
381
382 f->fmt.pix.field = V4L2_FIELD_NONE;
383 f->fmt.pix.pixelformat = q_data->fmt->fourcc;
384 f->fmt.pix.width = q_data->width;
385 f->fmt.pix.height = q_data->height;
386 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
387 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
388 else /* encoded formats h.264/mpeg4 */
389 f->fmt.pix.bytesperline = 0;
390
391 f->fmt.pix.sizeimage = q_data->sizeimage;
392 f->fmt.pix.colorspace = ctx->colorspace;
393
394 return 0;
395}
396
397static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
398{
399 enum v4l2_field field;
400
401 field = f->fmt.pix.field;
402 if (field == V4L2_FIELD_ANY)
403 field = V4L2_FIELD_NONE;
404 else if (V4L2_FIELD_NONE != field)
405 return -EINVAL;
406
407 /* V4L2 specification suggests the driver corrects the format struct
408 * if any of the dimensions is unsupported */
409 f->fmt.pix.field = field;
410
411 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
412 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
413 W_ALIGN, &f->fmt.pix.height,
414 MIN_H, MAX_H, H_ALIGN, S_ALIGN);
415 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
451d43ad
PZ		 416 f->fmt.pix.sizeimage = f->fmt.pix.width *
417 f->fmt.pix.height * 3 / 2;
186b250a
JM		 418 } else { /*encoded formats h.264/mpeg4 */
419 f->fmt.pix.bytesperline = 0;
420 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
421 }
422
423 return 0;
424}
425
426static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
427 struct v4l2_format *f)
428{
429 int ret;
430 struct coda_fmt *fmt;
431 struct coda_ctx *ctx = fh_to_ctx(priv);
432
433 fmt = find_format(ctx->dev, f);
434 /*
435 * Since decoding support is not implemented yet do not allow
436 * CODA_FMT_RAW formats in the capture interface.
437 */
438 if (!fmt || !(fmt->type == CODA_FMT_ENC))
439 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
440
441 f->fmt.pix.colorspace = ctx->colorspace;
442
443 ret = vidioc_try_fmt(ctx->dev, f);
444 if (ret < 0)
445 return ret;
446
447 return 0;
448}
449
450static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
451 struct v4l2_format *f)
452{
453 struct coda_ctx *ctx = fh_to_ctx(priv);
454 struct coda_fmt *fmt;
455 int ret;
456
457 fmt = find_format(ctx->dev, f);
458 /*
459 * Since decoding support is not implemented yet do not allow
460 * CODA_FMT formats in the capture interface.
461 */
462 if (!fmt || !(fmt->type == CODA_FMT_RAW))
463 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
464
465 if (!f->fmt.pix.colorspace)
466 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
467
468 ret = vidioc_try_fmt(ctx->dev, f);
469 if (ret < 0)
470 return ret;
471
472 return 0;
473}
474
475static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
476{
477 struct coda_q_data *q_data;
478 struct vb2_queue *vq;
479 int ret;
480
481 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
482 if (!vq)
483 return -EINVAL;
484
485 q_data = get_q_data(ctx, f->type);
486 if (!q_data)
487 return -EINVAL;
488
489 if (vb2_is_busy(vq)) {
490 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
491 return -EBUSY;
492 }
493
494 ret = vidioc_try_fmt(ctx->dev, f);
495 if (ret)
496 return ret;
497
498 q_data->fmt = find_format(ctx->dev, f);
499 q_data->width = f->fmt.pix.width;
500 q_data->height = f->fmt.pix.height;
451d43ad 501 q_data->sizeimage = f->fmt.pix.sizeimage;
186b250a
JM		 502
503 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
504 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
505 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
506
507 return 0;
508}
509
510static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
511 struct v4l2_format *f)
512{
513 int ret;
514
515 ret = vidioc_try_fmt_vid_cap(file, priv, f);
516 if (ret)
517 return ret;
518
519 return vidioc_s_fmt(fh_to_ctx(priv), f);
520}
521
522static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
523 struct v4l2_format *f)
524{
525 struct coda_ctx *ctx = fh_to_ctx(priv);
526 int ret;
527
528 ret = vidioc_try_fmt_vid_out(file, priv, f);
529 if (ret)
530 return ret;
531
8d621472 532 ret = vidioc_s_fmt(ctx, f);
186b250a
JM		 533 if (ret)
534 ctx->colorspace = f->fmt.pix.colorspace;
535
536 return ret;
537}
538
539static int vidioc_reqbufs(struct file *file, void *priv,
540 struct v4l2_requestbuffers *reqbufs)
541{
542 struct coda_ctx *ctx = fh_to_ctx(priv);
543
544 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
545}
546
547static int vidioc_querybuf(struct file *file, void *priv,
548 struct v4l2_buffer *buf)
549{
550 struct coda_ctx *ctx = fh_to_ctx(priv);
551
552 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
553}
554
555static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
556{
557 struct coda_ctx *ctx = fh_to_ctx(priv);
558
559 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
560}
561
562static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
563{
564 struct coda_ctx *ctx = fh_to_ctx(priv);
565
566 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
567}
568
569static int vidioc_streamon(struct file *file, void *priv,
570 enum v4l2_buf_type type)
571{
572 struct coda_ctx *ctx = fh_to_ctx(priv);
573
574 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
575}
576
577static int vidioc_streamoff(struct file *file, void *priv,
578 enum v4l2_buf_type type)
579{
580 struct coda_ctx *ctx = fh_to_ctx(priv);
581
582 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
583}
584
585static const struct v4l2_ioctl_ops coda_ioctl_ops = {
586 .vidioc_querycap = vidioc_querycap,
587
588 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
589 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
590 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
591 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
592
593 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
594 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
595 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
596 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
597
598 .vidioc_reqbufs = vidioc_reqbufs,
599 .vidioc_querybuf = vidioc_querybuf,
600
601 .vidioc_qbuf = vidioc_qbuf,
602 .vidioc_dqbuf = vidioc_dqbuf,
603
604 .vidioc_streamon = vidioc_streamon,
605 .vidioc_streamoff = vidioc_streamoff,
606};
607
608/*
609 * Mem-to-mem operations.
610 */
611static void coda_device_run(void *m2m_priv)
612{
613 struct coda_ctx *ctx = m2m_priv;
614 struct coda_q_data *q_data_src, *q_data_dst;
615 struct vb2_buffer *src_buf, *dst_buf;
616 struct coda_dev *dev = ctx->dev;
617 int force_ipicture;
618 int quant_param = 0;
619 u32 picture_y, picture_cb, picture_cr;
620 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
621 u32 dst_fourcc;
622
623 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
624 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
625 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
626 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
627 dst_fourcc = q_data_dst->fmt->fourcc;
628
629 src_buf->v4l2_buf.sequence = ctx->isequence;
630 dst_buf->v4l2_buf.sequence = ctx->isequence;
631 ctx->isequence++;
632
633 /*
634 * Workaround coda firmware BUG that only marks the first
635 * frame as IDR. This is a problem for some decoders that can't
636 * recover when a frame is lost.
637 */
638 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
639 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
640 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
641 } else {
642 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
643 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
644 }
645
646 /*
647 * Copy headers at the beginning of the first frame for H.264 only.
648 * In MPEG4 they are already copied by the coda.
649 */
650 if (src_buf->v4l2_buf.sequence == 0) {
651 pic_stream_buffer_addr =
652 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
653 ctx->vpu_header_size[0] +
654 ctx->vpu_header_size[1] +
655 ctx->vpu_header_size[2];
656 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
657 ctx->vpu_header_size[0] -
658 ctx->vpu_header_size[1] -
659 ctx->vpu_header_size[2];
660 memcpy(vb2_plane_vaddr(dst_buf, 0),
661 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
662 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
663 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
664 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
665 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
666 ctx->vpu_header_size[2]);
667 } else {
668 pic_stream_buffer_addr =
669 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
670 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
671 }
672
673 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
674 force_ipicture = 1;
675 switch (dst_fourcc) {
676 case V4L2_PIX_FMT_H264:
677 quant_param = ctx->params.h264_intra_qp;
678 break;
679 case V4L2_PIX_FMT_MPEG4:
680 quant_param = ctx->params.mpeg4_intra_qp;
681 break;
682 default:
683 v4l2_warn(&ctx->dev->v4l2_dev,
684 "cannot set intra qp, fmt not supported\n");
685 break;
686 }
687 } else {
688 force_ipicture = 0;
689 switch (dst_fourcc) {
690 case V4L2_PIX_FMT_H264:
691 quant_param = ctx->params.h264_inter_qp;
692 break;
693 case V4L2_PIX_FMT_MPEG4:
694 quant_param = ctx->params.mpeg4_inter_qp;
695 break;
696 default:
697 v4l2_warn(&ctx->dev->v4l2_dev,
698 "cannot set inter qp, fmt not supported\n");
699 break;
700 }
701 }
702
703 /* submit */
8f35c7bc 704 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
186b250a
JM		 705 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
706
707
708 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
709 picture_cb = picture_y + q_data_src->width * q_data_src->height;
710 picture_cr = picture_cb + q_data_src->width / 2 *
711 q_data_src->height / 2;
712
713 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
714 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
715 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
716 coda_write(dev, force_ipicture << 1 & 0x2,
717 CODA_CMD_ENC_PIC_OPTION);
718
719 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
720 coda_write(dev, pic_stream_buffer_size / 1024,
721 CODA_CMD_ENC_PIC_BB_SIZE);
1043667b
PZ		 722
723 if (dev->devtype->product == CODA_7541) {
724 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
725 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
726 CODA7_REG_BIT_AXI_SRAM_USE);
727 }
728
2fb57f06
PZ		 729 /* 1 second timeout in case CODA locks up */
730 schedule_delayed_work(&dev->timeout, HZ);
731
62bed14c 732 INIT_COMPLETION(dev->done);
186b250a
JM		 733 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
734}
735
736static int coda_job_ready(void *m2m_priv)
737{
738 struct coda_ctx *ctx = m2m_priv;
739
740 /*
741 * For both 'P' and 'key' frame cases 1 picture
742 * and 1 frame are needed.
743 */
744 if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
745 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
746 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
747 "not ready: not enough video buffers.\n");
748 return 0;
749 }
750
186b250a
JM		 751 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
752 "job ready\n");
753 return 1;
754}
755
756static void coda_job_abort(void *priv)
757{
758 struct coda_ctx *ctx = priv;
759 struct coda_dev *dev = ctx->dev;
760
761 ctx->aborting = 1;
762
763 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
764 "Aborting task\n");
765
766 v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
767}
768
769static void coda_lock(void *m2m_priv)
770{
771 struct coda_ctx *ctx = m2m_priv;
772 struct coda_dev *pcdev = ctx->dev;
773 mutex_lock(&pcdev->dev_mutex);
774}
775
776static void coda_unlock(void *m2m_priv)
777{
778 struct coda_ctx *ctx = m2m_priv;
779 struct coda_dev *pcdev = ctx->dev;
780 mutex_unlock(&pcdev->dev_mutex);
781}
782
783static struct v4l2_m2m_ops coda_m2m_ops = {
784 .device_run = coda_device_run,
785 .job_ready = coda_job_ready,
786 .job_abort = coda_job_abort,
787 .lock = coda_lock,
788 .unlock = coda_unlock,
789};
790
791static void set_default_params(struct coda_ctx *ctx)
792{
793 struct coda_dev *dev = ctx->dev;
794
795 ctx->params.codec_mode = CODA_MODE_INVALID;
796 ctx->colorspace = V4L2_COLORSPACE_REC709;
797 ctx->params.framerate = 30;
186b250a
JM		 798 ctx->aborting = 0;
799
800 /* Default formats for output and input queues */
801 ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
802 ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
803 ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
804 ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
805 ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
806 ctx->q_data[V4L2_M2M_DST].width = MAX_W;
807 ctx->q_data[V4L2_M2M_DST].height = MAX_H;
808 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
809}
810
811/*
812 * Queue operations
813 */
814static int coda_queue_setup(struct vb2_queue *vq,
815 const struct v4l2_format *fmt,
816 unsigned int *nbuffers, unsigned int *nplanes,
817 unsigned int sizes[], void *alloc_ctxs[])
818{
819 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
820 unsigned int size;
821
822 if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
186b250a
JM		 823 if (fmt)
824 size = fmt->fmt.pix.width *
825 fmt->fmt.pix.height * 3 / 2;
826 else
827 size = MAX_W *
828 MAX_H * 3 / 2;
829 } else {
186b250a
JM		 830 size = CODA_MAX_FRAME_SIZE;
831 }
832
833 *nplanes = 1;
834 sizes[0] = size;
835
836 alloc_ctxs[0] = ctx->dev->alloc_ctx;
837
838 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
839 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
840
841 return 0;
842}
843
844static int coda_buf_prepare(struct vb2_buffer *vb)
845{
846 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
847 struct coda_q_data *q_data;
848
849 q_data = get_q_data(ctx, vb->vb2_queue->type);
850
851 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
852 v4l2_warn(&ctx->dev->v4l2_dev,
853 "%s data will not fit into plane (%lu < %lu)\n",
854 __func__, vb2_plane_size(vb, 0),
855 (long)q_data->sizeimage);
856 return -EINVAL;
857 }
858
859 vb2_set_plane_payload(vb, 0, q_data->sizeimage);
860
861 return 0;
862}
863
864static void coda_buf_queue(struct vb2_buffer *vb)
865{
866 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
867 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
868}
869
870static void coda_wait_prepare(struct vb2_queue *q)
871{
872 struct coda_ctx *ctx = vb2_get_drv_priv(q);
873 coda_unlock(ctx);
874}
875
876static void coda_wait_finish(struct vb2_queue *q)
877{
878 struct coda_ctx *ctx = vb2_get_drv_priv(q);
879 coda_lock(ctx);
880}
881
ec25f68d
PZ		 882static void coda_free_framebuffers(struct coda_ctx *ctx)
883{
884 int i;
885
886 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
887 if (ctx->internal_frames[i].vaddr) {
888 dma_free_coherent(&ctx->dev->plat_dev->dev,
889 ctx->internal_frames[i].size,
890 ctx->internal_frames[i].vaddr,
891 ctx->internal_frames[i].paddr);
892 ctx->internal_frames[i].vaddr = NULL;
893 }
894 }
895}
896
897static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
898{
899 struct coda_dev *dev = ctx->dev;
900
901 int height = q_data->height;
902 int width = q_data->width;
903 u32 *p;
904 int i;
905
906 /* Allocate frame buffers */
907 ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
908 for (i = 0; i < ctx->num_internal_frames; i++) {
909 ctx->internal_frames[i].size = q_data->sizeimage;
910 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
911 ctx->internal_frames[i].size += width / 2 * height / 2;
912 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
913 &dev->plat_dev->dev, ctx->internal_frames[i].size,
914 &ctx->internal_frames[i].paddr, GFP_KERNEL);
915 if (!ctx->internal_frames[i].vaddr) {
916 coda_free_framebuffers(ctx);
917 return -ENOMEM;
918 }
919 }
920
921 /* Register frame buffers in the parameter buffer */
922 p = ctx->parabuf.vaddr;
923
924 if (dev->devtype->product == CODA_DX6) {
925 for (i = 0; i < ctx->num_internal_frames; i++) {
926 p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
927 p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
928 p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
929 }
930 } else {
931 for (i = 0; i < ctx->num_internal_frames; i += 2) {
932 p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
933 p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
934 p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
935
936 if (fourcc == V4L2_PIX_FMT_H264)
937 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
938
939 if (i + 1 < ctx->num_internal_frames) {
940 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
941 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
942 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
943
944 if (fourcc == V4L2_PIX_FMT_H264)
945 p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
946 }
947 }
948 }
949
950 return 0;
951}
952
186b250a
JM		 953static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
954{
955 struct coda_ctx *ctx = vb2_get_drv_priv(q);
956 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
957 u32 bitstream_buf, bitstream_size;
958 struct coda_dev *dev = ctx->dev;
959 struct coda_q_data *q_data_src, *q_data_dst;
186b250a 960 struct vb2_buffer *buf;
ec25f68d 961 u32 dst_fourcc;
186b250a 962 u32 value;
ec25f68d 963 int ret;
186b250a
JM		 964
965 if (count < 1)
966 return -EINVAL;
967
968 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
969 ctx->rawstreamon = 1;
970 else
971 ctx->compstreamon = 1;
972
973 /* Don't start the coda unless both queues are on */
974 if (!(ctx->rawstreamon & ctx->compstreamon))
975 return 0;
976
62bed14c
PZ		 977 if (coda_isbusy(dev))
978 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
979 return -EBUSY;
980
186b250a
JM		 981 ctx->gopcounter = ctx->params.gop_size - 1;
982
983 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
984 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
985 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
986 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
987 bitstream_size = q_data_dst->sizeimage;
988 dst_fourcc = q_data_dst->fmt->fourcc;
989
990 /* Find out whether coda must encode or decode */
991 if (q_data_src->fmt->type == CODA_FMT_RAW &&
992 q_data_dst->fmt->type == CODA_FMT_ENC) {
993 ctx->inst_type = CODA_INST_ENCODER;
994 } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
995 q_data_dst->fmt->type == CODA_FMT_RAW) {
996 ctx->inst_type = CODA_INST_DECODER;
997 v4l2_err(v4l2_dev, "decoding not supported.\n");
998 return -EINVAL;
999 } else {
1000 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1001 return -EINVAL;
1002 }
1003
1004 if (!coda_is_initialized(dev)) {
1005 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1006 return -EFAULT;
1007 }
1008 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1009 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1010 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1011 switch (dev->devtype->product) {
1012 case CODA_DX6:
1013 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1014 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1015 break;
1016 default:
1017 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1018 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1019 }
1020
1043667b
PZ		 1021 if (dev->devtype->product == CODA_DX6) {
1022 /* Configure the coda */
1023 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1024 }
186b250a
JM		 1025
1026 /* Could set rotation here if needed */
1027 switch (dev->devtype->product) {
1028 case CODA_DX6:
1029 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1030 break;
1031 default:
1032 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1033 }
1034 value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1035 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1036 coda_write(dev, ctx->params.framerate,
1037 CODA_CMD_ENC_SEQ_SRC_F_RATE);
1038
1039 switch (dst_fourcc) {
1040 case V4L2_PIX_FMT_MPEG4:
1041 if (dev->devtype->product == CODA_DX6)
1042 ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1043 else
1044 ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1045
1046 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1047 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1048 break;
1049 case V4L2_PIX_FMT_H264:
1050 if (dev->devtype->product == CODA_DX6)
1051 ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1052 else
1053 ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1054
1055 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1056 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1057 break;
1058 default:
1059 v4l2_err(v4l2_dev,
1060 "dst format (0x%08x) invalid.\n", dst_fourcc);
1061 return -EINVAL;
1062 }
1063
1064 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1065 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1066 if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
1067 value |= 1 & CODA_SLICING_MODE_MASK;
1068 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1069 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1070 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1071
1072 if (ctx->params.bitrate) {
1073 /* Rate control enabled */
1074 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1075 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
1076 } else {
1077 value = 0;
1078 }
1079 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1080
1081 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1082 coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1083
1084 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1085 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1086
1087 /* set default gamma */
1088 value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1089 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1090
1091 value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1092 value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1093 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1094
1095 if (dst_fourcc == V4L2_PIX_FMT_H264) {
1096 value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1097 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1098 value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
1043667b
PZ		 1099 if (dev->devtype->product == CODA_DX6) {
1100 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1101 } else {
1102 coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1103 coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1104 }
186b250a
JM		 1105 }
1106
1107 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1108 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1109 return -ETIMEDOUT;
1110 }
1111
1112 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1113 return -EFAULT;
1114
ec25f68d
PZ		 1115 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1116 if (ret < 0)
1117 return ret;
186b250a 1118
ec25f68d 1119 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1043667b
PZ		 1120 coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1121 if (dev->devtype->product != CODA_DX6) {
1122 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1123 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1124 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1125 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1126 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1127 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1128 }
186b250a
JM		 1129 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1130 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1131 return -ETIMEDOUT;
1132 }
1133
1134 /* Save stream headers */
1135 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1136 switch (dst_fourcc) {
1137 case V4L2_PIX_FMT_H264:
1138 /*
1139 * Get SPS in the first frame and copy it to an
1140 * intermediate buffer.
1141 */
1142 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1143 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1144 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1145 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1146 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1147 return -ETIMEDOUT;
1148 }
1149 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1150 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1151 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1152 ctx->vpu_header_size[0]);
1153
1154 /*
1155 * Get PPS in the first frame and copy it to an
1156 * intermediate buffer.
1157 */
1158 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1159 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1160 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1161 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1162 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1163 return -ETIMEDOUT;
1164 }
1165 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1166 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1167 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1168 ctx->vpu_header_size[1]);
1169 ctx->vpu_header_size[2] = 0;
1170 break;
1171 case V4L2_PIX_FMT_MPEG4:
1172 /*
1173 * Get VOS in the first frame and copy it to an
1174 * intermediate buffer
1175 */
1176 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1177 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1178 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1179 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1180 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1181 return -ETIMEDOUT;
1182 }
1183 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1184 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1185 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1186 ctx->vpu_header_size[0]);
1187
1188 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1189 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1190 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1191 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1192 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1193 return -ETIMEDOUT;
1194 }
1195 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1196 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1197 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1198 ctx->vpu_header_size[1]);
1199
1200 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1201 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1202 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1203 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1204 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1205 return -ETIMEDOUT;
1206 }
1207 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1208 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1209 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1210 ctx->vpu_header_size[2]);
1211 break;
1212 default:
1213 /* No more formats need to save headers at the moment */
1214 break;
1215 }
1216
1217 return 0;
1218}
1219
1220static int coda_stop_streaming(struct vb2_queue *q)
1221{
1222 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2fb57f06 1223 struct coda_dev *dev = ctx->dev;
186b250a
JM		 1224
1225 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1226 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1227 "%s: output\n", __func__);
1228 ctx->rawstreamon = 0;
1229 } else {
1230 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1231 "%s: capture\n", __func__);
1232 ctx->compstreamon = 0;
1233 }
1234
62bed14c
PZ		 1235 /* Don't stop the coda unless both queues are off */
1236 if (ctx->rawstreamon || ctx->compstreamon)
1237 return 0;
2fb57f06 1238
62bed14c
PZ		 1239 if (coda_isbusy(dev)) {
1240 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1241 v4l2_warn(&dev->v4l2_dev,
1242 "%s: timeout, sending SEQ_END anyway\n", __func__);
186b250a 1243 }
62bed14c
PZ		 1244 }
1245
1246 cancel_delayed_work(&dev->timeout);
ec25f68d 1247
62bed14c
PZ		 1248 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1249 "%s: sent command 'SEQ_END' to coda\n", __func__);
1250 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1251 v4l2_err(&dev->v4l2_dev,
1252 "CODA_COMMAND_SEQ_END failed\n");
1253 return -ETIMEDOUT;
186b250a
JM		 1254 }
1255
62bed14c
PZ		 1256 coda_free_framebuffers(ctx);
1257
186b250a
JM		 1258 return 0;
1259}
1260
1261static struct vb2_ops coda_qops = {
1262 .queue_setup = coda_queue_setup,
1263 .buf_prepare = coda_buf_prepare,
1264 .buf_queue = coda_buf_queue,
1265 .wait_prepare = coda_wait_prepare,
1266 .wait_finish = coda_wait_finish,
1267 .start_streaming = coda_start_streaming,
1268 .stop_streaming = coda_stop_streaming,
1269};
1270
1271static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1272{
1273 struct coda_ctx *ctx =
1274 container_of(ctrl->handler, struct coda_ctx, ctrls);
1275
1276 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1277 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1278
1279 switch (ctrl->id) {
8f35c7bc
PZ		 1280 case V4L2_CID_HFLIP:
1281 if (ctrl->val)
1282 ctx->params.rot_mode |= CODA_MIR_HOR;
1283 else
1284 ctx->params.rot_mode &= ~CODA_MIR_HOR;
1285 break;
1286 case V4L2_CID_VFLIP:
1287 if (ctrl->val)
1288 ctx->params.rot_mode |= CODA_MIR_VER;
1289 else
1290 ctx->params.rot_mode &= ~CODA_MIR_VER;
1291 break;
186b250a
JM		 1292 case V4L2_CID_MPEG_VIDEO_BITRATE:
1293 ctx->params.bitrate = ctrl->val / 1000;
1294 break;
1295 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1296 ctx->params.gop_size = ctrl->val;
1297 break;
1298 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1299 ctx->params.h264_intra_qp = ctrl->val;
1300 break;
1301 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1302 ctx->params.h264_inter_qp = ctrl->val;
1303 break;
1304 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1305 ctx->params.mpeg4_intra_qp = ctrl->val;
1306 break;
1307 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1308 ctx->params.mpeg4_inter_qp = ctrl->val;
1309 break;
1310 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1311 ctx->params.slice_mode = ctrl->val;
1312 break;
1313 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1314 ctx->params.slice_max_mb = ctrl->val;
1315 break;
1316 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1317 break;
1318 default:
1319 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1320 "Invalid control, id=%d, val=%d\n",
1321 ctrl->id, ctrl->val);
1322 return -EINVAL;
1323 }
1324
1325 return 0;
1326}
1327
1328static struct v4l2_ctrl_ops coda_ctrl_ops = {
1329 .s_ctrl = coda_s_ctrl,
1330};
1331
1332static int coda_ctrls_setup(struct coda_ctx *ctx)
1333{
1334 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1335
8f35c7bc
PZ		 1336 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1337 V4L2_CID_HFLIP, 0, 1, 1, 0);
1338 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1339 V4L2_CID_VFLIP, 0, 1, 1, 0);
186b250a
JM		 1340 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1341 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1342 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1343 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1344 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1345 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1346 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1347 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1348 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1349 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1350 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1351 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1352 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1353 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1354 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
1355 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
1356 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1357 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1358 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1359 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1360 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1361 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1362 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1363
1364 if (ctx->ctrls.error) {
1365 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1366 ctx->ctrls.error);
1367 return -EINVAL;
1368 }
1369
1370 return v4l2_ctrl_handler_setup(&ctx->ctrls);
1371}
1372
1373static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1374 struct vb2_queue *dst_vq)
1375{
1376 struct coda_ctx *ctx = priv;
1377 int ret;
1378
186b250a 1379 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
09ae956f 1380 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
186b250a
JM		 1381 src_vq->drv_priv = ctx;
1382 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1383 src_vq->ops = &coda_qops;
1384 src_vq->mem_ops = &vb2_dma_contig_memops;
1385
1386 ret = vb2_queue_init(src_vq);
1387 if (ret)
1388 return ret;
1389
186b250a 1390 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
09ae956f 1391 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
186b250a
JM		 1392 dst_vq->drv_priv = ctx;
1393 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1394 dst_vq->ops = &coda_qops;
1395 dst_vq->mem_ops = &vb2_dma_contig_memops;
1396
1397 return vb2_queue_init(dst_vq);
1398}
1399
e11f3e6e
PZ		 1400static int coda_next_free_instance(struct coda_dev *dev)
1401{
1402 return ffz(dev->instance_mask);
1403}
1404
186b250a
JM		 1405static int coda_open(struct file *file)
1406{
1407 struct coda_dev *dev = video_drvdata(file);
1408 struct coda_ctx *ctx = NULL;
1409 int ret = 0;
e11f3e6e 1410 int idx;
186b250a 1411
e11f3e6e
PZ		 1412 idx = coda_next_free_instance(dev);
1413 if (idx >= CODA_MAX_INSTANCES)
186b250a 1414 return -EBUSY;
e11f3e6e 1415 set_bit(idx, &dev->instance_mask);
186b250a
JM		 1416
1417 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1418 if (!ctx)
1419 return -ENOMEM;
1420
1421 v4l2_fh_init(&ctx->fh, video_devdata(file));
1422 file->private_data = &ctx->fh;
1423 v4l2_fh_add(&ctx->fh);
1424 ctx->dev = dev;
e11f3e6e 1425 ctx->idx = idx;
186b250a
JM		 1426
1427 set_default_params(ctx);
1428 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1429 &coda_queue_init);
1430 if (IS_ERR(ctx->m2m_ctx)) {
1431 int ret = PTR_ERR(ctx->m2m_ctx);
1432
1433 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1434 __func__, ret);
1435 goto err;
1436 }
1437 ret = coda_ctrls_setup(ctx);
1438 if (ret) {
1439 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1440 goto err;
1441 }
1442
1443 ctx->fh.ctrl_handler = &ctx->ctrls;
1444
1445 ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1446 CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1447 if (!ctx->parabuf.vaddr) {
1448 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1449 ret = -ENOMEM;
1450 goto err;
1451 }
1452
1453 coda_lock(ctx);
e11f3e6e 1454 list_add(&ctx->list, &dev->instances);
186b250a
JM		 1455 coda_unlock(ctx);
1456
1457 clk_prepare_enable(dev->clk_per);
1458 clk_prepare_enable(dev->clk_ahb);
1459
1460 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1461 ctx->idx, ctx);
1462
1463 return 0;
1464
1465err:
1466 v4l2_fh_del(&ctx->fh);
1467 v4l2_fh_exit(&ctx->fh);
1468 kfree(ctx);
1469 return ret;
1470}
1471
1472static int coda_release(struct file *file)
1473{
1474 struct coda_dev *dev = video_drvdata(file);
1475 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1476
1477 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1478 ctx);
1479
1480 coda_lock(ctx);
e11f3e6e 1481 list_del(&ctx->list);
186b250a
JM		 1482 coda_unlock(ctx);
1483
1484 dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1485 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1486 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1487 v4l2_ctrl_handler_free(&ctx->ctrls);
1488 clk_disable_unprepare(dev->clk_per);
1489 clk_disable_unprepare(dev->clk_ahb);
1490 v4l2_fh_del(&ctx->fh);
1491 v4l2_fh_exit(&ctx->fh);
e11f3e6e 1492 clear_bit(ctx->idx, &dev->instance_mask);
186b250a
JM		 1493 kfree(ctx);
1494
1495 return 0;
1496}
1497
1498static unsigned int coda_poll(struct file *file,
1499 struct poll_table_struct *wait)
1500{
1501 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1502 int ret;
1503
1504 coda_lock(ctx);
1505 ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1506 coda_unlock(ctx);
1507 return ret;
1508}
1509
1510static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1511{
1512 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1513
1514 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1515}
1516
1517static const struct v4l2_file_operations coda_fops = {
1518 .owner = THIS_MODULE,
1519 .open = coda_open,
1520 .release = coda_release,
1521 .poll = coda_poll,
1522 .unlocked_ioctl = video_ioctl2,
1523 .mmap = coda_mmap,
1524};
1525
1526static irqreturn_t coda_irq_handler(int irq, void *data)
1527{
ec25f68d 1528 struct vb2_buffer *src_buf, *dst_buf;
186b250a
JM		 1529 struct coda_dev *dev = data;
1530 u32 wr_ptr, start_ptr;
1531 struct coda_ctx *ctx;
1532
2fb57f06
PZ		 1533 __cancel_delayed_work(&dev->timeout);
1534
186b250a
JM		 1535 /* read status register to attend the IRQ */
1536 coda_read(dev, CODA_REG_BIT_INT_STATUS);
1537 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1538 CODA_REG_BIT_INT_CLEAR);
1539
1540 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1541 if (ctx == NULL) {
1542 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1543 return IRQ_HANDLED;
1544 }
1545
1546 if (ctx->aborting) {
1547 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1548 "task has been aborted\n");
1549 return IRQ_HANDLED;
1550 }
1551
1552 if (coda_isbusy(ctx->dev)) {
1553 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1554 "coda is still busy!!!!\n");
1555 return IRQ_NONE;
1556 }
1557
62bed14c
PZ		 1558 complete(&dev->done);
1559
ec25f68d
PZ		 1560 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1561 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
186b250a
JM		 1562
1563 /* Get results from the coda */
1564 coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1565 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1566 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1567 /* Calculate bytesused field */
1568 if (dst_buf->v4l2_buf.sequence == 0) {
1569 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1570 ctx->vpu_header_size[0] +
1571 ctx->vpu_header_size[1] +
1572 ctx->vpu_header_size[2];
1573 } else {
1574 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1575 }
1576
1577 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1578 wr_ptr - start_ptr);
1579
1580 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1581 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1582
1583 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1584 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1585 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1586 } else {
1587 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1588 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1589 }
1590
ec25f68d 1591 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
186b250a
JM		 1592 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1593
1594 ctx->gopcounter--;
1595 if (ctx->gopcounter < 0)
1596 ctx->gopcounter = ctx->params.gop_size - 1;
1597
1598 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1599 "job finished: encoding frame (%d) (%s)\n",
1600 dst_buf->v4l2_buf.sequence,
1601 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1602 "KEYFRAME" : "PFRAME");
1603
1604 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1605
1606 return IRQ_HANDLED;
1607}
1608
2fb57f06
PZ		 1609static void coda_timeout(struct work_struct *work)
1610{
1611 struct coda_ctx *ctx;
1612 struct coda_dev *dev = container_of(to_delayed_work(work),
1613 struct coda_dev, timeout);
1614
62bed14c
PZ		 1615 if (completion_done(&dev->done))
1616 return;
1617
1618 complete(&dev->done);
1619
2fb57f06
PZ		 1620 v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1621
1622 mutex_lock(&dev->dev_mutex);
1623 list_for_each_entry(ctx, &dev->instances, list) {
1624 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1625 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1626 }
1627 mutex_unlock(&dev->dev_mutex);
1628}
1629
186b250a
JM		 1630static u32 coda_supported_firmwares[] = {
1631 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
df1e74cc 1632 CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
186b250a
JM		 1633};
1634
1635static bool coda_firmware_supported(u32 vernum)
1636{
1637 int i;
1638
1639 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1640 if (vernum == coda_supported_firmwares[i])
1641 return true;
1642 return false;
1643}
1644
1645static char *coda_product_name(int product)
1646{
1647 static char buf[9];
1648
1649 switch (product) {
1650 case CODA_DX6:
1651 return "CodaDx6";
df1e74cc
PZ		 1652 case CODA_7541:
1653 return "CODA7541";
186b250a
JM		 1654 default:
1655 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1656 return buf;
1657 }
1658}
1659
87048bb4 1660static int coda_hw_init(struct coda_dev *dev)
186b250a
JM		 1661{
1662 u16 product, major, minor, release;
1663 u32 data;
1664 u16 *p;
1665 int i;
1666
1667 clk_prepare_enable(dev->clk_per);
1668 clk_prepare_enable(dev->clk_ahb);
1669
186b250a
JM		 1670 /*
1671 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
87048bb4
PZ		 1672 * The 16-bit chars in the code buffer are in memory access
1673 * order, re-sort them to CODA order for register download.
186b250a
JM		 1674 * Data in this SRAM survives a reboot.
1675 */
87048bb4
PZ		 1676 p = (u16 *)dev->codebuf.vaddr;
1677 if (dev->devtype->product == CODA_DX6) {
1678 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1679 data = CODA_DOWN_ADDRESS_SET(i) |
1680 CODA_DOWN_DATA_SET(p[i ^ 1]);
1681 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1682 }
1683 } else {
1684 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1685 data = CODA_DOWN_ADDRESS_SET(i) |
1686 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1687 3 - (i % 4)]);
1688 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1689 }
186b250a 1690 }
186b250a
JM		 1691
1692 /* Tell the BIT where to find everything it needs */
1693 coda_write(dev, dev->workbuf.paddr,
1694 CODA_REG_BIT_WORK_BUF_ADDR);
1695 coda_write(dev, dev->codebuf.paddr,
1696 CODA_REG_BIT_CODE_BUF_ADDR);
1697 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1698
1699 /* Set default values */
1700 switch (dev->devtype->product) {
1701 case CODA_DX6:
1702 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1703 break;
1704 default:
1705 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1706 }
1707 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1043667b
PZ		 1708
1709 if (dev->devtype->product != CODA_DX6)
1710 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1711
186b250a
JM		 1712 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1713 CODA_REG_BIT_INT_ENABLE);
1714
1715 /* Reset VPU and start processor */
1716 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1717 data |= CODA_REG_RESET_ENABLE;
1718 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1719 udelay(10);
1720 data &= ~CODA_REG_RESET_ENABLE;
1721 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1722 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1723
1724 /* Load firmware */
1725 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1726 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1727 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1728 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1729 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1730 if (coda_wait_timeout(dev)) {
1731 clk_disable_unprepare(dev->clk_per);
1732 clk_disable_unprepare(dev->clk_ahb);
1733 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1734 return -EIO;
1735 }
1736
1737 /* Check we are compatible with the loaded firmware */
1738 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1739 product = CODA_FIRMWARE_PRODUCT(data);
1740 major = CODA_FIRMWARE_MAJOR(data);
1741 minor = CODA_FIRMWARE_MINOR(data);
1742 release = CODA_FIRMWARE_RELEASE(data);
1743
1744 clk_disable_unprepare(dev->clk_per);
1745 clk_disable_unprepare(dev->clk_ahb);
1746
1747 if (product != dev->devtype->product) {
1748 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1749 " Version: %u.%u.%u\n",
1750 coda_product_name(dev->devtype->product),
1751 coda_product_name(product), major, minor, release);
1752 return -EINVAL;
1753 }
1754
1755 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1756 coda_product_name(product));
1757
1758 if (coda_firmware_supported(data)) {
1759 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1760 major, minor, release);
1761 } else {
1762 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1763 "%u.%u.%u\n", major, minor, release);
1764 }
1765
1766 return 0;
1767}
1768
1769static void coda_fw_callback(const struct firmware *fw, void *context)
1770{
1771 struct coda_dev *dev = context;
1772 struct platform_device *pdev = dev->plat_dev;
1773 int ret;
1774
1775 if (!fw) {
1776 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1777 return;
1778 }
1779
1780 /* allocate auxiliary per-device code buffer for the BIT processor */
1781 dev->codebuf.size = fw->size;
1782 dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1783 &dev->codebuf.paddr,
1784 GFP_KERNEL);
1785 if (!dev->codebuf.vaddr) {
1786 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1787 return;
1788 }
1789
87048bb4
PZ		 1790 /* Copy the whole firmware image to the code buffer */
1791 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1792 release_firmware(fw);
1793
1794 ret = coda_hw_init(dev);
186b250a
JM		 1795 if (ret) {
1796 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1797 return;
1798 }
1799
1800 dev->vfd.fops = &coda_fops,
1801 dev->vfd.ioctl_ops = &coda_ioctl_ops;
1802 dev->vfd.release = video_device_release_empty,
1803 dev->vfd.lock = &dev->dev_mutex;
1804 dev->vfd.v4l2_dev = &dev->v4l2_dev;
954f340f 1805 dev->vfd.vfl_dir = VFL_DIR_M2M;
186b250a
JM		 1806 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1807 video_set_drvdata(&dev->vfd, dev);
1808
1809 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1810 if (IS_ERR(dev->alloc_ctx)) {
1811 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1812 return;
1813 }
1814
1815 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1816 if (IS_ERR(dev->m2m_dev)) {
1817 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1818 goto rel_ctx;
1819 }
1820
1821 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1822 if (ret) {
1823 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1824 goto rel_m2m;
1825 }
1826 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1827 dev->vfd.num);
1828
1829 return;
1830
1831rel_m2m:
1832 v4l2_m2m_release(dev->m2m_dev);
1833rel_ctx:
1834 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1835}
1836
1837static int coda_firmware_request(struct coda_dev *dev)
1838{
1839 char *fw = dev->devtype->firmware;
1840
1841 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1842 coda_product_name(dev->devtype->product));
1843
1844 return request_firmware_nowait(THIS_MODULE, true,
1845 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1846}
1847
1848enum coda_platform {
1849 CODA_IMX27,
df1e74cc 1850 CODA_IMX53,
186b250a
JM		 1851};
1852
c06d8752 1853static const struct coda_devtype coda_devdata[] = {
186b250a
JM		 1854 [CODA_IMX27] = {
1855 .firmware = "v4l-codadx6-imx27.bin",
1856 .product = CODA_DX6,
1857 .formats = codadx6_formats,
1858 .num_formats = ARRAY_SIZE(codadx6_formats),
1859 },
df1e74cc
PZ		 1860 [CODA_IMX53] = {
1861 .firmware = "v4l-coda7541-imx53.bin",
1862 .product = CODA_7541,
1863 .formats = coda7_formats,
1864 .num_formats = ARRAY_SIZE(coda7_formats),
1865 },
186b250a
JM		 1866};
1867
1868static struct platform_device_id coda_platform_ids[] = {
1869 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
df1e74cc 1870 { .name = "coda-imx53", .driver_data = CODA_7541 },
186b250a
JM		 1871 { /* sentinel */ }
1872};
1873MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1874
1875#ifdef CONFIG_OF
1876static const struct of_device_id coda_dt_ids[] = {
1877 { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
df1e74cc 1878 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
186b250a
JM		 1879 { /* sentinel */ }
1880};
1881MODULE_DEVICE_TABLE(of, coda_dt_ids);
1882#endif
1883
1884static int __devinit coda_probe(struct platform_device *pdev)
1885{
1886 const struct of_device_id *of_id =
1887 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1888 const struct platform_device_id *pdev_id;
1889 struct coda_dev *dev;
1890 struct resource *res;
1891 int ret, irq;
1892
1893 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1894 if (!dev) {
1895 dev_err(&pdev->dev, "Not enough memory for %s\n",
1896 CODA_NAME);
1897 return -ENOMEM;
1898 }
1899
1900 spin_lock_init(&dev->irqlock);
e11f3e6e 1901 INIT_LIST_HEAD(&dev->instances);
2fb57f06 1902 INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
62bed14c
PZ		 1903 init_completion(&dev->done);
1904 complete(&dev->done);
186b250a
JM		 1905
1906 dev->plat_dev = pdev;
1907 dev->clk_per = devm_clk_get(&pdev->dev, "per");
1908 if (IS_ERR(dev->clk_per)) {
1909 dev_err(&pdev->dev, "Could not get per clock\n");
1910 return PTR_ERR(dev->clk_per);
1911 }
1912
1913 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1914 if (IS_ERR(dev->clk_ahb)) {
1915 dev_err(&pdev->dev, "Could not get ahb clock\n");
1916 return PTR_ERR(dev->clk_ahb);
1917 }
1918
1919 /* Get memory for physical registers */
1920 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1921 if (res == NULL) {
1922 dev_err(&pdev->dev, "failed to get memory region resource\n");
1923 return -ENOENT;
1924 }
1925
1926 if (devm_request_mem_region(&pdev->dev, res->start,
1927 resource_size(res), CODA_NAME) == NULL) {
1928 dev_err(&pdev->dev, "failed to request memory region\n");
1929 return -ENOENT;
1930 }
1931 dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1932 resource_size(res));
1933 if (!dev->regs_base) {
1934 dev_err(&pdev->dev, "failed to ioremap address region\n");
1935 return -ENOENT;
1936 }
1937
1938 /* IRQ */
1939 irq = platform_get_irq(pdev, 0);
1940 if (irq < 0) {
1941 dev_err(&pdev->dev, "failed to get irq resource\n");
1942 return -ENOENT;
1943 }
1944
1945 if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1946 0, CODA_NAME, dev) < 0) {
1947 dev_err(&pdev->dev, "failed to request irq\n");
1948 return -ENOENT;
1949 }
1950
1951 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1952 if (ret)
1953 return ret;
1954
1955 mutex_init(&dev->dev_mutex);
1956
1957 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1958
1959 if (of_id) {
1960 dev->devtype = of_id->data;
1961 } else if (pdev_id) {
1962 dev->devtype = &coda_devdata[pdev_id->driver_data];
1963 } else {
1964 v4l2_device_unregister(&dev->v4l2_dev);
1965 return -EINVAL;
1966 }
1967
1968 /* allocate auxiliary per-device buffers for the BIT processor */
1969 switch (dev->devtype->product) {
1970 case CODA_DX6:
1971 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1972 break;
1973 default:
1974 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1975 }
1976 dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1977 &dev->workbuf.paddr,
1978 GFP_KERNEL);
1979 if (!dev->workbuf.vaddr) {
1980 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1981 v4l2_device_unregister(&dev->v4l2_dev);
1982 return -ENOMEM;
1983 }
1984
1043667b
PZ		 1985 if (dev->devtype->product == CODA_DX6) {
1986 dev->iram_paddr = 0xffff4c00;
1987 } else {
1988 void __iomem *iram_vaddr;
1989
1990 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
1991 &dev->iram_paddr);
1992 if (!iram_vaddr) {
1993 dev_err(&pdev->dev, "unable to alloc iram\n");
1994 return -ENOMEM;
1995 }
1996 }
1997
186b250a
JM		 1998 platform_set_drvdata(pdev, dev);
1999
2000 return coda_firmware_request(dev);
2001}
2002
2003static int coda_remove(struct platform_device *pdev)
2004{
2005 struct coda_dev *dev = platform_get_drvdata(pdev);
2006
2007 video_unregister_device(&dev->vfd);
2008 if (dev->m2m_dev)
2009 v4l2_m2m_release(dev->m2m_dev);
2010 if (dev->alloc_ctx)
2011 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2012 v4l2_device_unregister(&dev->v4l2_dev);
1043667b
PZ		 2013 if (dev->iram_paddr)
2014 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
186b250a
JM		 2015 if (dev->codebuf.vaddr)
2016 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2017 &dev->codebuf.vaddr, dev->codebuf.paddr);
2018 if (dev->workbuf.vaddr)
2019 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2020 dev->workbuf.paddr);
2021 return 0;
2022}
2023
2024static struct platform_driver coda_driver = {
2025 .probe = coda_probe,
2026 .remove = __devexit_p(coda_remove),
2027 .driver = {
2028 .name = CODA_NAME,
2029 .owner = THIS_MODULE,
2030 .of_match_table = of_match_ptr(coda_dt_ids),
2031 },
2032 .id_table = coda_platform_ids,
2033};
2034
2035module_platform_driver(coda_driver);
2036
2037MODULE_LICENSE("GPL");
2038MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2039MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
Linux kernel - Deliverables
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