projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[media] media: coda: keep track of active instances
[deliverable/linux.git] / drivers / media / platform / coda.c
CommitLineData
186b250a
JM		 1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/firmware.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/module.h>
21#include <linux/of_device.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/videodev2.h>
25#include <linux/of.h>
26
1043667b 27#include <mach/iram.h>
186b250a
JM		 28#include <media/v4l2-ctrls.h>
29#include <media/v4l2-device.h>
30#include <media/v4l2-ioctl.h>
31#include <media/v4l2-mem2mem.h>
32#include <media/videobuf2-core.h>
33#include <media/videobuf2-dma-contig.h>
34
35#include "coda.h"
36
37#define CODA_NAME "coda"
38
39#define CODA_MAX_INSTANCES 4
40
41#define CODA_FMO_BUF_SIZE 32
42#define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
43#define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
44#define CODA_PARA_BUF_SIZE (10 * 1024)
45#define CODA_ISRAM_SIZE (2048 * 2)
1043667b 46#define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
186b250a 47
ec25f68d 48#define CODA_MAX_FRAMEBUFFERS 2
186b250a
JM		 49
50#define MAX_W 720
51#define MAX_H 576
52#define CODA_MAX_FRAME_SIZE 0x90000
53#define FMO_SLICE_SAVE_BUF_SIZE (32)
54#define CODA_DEFAULT_GAMMA 4096
55
56#define MIN_W 176
57#define MIN_H 144
58#define MAX_W 720
59#define MAX_H 576
60
61#define S_ALIGN 1 /* multiple of 2 */
62#define W_ALIGN 1 /* multiple of 2 */
63#define H_ALIGN 1 /* multiple of 2 */
64
65#define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
66
67static int coda_debug;
68module_param(coda_debug, int, 0);
69MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
70
71enum {
72 V4L2_M2M_SRC = 0,
73 V4L2_M2M_DST = 1,
74};
75
76enum coda_fmt_type {
77 CODA_FMT_ENC,
78 CODA_FMT_RAW,
79};
80
81enum coda_inst_type {
82 CODA_INST_ENCODER,
83 CODA_INST_DECODER,
84};
85
86enum coda_product {
87 CODA_DX6 = 0xf001,
df1e74cc 88 CODA_7541 = 0xf012,
186b250a
JM		 89};
90
91struct coda_fmt {
92 char *name;
93 u32 fourcc;
94 enum coda_fmt_type type;
95};
96
97struct coda_devtype {
98 char *firmware;
99 enum coda_product product;
100 struct coda_fmt *formats;
101 unsigned int num_formats;
102 size_t workbuf_size;
103};
104
105/* Per-queue, driver-specific private data */
106struct coda_q_data {
107 unsigned int width;
108 unsigned int height;
109 unsigned int sizeimage;
110 struct coda_fmt *fmt;
111};
112
113struct coda_aux_buf {
114 void *vaddr;
115 dma_addr_t paddr;
116 u32 size;
117};
118
119struct coda_dev {
120 struct v4l2_device v4l2_dev;
121 struct video_device vfd;
122 struct platform_device *plat_dev;
c06d8752 123 const struct coda_devtype *devtype;
186b250a
JM		 124
125 void __iomem *regs_base;
126 struct clk *clk_per;
127 struct clk *clk_ahb;
128
129 struct coda_aux_buf codebuf;
130 struct coda_aux_buf workbuf;
1043667b 131 long unsigned int iram_paddr;
186b250a
JM		 132
133 spinlock_t irqlock;
134 struct mutex dev_mutex;
135 struct v4l2_m2m_dev *m2m_dev;
136 struct vb2_alloc_ctx *alloc_ctx;
e11f3e6e
PZ		 137 struct list_head instances;
138 unsigned long instance_mask;
186b250a
JM		 139};
140
141struct coda_params {
142 u8 h264_intra_qp;
143 u8 h264_inter_qp;
144 u8 mpeg4_intra_qp;
145 u8 mpeg4_inter_qp;
146 u8 gop_size;
147 int codec_mode;
148 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
149 u32 framerate;
150 u16 bitrate;
151 u32 slice_max_mb;
152};
153
154struct coda_ctx {
155 struct coda_dev *dev;
e11f3e6e 156 struct list_head list;
186b250a
JM		 157 int aborting;
158 int rawstreamon;
159 int compstreamon;
160 u32 isequence;
161 struct coda_q_data q_data[2];
162 enum coda_inst_type inst_type;
163 enum v4l2_colorspace colorspace;
164 struct coda_params params;
165 struct v4l2_m2m_ctx *m2m_ctx;
166 struct v4l2_ctrl_handler ctrls;
167 struct v4l2_fh fh;
186b250a
JM		 168 int gopcounter;
169 char vpu_header[3][64];
170 int vpu_header_size[3];
171 struct coda_aux_buf parabuf;
ec25f68d
PZ		 172 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
173 int num_internal_frames;
186b250a
JM		 174 int idx;
175};
176
177static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
178{
179 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
180 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
181 writel(data, dev->regs_base + reg);
182}
183
184static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
185{
186 u32 data;
187 data = readl(dev->regs_base + reg);
188 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
189 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
190 return data;
191}
192
193static inline unsigned long coda_isbusy(struct coda_dev *dev)
194{
195 return coda_read(dev, CODA_REG_BIT_BUSY);
196}
197
198static inline int coda_is_initialized(struct coda_dev *dev)
199{
200 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
201}
202
203static int coda_wait_timeout(struct coda_dev *dev)
204{
205 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
206
207 while (coda_isbusy(dev)) {
208 if (time_after(jiffies, timeout))
209 return -ETIMEDOUT;
210 }
211 return 0;
212}
213
214static void coda_command_async(struct coda_ctx *ctx, int cmd)
215{
216 struct coda_dev *dev = ctx->dev;
217 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
218
219 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
220 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
221 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
222}
223
224static int coda_command_sync(struct coda_ctx *ctx, int cmd)
225{
226 struct coda_dev *dev = ctx->dev;
227
228 coda_command_async(ctx, cmd);
229 return coda_wait_timeout(dev);
230}
231
232static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
233 enum v4l2_buf_type type)
234{
235 switch (type) {
236 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
237 return &(ctx->q_data[V4L2_M2M_SRC]);
238 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
239 return &(ctx->q_data[V4L2_M2M_DST]);
240 default:
241 BUG();
242 }
243 return NULL;
244}
245
246/*
247 * Add one array of supported formats for each version of Coda:
248 * i.MX27 -> codadx6
249 * i.MX51 -> coda7
250 * i.MX6 -> coda960
251 */
252static struct coda_fmt codadx6_formats[] = {
253 {
254 .name = "YUV 4:2:0 Planar",
255 .fourcc = V4L2_PIX_FMT_YUV420,
256 .type = CODA_FMT_RAW,
257 },
258 {
259 .name = "H264 Encoded Stream",
260 .fourcc = V4L2_PIX_FMT_H264,
261 .type = CODA_FMT_ENC,
262 },
263 {
264 .name = "MPEG4 Encoded Stream",
265 .fourcc = V4L2_PIX_FMT_MPEG4,
266 .type = CODA_FMT_ENC,
267 },
268};
269
df1e74cc
PZ		 270static struct coda_fmt coda7_formats[] = {
271 {
272 .name = "YUV 4:2:0 Planar",
273 .fourcc = V4L2_PIX_FMT_YUV420,
274 .type = CODA_FMT_RAW,
275 },
276 {
277 .name = "H264 Encoded Stream",
278 .fourcc = V4L2_PIX_FMT_H264,
279 .type = CODA_FMT_ENC,
280 },
281 {
282 .name = "MPEG4 Encoded Stream",
283 .fourcc = V4L2_PIX_FMT_MPEG4,
284 .type = CODA_FMT_ENC,
285 },
286};
287
186b250a
JM		 288static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
289{
290 struct coda_fmt *formats = dev->devtype->formats;
291 int num_formats = dev->devtype->num_formats;
292 unsigned int k;
293
294 for (k = 0; k < num_formats; k++) {
295 if (formats[k].fourcc == f->fmt.pix.pixelformat)
296 break;
297 }
298
299 if (k == num_formats)
300 return NULL;
301
302 return &formats[k];
303}
304
305/*
306 * V4L2 ioctl() operations.
307 */
308static int vidioc_querycap(struct file *file, void *priv,
309 struct v4l2_capability *cap)
310{
311 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
312 strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
313 strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
c3aac8be
SN		 314 /*
315 * This is only a mem-to-mem video device. The capture and output
316 * device capability flags are left only for backward compatibility
317 * and are scheduled for removal.
318 */
319 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
320 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
186b250a
JM		 321 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
322
323 return 0;
324}
325
326static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
327 enum coda_fmt_type type)
328{
329 struct coda_ctx *ctx = fh_to_ctx(priv);
330 struct coda_dev *dev = ctx->dev;
331 struct coda_fmt *formats = dev->devtype->formats;
332 struct coda_fmt *fmt;
333 int num_formats = dev->devtype->num_formats;
334 int i, num = 0;
335
336 for (i = 0; i < num_formats; i++) {
337 if (formats[i].type == type) {
338 if (num == f->index)
339 break;
340 ++num;
341 }
342 }
343
344 if (i < num_formats) {
345 fmt = &formats[i];
346 strlcpy(f->description, fmt->name, sizeof(f->description));
347 f->pixelformat = fmt->fourcc;
348 return 0;
349 }
350
351 /* Format not found */
352 return -EINVAL;
353}
354
355static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
356 struct v4l2_fmtdesc *f)
357{
358 return enum_fmt(priv, f, CODA_FMT_ENC);
359}
360
361static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
362 struct v4l2_fmtdesc *f)
363{
364 return enum_fmt(priv, f, CODA_FMT_RAW);
365}
366
367static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
368{
369 struct vb2_queue *vq;
370 struct coda_q_data *q_data;
371 struct coda_ctx *ctx = fh_to_ctx(priv);
372
373 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
374 if (!vq)
375 return -EINVAL;
376
377 q_data = get_q_data(ctx, f->type);
378
379 f->fmt.pix.field = V4L2_FIELD_NONE;
380 f->fmt.pix.pixelformat = q_data->fmt->fourcc;
381 f->fmt.pix.width = q_data->width;
382 f->fmt.pix.height = q_data->height;
383 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
384 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
385 else /* encoded formats h.264/mpeg4 */
386 f->fmt.pix.bytesperline = 0;
387
388 f->fmt.pix.sizeimage = q_data->sizeimage;
389 f->fmt.pix.colorspace = ctx->colorspace;
390
391 return 0;
392}
393
394static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
395{
396 enum v4l2_field field;
397
398 field = f->fmt.pix.field;
399 if (field == V4L2_FIELD_ANY)
400 field = V4L2_FIELD_NONE;
401 else if (V4L2_FIELD_NONE != field)
402 return -EINVAL;
403
404 /* V4L2 specification suggests the driver corrects the format struct
405 * if any of the dimensions is unsupported */
406 f->fmt.pix.field = field;
407
408 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
409 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
410 W_ALIGN, &f->fmt.pix.height,
411 MIN_H, MAX_H, H_ALIGN, S_ALIGN);
412 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
413 f->fmt.pix.sizeimage = f->fmt.pix.height *
414 f->fmt.pix.bytesperline;
415 } else { /*encoded formats h.264/mpeg4 */
416 f->fmt.pix.bytesperline = 0;
417 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
418 }
419
420 return 0;
421}
422
423static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
424 struct v4l2_format *f)
425{
426 int ret;
427 struct coda_fmt *fmt;
428 struct coda_ctx *ctx = fh_to_ctx(priv);
429
430 fmt = find_format(ctx->dev, f);
431 /*
432 * Since decoding support is not implemented yet do not allow
433 * CODA_FMT_RAW formats in the capture interface.
434 */
435 if (!fmt || !(fmt->type == CODA_FMT_ENC))
436 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
437
438 f->fmt.pix.colorspace = ctx->colorspace;
439
440 ret = vidioc_try_fmt(ctx->dev, f);
441 if (ret < 0)
442 return ret;
443
444 return 0;
445}
446
447static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
448 struct v4l2_format *f)
449{
450 struct coda_ctx *ctx = fh_to_ctx(priv);
451 struct coda_fmt *fmt;
452 int ret;
453
454 fmt = find_format(ctx->dev, f);
455 /*
456 * Since decoding support is not implemented yet do not allow
457 * CODA_FMT formats in the capture interface.
458 */
459 if (!fmt || !(fmt->type == CODA_FMT_RAW))
460 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
461
462 if (!f->fmt.pix.colorspace)
463 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
464
465 ret = vidioc_try_fmt(ctx->dev, f);
466 if (ret < 0)
467 return ret;
468
469 return 0;
470}
471
472static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
473{
474 struct coda_q_data *q_data;
475 struct vb2_queue *vq;
476 int ret;
477
478 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
479 if (!vq)
480 return -EINVAL;
481
482 q_data = get_q_data(ctx, f->type);
483 if (!q_data)
484 return -EINVAL;
485
486 if (vb2_is_busy(vq)) {
487 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
488 return -EBUSY;
489 }
490
491 ret = vidioc_try_fmt(ctx->dev, f);
492 if (ret)
493 return ret;
494
495 q_data->fmt = find_format(ctx->dev, f);
496 q_data->width = f->fmt.pix.width;
497 q_data->height = f->fmt.pix.height;
498 if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420) {
499 q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
500 } else { /* encoded format h.264/mpeg-4 */
501 q_data->sizeimage = CODA_MAX_FRAME_SIZE;
502 }
503
504 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
505 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
506 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
507
508 return 0;
509}
510
511static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
512 struct v4l2_format *f)
513{
514 int ret;
515
516 ret = vidioc_try_fmt_vid_cap(file, priv, f);
517 if (ret)
518 return ret;
519
520 return vidioc_s_fmt(fh_to_ctx(priv), f);
521}
522
523static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
524 struct v4l2_format *f)
525{
526 struct coda_ctx *ctx = fh_to_ctx(priv);
527 int ret;
528
529 ret = vidioc_try_fmt_vid_out(file, priv, f);
530 if (ret)
531 return ret;
532
8d621472 533 ret = vidioc_s_fmt(ctx, f);
186b250a
JM		 534 if (ret)
535 ctx->colorspace = f->fmt.pix.colorspace;
536
537 return ret;
538}
539
540static int vidioc_reqbufs(struct file *file, void *priv,
541 struct v4l2_requestbuffers *reqbufs)
542{
543 struct coda_ctx *ctx = fh_to_ctx(priv);
544
545 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
546}
547
548static int vidioc_querybuf(struct file *file, void *priv,
549 struct v4l2_buffer *buf)
550{
551 struct coda_ctx *ctx = fh_to_ctx(priv);
552
553 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
554}
555
556static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
557{
558 struct coda_ctx *ctx = fh_to_ctx(priv);
559
560 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
561}
562
563static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
564{
565 struct coda_ctx *ctx = fh_to_ctx(priv);
566
567 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
568}
569
570static int vidioc_streamon(struct file *file, void *priv,
571 enum v4l2_buf_type type)
572{
573 struct coda_ctx *ctx = fh_to_ctx(priv);
574
575 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
576}
577
578static int vidioc_streamoff(struct file *file, void *priv,
579 enum v4l2_buf_type type)
580{
581 struct coda_ctx *ctx = fh_to_ctx(priv);
582
583 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
584}
585
586static const struct v4l2_ioctl_ops coda_ioctl_ops = {
587 .vidioc_querycap = vidioc_querycap,
588
589 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
590 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
591 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
592 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
593
594 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
595 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
596 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
597 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
598
599 .vidioc_reqbufs = vidioc_reqbufs,
600 .vidioc_querybuf = vidioc_querybuf,
601
602 .vidioc_qbuf = vidioc_qbuf,
603 .vidioc_dqbuf = vidioc_dqbuf,
604
605 .vidioc_streamon = vidioc_streamon,
606 .vidioc_streamoff = vidioc_streamoff,
607};
608
609/*
610 * Mem-to-mem operations.
611 */
612static void coda_device_run(void *m2m_priv)
613{
614 struct coda_ctx *ctx = m2m_priv;
615 struct coda_q_data *q_data_src, *q_data_dst;
616 struct vb2_buffer *src_buf, *dst_buf;
617 struct coda_dev *dev = ctx->dev;
618 int force_ipicture;
619 int quant_param = 0;
620 u32 picture_y, picture_cb, picture_cr;
621 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
622 u32 dst_fourcc;
623
624 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
625 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
626 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
627 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
628 dst_fourcc = q_data_dst->fmt->fourcc;
629
630 src_buf->v4l2_buf.sequence = ctx->isequence;
631 dst_buf->v4l2_buf.sequence = ctx->isequence;
632 ctx->isequence++;
633
634 /*
635 * Workaround coda firmware BUG that only marks the first
636 * frame as IDR. This is a problem for some decoders that can't
637 * recover when a frame is lost.
638 */
639 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
640 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
641 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
642 } else {
643 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
644 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
645 }
646
647 /*
648 * Copy headers at the beginning of the first frame for H.264 only.
649 * In MPEG4 they are already copied by the coda.
650 */
651 if (src_buf->v4l2_buf.sequence == 0) {
652 pic_stream_buffer_addr =
653 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
654 ctx->vpu_header_size[0] +
655 ctx->vpu_header_size[1] +
656 ctx->vpu_header_size[2];
657 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
658 ctx->vpu_header_size[0] -
659 ctx->vpu_header_size[1] -
660 ctx->vpu_header_size[2];
661 memcpy(vb2_plane_vaddr(dst_buf, 0),
662 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
663 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
664 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
665 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
666 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
667 ctx->vpu_header_size[2]);
668 } else {
669 pic_stream_buffer_addr =
670 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
671 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
672 }
673
674 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
675 force_ipicture = 1;
676 switch (dst_fourcc) {
677 case V4L2_PIX_FMT_H264:
678 quant_param = ctx->params.h264_intra_qp;
679 break;
680 case V4L2_PIX_FMT_MPEG4:
681 quant_param = ctx->params.mpeg4_intra_qp;
682 break;
683 default:
684 v4l2_warn(&ctx->dev->v4l2_dev,
685 "cannot set intra qp, fmt not supported\n");
686 break;
687 }
688 } else {
689 force_ipicture = 0;
690 switch (dst_fourcc) {
691 case V4L2_PIX_FMT_H264:
692 quant_param = ctx->params.h264_inter_qp;
693 break;
694 case V4L2_PIX_FMT_MPEG4:
695 quant_param = ctx->params.mpeg4_inter_qp;
696 break;
697 default:
698 v4l2_warn(&ctx->dev->v4l2_dev,
699 "cannot set inter qp, fmt not supported\n");
700 break;
701 }
702 }
703
704 /* submit */
705 coda_write(dev, 0, CODA_CMD_ENC_PIC_ROT_MODE);
706 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
707
708
709 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
710 picture_cb = picture_y + q_data_src->width * q_data_src->height;
711 picture_cr = picture_cb + q_data_src->width / 2 *
712 q_data_src->height / 2;
713
714 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
715 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
716 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
717 coda_write(dev, force_ipicture << 1 & 0x2,
718 CODA_CMD_ENC_PIC_OPTION);
719
720 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
721 coda_write(dev, pic_stream_buffer_size / 1024,
722 CODA_CMD_ENC_PIC_BB_SIZE);
1043667b
PZ		 723
724 if (dev->devtype->product == CODA_7541) {
725 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
726 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
727 CODA7_REG_BIT_AXI_SRAM_USE);
728 }
729
186b250a
JM		 730 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
731}
732
733static int coda_job_ready(void *m2m_priv)
734{
735 struct coda_ctx *ctx = m2m_priv;
736
737 /*
738 * For both 'P' and 'key' frame cases 1 picture
739 * and 1 frame are needed.
740 */
741 if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
742 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
743 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
744 "not ready: not enough video buffers.\n");
745 return 0;
746 }
747
186b250a
JM		 748 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
749 "job ready\n");
750 return 1;
751}
752
753static void coda_job_abort(void *priv)
754{
755 struct coda_ctx *ctx = priv;
756 struct coda_dev *dev = ctx->dev;
757
758 ctx->aborting = 1;
759
760 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
761 "Aborting task\n");
762
763 v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
764}
765
766static void coda_lock(void *m2m_priv)
767{
768 struct coda_ctx *ctx = m2m_priv;
769 struct coda_dev *pcdev = ctx->dev;
770 mutex_lock(&pcdev->dev_mutex);
771}
772
773static void coda_unlock(void *m2m_priv)
774{
775 struct coda_ctx *ctx = m2m_priv;
776 struct coda_dev *pcdev = ctx->dev;
777 mutex_unlock(&pcdev->dev_mutex);
778}
779
780static struct v4l2_m2m_ops coda_m2m_ops = {
781 .device_run = coda_device_run,
782 .job_ready = coda_job_ready,
783 .job_abort = coda_job_abort,
784 .lock = coda_lock,
785 .unlock = coda_unlock,
786};
787
788static void set_default_params(struct coda_ctx *ctx)
789{
790 struct coda_dev *dev = ctx->dev;
791
792 ctx->params.codec_mode = CODA_MODE_INVALID;
793 ctx->colorspace = V4L2_COLORSPACE_REC709;
794 ctx->params.framerate = 30;
186b250a
JM		 795 ctx->aborting = 0;
796
797 /* Default formats for output and input queues */
798 ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
799 ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
800 ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
801 ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
802 ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
803 ctx->q_data[V4L2_M2M_DST].width = MAX_W;
804 ctx->q_data[V4L2_M2M_DST].height = MAX_H;
805 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
806}
807
808/*
809 * Queue operations
810 */
811static int coda_queue_setup(struct vb2_queue *vq,
812 const struct v4l2_format *fmt,
813 unsigned int *nbuffers, unsigned int *nplanes,
814 unsigned int sizes[], void *alloc_ctxs[])
815{
816 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
817 unsigned int size;
818
819 if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
186b250a
JM		 820 if (fmt)
821 size = fmt->fmt.pix.width *
822 fmt->fmt.pix.height * 3 / 2;
823 else
824 size = MAX_W *
825 MAX_H * 3 / 2;
826 } else {
186b250a
JM		 827 size = CODA_MAX_FRAME_SIZE;
828 }
829
830 *nplanes = 1;
831 sizes[0] = size;
832
833 alloc_ctxs[0] = ctx->dev->alloc_ctx;
834
835 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
836 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
837
838 return 0;
839}
840
841static int coda_buf_prepare(struct vb2_buffer *vb)
842{
843 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
844 struct coda_q_data *q_data;
845
846 q_data = get_q_data(ctx, vb->vb2_queue->type);
847
848 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
849 v4l2_warn(&ctx->dev->v4l2_dev,
850 "%s data will not fit into plane (%lu < %lu)\n",
851 __func__, vb2_plane_size(vb, 0),
852 (long)q_data->sizeimage);
853 return -EINVAL;
854 }
855
856 vb2_set_plane_payload(vb, 0, q_data->sizeimage);
857
858 return 0;
859}
860
861static void coda_buf_queue(struct vb2_buffer *vb)
862{
863 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
864 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
865}
866
867static void coda_wait_prepare(struct vb2_queue *q)
868{
869 struct coda_ctx *ctx = vb2_get_drv_priv(q);
870 coda_unlock(ctx);
871}
872
873static void coda_wait_finish(struct vb2_queue *q)
874{
875 struct coda_ctx *ctx = vb2_get_drv_priv(q);
876 coda_lock(ctx);
877}
878
ec25f68d
PZ		 879static void coda_free_framebuffers(struct coda_ctx *ctx)
880{
881 int i;
882
883 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
884 if (ctx->internal_frames[i].vaddr) {
885 dma_free_coherent(&ctx->dev->plat_dev->dev,
886 ctx->internal_frames[i].size,
887 ctx->internal_frames[i].vaddr,
888 ctx->internal_frames[i].paddr);
889 ctx->internal_frames[i].vaddr = NULL;
890 }
891 }
892}
893
894static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
895{
896 struct coda_dev *dev = ctx->dev;
897
898 int height = q_data->height;
899 int width = q_data->width;
900 u32 *p;
901 int i;
902
903 /* Allocate frame buffers */
904 ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
905 for (i = 0; i < ctx->num_internal_frames; i++) {
906 ctx->internal_frames[i].size = q_data->sizeimage;
907 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
908 ctx->internal_frames[i].size += width / 2 * height / 2;
909 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
910 &dev->plat_dev->dev, ctx->internal_frames[i].size,
911 &ctx->internal_frames[i].paddr, GFP_KERNEL);
912 if (!ctx->internal_frames[i].vaddr) {
913 coda_free_framebuffers(ctx);
914 return -ENOMEM;
915 }
916 }
917
918 /* Register frame buffers in the parameter buffer */
919 p = ctx->parabuf.vaddr;
920
921 if (dev->devtype->product == CODA_DX6) {
922 for (i = 0; i < ctx->num_internal_frames; i++) {
923 p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
924 p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
925 p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
926 }
927 } else {
928 for (i = 0; i < ctx->num_internal_frames; i += 2) {
929 p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
930 p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
931 p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
932
933 if (fourcc == V4L2_PIX_FMT_H264)
934 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
935
936 if (i + 1 < ctx->num_internal_frames) {
937 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
938 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
939 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
940
941 if (fourcc == V4L2_PIX_FMT_H264)
942 p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
943 }
944 }
945 }
946
947 return 0;
948}
949
186b250a
JM		 950static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
951{
952 struct coda_ctx *ctx = vb2_get_drv_priv(q);
953 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
954 u32 bitstream_buf, bitstream_size;
955 struct coda_dev *dev = ctx->dev;
956 struct coda_q_data *q_data_src, *q_data_dst;
186b250a 957 struct vb2_buffer *buf;
ec25f68d 958 u32 dst_fourcc;
186b250a 959 u32 value;
ec25f68d 960 int ret;
186b250a
JM		 961
962 if (count < 1)
963 return -EINVAL;
964
965 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
966 ctx->rawstreamon = 1;
967 else
968 ctx->compstreamon = 1;
969
970 /* Don't start the coda unless both queues are on */
971 if (!(ctx->rawstreamon & ctx->compstreamon))
972 return 0;
973
974 ctx->gopcounter = ctx->params.gop_size - 1;
975
976 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
977 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
978 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
979 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
980 bitstream_size = q_data_dst->sizeimage;
981 dst_fourcc = q_data_dst->fmt->fourcc;
982
983 /* Find out whether coda must encode or decode */
984 if (q_data_src->fmt->type == CODA_FMT_RAW &&
985 q_data_dst->fmt->type == CODA_FMT_ENC) {
986 ctx->inst_type = CODA_INST_ENCODER;
987 } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
988 q_data_dst->fmt->type == CODA_FMT_RAW) {
989 ctx->inst_type = CODA_INST_DECODER;
990 v4l2_err(v4l2_dev, "decoding not supported.\n");
991 return -EINVAL;
992 } else {
993 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
994 return -EINVAL;
995 }
996
997 if (!coda_is_initialized(dev)) {
998 v4l2_err(v4l2_dev, "coda is not initialized.\n");
999 return -EFAULT;
1000 }
1001 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1002 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1003 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1004 switch (dev->devtype->product) {
1005 case CODA_DX6:
1006 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1007 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1008 break;
1009 default:
1010 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1011 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1012 }
1013
1043667b
PZ		 1014 if (dev->devtype->product == CODA_DX6) {
1015 /* Configure the coda */
1016 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1017 }
186b250a
JM		 1018
1019 /* Could set rotation here if needed */
1020 switch (dev->devtype->product) {
1021 case CODA_DX6:
1022 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1023 break;
1024 default:
1025 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1026 }
1027 value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1028 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1029 coda_write(dev, ctx->params.framerate,
1030 CODA_CMD_ENC_SEQ_SRC_F_RATE);
1031
1032 switch (dst_fourcc) {
1033 case V4L2_PIX_FMT_MPEG4:
1034 if (dev->devtype->product == CODA_DX6)
1035 ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1036 else
1037 ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1038
1039 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1040 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1041 break;
1042 case V4L2_PIX_FMT_H264:
1043 if (dev->devtype->product == CODA_DX6)
1044 ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1045 else
1046 ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1047
1048 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1049 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1050 break;
1051 default:
1052 v4l2_err(v4l2_dev,
1053 "dst format (0x%08x) invalid.\n", dst_fourcc);
1054 return -EINVAL;
1055 }
1056
1057 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1058 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1059 if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
1060 value |= 1 & CODA_SLICING_MODE_MASK;
1061 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1062 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1063 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1064
1065 if (ctx->params.bitrate) {
1066 /* Rate control enabled */
1067 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1068 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
1069 } else {
1070 value = 0;
1071 }
1072 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1073
1074 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1075 coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1076
1077 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1078 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1079
1080 /* set default gamma */
1081 value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1082 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1083
1084 value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1085 value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1086 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1087
1088 if (dst_fourcc == V4L2_PIX_FMT_H264) {
1089 value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1090 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1091 value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
1043667b
PZ		 1092 if (dev->devtype->product == CODA_DX6) {
1093 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1094 } else {
1095 coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1096 coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1097 }
186b250a
JM		 1098 }
1099
1100 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1101 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1102 return -ETIMEDOUT;
1103 }
1104
1105 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1106 return -EFAULT;
1107
ec25f68d
PZ		 1108 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1109 if (ret < 0)
1110 return ret;
186b250a 1111
ec25f68d 1112 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1043667b
PZ		 1113 coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1114 if (dev->devtype->product != CODA_DX6) {
1115 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1116 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1117 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1118 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1119 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1120 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1121 }
186b250a
JM		 1122 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1123 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1124 return -ETIMEDOUT;
1125 }
1126
1127 /* Save stream headers */
1128 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1129 switch (dst_fourcc) {
1130 case V4L2_PIX_FMT_H264:
1131 /*
1132 * Get SPS in the first frame and copy it to an
1133 * intermediate buffer.
1134 */
1135 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1136 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1137 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1138 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1139 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1140 return -ETIMEDOUT;
1141 }
1142 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1143 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1144 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1145 ctx->vpu_header_size[0]);
1146
1147 /*
1148 * Get PPS in the first frame and copy it to an
1149 * intermediate buffer.
1150 */
1151 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1152 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1153 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1154 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1155 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1156 return -ETIMEDOUT;
1157 }
1158 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1159 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1160 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1161 ctx->vpu_header_size[1]);
1162 ctx->vpu_header_size[2] = 0;
1163 break;
1164 case V4L2_PIX_FMT_MPEG4:
1165 /*
1166 * Get VOS in the first frame and copy it to an
1167 * intermediate buffer
1168 */
1169 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1170 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1171 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1172 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1173 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1174 return -ETIMEDOUT;
1175 }
1176 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1177 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1178 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1179 ctx->vpu_header_size[0]);
1180
1181 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1182 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1183 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1184 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1185 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1186 return -ETIMEDOUT;
1187 }
1188 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1189 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1190 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1191 ctx->vpu_header_size[1]);
1192
1193 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1194 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1195 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1196 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1197 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1198 return -ETIMEDOUT;
1199 }
1200 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1201 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1202 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1203 ctx->vpu_header_size[2]);
1204 break;
1205 default:
1206 /* No more formats need to save headers at the moment */
1207 break;
1208 }
1209
1210 return 0;
1211}
1212
1213static int coda_stop_streaming(struct vb2_queue *q)
1214{
1215 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1216
1217 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1218 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1219 "%s: output\n", __func__);
1220 ctx->rawstreamon = 0;
1221 } else {
1222 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1223 "%s: capture\n", __func__);
1224 ctx->compstreamon = 0;
1225 }
1226
1227 if (!ctx->rawstreamon && !ctx->compstreamon) {
1228 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1229 "%s: sent command 'SEQ_END' to coda\n", __func__);
1230 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1231 v4l2_err(&ctx->dev->v4l2_dev,
1232 "CODA_COMMAND_SEQ_END failed\n");
1233 return -ETIMEDOUT;
1234 }
ec25f68d
PZ		 1235
1236 coda_free_framebuffers(ctx);
186b250a
JM		 1237 }
1238
1239 return 0;
1240}
1241
1242static struct vb2_ops coda_qops = {
1243 .queue_setup = coda_queue_setup,
1244 .buf_prepare = coda_buf_prepare,
1245 .buf_queue = coda_buf_queue,
1246 .wait_prepare = coda_wait_prepare,
1247 .wait_finish = coda_wait_finish,
1248 .start_streaming = coda_start_streaming,
1249 .stop_streaming = coda_stop_streaming,
1250};
1251
1252static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1253{
1254 struct coda_ctx *ctx =
1255 container_of(ctrl->handler, struct coda_ctx, ctrls);
1256
1257 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1258 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1259
1260 switch (ctrl->id) {
1261 case V4L2_CID_MPEG_VIDEO_BITRATE:
1262 ctx->params.bitrate = ctrl->val / 1000;
1263 break;
1264 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1265 ctx->params.gop_size = ctrl->val;
1266 break;
1267 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1268 ctx->params.h264_intra_qp = ctrl->val;
1269 break;
1270 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1271 ctx->params.h264_inter_qp = ctrl->val;
1272 break;
1273 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1274 ctx->params.mpeg4_intra_qp = ctrl->val;
1275 break;
1276 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1277 ctx->params.mpeg4_inter_qp = ctrl->val;
1278 break;
1279 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1280 ctx->params.slice_mode = ctrl->val;
1281 break;
1282 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1283 ctx->params.slice_max_mb = ctrl->val;
1284 break;
1285 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1286 break;
1287 default:
1288 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1289 "Invalid control, id=%d, val=%d\n",
1290 ctrl->id, ctrl->val);
1291 return -EINVAL;
1292 }
1293
1294 return 0;
1295}
1296
1297static struct v4l2_ctrl_ops coda_ctrl_ops = {
1298 .s_ctrl = coda_s_ctrl,
1299};
1300
1301static int coda_ctrls_setup(struct coda_ctx *ctx)
1302{
1303 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1304
1305 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1306 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1307 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1308 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1309 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1310 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1311 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1312 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1313 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1314 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1315 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1316 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1317 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1318 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1319 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
1320 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
1321 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1322 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1323 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1324 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1325 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1326 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1327 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1328
1329 if (ctx->ctrls.error) {
1330 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1331 ctx->ctrls.error);
1332 return -EINVAL;
1333 }
1334
1335 return v4l2_ctrl_handler_setup(&ctx->ctrls);
1336}
1337
1338static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1339 struct vb2_queue *dst_vq)
1340{
1341 struct coda_ctx *ctx = priv;
1342 int ret;
1343
186b250a
JM		 1344 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1345 src_vq->io_modes = VB2_MMAP;
1346 src_vq->drv_priv = ctx;
1347 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1348 src_vq->ops = &coda_qops;
1349 src_vq->mem_ops = &vb2_dma_contig_memops;
1350
1351 ret = vb2_queue_init(src_vq);
1352 if (ret)
1353 return ret;
1354
186b250a
JM		 1355 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1356 dst_vq->io_modes = VB2_MMAP;
1357 dst_vq->drv_priv = ctx;
1358 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1359 dst_vq->ops = &coda_qops;
1360 dst_vq->mem_ops = &vb2_dma_contig_memops;
1361
1362 return vb2_queue_init(dst_vq);
1363}
1364
e11f3e6e
PZ		 1365static int coda_next_free_instance(struct coda_dev *dev)
1366{
1367 return ffz(dev->instance_mask);
1368}
1369
186b250a
JM		 1370static int coda_open(struct file *file)
1371{
1372 struct coda_dev *dev = video_drvdata(file);
1373 struct coda_ctx *ctx = NULL;
1374 int ret = 0;
e11f3e6e 1375 int idx;
186b250a 1376
e11f3e6e
PZ		 1377 idx = coda_next_free_instance(dev);
1378 if (idx >= CODA_MAX_INSTANCES)
186b250a 1379 return -EBUSY;
e11f3e6e 1380 set_bit(idx, &dev->instance_mask);
186b250a
JM		 1381
1382 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1383 if (!ctx)
1384 return -ENOMEM;
1385
1386 v4l2_fh_init(&ctx->fh, video_devdata(file));
1387 file->private_data = &ctx->fh;
1388 v4l2_fh_add(&ctx->fh);
1389 ctx->dev = dev;
e11f3e6e 1390 ctx->idx = idx;
186b250a
JM		 1391
1392 set_default_params(ctx);
1393 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1394 &coda_queue_init);
1395 if (IS_ERR(ctx->m2m_ctx)) {
1396 int ret = PTR_ERR(ctx->m2m_ctx);
1397
1398 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1399 __func__, ret);
1400 goto err;
1401 }
1402 ret = coda_ctrls_setup(ctx);
1403 if (ret) {
1404 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1405 goto err;
1406 }
1407
1408 ctx->fh.ctrl_handler = &ctx->ctrls;
1409
1410 ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1411 CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1412 if (!ctx->parabuf.vaddr) {
1413 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1414 ret = -ENOMEM;
1415 goto err;
1416 }
1417
1418 coda_lock(ctx);
e11f3e6e 1419 list_add(&ctx->list, &dev->instances);
186b250a
JM		 1420 coda_unlock(ctx);
1421
1422 clk_prepare_enable(dev->clk_per);
1423 clk_prepare_enable(dev->clk_ahb);
1424
1425 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1426 ctx->idx, ctx);
1427
1428 return 0;
1429
1430err:
1431 v4l2_fh_del(&ctx->fh);
1432 v4l2_fh_exit(&ctx->fh);
1433 kfree(ctx);
1434 return ret;
1435}
1436
1437static int coda_release(struct file *file)
1438{
1439 struct coda_dev *dev = video_drvdata(file);
1440 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1441
1442 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1443 ctx);
1444
1445 coda_lock(ctx);
e11f3e6e 1446 list_del(&ctx->list);
186b250a
JM		 1447 coda_unlock(ctx);
1448
1449 dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1450 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1451 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1452 v4l2_ctrl_handler_free(&ctx->ctrls);
1453 clk_disable_unprepare(dev->clk_per);
1454 clk_disable_unprepare(dev->clk_ahb);
1455 v4l2_fh_del(&ctx->fh);
1456 v4l2_fh_exit(&ctx->fh);
e11f3e6e 1457 clear_bit(ctx->idx, &dev->instance_mask);
186b250a
JM		 1458 kfree(ctx);
1459
1460 return 0;
1461}
1462
1463static unsigned int coda_poll(struct file *file,
1464 struct poll_table_struct *wait)
1465{
1466 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1467 int ret;
1468
1469 coda_lock(ctx);
1470 ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1471 coda_unlock(ctx);
1472 return ret;
1473}
1474
1475static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1476{
1477 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1478
1479 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1480}
1481
1482static const struct v4l2_file_operations coda_fops = {
1483 .owner = THIS_MODULE,
1484 .open = coda_open,
1485 .release = coda_release,
1486 .poll = coda_poll,
1487 .unlocked_ioctl = video_ioctl2,
1488 .mmap = coda_mmap,
1489};
1490
1491static irqreturn_t coda_irq_handler(int irq, void *data)
1492{
ec25f68d 1493 struct vb2_buffer *src_buf, *dst_buf;
186b250a
JM		 1494 struct coda_dev *dev = data;
1495 u32 wr_ptr, start_ptr;
1496 struct coda_ctx *ctx;
1497
1498 /* read status register to attend the IRQ */
1499 coda_read(dev, CODA_REG_BIT_INT_STATUS);
1500 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1501 CODA_REG_BIT_INT_CLEAR);
1502
1503 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1504 if (ctx == NULL) {
1505 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1506 return IRQ_HANDLED;
1507 }
1508
1509 if (ctx->aborting) {
1510 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1511 "task has been aborted\n");
1512 return IRQ_HANDLED;
1513 }
1514
1515 if (coda_isbusy(ctx->dev)) {
1516 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1517 "coda is still busy!!!!\n");
1518 return IRQ_NONE;
1519 }
1520
ec25f68d
PZ		 1521 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1522 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
186b250a
JM		 1523
1524 /* Get results from the coda */
1525 coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1526 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1527 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1528 /* Calculate bytesused field */
1529 if (dst_buf->v4l2_buf.sequence == 0) {
1530 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1531 ctx->vpu_header_size[0] +
1532 ctx->vpu_header_size[1] +
1533 ctx->vpu_header_size[2];
1534 } else {
1535 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1536 }
1537
1538 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1539 wr_ptr - start_ptr);
1540
1541 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1542 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1543
1544 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1545 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1546 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1547 } else {
1548 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1549 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1550 }
1551
ec25f68d 1552 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
186b250a
JM		 1553 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1554
1555 ctx->gopcounter--;
1556 if (ctx->gopcounter < 0)
1557 ctx->gopcounter = ctx->params.gop_size - 1;
1558
1559 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1560 "job finished: encoding frame (%d) (%s)\n",
1561 dst_buf->v4l2_buf.sequence,
1562 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1563 "KEYFRAME" : "PFRAME");
1564
1565 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1566
1567 return IRQ_HANDLED;
1568}
1569
1570static u32 coda_supported_firmwares[] = {
1571 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
df1e74cc 1572 CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
186b250a
JM		 1573};
1574
1575static bool coda_firmware_supported(u32 vernum)
1576{
1577 int i;
1578
1579 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1580 if (vernum == coda_supported_firmwares[i])
1581 return true;
1582 return false;
1583}
1584
1585static char *coda_product_name(int product)
1586{
1587 static char buf[9];
1588
1589 switch (product) {
1590 case CODA_DX6:
1591 return "CodaDx6";
df1e74cc
PZ		 1592 case CODA_7541:
1593 return "CODA7541";
186b250a
JM		 1594 default:
1595 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1596 return buf;
1597 }
1598}
1599
87048bb4 1600static int coda_hw_init(struct coda_dev *dev)
186b250a
JM		 1601{
1602 u16 product, major, minor, release;
1603 u32 data;
1604 u16 *p;
1605 int i;
1606
1607 clk_prepare_enable(dev->clk_per);
1608 clk_prepare_enable(dev->clk_ahb);
1609
186b250a
JM		 1610 /*
1611 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
87048bb4
PZ		 1612 * The 16-bit chars in the code buffer are in memory access
1613 * order, re-sort them to CODA order for register download.
186b250a
JM		 1614 * Data in this SRAM survives a reboot.
1615 */
87048bb4
PZ		 1616 p = (u16 *)dev->codebuf.vaddr;
1617 if (dev->devtype->product == CODA_DX6) {
1618 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1619 data = CODA_DOWN_ADDRESS_SET(i) |
1620 CODA_DOWN_DATA_SET(p[i ^ 1]);
1621 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1622 }
1623 } else {
1624 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1625 data = CODA_DOWN_ADDRESS_SET(i) |
1626 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1627 3 - (i % 4)]);
1628 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1629 }
186b250a 1630 }
186b250a
JM		 1631
1632 /* Tell the BIT where to find everything it needs */
1633 coda_write(dev, dev->workbuf.paddr,
1634 CODA_REG_BIT_WORK_BUF_ADDR);
1635 coda_write(dev, dev->codebuf.paddr,
1636 CODA_REG_BIT_CODE_BUF_ADDR);
1637 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1638
1639 /* Set default values */
1640 switch (dev->devtype->product) {
1641 case CODA_DX6:
1642 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1643 break;
1644 default:
1645 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1646 }
1647 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1043667b
PZ		 1648
1649 if (dev->devtype->product != CODA_DX6)
1650 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1651
186b250a
JM		 1652 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1653 CODA_REG_BIT_INT_ENABLE);
1654
1655 /* Reset VPU and start processor */
1656 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1657 data |= CODA_REG_RESET_ENABLE;
1658 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1659 udelay(10);
1660 data &= ~CODA_REG_RESET_ENABLE;
1661 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1662 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1663
1664 /* Load firmware */
1665 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1666 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1667 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1668 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1669 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1670 if (coda_wait_timeout(dev)) {
1671 clk_disable_unprepare(dev->clk_per);
1672 clk_disable_unprepare(dev->clk_ahb);
1673 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1674 return -EIO;
1675 }
1676
1677 /* Check we are compatible with the loaded firmware */
1678 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1679 product = CODA_FIRMWARE_PRODUCT(data);
1680 major = CODA_FIRMWARE_MAJOR(data);
1681 minor = CODA_FIRMWARE_MINOR(data);
1682 release = CODA_FIRMWARE_RELEASE(data);
1683
1684 clk_disable_unprepare(dev->clk_per);
1685 clk_disable_unprepare(dev->clk_ahb);
1686
1687 if (product != dev->devtype->product) {
1688 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1689 " Version: %u.%u.%u\n",
1690 coda_product_name(dev->devtype->product),
1691 coda_product_name(product), major, minor, release);
1692 return -EINVAL;
1693 }
1694
1695 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1696 coda_product_name(product));
1697
1698 if (coda_firmware_supported(data)) {
1699 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1700 major, minor, release);
1701 } else {
1702 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1703 "%u.%u.%u\n", major, minor, release);
1704 }
1705
1706 return 0;
1707}
1708
1709static void coda_fw_callback(const struct firmware *fw, void *context)
1710{
1711 struct coda_dev *dev = context;
1712 struct platform_device *pdev = dev->plat_dev;
1713 int ret;
1714
1715 if (!fw) {
1716 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1717 return;
1718 }
1719
1720 /* allocate auxiliary per-device code buffer for the BIT processor */
1721 dev->codebuf.size = fw->size;
1722 dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1723 &dev->codebuf.paddr,
1724 GFP_KERNEL);
1725 if (!dev->codebuf.vaddr) {
1726 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1727 return;
1728 }
1729
87048bb4
PZ		 1730 /* Copy the whole firmware image to the code buffer */
1731 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1732 release_firmware(fw);
1733
1734 ret = coda_hw_init(dev);
186b250a
JM		 1735 if (ret) {
1736 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1737 return;
1738 }
1739
1740 dev->vfd.fops = &coda_fops,
1741 dev->vfd.ioctl_ops = &coda_ioctl_ops;
1742 dev->vfd.release = video_device_release_empty,
1743 dev->vfd.lock = &dev->dev_mutex;
1744 dev->vfd.v4l2_dev = &dev->v4l2_dev;
954f340f 1745 dev->vfd.vfl_dir = VFL_DIR_M2M;
186b250a
JM		 1746 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1747 video_set_drvdata(&dev->vfd, dev);
1748
1749 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1750 if (IS_ERR(dev->alloc_ctx)) {
1751 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1752 return;
1753 }
1754
1755 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1756 if (IS_ERR(dev->m2m_dev)) {
1757 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1758 goto rel_ctx;
1759 }
1760
1761 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1762 if (ret) {
1763 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1764 goto rel_m2m;
1765 }
1766 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1767 dev->vfd.num);
1768
1769 return;
1770
1771rel_m2m:
1772 v4l2_m2m_release(dev->m2m_dev);
1773rel_ctx:
1774 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1775}
1776
1777static int coda_firmware_request(struct coda_dev *dev)
1778{
1779 char *fw = dev->devtype->firmware;
1780
1781 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1782 coda_product_name(dev->devtype->product));
1783
1784 return request_firmware_nowait(THIS_MODULE, true,
1785 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1786}
1787
1788enum coda_platform {
1789 CODA_IMX27,
df1e74cc 1790 CODA_IMX53,
186b250a
JM		 1791};
1792
c06d8752 1793static const struct coda_devtype coda_devdata[] = {
186b250a
JM		 1794 [CODA_IMX27] = {
1795 .firmware = "v4l-codadx6-imx27.bin",
1796 .product = CODA_DX6,
1797 .formats = codadx6_formats,
1798 .num_formats = ARRAY_SIZE(codadx6_formats),
1799 },
df1e74cc
PZ		 1800 [CODA_IMX53] = {
1801 .firmware = "v4l-coda7541-imx53.bin",
1802 .product = CODA_7541,
1803 .formats = coda7_formats,
1804 .num_formats = ARRAY_SIZE(coda7_formats),
1805 },
186b250a
JM		 1806};
1807
1808static struct platform_device_id coda_platform_ids[] = {
1809 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
df1e74cc 1810 { .name = "coda-imx53", .driver_data = CODA_7541 },
186b250a
JM		 1811 { /* sentinel */ }
1812};
1813MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1814
1815#ifdef CONFIG_OF
1816static const struct of_device_id coda_dt_ids[] = {
1817 { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
df1e74cc 1818 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
186b250a
JM		 1819 { /* sentinel */ }
1820};
1821MODULE_DEVICE_TABLE(of, coda_dt_ids);
1822#endif
1823
1824static int __devinit coda_probe(struct platform_device *pdev)
1825{
1826 const struct of_device_id *of_id =
1827 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1828 const struct platform_device_id *pdev_id;
1829 struct coda_dev *dev;
1830 struct resource *res;
1831 int ret, irq;
1832
1833 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1834 if (!dev) {
1835 dev_err(&pdev->dev, "Not enough memory for %s\n",
1836 CODA_NAME);
1837 return -ENOMEM;
1838 }
1839
1840 spin_lock_init(&dev->irqlock);
e11f3e6e 1841 INIT_LIST_HEAD(&dev->instances);
186b250a
JM		 1842
1843 dev->plat_dev = pdev;
1844 dev->clk_per = devm_clk_get(&pdev->dev, "per");
1845 if (IS_ERR(dev->clk_per)) {
1846 dev_err(&pdev->dev, "Could not get per clock\n");
1847 return PTR_ERR(dev->clk_per);
1848 }
1849
1850 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1851 if (IS_ERR(dev->clk_ahb)) {
1852 dev_err(&pdev->dev, "Could not get ahb clock\n");
1853 return PTR_ERR(dev->clk_ahb);
1854 }
1855
1856 /* Get memory for physical registers */
1857 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1858 if (res == NULL) {
1859 dev_err(&pdev->dev, "failed to get memory region resource\n");
1860 return -ENOENT;
1861 }
1862
1863 if (devm_request_mem_region(&pdev->dev, res->start,
1864 resource_size(res), CODA_NAME) == NULL) {
1865 dev_err(&pdev->dev, "failed to request memory region\n");
1866 return -ENOENT;
1867 }
1868 dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1869 resource_size(res));
1870 if (!dev->regs_base) {
1871 dev_err(&pdev->dev, "failed to ioremap address region\n");
1872 return -ENOENT;
1873 }
1874
1875 /* IRQ */
1876 irq = platform_get_irq(pdev, 0);
1877 if (irq < 0) {
1878 dev_err(&pdev->dev, "failed to get irq resource\n");
1879 return -ENOENT;
1880 }
1881
1882 if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1883 0, CODA_NAME, dev) < 0) {
1884 dev_err(&pdev->dev, "failed to request irq\n");
1885 return -ENOENT;
1886 }
1887
1888 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1889 if (ret)
1890 return ret;
1891
1892 mutex_init(&dev->dev_mutex);
1893
1894 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1895
1896 if (of_id) {
1897 dev->devtype = of_id->data;
1898 } else if (pdev_id) {
1899 dev->devtype = &coda_devdata[pdev_id->driver_data];
1900 } else {
1901 v4l2_device_unregister(&dev->v4l2_dev);
1902 return -EINVAL;
1903 }
1904
1905 /* allocate auxiliary per-device buffers for the BIT processor */
1906 switch (dev->devtype->product) {
1907 case CODA_DX6:
1908 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1909 break;
1910 default:
1911 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1912 }
1913 dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1914 &dev->workbuf.paddr,
1915 GFP_KERNEL);
1916 if (!dev->workbuf.vaddr) {
1917 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1918 v4l2_device_unregister(&dev->v4l2_dev);
1919 return -ENOMEM;
1920 }
1921
1043667b
PZ		 1922 if (dev->devtype->product == CODA_DX6) {
1923 dev->iram_paddr = 0xffff4c00;
1924 } else {
1925 void __iomem *iram_vaddr;
1926
1927 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
1928 &dev->iram_paddr);
1929 if (!iram_vaddr) {
1930 dev_err(&pdev->dev, "unable to alloc iram\n");
1931 return -ENOMEM;
1932 }
1933 }
1934
186b250a
JM		 1935 platform_set_drvdata(pdev, dev);
1936
1937 return coda_firmware_request(dev);
1938}
1939
1940static int coda_remove(struct platform_device *pdev)
1941{
1942 struct coda_dev *dev = platform_get_drvdata(pdev);
1943
1944 video_unregister_device(&dev->vfd);
1945 if (dev->m2m_dev)
1946 v4l2_m2m_release(dev->m2m_dev);
1947 if (dev->alloc_ctx)
1948 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1949 v4l2_device_unregister(&dev->v4l2_dev);
1043667b
PZ		 1950 if (dev->iram_paddr)
1951 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
186b250a
JM		 1952 if (dev->codebuf.vaddr)
1953 dma_free_coherent(&pdev->dev, dev->codebuf.size,
1954 &dev->codebuf.vaddr, dev->codebuf.paddr);
1955 if (dev->workbuf.vaddr)
1956 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
1957 dev->workbuf.paddr);
1958 return 0;
1959}
1960
1961static struct platform_driver coda_driver = {
1962 .probe = coda_probe,
1963 .remove = __devexit_p(coda_remove),
1964 .driver = {
1965 .name = CODA_NAME,
1966 .owner = THIS_MODULE,
1967 .of_match_table = of_match_ptr(coda_dt_ids),
1968 },
1969 .id_table = coda_platform_ids,
1970};
1971
1972module_platform_driver(coda_driver);
1973
1974MODULE_LICENSE("GPL");
1975MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
1976MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
Linux kernel - Deliverables
This page took 0.121496 seconds and 5 git commands to generate.