Commit | Line | Data |
---|---|---|
5f3cc447 | 1 | /* |
3a3f9449 | 2 | * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver |
5f3cc447 | 3 | * |
0c9204d3 SN |
4 | * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd. |
5 | * Sylwester Nawrocki <s.nawrocki@samsung.com> | |
5f3cc447 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
5f3cc447 SN |
14 | #include <linux/types.h> |
15 | #include <linux/errno.h> | |
16 | #include <linux/bug.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/device.h> | |
e9e21083 | 19 | #include <linux/pm_runtime.h> |
5f3cc447 SN |
20 | #include <linux/list.h> |
21 | #include <linux/slab.h> | |
5f3cc447 SN |
22 | |
23 | #include <linux/videodev2.h> | |
24 | #include <media/v4l2-device.h> | |
25 | #include <media/v4l2-ioctl.h> | |
26 | #include <media/v4l2-mem2mem.h> | |
c139990e | 27 | #include <media/videobuf2-v4l2.h> |
2dab38e2 | 28 | #include <media/videobuf2-dma-contig.h> |
5f3cc447 | 29 | |
4403106d | 30 | #include "common.h" |
5f3cc447 | 31 | #include "fimc-core.h" |
c83a1ff0 | 32 | #include "fimc-reg.h" |
4403106d | 33 | #include "media-dev.h" |
5f3cc447 | 34 | |
bb7c276e | 35 | static int fimc_capture_hw_init(struct fimc_dev *fimc) |
9e803a04 | 36 | { |
88fa8311 | 37 | struct fimc_source_info *si = &fimc->vid_cap.source_config; |
9e803a04 | 38 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; |
88fa8311 | 39 | int ret; |
9e803a04 | 40 | unsigned long flags; |
9e803a04 | 41 | |
88fa8311 | 42 | if (ctx == NULL || ctx->s_frame.fmt == NULL) |
9e803a04 SN |
43 | return -EINVAL; |
44 | ||
88fa8311 SN |
45 | if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) { |
46 | ret = fimc_hw_camblk_cfg_writeback(fimc); | |
47 | if (ret < 0) | |
48 | return ret; | |
49 | } | |
9e803a04 SN |
50 | |
51 | spin_lock_irqsave(&fimc->slock, flags); | |
52 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); | |
53 | fimc_set_yuv_order(ctx); | |
54 | ||
88fa8311 SN |
55 | fimc_hw_set_camera_polarity(fimc, si); |
56 | fimc_hw_set_camera_type(fimc, si); | |
57 | fimc_hw_set_camera_source(fimc, si); | |
9e803a04 SN |
58 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); |
59 | ||
60 | ret = fimc_set_scaler_info(ctx); | |
61 | if (!ret) { | |
62 | fimc_hw_set_input_path(ctx); | |
63 | fimc_hw_set_prescaler(ctx); | |
64 | fimc_hw_set_mainscaler(ctx); | |
65 | fimc_hw_set_target_format(ctx); | |
66 | fimc_hw_set_rotation(ctx); | |
9448ab7d | 67 | fimc_hw_set_effect(ctx); |
9e803a04 SN |
68 | fimc_hw_set_output_path(ctx); |
69 | fimc_hw_set_out_dma(ctx); | |
e80cb1fa | 70 | if (fimc->drv_data->alpha_color) |
dafb9c70 | 71 | fimc_hw_set_rgb_alpha(ctx); |
237e0265 | 72 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); |
9e803a04 SN |
73 | } |
74 | spin_unlock_irqrestore(&fimc->slock, flags); | |
75 | return ret; | |
76 | } | |
77 | ||
bb7c276e SN |
78 | /* |
79 | * Reinitialize the driver so it is ready to start the streaming again. | |
80 | * Set fimc->state to indicate stream off and the hardware shut down state. | |
81 | * If not suspending (@suspend is false), return any buffers to videobuf2. | |
82 | * Otherwise put any owned buffers onto the pending buffers queue, so they | |
83 | * can be re-spun when the device is being resumed. Also perform FIMC | |
84 | * software reset and disable streaming on the whole pipeline if required. | |
85 | */ | |
3e4748d8 | 86 | static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend) |
5f3cc447 | 87 | { |
bd323e28 | 88 | struct fimc_vid_cap *cap = &fimc->vid_cap; |
2dab38e2 | 89 | struct fimc_vid_buffer *buf; |
bd323e28 | 90 | unsigned long flags; |
3e4748d8 | 91 | bool streaming; |
5f3cc447 SN |
92 | |
93 | spin_lock_irqsave(&fimc->slock, flags); | |
3e4748d8 | 94 | streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM); |
5f3cc447 | 95 | |
3e4748d8 SN |
96 | fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT | |
97 | 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM); | |
aa333122 SN |
98 | if (suspend) |
99 | fimc->state |= (1 << ST_CAPT_SUSPENDED); | |
100 | else | |
3e4748d8 | 101 | fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED); |
2dab38e2 | 102 | |
3e4748d8 SN |
103 | /* Release unused buffers */ |
104 | while (!suspend && !list_empty(&cap->pending_buf_q)) { | |
0295202c | 105 | buf = fimc_pending_queue_pop(cap); |
2d700715 | 106 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
2dab38e2 | 107 | } |
3e4748d8 | 108 | /* If suspending put unused buffers onto pending queue */ |
2dab38e2 | 109 | while (!list_empty(&cap->active_buf_q)) { |
0295202c | 110 | buf = fimc_active_queue_pop(cap); |
3e4748d8 SN |
111 | if (suspend) |
112 | fimc_pending_queue_add(cap, buf); | |
113 | else | |
2d700715 | 114 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
2dab38e2 | 115 | } |
2c1bb62e SN |
116 | |
117 | fimc_hw_reset(fimc); | |
118 | cap->buf_index = 0; | |
119 | ||
5f3cc447 | 120 | spin_unlock_irqrestore(&fimc->slock, flags); |
4db5e27e | 121 | |
3e4748d8 | 122 | if (streaming) |
403dfbec | 123 | return fimc_pipeline_call(&cap->ve, set_stream, 0); |
4db5e27e SN |
124 | else |
125 | return 0; | |
bd323e28 MS |
126 | } |
127 | ||
3e4748d8 | 128 | static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend) |
bd323e28 | 129 | { |
bd323e28 MS |
130 | unsigned long flags; |
131 | ||
132 | if (!fimc_capture_active(fimc)) | |
133 | return 0; | |
134 | ||
135 | spin_lock_irqsave(&fimc->slock, flags); | |
136 | set_bit(ST_CAPT_SHUT, &fimc->state); | |
137 | fimc_deactivate_capture(fimc); | |
138 | spin_unlock_irqrestore(&fimc->slock, flags); | |
139 | ||
140 | wait_event_timeout(fimc->irq_queue, | |
141 | !test_bit(ST_CAPT_SHUT, &fimc->state), | |
3e4748d8 | 142 | (2*HZ/10)); /* 200 ms */ |
5f3cc447 | 143 | |
3e4748d8 | 144 | return fimc_capture_state_cleanup(fimc, suspend); |
5f3cc447 SN |
145 | } |
146 | ||
237e0265 SN |
147 | /** |
148 | * fimc_capture_config_update - apply the camera interface configuration | |
149 | * | |
150 | * To be called from within the interrupt handler with fimc.slock | |
151 | * spinlock held. It updates the camera pixel crop, rotation and | |
152 | * image flip in H/W. | |
153 | */ | |
97d97422 | 154 | static int fimc_capture_config_update(struct fimc_ctx *ctx) |
237e0265 SN |
155 | { |
156 | struct fimc_dev *fimc = ctx->fimc_dev; | |
157 | int ret; | |
158 | ||
237e0265 | 159 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); |
efb13c3d | 160 | |
237e0265 | 161 | ret = fimc_set_scaler_info(ctx); |
efb13c3d SN |
162 | if (ret) |
163 | return ret; | |
164 | ||
165 | fimc_hw_set_prescaler(ctx); | |
166 | fimc_hw_set_mainscaler(ctx); | |
167 | fimc_hw_set_target_format(ctx); | |
168 | fimc_hw_set_rotation(ctx); | |
9448ab7d | 169 | fimc_hw_set_effect(ctx); |
efb13c3d SN |
170 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); |
171 | fimc_hw_set_out_dma(ctx); | |
e80cb1fa | 172 | if (fimc->drv_data->alpha_color) |
efb13c3d SN |
173 | fimc_hw_set_rgb_alpha(ctx); |
174 | ||
175 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); | |
237e0265 SN |
176 | return ret; |
177 | } | |
bd323e28 | 178 | |
97d97422 SN |
179 | void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf) |
180 | { | |
181 | struct fimc_vid_cap *cap = &fimc->vid_cap; | |
403dfbec SN |
182 | struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe); |
183 | struct v4l2_subdev *csis = p->subdevs[IDX_CSIS]; | |
14783d25 | 184 | struct fimc_frame *f = &cap->ctx->d_frame; |
97d97422 | 185 | struct fimc_vid_buffer *v_buf; |
97d97422 SN |
186 | |
187 | if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) { | |
188 | wake_up(&fimc->irq_queue); | |
189 | goto done; | |
190 | } | |
191 | ||
192 | if (!list_empty(&cap->active_buf_q) && | |
193 | test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) { | |
97d97422 SN |
194 | v_buf = fimc_active_queue_pop(cap); |
195 | ||
d6dd645e | 196 | v_buf->vb.vb2_buf.timestamp = ktime_get_ns(); |
2d700715 | 197 | v_buf->vb.sequence = cap->frame_count++; |
97d97422 | 198 | |
2d700715 | 199 | vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE); |
97d97422 SN |
200 | } |
201 | ||
202 | if (!list_empty(&cap->pending_buf_q)) { | |
203 | ||
204 | v_buf = fimc_pending_queue_pop(cap); | |
205 | fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index); | |
206 | v_buf->index = cap->buf_index; | |
207 | ||
208 | /* Move the buffer to the capture active queue */ | |
209 | fimc_active_queue_add(cap, v_buf); | |
210 | ||
211 | dbg("next frame: %d, done frame: %d", | |
212 | fimc_hw_get_frame_index(fimc), v_buf->index); | |
213 | ||
214 | if (++cap->buf_index >= FIMC_MAX_OUT_BUFS) | |
215 | cap->buf_index = 0; | |
216 | } | |
14783d25 SN |
217 | /* |
218 | * Set up a buffer at MIPI-CSIS if current image format | |
219 | * requires the frame embedded data capture. | |
220 | */ | |
221 | if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) { | |
222 | unsigned int plane = ffs(f->fmt->mdataplanes) - 1; | |
223 | unsigned int size = f->payload[plane]; | |
224 | s32 index = fimc_hw_get_frame_index(fimc); | |
225 | void *vaddr; | |
226 | ||
227 | list_for_each_entry(v_buf, &cap->active_buf_q, list) { | |
228 | if (v_buf->index != index) | |
229 | continue; | |
2d700715 | 230 | vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane); |
14783d25 SN |
231 | v4l2_subdev_call(csis, video, s_rx_buffer, |
232 | vaddr, &size); | |
233 | break; | |
234 | } | |
235 | } | |
97d97422 SN |
236 | |
237 | if (cap->active_buf_cnt == 0) { | |
238 | if (deq_buf) | |
239 | clear_bit(ST_CAPT_RUN, &fimc->state); | |
240 | ||
241 | if (++cap->buf_index >= FIMC_MAX_OUT_BUFS) | |
242 | cap->buf_index = 0; | |
243 | } else { | |
244 | set_bit(ST_CAPT_RUN, &fimc->state); | |
245 | } | |
246 | ||
bb7c276e SN |
247 | if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) |
248 | fimc_capture_config_update(cap->ctx); | |
97d97422 SN |
249 | done: |
250 | if (cap->active_buf_cnt == 1) { | |
251 | fimc_deactivate_capture(fimc); | |
252 | clear_bit(ST_CAPT_STREAM, &fimc->state); | |
253 | } | |
254 | ||
255 | dbg("frame: %d, active_buf_cnt: %d", | |
256 | fimc_hw_get_frame_index(fimc), cap->active_buf_cnt); | |
257 | } | |
258 | ||
259 | ||
bd323e28 | 260 | static int start_streaming(struct vb2_queue *q, unsigned int count) |
2dab38e2 SN |
261 | { |
262 | struct fimc_ctx *ctx = q->drv_priv; | |
263 | struct fimc_dev *fimc = ctx->fimc_dev; | |
9e803a04 | 264 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
bd323e28 | 265 | int min_bufs; |
2dab38e2 SN |
266 | int ret; |
267 | ||
9e803a04 | 268 | vid_cap->frame_count = 0; |
8ec737ff | 269 | |
bb7c276e SN |
270 | ret = fimc_capture_hw_init(fimc); |
271 | if (ret) { | |
272 | fimc_capture_state_cleanup(fimc, false); | |
273 | return ret; | |
274 | } | |
2dab38e2 | 275 | |
2dab38e2 SN |
276 | set_bit(ST_CAPT_PEND, &fimc->state); |
277 | ||
bd323e28 MS |
278 | min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1; |
279 | ||
4db5e27e SN |
280 | if (vid_cap->active_buf_cnt >= min_bufs && |
281 | !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) { | |
bd323e28 MS |
282 | fimc_activate_capture(ctx); |
283 | ||
4db5e27e | 284 | if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state)) |
403dfbec | 285 | return fimc_pipeline_call(&vid_cap->ve, set_stream, 1); |
4db5e27e SN |
286 | } |
287 | ||
2dab38e2 SN |
288 | return 0; |
289 | } | |
290 | ||
e37559b2 | 291 | static void stop_streaming(struct vb2_queue *q) |
2dab38e2 SN |
292 | { |
293 | struct fimc_ctx *ctx = q->drv_priv; | |
294 | struct fimc_dev *fimc = ctx->fimc_dev; | |
2dab38e2 | 295 | |
4ecbf5d1 | 296 | if (!fimc_capture_active(fimc)) |
e37559b2 | 297 | return; |
2dab38e2 | 298 | |
e37559b2 | 299 | fimc_stop_capture(fimc, false); |
2dab38e2 SN |
300 | } |
301 | ||
e9e21083 SN |
302 | int fimc_capture_suspend(struct fimc_dev *fimc) |
303 | { | |
3e4748d8 SN |
304 | bool suspend = fimc_capture_busy(fimc); |
305 | ||
306 | int ret = fimc_stop_capture(fimc, suspend); | |
307 | if (ret) | |
308 | return ret; | |
403dfbec | 309 | return fimc_pipeline_call(&fimc->vid_cap.ve, close); |
e9e21083 SN |
310 | } |
311 | ||
3e4748d8 SN |
312 | static void buffer_queue(struct vb2_buffer *vb); |
313 | ||
e9e21083 SN |
314 | int fimc_capture_resume(struct fimc_dev *fimc) |
315 | { | |
3e4748d8 | 316 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
bc7584b0 | 317 | struct exynos_video_entity *ve = &vid_cap->ve; |
3e4748d8 SN |
318 | struct fimc_vid_buffer *buf; |
319 | int i; | |
320 | ||
321 | if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state)) | |
322 | return 0; | |
323 | ||
324 | INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q); | |
325 | vid_cap->buf_index = 0; | |
403dfbec | 326 | fimc_pipeline_call(ve, open, &ve->vdev.entity, false); |
bb7c276e | 327 | fimc_capture_hw_init(fimc); |
3e4748d8 SN |
328 | |
329 | clear_bit(ST_CAPT_SUSPENDED, &fimc->state); | |
330 | ||
331 | for (i = 0; i < vid_cap->reqbufs_count; i++) { | |
332 | if (list_empty(&vid_cap->pending_buf_q)) | |
333 | break; | |
334 | buf = fimc_pending_queue_pop(vid_cap); | |
2d700715 | 335 | buffer_queue(&buf->vb.vb2_buf); |
3e4748d8 | 336 | } |
e9e21083 | 337 | return 0; |
3e4748d8 | 338 | |
e9e21083 SN |
339 | } |
340 | ||
df9ecb0c | 341 | static int queue_setup(struct vb2_queue *vq, |
fc714e70 | 342 | unsigned int *num_buffers, unsigned int *num_planes, |
36c0f8b3 | 343 | unsigned int sizes[], struct device *alloc_devs[]) |
2dab38e2 SN |
344 | { |
345 | struct fimc_ctx *ctx = vq->drv_priv; | |
63746be5 SN |
346 | struct fimc_frame *frame = &ctx->d_frame; |
347 | struct fimc_fmt *fmt = frame->fmt; | |
df9ecb0c | 348 | unsigned long wh = frame->f_width * frame->f_height; |
ef7af59b | 349 | int i; |
2dab38e2 | 350 | |
63746be5 | 351 | if (fmt == NULL) |
2dab38e2 SN |
352 | return -EINVAL; |
353 | ||
df9ecb0c HV |
354 | if (*num_planes) { |
355 | if (*num_planes != fmt->memplanes) | |
356 | return -EINVAL; | |
2548fee6 | 357 | for (i = 0; i < *num_planes; i++) |
df9ecb0c HV |
358 | if (sizes[i] < (wh * fmt->depth[i]) / 8) |
359 | return -EINVAL; | |
df9ecb0c HV |
360 | return 0; |
361 | } | |
362 | ||
ef7af59b | 363 | *num_planes = fmt->memplanes; |
2dab38e2 | 364 | |
ef7af59b | 365 | for (i = 0; i < fmt->memplanes; i++) { |
63746be5 | 366 | unsigned int size = (wh * fmt->depth[i]) / 8; |
df9ecb0c HV |
367 | |
368 | if (fimc_fmt_is_user_defined(fmt->color)) | |
14783d25 | 369 | sizes[i] = frame->payload[i]; |
63746be5 | 370 | else |
d547ab66 | 371 | sizes[i] = max_t(u32, size, frame->payload[i]); |
ef7af59b | 372 | } |
2dab38e2 | 373 | |
ef7af59b | 374 | return 0; |
2dab38e2 SN |
375 | } |
376 | ||
2dab38e2 SN |
377 | static int buffer_prepare(struct vb2_buffer *vb) |
378 | { | |
379 | struct vb2_queue *vq = vb->vb2_queue; | |
380 | struct fimc_ctx *ctx = vq->drv_priv; | |
2dab38e2 SN |
381 | int i; |
382 | ||
4db5e27e | 383 | if (ctx->d_frame.fmt == NULL) |
ef7af59b | 384 | return -EINVAL; |
2dab38e2 | 385 | |
ef7af59b | 386 | for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) { |
4db5e27e | 387 | unsigned long size = ctx->d_frame.payload[i]; |
2dab38e2 SN |
388 | |
389 | if (vb2_plane_size(vb, i) < size) { | |
bc7584b0 | 390 | v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev, |
30c9939d | 391 | "User buffer too small (%ld < %ld)\n", |
2dab38e2 SN |
392 | vb2_plane_size(vb, i), size); |
393 | return -EINVAL; | |
394 | } | |
2dab38e2 SN |
395 | vb2_set_plane_payload(vb, i, size); |
396 | } | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
401 | static void buffer_queue(struct vb2_buffer *vb) | |
402 | { | |
2d700715 | 403 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
2dab38e2 | 404 | struct fimc_vid_buffer *buf |
2d700715 | 405 | = container_of(vbuf, struct fimc_vid_buffer, vb); |
4db5e27e SN |
406 | struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); |
407 | struct fimc_dev *fimc = ctx->fimc_dev; | |
2dab38e2 | 408 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
bc7584b0 | 409 | struct exynos_video_entity *ve = &vid_cap->ve; |
2dab38e2 | 410 | unsigned long flags; |
8ec737ff | 411 | int min_bufs; |
2dab38e2 SN |
412 | |
413 | spin_lock_irqsave(&fimc->slock, flags); | |
2d700715 | 414 | fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr); |
8ec737ff | 415 | |
3e4748d8 SN |
416 | if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) && |
417 | !test_bit(ST_CAPT_STREAM, &fimc->state) && | |
418 | vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) { | |
8ec737ff SK |
419 | /* Setup the buffer directly for processing. */ |
420 | int buf_id = (vid_cap->reqbufs_count == 1) ? -1 : | |
421 | vid_cap->buf_index; | |
2dab38e2 | 422 | |
8ec737ff SK |
423 | fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id); |
424 | buf->index = vid_cap->buf_index; | |
0295202c | 425 | fimc_active_queue_add(vid_cap, buf); |
2dab38e2 | 426 | |
8ec737ff SK |
427 | if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS) |
428 | vid_cap->buf_index = 0; | |
429 | } else { | |
430 | fimc_pending_queue_add(vid_cap, buf); | |
2dab38e2 | 431 | } |
8ec737ff SK |
432 | |
433 | min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1; | |
434 | ||
4db5e27e | 435 | |
bd323e28 MS |
436 | if (vb2_is_streaming(&vid_cap->vbq) && |
437 | vid_cap->active_buf_cnt >= min_bufs && | |
4db5e27e | 438 | !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) { |
76323e50 AH |
439 | int ret; |
440 | ||
8ec737ff | 441 | fimc_activate_capture(ctx); |
4db5e27e | 442 | spin_unlock_irqrestore(&fimc->slock, flags); |
8ec737ff | 443 | |
76323e50 AH |
444 | if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state)) |
445 | return; | |
446 | ||
403dfbec | 447 | ret = fimc_pipeline_call(ve, set_stream, 1); |
76323e50 | 448 | if (ret < 0) |
bc7584b0 | 449 | v4l2_err(&ve->vdev, "stream on failed: %d\n", ret); |
4db5e27e SN |
450 | return; |
451 | } | |
2dab38e2 SN |
452 | spin_unlock_irqrestore(&fimc->slock, flags); |
453 | } | |
454 | ||
2dab38e2 SN |
455 | static struct vb2_ops fimc_capture_qops = { |
456 | .queue_setup = queue_setup, | |
457 | .buf_prepare = buffer_prepare, | |
458 | .buf_queue = buffer_queue, | |
c444914a SN |
459 | .wait_prepare = vb2_ops_wait_prepare, |
460 | .wait_finish = vb2_ops_wait_finish, | |
2dab38e2 SN |
461 | .start_streaming = start_streaming, |
462 | .stop_streaming = stop_streaming, | |
463 | }; | |
464 | ||
237e0265 SN |
465 | static int fimc_capture_set_default_format(struct fimc_dev *fimc); |
466 | ||
5f3cc447 SN |
467 | static int fimc_capture_open(struct file *file) |
468 | { | |
469 | struct fimc_dev *fimc = video_drvdata(file); | |
4403106d SN |
470 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
471 | struct exynos_video_entity *ve = &vc->ve; | |
c2d430af | 472 | int ret = -EBUSY; |
5f3cc447 SN |
473 | |
474 | dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state); | |
475 | ||
740ad921 | 476 | mutex_lock(&fimc->lock); |
c2d430af | 477 | |
5f3cc447 | 478 | if (fimc_m2m_active(fimc)) |
c2d430af | 479 | goto unlock; |
5f3cc447 | 480 | |
3e4748d8 | 481 | set_bit(ST_CAPT_BUSY, &fimc->state); |
e3fc82e8 SN |
482 | ret = pm_runtime_get_sync(&fimc->pdev->dev); |
483 | if (ret < 0) | |
c2d430af | 484 | goto unlock; |
4db5e27e | 485 | |
e3fc82e8 | 486 | ret = v4l2_fh_open(file); |
c2d430af | 487 | if (ret) { |
4bd728a1 | 488 | pm_runtime_put_sync(&fimc->pdev->dev); |
c2d430af SN |
489 | goto unlock; |
490 | } | |
e3fc82e8 | 491 | |
c444914a | 492 | if (v4l2_fh_is_singular_file(file)) { |
42625fdf SN |
493 | fimc_md_graph_lock(ve); |
494 | ||
403dfbec SN |
495 | ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true); |
496 | ||
4403106d SN |
497 | if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) { |
498 | /* | |
499 | * Recreate controls of the the video node to drop | |
500 | * any controls inherited from the sensor subdev. | |
501 | */ | |
502 | fimc_ctrls_delete(vc->ctx); | |
503 | ||
504 | ret = fimc_ctrls_create(vc->ctx); | |
505 | if (ret == 0) | |
506 | vc->inh_sensor_ctrls = false; | |
507 | } | |
42625fdf SN |
508 | if (ret == 0) |
509 | ve->vdev.entity.use_count++; | |
510 | ||
511 | fimc_md_graph_unlock(ve); | |
e3fc82e8 | 512 | |
7536b424 SN |
513 | if (ret == 0) |
514 | ret = fimc_capture_set_default_format(fimc); | |
515 | ||
c2d430af SN |
516 | if (ret < 0) { |
517 | clear_bit(ST_CAPT_BUSY, &fimc->state); | |
518 | pm_runtime_put_sync(&fimc->pdev->dev); | |
c2d430af SN |
519 | v4l2_fh_release(file); |
520 | } | |
521 | } | |
522 | unlock: | |
523 | mutex_unlock(&fimc->lock); | |
131b6c61 | 524 | return ret; |
5f3cc447 SN |
525 | } |
526 | ||
c444914a | 527 | static int fimc_capture_release(struct file *file) |
5f3cc447 SN |
528 | { |
529 | struct fimc_dev *fimc = video_drvdata(file); | |
9ea89e2b | 530 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
42625fdf | 531 | bool close = v4l2_fh_is_singular_file(file); |
c2d430af | 532 | int ret; |
5f3cc447 | 533 | |
5f3cc447 SN |
534 | dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state); |
535 | ||
ba6b372c | 536 | mutex_lock(&fimc->lock); |
c2d430af | 537 | |
42625fdf SN |
538 | if (close && vc->streaming) { |
539 | media_entity_pipeline_stop(&vc->ve.vdev.entity); | |
540 | vc->streaming = false; | |
541 | } | |
542 | ||
1380f575 | 543 | ret = _vb2_fop_release(file, NULL); |
42625fdf SN |
544 | |
545 | if (close) { | |
3e4748d8 | 546 | clear_bit(ST_CAPT_BUSY, &fimc->state); |
403dfbec | 547 | fimc_pipeline_call(&vc->ve, close); |
3e4748d8 | 548 | clear_bit(ST_CAPT_SUSPENDED, &fimc->state); |
42625fdf SN |
549 | |
550 | fimc_md_graph_lock(&vc->ve); | |
551 | vc->ve.vdev.entity.use_count--; | |
552 | fimc_md_graph_unlock(&vc->ve); | |
5f3cc447 SN |
553 | } |
554 | ||
4bd728a1 | 555 | pm_runtime_put_sync(&fimc->pdev->dev); |
c2d430af SN |
556 | mutex_unlock(&fimc->lock); |
557 | ||
558 | return ret; | |
5f3cc447 SN |
559 | } |
560 | ||
5f3cc447 SN |
561 | static const struct v4l2_file_operations fimc_capture_fops = { |
562 | .owner = THIS_MODULE, | |
563 | .open = fimc_capture_open, | |
c444914a SN |
564 | .release = fimc_capture_release, |
565 | .poll = vb2_fop_poll, | |
5f3cc447 | 566 | .unlocked_ioctl = video_ioctl2, |
c444914a | 567 | .mmap = vb2_fop_mmap, |
5f3cc447 SN |
568 | }; |
569 | ||
237e0265 SN |
570 | /* |
571 | * Format and crop negotiation helpers | |
572 | */ | |
573 | ||
574 | static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx, | |
575 | u32 *width, u32 *height, | |
576 | u32 *code, u32 *fourcc, int pad) | |
577 | { | |
578 | bool rotation = ctx->rotation == 90 || ctx->rotation == 270; | |
579 | struct fimc_dev *fimc = ctx->fimc_dev; | |
405f230c SN |
580 | const struct fimc_variant *var = fimc->variant; |
581 | const struct fimc_pix_limit *pl = var->pix_limit; | |
237e0265 SN |
582 | struct fimc_frame *dst = &ctx->d_frame; |
583 | u32 depth, min_w, max_w, min_h, align_h = 3; | |
584 | u32 mask = FMT_FLAGS_CAM; | |
585 | struct fimc_fmt *ffmt; | |
586 | ||
14783d25 | 587 | /* Conversion from/to JPEG or User Defined format is not supported */ |
237e0265 | 588 | if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE && |
14783d25 SN |
589 | fimc_fmt_is_user_defined(ctx->s_frame.fmt->color)) |
590 | *code = ctx->s_frame.fmt->mbus_code; | |
237e0265 | 591 | |
88fa8311 | 592 | if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE) |
237e0265 SN |
593 | mask |= FMT_FLAGS_M2M; |
594 | ||
88fa8311 SN |
595 | if (pad == FIMC_SD_PAD_SINK_FIFO) |
596 | mask = FMT_FLAGS_WRITEBACK; | |
597 | ||
237e0265 SN |
598 | ffmt = fimc_find_format(fourcc, code, mask, 0); |
599 | if (WARN_ON(!ffmt)) | |
600 | return NULL; | |
88fa8311 | 601 | |
237e0265 SN |
602 | if (code) |
603 | *code = ffmt->mbus_code; | |
604 | if (fourcc) | |
605 | *fourcc = ffmt->fourcc; | |
606 | ||
88fa8311 | 607 | if (pad != FIMC_SD_PAD_SOURCE) { |
14783d25 | 608 | max_w = fimc_fmt_is_user_defined(ffmt->color) ? |
237e0265 SN |
609 | pl->scaler_dis_w : pl->scaler_en_w; |
610 | /* Apply the camera input interface pixel constraints */ | |
611 | v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4, | |
612 | height, max_t(u32, *height, 32), | |
613 | FIMC_CAMIF_MAX_HEIGHT, | |
14783d25 SN |
614 | fimc_fmt_is_user_defined(ffmt->color) ? |
615 | 3 : 1, | |
237e0265 SN |
616 | 0); |
617 | return ffmt; | |
618 | } | |
619 | /* Can't scale or crop in transparent (JPEG) transfer mode */ | |
14783d25 | 620 | if (fimc_fmt_is_user_defined(ffmt->color)) { |
237e0265 SN |
621 | *width = ctx->s_frame.f_width; |
622 | *height = ctx->s_frame.f_height; | |
623 | return ffmt; | |
624 | } | |
625 | /* Apply the scaler and the output DMA constraints */ | |
626 | max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; | |
fed07f84 SN |
627 | if (ctx->state & FIMC_COMPOSE) { |
628 | min_w = dst->offs_h + dst->width; | |
629 | min_h = dst->offs_v + dst->height; | |
630 | } else { | |
631 | min_w = var->min_out_pixsize; | |
632 | min_h = var->min_out_pixsize; | |
633 | } | |
9c63afcb | 634 | if (var->min_vsize_align == 1 && !rotation) |
237e0265 SN |
635 | align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; |
636 | ||
637 | depth = fimc_get_format_depth(ffmt); | |
638 | v4l_bound_align_image(width, min_w, max_w, | |
639 | ffs(var->min_out_pixsize) - 1, | |
640 | height, min_h, FIMC_CAMIF_MAX_HEIGHT, | |
641 | align_h, | |
642 | 64/(ALIGN(depth, 8))); | |
643 | ||
644 | dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d", | |
645 | pad, code ? *code : 0, *width, *height, | |
646 | dst->f_width, dst->f_height); | |
647 | ||
648 | return ffmt; | |
649 | } | |
650 | ||
fed07f84 SN |
651 | static void fimc_capture_try_selection(struct fimc_ctx *ctx, |
652 | struct v4l2_rect *r, | |
653 | int target) | |
237e0265 SN |
654 | { |
655 | bool rotate = ctx->rotation == 90 || ctx->rotation == 270; | |
656 | struct fimc_dev *fimc = ctx->fimc_dev; | |
405f230c SN |
657 | const struct fimc_variant *var = fimc->variant; |
658 | const struct fimc_pix_limit *pl = var->pix_limit; | |
237e0265 SN |
659 | struct fimc_frame *sink = &ctx->s_frame; |
660 | u32 max_w, max_h, min_w = 0, min_h = 0, min_sz; | |
661 | u32 align_sz = 0, align_h = 4; | |
662 | u32 max_sc_h, max_sc_v; | |
663 | ||
664 | /* In JPEG transparent transfer mode cropping is not supported */ | |
14783d25 | 665 | if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) { |
237e0265 SN |
666 | r->width = sink->f_width; |
667 | r->height = sink->f_height; | |
668 | r->left = r->top = 0; | |
669 | return; | |
670 | } | |
c1334823 | 671 | if (target == V4L2_SEL_TGT_COMPOSE) { |
237e0265 SN |
672 | if (ctx->rotation != 90 && ctx->rotation != 270) |
673 | align_h = 1; | |
674 | max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3)); | |
675 | max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1)); | |
676 | min_sz = var->min_out_pixsize; | |
677 | } else { | |
678 | u32 depth = fimc_get_format_depth(sink->fmt); | |
679 | align_sz = 64/ALIGN(depth, 8); | |
680 | min_sz = var->min_inp_pixsize; | |
681 | min_w = min_h = min_sz; | |
682 | max_sc_h = max_sc_v = 1; | |
683 | } | |
684 | /* | |
fed07f84 | 685 | * For the compose rectangle the following constraints must be met: |
237e0265 SN |
686 | * - it must fit in the sink pad format rectangle (f_width/f_height); |
687 | * - maximum downscaling ratio is 64; | |
688 | * - maximum crop size depends if the rotator is used or not; | |
689 | * - the sink pad format width/height must be 4 multiple of the | |
690 | * prescaler ratios determined by sink pad size and source pad crop, | |
691 | * the prescaler ratio is returned by fimc_get_scaler_factor(). | |
692 | */ | |
693 | max_w = min_t(u32, | |
694 | rotate ? pl->out_rot_en_w : pl->out_rot_dis_w, | |
695 | rotate ? sink->f_height : sink->f_width); | |
696 | max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height); | |
fed07f84 | 697 | |
c1334823 | 698 | if (target == V4L2_SEL_TGT_COMPOSE) { |
237e0265 SN |
699 | min_w = min_t(u32, max_w, sink->f_width / max_sc_h); |
700 | min_h = min_t(u32, max_h, sink->f_height / max_sc_v); | |
701 | if (rotate) { | |
702 | swap(max_sc_h, max_sc_v); | |
703 | swap(min_w, min_h); | |
704 | } | |
705 | } | |
706 | v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1, | |
707 | &r->height, min_h, max_h, align_h, | |
708 | align_sz); | |
fed07f84 | 709 | /* Adjust left/top if crop/compose rectangle is out of bounds */ |
237e0265 SN |
710 | r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width); |
711 | r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height); | |
712 | r->left = round_down(r->left, var->hor_offs_align); | |
713 | ||
fed07f84 SN |
714 | dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d", |
715 | target, r->left, r->top, r->width, r->height, | |
237e0265 SN |
716 | sink->f_width, sink->f_height); |
717 | } | |
718 | ||
719 | /* | |
720 | * The video node ioctl operations | |
721 | */ | |
aceb59ed | 722 | static int fimc_cap_querycap(struct file *file, void *priv, |
5f3cc447 SN |
723 | struct v4l2_capability *cap) |
724 | { | |
e578588e | 725 | struct fimc_dev *fimc = video_drvdata(file); |
5f3cc447 | 726 | |
aceb59ed SN |
727 | __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING | |
728 | V4L2_CAP_VIDEO_CAPTURE_MPLANE); | |
5f3cc447 SN |
729 | return 0; |
730 | } | |
731 | ||
cf52df8a SN |
732 | static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv, |
733 | struct v4l2_fmtdesc *f) | |
734 | { | |
735 | struct fimc_fmt *fmt; | |
736 | ||
737 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M, | |
738 | f->index); | |
739 | if (!fmt) | |
740 | return -EINVAL; | |
741 | strncpy(f->description, fmt->name, sizeof(f->description) - 1); | |
742 | f->pixelformat = fmt->fourcc; | |
27ffaeb0 | 743 | if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8) |
cf52df8a SN |
744 | f->flags |= V4L2_FMT_FLAG_COMPRESSED; |
745 | return 0; | |
746 | } | |
747 | ||
47800bc4 SN |
748 | static struct media_entity *fimc_pipeline_get_head(struct media_entity *me) |
749 | { | |
750 | struct media_pad *pad = &me->pads[0]; | |
751 | ||
752 | while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) { | |
1bddf1b3 | 753 | pad = media_entity_remote_pad(pad); |
47800bc4 SN |
754 | if (!pad) |
755 | break; | |
756 | me = pad->entity; | |
757 | pad = &me->pads[0]; | |
758 | } | |
759 | ||
760 | return me; | |
761 | } | |
762 | ||
237e0265 SN |
763 | /** |
764 | * fimc_pipeline_try_format - negotiate and/or set formats at pipeline | |
765 | * elements | |
766 | * @ctx: FIMC capture context | |
767 | * @tfmt: media bus format to try/set on subdevs | |
768 | * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output) | |
769 | * @set: true to set format on subdevs, false to try only | |
770 | */ | |
771 | static int fimc_pipeline_try_format(struct fimc_ctx *ctx, | |
772 | struct v4l2_mbus_framefmt *tfmt, | |
773 | struct fimc_fmt **fmt_id, | |
774 | bool set) | |
775 | { | |
776 | struct fimc_dev *fimc = ctx->fimc_dev; | |
403dfbec SN |
777 | struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe); |
778 | struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR]; | |
237e0265 SN |
779 | struct v4l2_subdev_format sfmt; |
780 | struct v4l2_mbus_framefmt *mf = &sfmt.format; | |
47800bc4 SN |
781 | struct media_entity *me; |
782 | struct fimc_fmt *ffmt; | |
783 | struct media_pad *pad; | |
784 | int ret, i = 1; | |
785 | u32 fcc; | |
237e0265 SN |
786 | |
787 | if (WARN_ON(!sd || !tfmt)) | |
788 | return -EINVAL; | |
5f3cc447 | 789 | |
237e0265 SN |
790 | memset(&sfmt, 0, sizeof(sfmt)); |
791 | sfmt.format = *tfmt; | |
237e0265 | 792 | sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY; |
47800bc4 SN |
793 | |
794 | me = fimc_pipeline_get_head(&sd->entity); | |
795 | ||
237e0265 SN |
796 | while (1) { |
797 | ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL, | |
798 | FMT_FLAGS_CAM, i++); | |
799 | if (ffmt == NULL) { | |
800 | /* | |
801 | * Notify user-space if common pixel code for | |
802 | * host and sensor does not exist. | |
803 | */ | |
804 | return -EINVAL; | |
805 | } | |
806 | mf->code = tfmt->code = ffmt->mbus_code; | |
5f3cc447 | 807 | |
47800bc4 SN |
808 | /* set format on all pipeline subdevs */ |
809 | while (me != &fimc->vid_cap.subdev.entity) { | |
810 | sd = media_entity_to_v4l2_subdev(me); | |
811 | ||
812 | sfmt.pad = 0; | |
813 | ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt); | |
814 | if (ret) | |
815 | return ret; | |
816 | ||
817 | if (me->pads[0].flags & MEDIA_PAD_FL_SINK) { | |
818 | sfmt.pad = me->num_pads - 1; | |
819 | mf->code = tfmt->code; | |
820 | ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, | |
821 | &sfmt); | |
822 | if (ret) | |
823 | return ret; | |
824 | } | |
825 | ||
1bddf1b3 | 826 | pad = media_entity_remote_pad(&me->pads[sfmt.pad]); |
47800bc4 SN |
827 | if (!pad) |
828 | return -EINVAL; | |
829 | me = pad->entity; | |
237e0265 | 830 | } |
5f3cc447 | 831 | |
47800bc4 SN |
832 | if (mf->code != tfmt->code) |
833 | continue; | |
834 | ||
835 | fcc = ffmt->fourcc; | |
836 | tfmt->width = mf->width; | |
837 | tfmt->height = mf->height; | |
838 | ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height, | |
88fa8311 | 839 | NULL, &fcc, FIMC_SD_PAD_SINK_CAM); |
47800bc4 SN |
840 | ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height, |
841 | NULL, &fcc, FIMC_SD_PAD_SOURCE); | |
842 | if (ffmt && ffmt->mbus_code) | |
843 | mf->code = ffmt->mbus_code; | |
844 | if (mf->width != tfmt->width || mf->height != tfmt->height) | |
845 | continue; | |
846 | tfmt->code = mf->code; | |
847 | break; | |
237e0265 | 848 | } |
5f3cc447 | 849 | |
237e0265 SN |
850 | if (fmt_id && ffmt) |
851 | *fmt_id = ffmt; | |
852 | *tfmt = *mf; | |
5f3cc447 | 853 | |
237e0265 SN |
854 | return 0; |
855 | } | |
5f3cc447 | 856 | |
14783d25 SN |
857 | /** |
858 | * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters | |
859 | * @sensor: pointer to the sensor subdev | |
860 | * @plane_fmt: provides plane sizes corresponding to the frame layout entries | |
861 | * @try: true to set the frame parameters, false to query only | |
862 | * | |
863 | * This function is used by this driver only for compressed/blob data formats. | |
864 | */ | |
865 | static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor, | |
866 | struct v4l2_plane_pix_format *plane_fmt, | |
867 | unsigned int num_planes, bool try) | |
868 | { | |
869 | struct v4l2_mbus_frame_desc fd; | |
870 | int i, ret; | |
1c9f5bd7 | 871 | int pad; |
14783d25 SN |
872 | |
873 | for (i = 0; i < num_planes; i++) | |
874 | fd.entry[i].length = plane_fmt[i].sizeimage; | |
875 | ||
1c9f5bd7 | 876 | pad = sensor->entity.num_pads - 1; |
14783d25 | 877 | if (try) |
1c9f5bd7 | 878 | ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd); |
14783d25 | 879 | else |
1c9f5bd7 | 880 | ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd); |
14783d25 SN |
881 | |
882 | if (ret < 0) | |
883 | return ret; | |
884 | ||
885 | if (num_planes != fd.num_entries) | |
886 | return -EINVAL; | |
887 | ||
888 | for (i = 0; i < num_planes; i++) | |
889 | plane_fmt[i].sizeimage = fd.entry[i].length; | |
890 | ||
891 | if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) { | |
892 | v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n", | |
893 | fd.entry[0].length); | |
894 | ||
895 | return -EINVAL; | |
896 | } | |
897 | ||
898 | return 0; | |
899 | } | |
900 | ||
e578588e SN |
901 | static int fimc_cap_g_fmt_mplane(struct file *file, void *fh, |
902 | struct v4l2_format *f) | |
903 | { | |
904 | struct fimc_dev *fimc = video_drvdata(file); | |
e578588e | 905 | |
fa8880be SN |
906 | __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f); |
907 | return 0; | |
e578588e SN |
908 | } |
909 | ||
7536b424 SN |
910 | /* |
911 | * Try or set format on the fimc.X.capture video node and additionally | |
912 | * on the whole pipeline if @try is false. | |
913 | * Locking: the caller must _not_ hold the graph mutex. | |
914 | */ | |
915 | static int __video_try_or_set_format(struct fimc_dev *fimc, | |
916 | struct v4l2_format *f, bool try, | |
917 | struct fimc_fmt **inp_fmt, | |
918 | struct fimc_fmt **out_fmt) | |
e578588e | 919 | { |
237e0265 | 920 | struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; |
7536b424 SN |
921 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
922 | struct exynos_video_entity *ve = &vc->ve; | |
923 | struct fimc_ctx *ctx = vc->ctx; | |
924 | unsigned int width = 0, height = 0; | |
740ad921 SN |
925 | int ret = 0; |
926 | ||
7536b424 | 927 | /* Pre-configure format at the camera input interface, for JPEG only */ |
14783d25 | 928 | if (fimc_jpeg_fourcc(pix->pixelformat)) { |
237e0265 SN |
929 | fimc_capture_try_format(ctx, &pix->width, &pix->height, |
930 | NULL, &pix->pixelformat, | |
88fa8311 | 931 | FIMC_SD_PAD_SINK_CAM); |
7536b424 SN |
932 | if (try) { |
933 | width = pix->width; | |
934 | height = pix->height; | |
935 | } else { | |
936 | ctx->s_frame.f_width = pix->width; | |
937 | ctx->s_frame.f_height = pix->height; | |
938 | } | |
237e0265 | 939 | } |
7536b424 SN |
940 | |
941 | /* Try the format at the scaler and the DMA output */ | |
942 | *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height, | |
943 | NULL, &pix->pixelformat, | |
944 | FIMC_SD_PAD_SOURCE); | |
945 | if (*out_fmt == NULL) | |
42625fdf | 946 | return -EINVAL; |
237e0265 | 947 | |
7536b424 SN |
948 | /* Restore image width/height for JPEG (no resizing supported). */ |
949 | if (try && fimc_jpeg_fourcc(pix->pixelformat)) { | |
950 | pix->width = width; | |
951 | pix->height = height; | |
952 | } | |
953 | ||
954 | /* Try to match format at the host and the sensor */ | |
955 | if (!vc->user_subdev_api) { | |
956 | struct v4l2_mbus_framefmt mbus_fmt; | |
957 | struct v4l2_mbus_framefmt *mf; | |
958 | ||
959 | mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt; | |
960 | ||
961 | mf->code = (*out_fmt)->mbus_code; | |
962 | mf->width = pix->width; | |
963 | mf->height = pix->height; | |
42625fdf SN |
964 | |
965 | fimc_md_graph_lock(ve); | |
7536b424 | 966 | ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try); |
42625fdf SN |
967 | fimc_md_graph_unlock(ve); |
968 | ||
7536b424 SN |
969 | if (ret < 0) |
970 | return ret; | |
971 | ||
972 | pix->width = mf->width; | |
973 | pix->height = mf->height; | |
237e0265 | 974 | } |
e578588e | 975 | |
7536b424 SN |
976 | fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix); |
977 | ||
978 | if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) { | |
979 | struct v4l2_subdev *sensor; | |
14783d25 | 980 | |
403dfbec SN |
981 | fimc_md_graph_lock(ve); |
982 | ||
983 | sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR); | |
984 | if (sensor) | |
985 | fimc_get_sensor_frame_desc(sensor, pix->plane_fmt, | |
7536b424 | 986 | (*out_fmt)->memplanes, try); |
403dfbec SN |
987 | else |
988 | ret = -EPIPE; | |
989 | ||
990 | fimc_md_graph_unlock(ve); | |
991 | } | |
14783d25 | 992 | |
740ad921 | 993 | return ret; |
e578588e SN |
994 | } |
995 | ||
7536b424 SN |
996 | static int fimc_cap_try_fmt_mplane(struct file *file, void *fh, |
997 | struct v4l2_format *f) | |
998 | { | |
999 | struct fimc_dev *fimc = video_drvdata(file); | |
1000 | struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL; | |
1001 | ||
1002 | return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt); | |
1003 | } | |
1004 | ||
14783d25 SN |
1005 | static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx, |
1006 | enum fimc_color_fmt color) | |
ee7160e5 | 1007 | { |
14783d25 SN |
1008 | bool jpeg = fimc_fmt_is_user_defined(color); |
1009 | ||
ee7160e5 SN |
1010 | ctx->scaler.enabled = !jpeg; |
1011 | fimc_ctrls_activate(ctx, !jpeg); | |
1012 | ||
1013 | if (jpeg) | |
1014 | set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state); | |
1015 | else | |
1016 | clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state); | |
1017 | } | |
1018 | ||
740ad921 SN |
1019 | static int __fimc_capture_set_format(struct fimc_dev *fimc, |
1020 | struct v4l2_format *f) | |
5f3cc447 | 1021 | { |
7536b424 SN |
1022 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
1023 | struct fimc_ctx *ctx = vc->ctx; | |
237e0265 | 1024 | struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; |
237e0265 | 1025 | struct fimc_frame *ff = &ctx->d_frame; |
7536b424 | 1026 | struct fimc_fmt *inp_fmt = NULL; |
237e0265 | 1027 | int ret, i; |
5f3cc447 | 1028 | |
237e0265 | 1029 | if (vb2_is_busy(&fimc->vid_cap.vbq)) |
ef7af59b | 1030 | return -EBUSY; |
5f3cc447 | 1031 | |
7536b424 SN |
1032 | ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt); |
1033 | if (ret < 0) | |
1034 | return ret; | |
dafb9c70 SN |
1035 | |
1036 | /* Update RGB Alpha control state and value range */ | |
1037 | fimc_alpha_ctrl_update(ctx); | |
1038 | ||
fa8880be SN |
1039 | for (i = 0; i < ff->fmt->memplanes; i++) { |
1040 | ff->bytesperline[i] = pix->plane_fmt[i].bytesperline; | |
d547ab66 | 1041 | ff->payload[i] = pix->plane_fmt[i].sizeimage; |
fa8880be | 1042 | } |
237e0265 SN |
1043 | |
1044 | set_frame_bounds(ff, pix->width, pix->height); | |
1045 | /* Reset the composition rectangle if not yet configured */ | |
fed07f84 | 1046 | if (!(ctx->state & FIMC_COMPOSE)) |
237e0265 SN |
1047 | set_frame_crop(ff, 0, 0, pix->width, pix->height); |
1048 | ||
14783d25 | 1049 | fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color); |
ee7160e5 | 1050 | |
237e0265 | 1051 | /* Reset cropping and set format at the camera interface input */ |
7536b424 SN |
1052 | if (!vc->user_subdev_api) { |
1053 | ctx->s_frame.fmt = inp_fmt; | |
237e0265 SN |
1054 | set_frame_bounds(&ctx->s_frame, pix->width, pix->height); |
1055 | set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height); | |
045030fa | 1056 | } |
ef7af59b | 1057 | |
237e0265 SN |
1058 | return ret; |
1059 | } | |
5f3cc447 | 1060 | |
237e0265 SN |
1061 | static int fimc_cap_s_fmt_mplane(struct file *file, void *priv, |
1062 | struct v4l2_format *f) | |
1063 | { | |
1064 | struct fimc_dev *fimc = video_drvdata(file); | |
740ad921 | 1065 | |
7536b424 | 1066 | return __fimc_capture_set_format(fimc, f); |
5f3cc447 SN |
1067 | } |
1068 | ||
1069 | static int fimc_cap_enum_input(struct file *file, void *priv, | |
3e002182 | 1070 | struct v4l2_input *i) |
5f3cc447 | 1071 | { |
e578588e | 1072 | struct fimc_dev *fimc = video_drvdata(file); |
403dfbec SN |
1073 | struct exynos_video_entity *ve = &fimc->vid_cap.ve; |
1074 | struct v4l2_subdev *sd; | |
5f3cc447 | 1075 | |
3e002182 | 1076 | if (i->index != 0) |
5f3cc447 SN |
1077 | return -EINVAL; |
1078 | ||
5f3cc447 | 1079 | i->type = V4L2_INPUT_TYPE_CAMERA; |
403dfbec SN |
1080 | fimc_md_graph_lock(ve); |
1081 | sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR); | |
1082 | fimc_md_graph_unlock(ve); | |
1083 | ||
4db5e27e SN |
1084 | if (sd) |
1085 | strlcpy(i->name, sd->name, sizeof(i->name)); | |
403dfbec | 1086 | |
5f3cc447 SN |
1087 | return 0; |
1088 | } | |
1089 | ||
3e002182 | 1090 | static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i) |
5f3cc447 | 1091 | { |
3e002182 | 1092 | return i == 0 ? i : -EINVAL; |
5f3cc447 SN |
1093 | } |
1094 | ||
3e002182 | 1095 | static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i) |
5f3cc447 | 1096 | { |
3e002182 | 1097 | *i = 0; |
5f3cc447 SN |
1098 | return 0; |
1099 | } | |
1100 | ||
237e0265 SN |
1101 | /** |
1102 | * fimc_pipeline_validate - check for formats inconsistencies | |
1103 | * between source and sink pad of each link | |
1104 | * | |
1105 | * Return 0 if all formats match or -EPIPE otherwise. | |
1106 | */ | |
1107 | static int fimc_pipeline_validate(struct fimc_dev *fimc) | |
1108 | { | |
1109 | struct v4l2_subdev_format sink_fmt, src_fmt; | |
88fa8311 SN |
1110 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
1111 | struct v4l2_subdev *sd = &vc->subdev; | |
403dfbec | 1112 | struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe); |
88fa8311 SN |
1113 | struct media_pad *sink_pad, *src_pad; |
1114 | int i, ret; | |
237e0265 SN |
1115 | |
1116 | while (1) { | |
88fa8311 SN |
1117 | /* |
1118 | * Find current entity sink pad and any remote sink pad linked | |
1119 | * to it. We stop if there is no sink pad in current entity or | |
1120 | * it is not linked to any other remote entity. | |
1121 | */ | |
1122 | src_pad = NULL; | |
1123 | ||
1124 | for (i = 0; i < sd->entity.num_pads; i++) { | |
1125 | struct media_pad *p = &sd->entity.pads[i]; | |
1126 | ||
1127 | if (p->flags & MEDIA_PAD_FL_SINK) { | |
1128 | sink_pad = p; | |
1bddf1b3 | 1129 | src_pad = media_entity_remote_pad(sink_pad); |
88fa8311 SN |
1130 | if (src_pad) |
1131 | break; | |
1132 | } | |
1133 | } | |
1134 | ||
3efdf62c | 1135 | if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity)) |
237e0265 | 1136 | break; |
88fa8311 | 1137 | |
237e0265 | 1138 | /* Don't call FIMC subdev operation to avoid nested locking */ |
88fa8311 SN |
1139 | if (sd == &vc->subdev) { |
1140 | struct fimc_frame *ff = &vc->ctx->s_frame; | |
237e0265 SN |
1141 | sink_fmt.format.width = ff->f_width; |
1142 | sink_fmt.format.height = ff->f_height; | |
1143 | sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0; | |
1144 | } else { | |
88fa8311 | 1145 | sink_fmt.pad = sink_pad->index; |
237e0265 SN |
1146 | sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; |
1147 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt); | |
1148 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
1149 | return -EPIPE; | |
1150 | } | |
237e0265 | 1151 | |
88fa8311 SN |
1152 | /* Retrieve format at the source pad */ |
1153 | sd = media_entity_to_v4l2_subdev(src_pad->entity); | |
1154 | src_fmt.pad = src_pad->index; | |
237e0265 SN |
1155 | src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; |
1156 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); | |
1157 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
1158 | return -EPIPE; | |
1159 | ||
1160 | if (src_fmt.format.width != sink_fmt.format.width || | |
1161 | src_fmt.format.height != sink_fmt.format.height || | |
1162 | src_fmt.format.code != sink_fmt.format.code) | |
1163 | return -EPIPE; | |
14783d25 | 1164 | |
403dfbec | 1165 | if (sd == p->subdevs[IDX_SENSOR] && |
14783d25 SN |
1166 | fimc_user_defined_mbus_fmt(src_fmt.format.code)) { |
1167 | struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES]; | |
88fa8311 | 1168 | struct fimc_frame *frame = &vc->ctx->d_frame; |
14783d25 SN |
1169 | unsigned int i; |
1170 | ||
1171 | ret = fimc_get_sensor_frame_desc(sd, plane_fmt, | |
1172 | frame->fmt->memplanes, | |
1173 | false); | |
1174 | if (ret < 0) | |
1175 | return -EPIPE; | |
1176 | ||
1177 | for (i = 0; i < frame->fmt->memplanes; i++) | |
1178 | if (frame->payload[i] < plane_fmt[i].sizeimage) | |
1179 | return -EPIPE; | |
1180 | } | |
237e0265 SN |
1181 | } |
1182 | return 0; | |
1183 | } | |
1184 | ||
5f3cc447 | 1185 | static int fimc_cap_streamon(struct file *file, void *priv, |
2dab38e2 | 1186 | enum v4l2_buf_type type) |
5f3cc447 | 1187 | { |
e578588e | 1188 | struct fimc_dev *fimc = video_drvdata(file); |
95c4a17f | 1189 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
bc7584b0 | 1190 | struct media_entity *entity = &vc->ve.vdev.entity; |
88fa8311 SN |
1191 | struct fimc_source_info *si = NULL; |
1192 | struct v4l2_subdev *sd; | |
237e0265 | 1193 | int ret; |
5f3cc447 | 1194 | |
4db5e27e | 1195 | if (fimc_capture_active(fimc)) |
8293ebfc | 1196 | return -EBUSY; |
5f3cc447 | 1197 | |
403dfbec | 1198 | ret = media_entity_pipeline_start(entity, &vc->ve.pipe->mp); |
a60a2959 SA |
1199 | if (ret < 0) |
1200 | return ret; | |
5f3cc447 | 1201 | |
403dfbec | 1202 | sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR); |
88fa8311 SN |
1203 | if (sd) |
1204 | si = v4l2_get_subdev_hostdata(sd); | |
1205 | ||
1206 | if (si == NULL) { | |
1207 | ret = -EPIPE; | |
1208 | goto err_p_stop; | |
1209 | } | |
1210 | /* | |
1211 | * Save configuration data related to currently attached image | |
1212 | * sensor or other data source, e.g. FIMC-IS. | |
1213 | */ | |
1214 | vc->source_config = *si; | |
1215 | ||
1216 | if (vc->input == GRP_ID_FIMC_IS) | |
1217 | vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
1218 | ||
95c4a17f | 1219 | if (vc->user_subdev_api) { |
237e0265 | 1220 | ret = fimc_pipeline_validate(fimc); |
95c4a17f SN |
1221 | if (ret < 0) |
1222 | goto err_p_stop; | |
237e0265 | 1223 | } |
95c4a17f | 1224 | |
c444914a | 1225 | ret = vb2_ioctl_streamon(file, priv, type); |
9ea89e2b SN |
1226 | if (!ret) { |
1227 | vc->streaming = true; | |
95c4a17f | 1228 | return ret; |
9ea89e2b | 1229 | } |
95c4a17f SN |
1230 | |
1231 | err_p_stop: | |
1232 | media_entity_pipeline_stop(entity); | |
1233 | return ret; | |
5f3cc447 SN |
1234 | } |
1235 | ||
1236 | static int fimc_cap_streamoff(struct file *file, void *priv, | |
8293ebfc | 1237 | enum v4l2_buf_type type) |
5f3cc447 | 1238 | { |
e578588e | 1239 | struct fimc_dev *fimc = video_drvdata(file); |
bc7584b0 | 1240 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
4db5e27e | 1241 | int ret; |
5f3cc447 | 1242 | |
c444914a | 1243 | ret = vb2_ioctl_streamoff(file, priv, type); |
9ea89e2b SN |
1244 | if (ret < 0) |
1245 | return ret; | |
95c4a17f | 1246 | |
bc7584b0 SN |
1247 | media_entity_pipeline_stop(&vc->ve.vdev.entity); |
1248 | vc->streaming = false; | |
9ea89e2b | 1249 | return 0; |
5f3cc447 SN |
1250 | } |
1251 | ||
1252 | static int fimc_cap_reqbufs(struct file *file, void *priv, | |
ef7af59b | 1253 | struct v4l2_requestbuffers *reqbufs) |
5f3cc447 | 1254 | { |
e578588e | 1255 | struct fimc_dev *fimc = video_drvdata(file); |
c444914a SN |
1256 | int ret; |
1257 | ||
1258 | ret = vb2_ioctl_reqbufs(file, priv, reqbufs); | |
5f3cc447 | 1259 | |
5f3cc447 | 1260 | if (!ret) |
e578588e | 1261 | fimc->vid_cap.reqbufs_count = reqbufs->count; |
3b4c34aa | 1262 | |
c444914a | 1263 | return ret; |
3b4c34aa SN |
1264 | } |
1265 | ||
f9331d11 SN |
1266 | static int fimc_cap_g_selection(struct file *file, void *fh, |
1267 | struct v4l2_selection *s) | |
e004e02f | 1268 | { |
e578588e | 1269 | struct fimc_dev *fimc = video_drvdata(file); |
f9331d11 SN |
1270 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; |
1271 | struct fimc_frame *f = &ctx->s_frame; | |
e004e02f | 1272 | |
f9331d11 | 1273 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
e004e02f SN |
1274 | return -EINVAL; |
1275 | ||
f9331d11 SN |
1276 | switch (s->target) { |
1277 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | |
1278 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | |
1279 | f = &ctx->d_frame; | |
1280 | case V4L2_SEL_TGT_CROP_BOUNDS: | |
1281 | case V4L2_SEL_TGT_CROP_DEFAULT: | |
1282 | s->r.left = 0; | |
1283 | s->r.top = 0; | |
1284 | s->r.width = f->o_width; | |
1285 | s->r.height = f->o_height; | |
1286 | return 0; | |
e004e02f | 1287 | |
c1334823 | 1288 | case V4L2_SEL_TGT_COMPOSE: |
f9331d11 | 1289 | f = &ctx->d_frame; |
c1334823 | 1290 | case V4L2_SEL_TGT_CROP: |
f9331d11 SN |
1291 | s->r.left = f->offs_h; |
1292 | s->r.top = f->offs_v; | |
1293 | s->r.width = f->width; | |
1294 | s->r.height = f->height; | |
1295 | return 0; | |
1296 | } | |
1297 | ||
1298 | return -EINVAL; | |
e004e02f SN |
1299 | } |
1300 | ||
f9331d11 | 1301 | /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */ |
7e566be2 | 1302 | static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b) |
e004e02f | 1303 | { |
f9331d11 SN |
1304 | if (a->left < b->left || a->top < b->top) |
1305 | return 0; | |
1306 | if (a->left + a->width > b->left + b->width) | |
1307 | return 0; | |
1308 | if (a->top + a->height > b->top + b->height) | |
1309 | return 0; | |
e004e02f | 1310 | |
f9331d11 | 1311 | return 1; |
e004e02f SN |
1312 | } |
1313 | ||
f9331d11 SN |
1314 | static int fimc_cap_s_selection(struct file *file, void *fh, |
1315 | struct v4l2_selection *s) | |
5f3cc447 | 1316 | { |
e578588e SN |
1317 | struct fimc_dev *fimc = video_drvdata(file); |
1318 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
f9331d11 SN |
1319 | struct v4l2_rect rect = s->r; |
1320 | struct fimc_frame *f; | |
237e0265 | 1321 | unsigned long flags; |
f9331d11 SN |
1322 | |
1323 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
1324 | return -EINVAL; | |
1325 | ||
c1334823 | 1326 | if (s->target == V4L2_SEL_TGT_COMPOSE) |
f9331d11 | 1327 | f = &ctx->d_frame; |
c1334823 | 1328 | else if (s->target == V4L2_SEL_TGT_CROP) |
f9331d11 | 1329 | f = &ctx->s_frame; |
fed07f84 | 1330 | else |
f9331d11 | 1331 | return -EINVAL; |
f9331d11 | 1332 | |
fed07f84 | 1333 | fimc_capture_try_selection(ctx, &rect, s->target); |
f9331d11 SN |
1334 | |
1335 | if (s->flags & V4L2_SEL_FLAG_LE && | |
1336 | !enclosed_rectangle(&rect, &s->r)) | |
1337 | return -ERANGE; | |
5f3cc447 | 1338 | |
f9331d11 SN |
1339 | if (s->flags & V4L2_SEL_FLAG_GE && |
1340 | !enclosed_rectangle(&s->r, &rect)) | |
1341 | return -ERANGE; | |
5f3cc447 | 1342 | |
f9331d11 | 1343 | s->r = rect; |
237e0265 | 1344 | spin_lock_irqsave(&fimc->slock, flags); |
f9331d11 SN |
1345 | set_frame_crop(f, s->r.left, s->r.top, s->r.width, |
1346 | s->r.height); | |
237e0265 | 1347 | spin_unlock_irqrestore(&fimc->slock, flags); |
8293ebfc | 1348 | |
f9331d11 | 1349 | set_bit(ST_CAPT_APPLY_CFG, &fimc->state); |
8293ebfc | 1350 | return 0; |
5f3cc447 SN |
1351 | } |
1352 | ||
5f3cc447 | 1353 | static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = { |
aceb59ed | 1354 | .vidioc_querycap = fimc_cap_querycap, |
5f3cc447 | 1355 | |
cf52df8a | 1356 | .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane, |
e578588e | 1357 | .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane, |
ef7af59b | 1358 | .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane, |
e578588e | 1359 | .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane, |
5f3cc447 SN |
1360 | |
1361 | .vidioc_reqbufs = fimc_cap_reqbufs, | |
c444914a SN |
1362 | .vidioc_querybuf = vb2_ioctl_querybuf, |
1363 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
1364 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
1365 | .vidioc_expbuf = vb2_ioctl_expbuf, | |
1366 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
1367 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | |
3b4c34aa | 1368 | |
5f3cc447 SN |
1369 | .vidioc_streamon = fimc_cap_streamon, |
1370 | .vidioc_streamoff = fimc_cap_streamoff, | |
1371 | ||
f9331d11 SN |
1372 | .vidioc_g_selection = fimc_cap_g_selection, |
1373 | .vidioc_s_selection = fimc_cap_s_selection, | |
5f3cc447 SN |
1374 | |
1375 | .vidioc_enum_input = fimc_cap_enum_input, | |
1376 | .vidioc_s_input = fimc_cap_s_input, | |
1377 | .vidioc_g_input = fimc_cap_g_input, | |
1378 | }; | |
1379 | ||
237e0265 | 1380 | /* Capture subdev media entity operations */ |
d09a7dc8 SN |
1381 | static int fimc_link_setup(struct media_entity *entity, |
1382 | const struct media_pad *local, | |
1383 | const struct media_pad *remote, u32 flags) | |
1384 | { | |
237e0265 SN |
1385 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); |
1386 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
4403106d SN |
1387 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
1388 | struct v4l2_subdev *sensor; | |
237e0265 | 1389 | |
3efdf62c | 1390 | if (!is_media_entity_v4l2_subdev(remote->entity)) |
237e0265 | 1391 | return -EINVAL; |
d09a7dc8 SN |
1392 | |
1393 | if (WARN_ON(fimc == NULL)) | |
1394 | return 0; | |
1395 | ||
1396 | dbg("%s --> %s, flags: 0x%x. input: 0x%x", | |
1397 | local->entity->name, remote->entity->name, flags, | |
1398 | fimc->vid_cap.input); | |
1399 | ||
4403106d SN |
1400 | if (!(flags & MEDIA_LNK_FL_ENABLED)) { |
1401 | fimc->vid_cap.input = 0; | |
d09a7dc8 SN |
1402 | return 0; |
1403 | } | |
1404 | ||
4403106d SN |
1405 | if (vc->input != 0) |
1406 | return -EBUSY; | |
1407 | ||
1408 | vc->input = sd->grp_id; | |
1409 | ||
1410 | if (vc->user_subdev_api || vc->inh_sensor_ctrls) | |
1411 | return 0; | |
1412 | ||
1413 | /* Inherit V4L2 controls from the image sensor subdev. */ | |
1414 | sensor = fimc_find_remote_sensor(&vc->subdev.entity); | |
1415 | if (sensor == NULL) | |
1416 | return 0; | |
1417 | ||
1418 | return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler, | |
1419 | sensor->ctrl_handler, NULL); | |
d09a7dc8 SN |
1420 | } |
1421 | ||
237e0265 | 1422 | static const struct media_entity_operations fimc_sd_media_ops = { |
d09a7dc8 SN |
1423 | .link_setup = fimc_link_setup, |
1424 | }; | |
1425 | ||
e1d72f4d SN |
1426 | /** |
1427 | * fimc_sensor_notify - v4l2_device notification from a sensor subdev | |
1428 | * @sd: pointer to a subdev generating the notification | |
1429 | * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY | |
1430 | * @arg: pointer to an u32 type integer that stores the frame payload value | |
1431 | * | |
1432 | * The End Of Frame notification sent by sensor subdev in its still capture | |
1433 | * mode. If there is only a single VSYNC generated by the sensor at the | |
1434 | * beginning of a frame transmission, FIMC does not issue the LastIrq | |
1435 | * (end of frame) interrupt. And this notification is used to complete the | |
1436 | * frame capture and returning a buffer to user-space. Subdev drivers should | |
1437 | * call this notification from their last 'End of frame capture' interrupt. | |
1438 | */ | |
1439 | void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification, | |
1440 | void *arg) | |
1441 | { | |
4c8f0629 | 1442 | struct fimc_source_info *si; |
e1d72f4d SN |
1443 | struct fimc_vid_buffer *buf; |
1444 | struct fimc_md *fmd; | |
1445 | struct fimc_dev *fimc; | |
1446 | unsigned long flags; | |
1447 | ||
1448 | if (sd == NULL) | |
1449 | return; | |
1450 | ||
4c8f0629 | 1451 | si = v4l2_get_subdev_hostdata(sd); |
e1d72f4d SN |
1452 | fmd = entity_to_fimc_mdev(&sd->entity); |
1453 | ||
1454 | spin_lock_irqsave(&fmd->slock, flags); | |
4c8f0629 SN |
1455 | |
1456 | fimc = si ? source_to_sensor_info(si)->host : NULL; | |
e1d72f4d SN |
1457 | |
1458 | if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY && | |
1459 | test_bit(ST_CAPT_PEND, &fimc->state)) { | |
1460 | unsigned long irq_flags; | |
1461 | spin_lock_irqsave(&fimc->slock, irq_flags); | |
1462 | if (!list_empty(&fimc->vid_cap.active_buf_q)) { | |
1463 | buf = list_entry(fimc->vid_cap.active_buf_q.next, | |
1464 | struct fimc_vid_buffer, list); | |
2d700715 JS |
1465 | vb2_set_plane_payload(&buf->vb.vb2_buf, 0, |
1466 | *((u32 *)arg)); | |
e1d72f4d | 1467 | } |
97d97422 | 1468 | fimc_capture_irq_handler(fimc, 1); |
e1d72f4d SN |
1469 | fimc_deactivate_capture(fimc); |
1470 | spin_unlock_irqrestore(&fimc->slock, irq_flags); | |
1471 | } | |
1472 | spin_unlock_irqrestore(&fmd->slock, flags); | |
1473 | } | |
1474 | ||
237e0265 | 1475 | static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd, |
f7234138 | 1476 | struct v4l2_subdev_pad_config *cfg, |
237e0265 SN |
1477 | struct v4l2_subdev_mbus_code_enum *code) |
1478 | { | |
1479 | struct fimc_fmt *fmt; | |
1480 | ||
1481 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index); | |
1482 | if (!fmt) | |
1483 | return -EINVAL; | |
1484 | code->code = fmt->mbus_code; | |
1485 | return 0; | |
1486 | } | |
1487 | ||
1488 | static int fimc_subdev_get_fmt(struct v4l2_subdev *sd, | |
f7234138 | 1489 | struct v4l2_subdev_pad_config *cfg, |
237e0265 SN |
1490 | struct v4l2_subdev_format *fmt) |
1491 | { | |
1492 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1493 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
88fa8311 | 1494 | struct fimc_frame *ff = &ctx->s_frame; |
237e0265 | 1495 | struct v4l2_mbus_framefmt *mf; |
237e0265 SN |
1496 | |
1497 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
f7234138 | 1498 | mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); |
237e0265 SN |
1499 | fmt->format = *mf; |
1500 | return 0; | |
1501 | } | |
237e0265 | 1502 | |
88fa8311 | 1503 | mf = &fmt->format; |
237e0265 | 1504 | mutex_lock(&fimc->lock); |
88fa8311 SN |
1505 | |
1506 | switch (fmt->pad) { | |
1507 | case FIMC_SD_PAD_SOURCE: | |
1508 | if (!WARN_ON(ff->fmt == NULL)) | |
1509 | mf->code = ff->fmt->mbus_code; | |
1510 | /* Sink pads crop rectangle size */ | |
1511 | mf->width = ff->width; | |
1512 | mf->height = ff->height; | |
1513 | break; | |
1514 | case FIMC_SD_PAD_SINK_FIFO: | |
1515 | *mf = fimc->vid_cap.wb_fmt; | |
1516 | break; | |
1517 | case FIMC_SD_PAD_SINK_CAM: | |
1518 | default: | |
1519 | *mf = fimc->vid_cap.ci_fmt; | |
1520 | break; | |
1521 | } | |
1522 | ||
237e0265 | 1523 | mutex_unlock(&fimc->lock); |
88fa8311 | 1524 | mf->colorspace = V4L2_COLORSPACE_JPEG; |
237e0265 SN |
1525 | |
1526 | return 0; | |
1527 | } | |
1528 | ||
1529 | static int fimc_subdev_set_fmt(struct v4l2_subdev *sd, | |
f7234138 | 1530 | struct v4l2_subdev_pad_config *cfg, |
237e0265 SN |
1531 | struct v4l2_subdev_format *fmt) |
1532 | { | |
1533 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1534 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
88fa8311 SN |
1535 | struct fimc_vid_cap *vc = &fimc->vid_cap; |
1536 | struct fimc_ctx *ctx = vc->ctx; | |
237e0265 SN |
1537 | struct fimc_frame *ff; |
1538 | struct fimc_fmt *ffmt; | |
1539 | ||
1540 | dbg("pad%d: code: 0x%x, %dx%d", | |
1541 | fmt->pad, mf->code, mf->width, mf->height); | |
1542 | ||
88fa8311 | 1543 | if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq)) |
237e0265 SN |
1544 | return -EBUSY; |
1545 | ||
1546 | mutex_lock(&fimc->lock); | |
1547 | ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height, | |
1548 | &mf->code, NULL, fmt->pad); | |
1549 | mutex_unlock(&fimc->lock); | |
1550 | mf->colorspace = V4L2_COLORSPACE_JPEG; | |
1551 | ||
1552 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
f7234138 | 1553 | mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); |
237e0265 SN |
1554 | *mf = fmt->format; |
1555 | return 0; | |
1556 | } | |
6612545f SN |
1557 | /* There must be a bug in the driver if this happens */ |
1558 | if (WARN_ON(ffmt == NULL)) | |
1559 | return -EINVAL; | |
1560 | ||
dafb9c70 SN |
1561 | /* Update RGB Alpha control state and value range */ |
1562 | fimc_alpha_ctrl_update(ctx); | |
1563 | ||
14783d25 | 1564 | fimc_capture_mark_jpeg_xfer(ctx, ffmt->color); |
88fa8311 SN |
1565 | if (fmt->pad == FIMC_SD_PAD_SOURCE) { |
1566 | ff = &ctx->d_frame; | |
1567 | /* Sink pads crop rectangle size */ | |
1568 | mf->width = ctx->s_frame.width; | |
1569 | mf->height = ctx->s_frame.height; | |
1570 | } else { | |
1571 | ff = &ctx->s_frame; | |
1572 | } | |
237e0265 SN |
1573 | |
1574 | mutex_lock(&fimc->lock); | |
1575 | set_frame_bounds(ff, mf->width, mf->height); | |
88fa8311 SN |
1576 | |
1577 | if (fmt->pad == FIMC_SD_PAD_SINK_FIFO) | |
1578 | vc->wb_fmt = *mf; | |
1579 | else if (fmt->pad == FIMC_SD_PAD_SINK_CAM) | |
1580 | vc->ci_fmt = *mf; | |
1581 | ||
237e0265 SN |
1582 | ff->fmt = ffmt; |
1583 | ||
1584 | /* Reset the crop rectangle if required. */ | |
fed07f84 | 1585 | if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE))) |
237e0265 SN |
1586 | set_frame_crop(ff, 0, 0, mf->width, mf->height); |
1587 | ||
88fa8311 | 1588 | if (fmt->pad != FIMC_SD_PAD_SOURCE) |
fed07f84 | 1589 | ctx->state &= ~FIMC_COMPOSE; |
88fa8311 | 1590 | |
237e0265 SN |
1591 | mutex_unlock(&fimc->lock); |
1592 | return 0; | |
1593 | } | |
1594 | ||
fed07f84 | 1595 | static int fimc_subdev_get_selection(struct v4l2_subdev *sd, |
f7234138 | 1596 | struct v4l2_subdev_pad_config *cfg, |
fed07f84 | 1597 | struct v4l2_subdev_selection *sel) |
237e0265 SN |
1598 | { |
1599 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1600 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
fed07f84 SN |
1601 | struct fimc_frame *f = &ctx->s_frame; |
1602 | struct v4l2_rect *r = &sel->r; | |
1603 | struct v4l2_rect *try_sel; | |
1604 | ||
88fa8311 | 1605 | if (sel->pad == FIMC_SD_PAD_SOURCE) |
fed07f84 SN |
1606 | return -EINVAL; |
1607 | ||
1608 | mutex_lock(&fimc->lock); | |
237e0265 | 1609 | |
fed07f84 | 1610 | switch (sel->target) { |
5689b288 | 1611 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: |
fed07f84 | 1612 | f = &ctx->d_frame; |
5689b288 | 1613 | case V4L2_SEL_TGT_CROP_BOUNDS: |
fed07f84 SN |
1614 | r->width = f->o_width; |
1615 | r->height = f->o_height; | |
1616 | r->left = 0; | |
1617 | r->top = 0; | |
1618 | mutex_unlock(&fimc->lock); | |
237e0265 | 1619 | return 0; |
fed07f84 | 1620 | |
5689b288 | 1621 | case V4L2_SEL_TGT_CROP: |
f7234138 | 1622 | try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad); |
fed07f84 | 1623 | break; |
5689b288 | 1624 | case V4L2_SEL_TGT_COMPOSE: |
f7234138 | 1625 | try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad); |
fed07f84 SN |
1626 | f = &ctx->d_frame; |
1627 | break; | |
1628 | default: | |
1629 | mutex_unlock(&fimc->lock); | |
1630 | return -EINVAL; | |
237e0265 | 1631 | } |
237e0265 | 1632 | |
fed07f84 SN |
1633 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
1634 | sel->r = *try_sel; | |
1635 | } else { | |
1636 | r->left = f->offs_h; | |
1637 | r->top = f->offs_v; | |
1638 | r->width = f->width; | |
1639 | r->height = f->height; | |
1640 | } | |
237e0265 | 1641 | |
fed07f84 SN |
1642 | dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d", |
1643 | sel->pad, r->left, r->top, r->width, r->height, | |
1644 | f->f_width, f->f_height); | |
237e0265 | 1645 | |
fed07f84 | 1646 | mutex_unlock(&fimc->lock); |
237e0265 SN |
1647 | return 0; |
1648 | } | |
1649 | ||
fed07f84 | 1650 | static int fimc_subdev_set_selection(struct v4l2_subdev *sd, |
f7234138 | 1651 | struct v4l2_subdev_pad_config *cfg, |
fed07f84 | 1652 | struct v4l2_subdev_selection *sel) |
237e0265 SN |
1653 | { |
1654 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1655 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
fed07f84 SN |
1656 | struct fimc_frame *f = &ctx->s_frame; |
1657 | struct v4l2_rect *r = &sel->r; | |
1658 | struct v4l2_rect *try_sel; | |
237e0265 SN |
1659 | unsigned long flags; |
1660 | ||
88fa8311 | 1661 | if (sel->pad == FIMC_SD_PAD_SOURCE) |
fed07f84 | 1662 | return -EINVAL; |
237e0265 SN |
1663 | |
1664 | mutex_lock(&fimc->lock); | |
c1334823 | 1665 | fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP); |
237e0265 | 1666 | |
fed07f84 | 1667 | switch (sel->target) { |
5689b288 | 1668 | case V4L2_SEL_TGT_CROP: |
f7234138 | 1669 | try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad); |
fed07f84 | 1670 | break; |
5689b288 | 1671 | case V4L2_SEL_TGT_COMPOSE: |
f7234138 | 1672 | try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad); |
fed07f84 SN |
1673 | f = &ctx->d_frame; |
1674 | break; | |
1675 | default: | |
1676 | mutex_unlock(&fimc->lock); | |
1677 | return -EINVAL; | |
237e0265 | 1678 | } |
237e0265 | 1679 | |
fed07f84 SN |
1680 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
1681 | *try_sel = sel->r; | |
1682 | } else { | |
1683 | spin_lock_irqsave(&fimc->slock, flags); | |
1684 | set_frame_crop(f, r->left, r->top, r->width, r->height); | |
1685 | set_bit(ST_CAPT_APPLY_CFG, &fimc->state); | |
5689b288 | 1686 | if (sel->target == V4L2_SEL_TGT_COMPOSE) |
fed07f84 | 1687 | ctx->state |= FIMC_COMPOSE; |
8b164105 | 1688 | spin_unlock_irqrestore(&fimc->slock, flags); |
fed07f84 | 1689 | } |
237e0265 | 1690 | |
fed07f84 | 1691 | dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top, |
237e0265 SN |
1692 | r->width, r->height); |
1693 | ||
1694 | mutex_unlock(&fimc->lock); | |
1695 | return 0; | |
1696 | } | |
1697 | ||
1698 | static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = { | |
1699 | .enum_mbus_code = fimc_subdev_enum_mbus_code, | |
fed07f84 SN |
1700 | .get_selection = fimc_subdev_get_selection, |
1701 | .set_selection = fimc_subdev_set_selection, | |
237e0265 SN |
1702 | .get_fmt = fimc_subdev_get_fmt, |
1703 | .set_fmt = fimc_subdev_set_fmt, | |
237e0265 SN |
1704 | }; |
1705 | ||
1706 | static struct v4l2_subdev_ops fimc_subdev_ops = { | |
1707 | .pad = &fimc_subdev_pad_ops, | |
1708 | }; | |
1709 | ||
237e0265 SN |
1710 | /* Set default format at the sensor and host interface */ |
1711 | static int fimc_capture_set_default_format(struct fimc_dev *fimc) | |
1712 | { | |
1713 | struct v4l2_format fmt = { | |
1714 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, | |
1715 | .fmt.pix_mp = { | |
3ad86245 SN |
1716 | .width = FIMC_DEFAULT_WIDTH, |
1717 | .height = FIMC_DEFAULT_HEIGHT, | |
237e0265 SN |
1718 | .pixelformat = V4L2_PIX_FMT_YUYV, |
1719 | .field = V4L2_FIELD_NONE, | |
1720 | .colorspace = V4L2_COLORSPACE_JPEG, | |
1721 | }, | |
1722 | }; | |
1723 | ||
740ad921 | 1724 | return __fimc_capture_set_format(fimc, &fmt); |
237e0265 SN |
1725 | } |
1726 | ||
ef7af59b | 1727 | /* fimc->lock must be already initialized */ |
693f5c40 | 1728 | static int fimc_register_capture_device(struct fimc_dev *fimc, |
30c9939d | 1729 | struct v4l2_device *v4l2_dev) |
5f3cc447 | 1730 | { |
bc7584b0 | 1731 | struct video_device *vfd = &fimc->vid_cap.ve.vdev; |
c444914a | 1732 | struct vb2_queue *q = &fimc->vid_cap.vbq; |
5f3cc447 | 1733 | struct fimc_ctx *ctx; |
c444914a | 1734 | struct fimc_vid_cap *vid_cap; |
3ad86245 | 1735 | struct fimc_fmt *fmt; |
30c9939d | 1736 | int ret = -ENOMEM; |
5f3cc447 | 1737 | |
26ee7f47 | 1738 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
5f3cc447 SN |
1739 | if (!ctx) |
1740 | return -ENOMEM; | |
1741 | ||
1742 | ctx->fimc_dev = fimc; | |
3d112d9a SN |
1743 | ctx->in_path = FIMC_IO_CAMERA; |
1744 | ctx->out_path = FIMC_IO_DMA; | |
5f3cc447 | 1745 | ctx->state = FIMC_CTX_CAP; |
237e0265 | 1746 | ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0); |
693f5c40 | 1747 | ctx->d_frame.fmt = ctx->s_frame.fmt; |
5f3cc447 | 1748 | |
31d34d9b | 1749 | memset(vfd, 0, sizeof(*vfd)); |
693f5c40 | 1750 | snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id); |
5f3cc447 SN |
1751 | |
1752 | vfd->fops = &fimc_capture_fops; | |
1753 | vfd->ioctl_ops = &fimc_capture_ioctl_ops; | |
574e1717 | 1754 | vfd->v4l2_dev = v4l2_dev; |
5f3cc447 | 1755 | vfd->minor = -1; |
31d34d9b | 1756 | vfd->release = video_device_release_empty; |
c444914a | 1757 | vfd->queue = q; |
8293ebfc | 1758 | vfd->lock = &fimc->lock; |
c2d430af | 1759 | |
5f3cc447 | 1760 | video_set_drvdata(vfd, fimc); |
5f3cc447 | 1761 | vid_cap = &fimc->vid_cap; |
5f3cc447 | 1762 | vid_cap->active_buf_cnt = 0; |
c444914a SN |
1763 | vid_cap->reqbufs_count = 0; |
1764 | vid_cap->ctx = ctx; | |
5f3cc447 SN |
1765 | |
1766 | INIT_LIST_HEAD(&vid_cap->pending_buf_q); | |
1767 | INIT_LIST_HEAD(&vid_cap->active_buf_q); | |
5f3cc447 | 1768 | |
2dab38e2 | 1769 | memset(q, 0, sizeof(*q)); |
ef7af59b | 1770 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; |
9bd09fd7 | 1771 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; |
c444914a | 1772 | q->drv_priv = ctx; |
2dab38e2 SN |
1773 | q->ops = &fimc_capture_qops; |
1774 | q->mem_ops = &vb2_dma_contig_memops; | |
1775 | q->buf_struct_size = sizeof(struct fimc_vid_buffer); | |
ade48681 | 1776 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
c444914a | 1777 | q->lock = &fimc->lock; |
2548fee6 | 1778 | q->dev = &fimc->pdev->dev; |
2dab38e2 | 1779 | |
41fd087f SN |
1780 | ret = vb2_queue_init(q); |
1781 | if (ret) | |
4403106d | 1782 | goto err_free_ctx; |
5f3cc447 | 1783 | |
3ad86245 SN |
1784 | /* Default format configuration */ |
1785 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0); | |
1786 | vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH; | |
1787 | vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT; | |
1788 | vid_cap->ci_fmt.code = fmt->mbus_code; | |
1789 | ||
1790 | ctx->s_frame.width = FIMC_DEFAULT_WIDTH; | |
1791 | ctx->s_frame.height = FIMC_DEFAULT_HEIGHT; | |
1792 | ctx->s_frame.fmt = fmt; | |
1793 | ||
1794 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0); | |
1795 | vid_cap->wb_fmt = vid_cap->ci_fmt; | |
1796 | vid_cap->wb_fmt.code = fmt->mbus_code; | |
1797 | ||
693f5c40 | 1798 | vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK; |
ab22e77c | 1799 | ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad); |
574e1717 | 1800 | if (ret) |
4403106d SN |
1801 | goto err_free_ctx; |
1802 | ||
1803 | ret = fimc_ctrls_create(ctx); | |
1804 | if (ret) | |
1805 | goto err_me_cleanup; | |
693f5c40 SN |
1806 | |
1807 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1); | |
237e0265 | 1808 | if (ret) |
4403106d | 1809 | goto err_ctrl_free; |
693f5c40 SN |
1810 | |
1811 | v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n", | |
1812 | vfd->name, video_device_node_name(vfd)); | |
574e1717 | 1813 | |
9448ab7d | 1814 | vfd->ctrl_handler = &ctx->ctrls.handler; |
5f3cc447 SN |
1815 | return 0; |
1816 | ||
4403106d SN |
1817 | err_ctrl_free: |
1818 | fimc_ctrls_delete(ctx); | |
1819 | err_me_cleanup: | |
237e0265 | 1820 | media_entity_cleanup(&vfd->entity); |
4403106d | 1821 | err_free_ctx: |
cfd77310 | 1822 | kfree(ctx); |
5f3cc447 SN |
1823 | return ret; |
1824 | } | |
1825 | ||
693f5c40 | 1826 | static int fimc_capture_subdev_registered(struct v4l2_subdev *sd) |
5f3cc447 | 1827 | { |
693f5c40 SN |
1828 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); |
1829 | int ret; | |
5f3cc447 | 1830 | |
bbc5296f SN |
1831 | if (fimc == NULL) |
1832 | return -ENXIO; | |
1833 | ||
693f5c40 SN |
1834 | ret = fimc_register_m2m_device(fimc, sd->v4l2_dev); |
1835 | if (ret) | |
1836 | return ret; | |
1837 | ||
403dfbec | 1838 | fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd); |
97d66c47 | 1839 | |
693f5c40 | 1840 | ret = fimc_register_capture_device(fimc, sd->v4l2_dev); |
97d66c47 | 1841 | if (ret) { |
693f5c40 | 1842 | fimc_unregister_m2m_device(fimc); |
403dfbec | 1843 | fimc->vid_cap.ve.pipe = NULL; |
97d66c47 | 1844 | } |
693f5c40 SN |
1845 | |
1846 | return ret; | |
1847 | } | |
1848 | ||
1849 | static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd) | |
1850 | { | |
1851 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
bc7584b0 | 1852 | struct video_device *vdev; |
693f5c40 SN |
1853 | |
1854 | if (fimc == NULL) | |
1855 | return; | |
1856 | ||
26d63d13 SN |
1857 | mutex_lock(&fimc->lock); |
1858 | ||
693f5c40 | 1859 | fimc_unregister_m2m_device(fimc); |
bc7584b0 | 1860 | vdev = &fimc->vid_cap.ve.vdev; |
693f5c40 | 1861 | |
bc7584b0 SN |
1862 | if (video_is_registered(vdev)) { |
1863 | video_unregister_device(vdev); | |
1864 | media_entity_cleanup(&vdev->entity); | |
4403106d | 1865 | fimc_ctrls_delete(fimc->vid_cap.ctx); |
403dfbec | 1866 | fimc->vid_cap.ve.pipe = NULL; |
574e1717 SN |
1867 | } |
1868 | kfree(fimc->vid_cap.ctx); | |
96a85742 | 1869 | fimc->vid_cap.ctx = NULL; |
26d63d13 SN |
1870 | |
1871 | mutex_unlock(&fimc->lock); | |
5f3cc447 | 1872 | } |
693f5c40 SN |
1873 | |
1874 | static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = { | |
1875 | .registered = fimc_capture_subdev_registered, | |
1876 | .unregistered = fimc_capture_subdev_unregistered, | |
1877 | }; | |
1878 | ||
1879 | int fimc_initialize_capture_subdev(struct fimc_dev *fimc) | |
1880 | { | |
1881 | struct v4l2_subdev *sd = &fimc->vid_cap.subdev; | |
1882 | int ret; | |
1883 | ||
1884 | v4l2_subdev_init(sd, &fimc_subdev_ops); | |
5a66561f | 1885 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
e80cb1fa | 1886 | snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id); |
693f5c40 | 1887 | |
88fa8311 SN |
1888 | fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK; |
1889 | fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK; | |
693f5c40 | 1890 | fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; |
ab22e77c | 1891 | ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM, |
18095107 | 1892 | fimc->vid_cap.sd_pads); |
693f5c40 SN |
1893 | if (ret) |
1894 | return ret; | |
1895 | ||
1896 | sd->entity.ops = &fimc_sd_media_ops; | |
1897 | sd->internal_ops = &fimc_capture_sd_internal_ops; | |
1898 | v4l2_set_subdevdata(sd, fimc); | |
1899 | return 0; | |
1900 | } | |
1901 | ||
1902 | void fimc_unregister_capture_subdev(struct fimc_dev *fimc) | |
1903 | { | |
1904 | struct v4l2_subdev *sd = &fimc->vid_cap.subdev; | |
1905 | ||
1906 | v4l2_device_unregister_subdev(sd); | |
1907 | media_entity_cleanup(&sd->entity); | |
1908 | v4l2_set_subdevdata(sd, NULL); | |
1909 | } |