[media] s5c73m3: Do not ignore errors from regulator_enable()
[deliverable/linux.git] / drivers / media / platform / exynos4-is / fimc-lite.c
CommitLineData
4af81310
SN
1/*
2 * Samsung EXYNOS FIMC-LITE (camera host interface) driver
3*
8a0c28f5
SN
4 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
4af81310
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
12
13#include <linux/bug.h>
4c8f0629 14#include <linux/clk.h>
4af81310
SN
15#include <linux/device.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/list.h>
20#include <linux/module.h>
eb62d9e9 21#include <linux/of.h>
4af81310
SN
22#include <linux/types.h>
23#include <linux/platform_device.h>
24#include <linux/pm_runtime.h>
25#include <linux/slab.h>
26#include <linux/videodev2.h>
27
28#include <media/v4l2-device.h>
29#include <media/v4l2-ioctl.h>
30#include <media/v4l2-mem2mem.h>
31#include <media/videobuf2-core.h>
32#include <media/videobuf2-dma-contig.h>
b9ee31e6 33#include <media/s5p_fimc.h>
4af81310 34
4c8f0629 35#include "fimc-core.h"
b9ee31e6 36#include "fimc-lite.h"
4af81310
SN
37#include "fimc-lite-reg.h"
38
39static int debug;
40module_param(debug, int, 0644);
41
42static const struct fimc_fmt fimc_lite_formats[] = {
43 {
44 .name = "YUV 4:2:2 packed, YCbYCr",
45 .fourcc = V4L2_PIX_FMT_YUYV,
46 .depth = { 16 },
47 .color = FIMC_FMT_YCBYCR422,
48 .memplanes = 1,
49 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
e90ad659 50 .flags = FMT_FLAGS_YUV,
4af81310
SN
51 }, {
52 .name = "YUV 4:2:2 packed, CbYCrY",
53 .fourcc = V4L2_PIX_FMT_UYVY,
54 .depth = { 16 },
55 .color = FIMC_FMT_CBYCRY422,
56 .memplanes = 1,
57 .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
e90ad659 58 .flags = FMT_FLAGS_YUV,
4af81310
SN
59 }, {
60 .name = "YUV 4:2:2 packed, CrYCbY",
61 .fourcc = V4L2_PIX_FMT_VYUY,
62 .depth = { 16 },
63 .color = FIMC_FMT_CRYCBY422,
64 .memplanes = 1,
65 .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
e90ad659 66 .flags = FMT_FLAGS_YUV,
4af81310
SN
67 }, {
68 .name = "YUV 4:2:2 packed, YCrYCb",
69 .fourcc = V4L2_PIX_FMT_YVYU,
70 .depth = { 16 },
71 .color = FIMC_FMT_YCRYCB422,
72 .memplanes = 1,
73 .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
e90ad659 74 .flags = FMT_FLAGS_YUV,
4af81310
SN
75 }, {
76 .name = "RAW8 (GRBG)",
77 .fourcc = V4L2_PIX_FMT_SGRBG8,
78 .depth = { 8 },
79 .color = FIMC_FMT_RAW8,
80 .memplanes = 1,
81 .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
e90ad659 82 .flags = FMT_FLAGS_RAW_BAYER,
4af81310
SN
83 }, {
84 .name = "RAW10 (GRBG)",
85 .fourcc = V4L2_PIX_FMT_SGRBG10,
86 .depth = { 10 },
87 .color = FIMC_FMT_RAW10,
88 .memplanes = 1,
89 .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
e90ad659 90 .flags = FMT_FLAGS_RAW_BAYER,
4af81310
SN
91 }, {
92 .name = "RAW12 (GRBG)",
93 .fourcc = V4L2_PIX_FMT_SGRBG12,
94 .depth = { 12 },
95 .color = FIMC_FMT_RAW12,
96 .memplanes = 1,
97 .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
e90ad659 98 .flags = FMT_FLAGS_RAW_BAYER,
4af81310
SN
99 },
100};
101
102/**
103 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
104 * @pixelformat: fourcc to match, ignored if null
105 * @mbus_code: media bus code to match, ignored if null
e90ad659 106 * @mask: the color format flags to match
4af81310
SN
107 * @index: index to the fimc_lite_formats array, ignored if negative
108 */
109static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
e90ad659 110 const u32 *mbus_code, unsigned int mask, int index)
4af81310
SN
111{
112 const struct fimc_fmt *fmt, *def_fmt = NULL;
113 unsigned int i;
114 int id = 0;
115
116 if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
117 return NULL;
118
119 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
120 fmt = &fimc_lite_formats[i];
e90ad659
SN
121 if (mask && !(fmt->flags & mask))
122 continue;
4af81310
SN
123 if (pixelformat && fmt->fourcc == *pixelformat)
124 return fmt;
125 if (mbus_code && fmt->mbus_code == *mbus_code)
126 return fmt;
127 if (index == id)
128 def_fmt = fmt;
129 id++;
130 }
131 return def_fmt;
132}
133
756e6e14
SN
134/* Called with the media graph mutex held or @me stream_count > 0. */
135static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
136{
137 struct media_pad *pad = &me->pads[0];
138 struct v4l2_subdev *sd;
139
140 while (pad->flags & MEDIA_PAD_FL_SINK) {
141 /* source pad */
1bddf1b3 142 pad = media_entity_remote_pad(pad);
756e6e14
SN
143 if (pad == NULL ||
144 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
145 break;
146
147 sd = media_entity_to_v4l2_subdev(pad->entity);
148
149 if (sd->grp_id == GRP_ID_FIMC_IS_SENSOR ||
150 sd->grp_id == GRP_ID_SENSOR)
151 return sd;
152 /* sink pad */
153 pad = &sd->entity.pads[0];
154 }
155 return NULL;
156}
157
6319d6a0 158static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
4af81310 159{
4c8f0629 160 struct fimc_source_info *si;
4af81310
SN
161 unsigned long flags;
162
756e6e14 163 if (fimc->sensor == NULL)
4af81310
SN
164 return -ENXIO;
165
e90ad659 166 if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
4af81310
SN
167 return -EINVAL;
168
6319d6a0 169 /* Get sensor configuration data from the sensor subdev */
756e6e14 170 si = v4l2_get_subdev_hostdata(fimc->sensor);
4c8f0629
SN
171 if (!si)
172 return -EINVAL;
173
4af81310
SN
174 spin_lock_irqsave(&fimc->slock, flags);
175
4c8f0629 176 flite_hw_set_camera_bus(fimc, si);
4af81310
SN
177 flite_hw_set_source_format(fimc, &fimc->inp_frame);
178 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
6319d6a0 179 flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
4af81310
SN
180 flite_hw_set_interrupt_mask(fimc);
181 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
182
183 if (debug > 0)
184 flite_hw_dump_regs(fimc, __func__);
185
186 spin_unlock_irqrestore(&fimc->slock, flags);
187 return 0;
188}
189
190/*
191 * Reinitialize the driver so it is ready to start the streaming again.
192 * Set fimc->state to indicate stream off and the hardware shut down state.
193 * If not suspending (@suspend is false), return any buffers to videobuf2.
194 * Otherwise put any owned buffers onto the pending buffers queue, so they
195 * can be re-spun when the device is being resumed. Also perform FIMC
196 * software reset and disable streaming on the whole pipeline if required.
197 */
198static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
199{
200 struct flite_buffer *buf;
201 unsigned long flags;
202 bool streaming;
203
204 spin_lock_irqsave(&fimc->slock, flags);
205 streaming = fimc->state & (1 << ST_SENSOR_STREAM);
206
207 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
208 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
209 if (suspend)
210 fimc->state |= (1 << ST_FLITE_SUSPENDED);
211 else
212 fimc->state &= ~(1 << ST_FLITE_PENDING |
213 1 << ST_FLITE_SUSPENDED);
214
215 /* Release unused buffers */
216 while (!suspend && !list_empty(&fimc->pending_buf_q)) {
217 buf = fimc_lite_pending_queue_pop(fimc);
218 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
219 }
220 /* If suspending put unused buffers onto pending queue */
221 while (!list_empty(&fimc->active_buf_q)) {
222 buf = fimc_lite_active_queue_pop(fimc);
223 if (suspend)
224 fimc_lite_pending_queue_add(fimc, buf);
225 else
226 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
227 }
228
229 spin_unlock_irqrestore(&fimc->slock, flags);
230
231 flite_hw_reset(fimc);
232
233 if (!streaming)
234 return 0;
235
b9ee31e6 236 return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
4af81310
SN
237}
238
239static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
240{
241 unsigned long flags;
242
243 if (!fimc_lite_active(fimc))
244 return 0;
245
246 spin_lock_irqsave(&fimc->slock, flags);
247 set_bit(ST_FLITE_OFF, &fimc->state);
248 flite_hw_capture_stop(fimc);
249 spin_unlock_irqrestore(&fimc->slock, flags);
250
251 wait_event_timeout(fimc->irq_queue,
252 !test_bit(ST_FLITE_OFF, &fimc->state),
253 (2*HZ/10)); /* 200 ms */
254
255 return fimc_lite_reinit(fimc, suspend);
256}
257
258/* Must be called with fimc.slock spinlock held. */
259static void fimc_lite_config_update(struct fimc_lite *fimc)
260{
261 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
262 flite_hw_set_dma_window(fimc, &fimc->out_frame);
263 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
264 clear_bit(ST_FLITE_CONFIG, &fimc->state);
265}
266
267static irqreturn_t flite_irq_handler(int irq, void *priv)
268{
269 struct fimc_lite *fimc = priv;
270 struct flite_buffer *vbuf;
271 unsigned long flags;
272 struct timeval *tv;
273 struct timespec ts;
274 u32 intsrc;
275
276 spin_lock_irqsave(&fimc->slock, flags);
277
278 intsrc = flite_hw_get_interrupt_source(fimc);
279 flite_hw_clear_pending_irq(fimc);
280
281 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
282 wake_up(&fimc->irq_queue);
283 goto done;
284 }
285
286 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
287 clear_bit(ST_FLITE_RUN, &fimc->state);
288 fimc->events.data_overflow++;
289 }
290
291 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
292 flite_hw_clear_last_capture_end(fimc);
293 clear_bit(ST_FLITE_STREAM, &fimc->state);
294 wake_up(&fimc->irq_queue);
295 }
296
03878bb4 297 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
4af81310
SN
298 goto done;
299
300 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
301 test_bit(ST_FLITE_RUN, &fimc->state) &&
302 !list_empty(&fimc->active_buf_q) &&
303 !list_empty(&fimc->pending_buf_q)) {
304 vbuf = fimc_lite_active_queue_pop(fimc);
305 ktime_get_ts(&ts);
306 tv = &vbuf->vb.v4l2_buf.timestamp;
307 tv->tv_sec = ts.tv_sec;
308 tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
309 vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
310 vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
311
312 vbuf = fimc_lite_pending_queue_pop(fimc);
313 flite_hw_set_output_addr(fimc, vbuf->paddr);
314 fimc_lite_active_queue_add(fimc, vbuf);
315 }
316
317 if (test_bit(ST_FLITE_CONFIG, &fimc->state))
318 fimc_lite_config_update(fimc);
319
320 if (list_empty(&fimc->pending_buf_q)) {
321 flite_hw_capture_stop(fimc);
322 clear_bit(ST_FLITE_STREAM, &fimc->state);
323 }
324done:
325 set_bit(ST_FLITE_RUN, &fimc->state);
326 spin_unlock_irqrestore(&fimc->slock, flags);
327 return IRQ_HANDLED;
328}
329
330static int start_streaming(struct vb2_queue *q, unsigned int count)
331{
332 struct fimc_lite *fimc = q->drv_priv;
333 int ret;
334
335 fimc->frame_count = 0;
336
6319d6a0 337 ret = fimc_lite_hw_init(fimc, false);
4af81310
SN
338 if (ret) {
339 fimc_lite_reinit(fimc, false);
340 return ret;
341 }
342
343 set_bit(ST_FLITE_PENDING, &fimc->state);
344
345 if (!list_empty(&fimc->active_buf_q) &&
346 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
347 flite_hw_capture_start(fimc);
348
349 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
b9ee31e6
SN
350 fimc_pipeline_call(fimc, set_stream,
351 &fimc->pipeline, 1);
4af81310
SN
352 }
353 if (debug > 0)
354 flite_hw_dump_regs(fimc, __func__);
355
356 return 0;
357}
358
359static int stop_streaming(struct vb2_queue *q)
360{
361 struct fimc_lite *fimc = q->drv_priv;
362
363 if (!fimc_lite_active(fimc))
364 return -EINVAL;
365
366 return fimc_lite_stop_capture(fimc, false);
367}
368
369static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
370 unsigned int *num_buffers, unsigned int *num_planes,
371 unsigned int sizes[], void *allocators[])
372{
373 const struct v4l2_pix_format_mplane *pixm = NULL;
374 struct fimc_lite *fimc = vq->drv_priv;
375 struct flite_frame *frame = &fimc->out_frame;
e90ad659 376 const struct fimc_fmt *fmt = frame->fmt;
4af81310
SN
377 unsigned long wh;
378 int i;
379
380 if (pfmt) {
381 pixm = &pfmt->fmt.pix_mp;
e90ad659 382 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
4af81310
SN
383 wh = pixm->width * pixm->height;
384 } else {
385 wh = frame->f_width * frame->f_height;
386 }
387
388 if (fmt == NULL)
389 return -EINVAL;
390
391 *num_planes = fmt->memplanes;
392
393 for (i = 0; i < fmt->memplanes; i++) {
394 unsigned int size = (wh * fmt->depth[i]) / 8;
395 if (pixm)
396 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
397 else
398 sizes[i] = size;
399 allocators[i] = fimc->alloc_ctx;
400 }
401
402 return 0;
403}
404
405static int buffer_prepare(struct vb2_buffer *vb)
406{
407 struct vb2_queue *vq = vb->vb2_queue;
408 struct fimc_lite *fimc = vq->drv_priv;
409 int i;
410
e90ad659 411 if (fimc->out_frame.fmt == NULL)
4af81310
SN
412 return -EINVAL;
413
e90ad659 414 for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
4af81310
SN
415 unsigned long size = fimc->payload[i];
416
417 if (vb2_plane_size(vb, i) < size) {
1bcd7041 418 v4l2_err(&fimc->vfd,
4af81310
SN
419 "User buffer too small (%ld < %ld)\n",
420 vb2_plane_size(vb, i), size);
421 return -EINVAL;
422 }
423 vb2_set_plane_payload(vb, i, size);
424 }
425
426 return 0;
427}
428
429static void buffer_queue(struct vb2_buffer *vb)
430{
431 struct flite_buffer *buf
432 = container_of(vb, struct flite_buffer, vb);
433 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
434 unsigned long flags;
435
436 spin_lock_irqsave(&fimc->slock, flags);
437 buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
438
439 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
440 !test_bit(ST_FLITE_STREAM, &fimc->state) &&
441 list_empty(&fimc->active_buf_q)) {
442 flite_hw_set_output_addr(fimc, buf->paddr);
443 fimc_lite_active_queue_add(fimc, buf);
444 } else {
445 fimc_lite_pending_queue_add(fimc, buf);
446 }
447
448 if (vb2_is_streaming(&fimc->vb_queue) &&
449 !list_empty(&fimc->pending_buf_q) &&
450 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
451 flite_hw_capture_start(fimc);
452 spin_unlock_irqrestore(&fimc->slock, flags);
453
454 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
b9ee31e6
SN
455 fimc_pipeline_call(fimc, set_stream,
456 &fimc->pipeline, 1);
4af81310
SN
457 return;
458 }
459 spin_unlock_irqrestore(&fimc->slock, flags);
460}
461
4af81310
SN
462static const struct vb2_ops fimc_lite_qops = {
463 .queue_setup = queue_setup,
464 .buf_prepare = buffer_prepare,
465 .buf_queue = buffer_queue,
ee12b049
SN
466 .wait_prepare = vb2_ops_wait_prepare,
467 .wait_finish = vb2_ops_wait_finish,
4af81310
SN
468 .start_streaming = start_streaming,
469 .stop_streaming = stop_streaming,
470};
471
472static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
473{
474 unsigned long flags;
475
476 spin_lock_irqsave(&fimc->slock, flags);
477 memset(&fimc->events, 0, sizeof(fimc->events));
478 spin_unlock_irqrestore(&fimc->slock, flags);
479}
480
481static int fimc_lite_open(struct file *file)
482{
483 struct fimc_lite *fimc = video_drvdata(file);
740ad921 484 struct media_entity *me = &fimc->vfd.entity;
e3fc82e8 485 int ret;
4af81310 486
740ad921 487 mutex_lock(&me->parent->graph_mutex);
4af81310 488
740ad921 489 mutex_lock(&fimc->lock);
03878bb4 490 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
6319d6a0 491 ret = -EBUSY;
ee12b049 492 goto unlock;
6319d6a0
SN
493 }
494
4af81310 495 set_bit(ST_FLITE_IN_USE, &fimc->state);
e3fc82e8
SN
496 ret = pm_runtime_get_sync(&fimc->pdev->dev);
497 if (ret < 0)
ee12b049 498 goto unlock;
4af81310 499
e3fc82e8
SN
500 ret = v4l2_fh_open(file);
501 if (ret < 0)
ee12b049 502 goto err_pm;
4af81310 503
ee12b049
SN
504 if (!v4l2_fh_is_singular_file(file) ||
505 atomic_read(&fimc->out_path) != FIMC_IO_DMA)
506 goto unlock;
4af81310 507
ee12b049
SN
508 ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
509 me, true);
510 if (!ret) {
4e39da01 511 fimc_lite_clear_event_counters(fimc);
ee12b049
SN
512 fimc->ref_count++;
513 goto unlock;
4e39da01 514 }
ee12b049
SN
515
516 v4l2_fh_release(file);
517err_pm:
518 pm_runtime_put_sync(&fimc->pdev->dev);
519 clear_bit(ST_FLITE_IN_USE, &fimc->state);
520unlock:
4e39da01 521 mutex_unlock(&fimc->lock);
740ad921 522 mutex_unlock(&me->parent->graph_mutex);
4af81310
SN
523 return ret;
524}
525
ee12b049 526static int fimc_lite_release(struct file *file)
4af81310
SN
527{
528 struct fimc_lite *fimc = video_drvdata(file);
4e39da01 529
ddc43d6d 530 mutex_lock(&fimc->lock);
4af81310 531
ee12b049 532 if (v4l2_fh_is_singular_file(file) &&
03878bb4 533 atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
9ea89e2b
SN
534 if (fimc->streaming) {
535 media_entity_pipeline_stop(&fimc->vfd.entity);
536 fimc->streaming = false;
537 }
4af81310
SN
538 clear_bit(ST_FLITE_IN_USE, &fimc->state);
539 fimc_lite_stop_capture(fimc, false);
b9ee31e6 540 fimc_pipeline_call(fimc, close, &fimc->pipeline);
ee12b049 541 fimc->ref_count--;
4af81310
SN
542 }
543
ee12b049 544 vb2_fop_release(file);
4af81310 545 pm_runtime_put(&fimc->pdev->dev);
ee12b049 546 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
4af81310 547
4e39da01 548 mutex_unlock(&fimc->lock);
ee12b049 549 return 0;
4af81310
SN
550}
551
552static const struct v4l2_file_operations fimc_lite_fops = {
553 .owner = THIS_MODULE,
554 .open = fimc_lite_open,
ee12b049
SN
555 .release = fimc_lite_release,
556 .poll = vb2_fop_poll,
4af81310 557 .unlocked_ioctl = video_ioctl2,
ee12b049 558 .mmap = vb2_fop_mmap,
4af81310
SN
559};
560
561/*
562 * Format and crop negotiation helpers
563 */
564
565static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
566 u32 *width, u32 *height,
567 u32 *code, u32 *fourcc, int pad)
568{
9c8399c8 569 struct flite_drvdata *dd = fimc->dd;
4af81310 570 const struct fimc_fmt *fmt;
e90ad659 571 unsigned int flags = 0;
4af81310
SN
572
573 if (pad == FLITE_SD_PAD_SINK) {
9c8399c8
SN
574 v4l_bound_align_image(width, 8, dd->max_width,
575 ffs(dd->out_width_align) - 1,
576 height, 0, dd->max_height, 0, 0);
4af81310
SN
577 } else {
578 v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
9c8399c8 579 ffs(dd->out_width_align) - 1,
4af81310
SN
580 height, 0, fimc->inp_frame.rect.height,
581 0, 0);
e90ad659 582 flags = fimc->inp_frame.fmt->flags;
4af81310
SN
583 }
584
e90ad659
SN
585 fmt = fimc_lite_find_format(fourcc, code, flags, 0);
586 if (WARN_ON(!fmt))
587 return NULL;
588
589 if (code)
590 *code = fmt->mbus_code;
591 if (fourcc)
592 *fourcc = fmt->fourcc;
593
4af81310
SN
594 v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
595 code ? *code : 0, *width, *height);
596
597 return fmt;
598}
599
600static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
601{
602 struct flite_frame *frame = &fimc->inp_frame;
603
604 v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
605 &r->height, 0, frame->f_height, 0, 0);
606
607 /* Adjust left/top if cropping rectangle got out of bounds */
608 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
9c8399c8 609 r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
4af81310
SN
610 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
611
969e877c 612 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
4af81310
SN
613 r->left, r->top, r->width, r->height,
614 frame->f_width, frame->f_height);
615}
616
617static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
618{
619 struct flite_frame *frame = &fimc->out_frame;
620 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
621
622 /* Scaling is not supported so we enforce compose rectangle size
623 same as size of the sink crop rectangle. */
624 r->width = crop_rect->width;
625 r->height = crop_rect->height;
626
627 /* Adjust left/top if the composing rectangle got out of bounds */
628 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
9c8399c8 629 r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
4af81310
SN
630 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
631
969e877c 632 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
4af81310
SN
633 r->left, r->top, r->width, r->height,
634 frame->f_width, frame->f_height);
635}
636
637/*
638 * Video node ioctl operations
639 */
793ad32d 640static int fimc_lite_querycap(struct file *file, void *priv,
4af81310
SN
641 struct v4l2_capability *cap)
642{
793ad32d
SN
643 struct fimc_lite *fimc = video_drvdata(file);
644
4af81310 645 strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
793ad32d
SN
646 strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
647 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
648 dev_name(&fimc->pdev->dev));
649
650 cap->device_caps = V4L2_CAP_STREAMING;
651 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
4af81310
SN
652 return 0;
653}
654
655static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
656 struct v4l2_fmtdesc *f)
657{
658 const struct fimc_fmt *fmt;
659
660 if (f->index >= ARRAY_SIZE(fimc_lite_formats))
661 return -EINVAL;
662
663 fmt = &fimc_lite_formats[f->index];
664 strlcpy(f->description, fmt->name, sizeof(f->description));
665 f->pixelformat = fmt->fourcc;
666
667 return 0;
668}
669
670static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
671 struct v4l2_format *f)
672{
673 struct fimc_lite *fimc = video_drvdata(file);
674 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
675 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
676 struct flite_frame *frame = &fimc->out_frame;
e90ad659 677 const struct fimc_fmt *fmt = frame->fmt;
4af81310
SN
678
679 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
680 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
681
682 pixm->num_planes = fmt->memplanes;
683 pixm->pixelformat = fmt->fourcc;
684 pixm->width = frame->f_width;
685 pixm->height = frame->f_height;
686 pixm->field = V4L2_FIELD_NONE;
687 pixm->colorspace = V4L2_COLORSPACE_JPEG;
688 return 0;
689}
690
691static int fimc_lite_try_fmt(struct fimc_lite *fimc,
692 struct v4l2_pix_format_mplane *pixm,
693 const struct fimc_fmt **ffmt)
694{
4af81310 695 u32 bpl = pixm->plane_fmt[0].bytesperline;
9c8399c8 696 struct flite_drvdata *dd = fimc->dd;
e90ad659 697 const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
4af81310
SN
698 const struct fimc_fmt *fmt;
699
e90ad659
SN
700 if (WARN_ON(inp_fmt == NULL))
701 return -EINVAL;
702 /*
703 * We allow some flexibility only for YUV formats. In case of raw
704 * raw Bayer the FIMC-LITE's output format must match its camera
705 * interface input format.
706 */
707 if (inp_fmt->flags & FMT_FLAGS_YUV)
708 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
709 inp_fmt->flags, 0);
710 else
711 fmt = inp_fmt;
712
4af81310
SN
713 if (WARN_ON(fmt == NULL))
714 return -EINVAL;
715 if (ffmt)
716 *ffmt = fmt;
9c8399c8
SN
717 v4l_bound_align_image(&pixm->width, 8, dd->max_width,
718 ffs(dd->out_width_align) - 1,
719 &pixm->height, 0, dd->max_height, 0, 0);
4af81310
SN
720
721 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
722 pixm->plane_fmt[0].bytesperline = (pixm->width *
723 fmt->depth[0]) / 8;
724
725 if (pixm->plane_fmt[0].sizeimage == 0)
726 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
727 fmt->depth[0]) / 8;
728 pixm->num_planes = fmt->memplanes;
729 pixm->pixelformat = fmt->fourcc;
730 pixm->colorspace = V4L2_COLORSPACE_JPEG;
731 pixm->field = V4L2_FIELD_NONE;
732 return 0;
733}
734
735static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
736 struct v4l2_format *f)
737{
738 struct fimc_lite *fimc = video_drvdata(file);
4af81310
SN
739 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
740}
741
742static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
743 struct v4l2_format *f)
744{
745 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
746 struct fimc_lite *fimc = video_drvdata(file);
747 struct flite_frame *frame = &fimc->out_frame;
748 const struct fimc_fmt *fmt = NULL;
749 int ret;
750
751 if (vb2_is_busy(&fimc->vb_queue))
752 return -EBUSY;
753
754 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
755 if (ret < 0)
756 return ret;
757
e90ad659 758 frame->fmt = fmt;
4af81310
SN
759 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
760 pixm->plane_fmt[0].sizeimage);
761 frame->f_width = pixm->width;
762 frame->f_height = pixm->height;
763
764 return 0;
765}
766
767static int fimc_pipeline_validate(struct fimc_lite *fimc)
768{
769 struct v4l2_subdev *sd = &fimc->subdev;
770 struct v4l2_subdev_format sink_fmt, src_fmt;
771 struct media_pad *pad;
772 int ret;
773
774 while (1) {
775 /* Retrieve format at the sink pad */
776 pad = &sd->entity.pads[0];
777 if (!(pad->flags & MEDIA_PAD_FL_SINK))
778 break;
779 /* Don't call FIMC subdev operation to avoid nested locking */
780 if (sd == &fimc->subdev) {
781 struct flite_frame *ff = &fimc->out_frame;
782 sink_fmt.format.width = ff->f_width;
783 sink_fmt.format.height = ff->f_height;
e90ad659 784 sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
4af81310
SN
785 } else {
786 sink_fmt.pad = pad->index;
787 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
788 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
789 &sink_fmt);
790 if (ret < 0 && ret != -ENOIOCTLCMD)
791 return -EPIPE;
792 }
793 /* Retrieve format at the source pad */
1bddf1b3 794 pad = media_entity_remote_pad(pad);
4af81310
SN
795 if (pad == NULL ||
796 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
797 break;
798
799 sd = media_entity_to_v4l2_subdev(pad->entity);
800 src_fmt.pad = pad->index;
801 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
802 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
803 if (ret < 0 && ret != -ENOIOCTLCMD)
804 return -EPIPE;
805
806 if (src_fmt.format.width != sink_fmt.format.width ||
807 src_fmt.format.height != sink_fmt.format.height ||
808 src_fmt.format.code != sink_fmt.format.code)
809 return -EPIPE;
810 }
811 return 0;
812}
813
814static int fimc_lite_streamon(struct file *file, void *priv,
815 enum v4l2_buf_type type)
816{
817 struct fimc_lite *fimc = video_drvdata(file);
95c4a17f 818 struct media_entity *entity = &fimc->vfd.entity;
4af81310
SN
819 struct fimc_pipeline *p = &fimc->pipeline;
820 int ret;
821
822 if (fimc_lite_active(fimc))
823 return -EBUSY;
824
95c4a17f 825 ret = media_entity_pipeline_start(entity, p->m_pipeline);
a1a5861b
SK
826 if (ret < 0)
827 return ret;
4af81310
SN
828
829 ret = fimc_pipeline_validate(fimc);
ee12b049
SN
830 if (ret < 0)
831 goto err_p_stop;
4af81310 832
756e6e14
SN
833 fimc->sensor = __find_remote_sensor(&fimc->subdev.entity);
834
ee12b049 835 ret = vb2_ioctl_streamon(file, priv, type);
9ea89e2b
SN
836 if (!ret) {
837 fimc->streaming = true;
ee12b049 838 return ret;
9ea89e2b
SN
839 }
840
ee12b049
SN
841err_p_stop:
842 media_entity_pipeline_stop(entity);
843 return 0;
4af81310
SN
844}
845
846static int fimc_lite_streamoff(struct file *file, void *priv,
847 enum v4l2_buf_type type)
848{
849 struct fimc_lite *fimc = video_drvdata(file);
4af81310
SN
850 int ret;
851
ee12b049 852 ret = vb2_ioctl_streamoff(file, priv, type);
9ea89e2b
SN
853 if (ret < 0)
854 return ret;
855
856 media_entity_pipeline_stop(&fimc->vfd.entity);
857 fimc->streaming = false;
858 return 0;
4af81310
SN
859}
860
861static int fimc_lite_reqbufs(struct file *file, void *priv,
862 struct v4l2_requestbuffers *reqbufs)
863{
864 struct fimc_lite *fimc = video_drvdata(file);
865 int ret;
866
867 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
ee12b049 868 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
f68247fc 869 if (!ret)
4af81310
SN
870 fimc->reqbufs_count = reqbufs->count;
871
872 return ret;
873}
874
4af81310
SN
875/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
876static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
877{
878 if (a->left < b->left || a->top < b->top)
879 return 0;
880 if (a->left + a->width > b->left + b->width)
881 return 0;
882 if (a->top + a->height > b->top + b->height)
883 return 0;
884
885 return 1;
886}
887
888static int fimc_lite_g_selection(struct file *file, void *fh,
889 struct v4l2_selection *sel)
890{
891 struct fimc_lite *fimc = video_drvdata(file);
892 struct flite_frame *f = &fimc->out_frame;
893
894 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
895 return -EINVAL;
896
897 switch (sel->target) {
898 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
899 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
900 sel->r.left = 0;
901 sel->r.top = 0;
902 sel->r.width = f->f_width;
903 sel->r.height = f->f_height;
904 return 0;
905
c1334823 906 case V4L2_SEL_TGT_COMPOSE:
4af81310
SN
907 sel->r = f->rect;
908 return 0;
909 }
910
911 return -EINVAL;
912}
913
914static int fimc_lite_s_selection(struct file *file, void *fh,
915 struct v4l2_selection *sel)
916{
917 struct fimc_lite *fimc = video_drvdata(file);
918 struct flite_frame *f = &fimc->out_frame;
919 struct v4l2_rect rect = sel->r;
920 unsigned long flags;
921
922 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
c1334823 923 sel->target != V4L2_SEL_TGT_COMPOSE)
4af81310
SN
924 return -EINVAL;
925
926 fimc_lite_try_compose(fimc, &rect);
927
928 if ((sel->flags & V4L2_SEL_FLAG_LE) &&
929 !enclosed_rectangle(&rect, &sel->r))
930 return -ERANGE;
931
932 if ((sel->flags & V4L2_SEL_FLAG_GE) &&
933 !enclosed_rectangle(&sel->r, &rect))
934 return -ERANGE;
935
936 sel->r = rect;
937 spin_lock_irqsave(&fimc->slock, flags);
938 f->rect = rect;
939 set_bit(ST_FLITE_CONFIG, &fimc->state);
940 spin_unlock_irqrestore(&fimc->slock, flags);
941
942 return 0;
943}
944
945static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
793ad32d 946 .vidioc_querycap = fimc_lite_querycap,
4af81310
SN
947 .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
948 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
949 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
950 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
951 .vidioc_g_selection = fimc_lite_g_selection,
952 .vidioc_s_selection = fimc_lite_s_selection,
953 .vidioc_reqbufs = fimc_lite_reqbufs,
ee12b049
SN
954 .vidioc_querybuf = vb2_ioctl_querybuf,
955 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
956 .vidioc_create_bufs = vb2_ioctl_create_bufs,
957 .vidioc_qbuf = vb2_ioctl_qbuf,
958 .vidioc_dqbuf = vb2_ioctl_dqbuf,
4af81310
SN
959 .vidioc_streamon = fimc_lite_streamon,
960 .vidioc_streamoff = fimc_lite_streamoff,
961};
962
963/* Capture subdev media entity operations */
964static int fimc_lite_link_setup(struct media_entity *entity,
965 const struct media_pad *local,
966 const struct media_pad *remote, u32 flags)
967{
968 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
969 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
970 unsigned int remote_ent_type = media_entity_type(remote->entity);
6319d6a0 971 int ret = 0;
4af81310
SN
972
973 if (WARN_ON(fimc == NULL))
974 return 0;
975
969e877c 976 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
6319d6a0 977 __func__, remote->entity->name, local->entity->name,
4af81310
SN
978 flags, fimc->source_subdev_grp_id);
979
6319d6a0 980 mutex_lock(&fimc->lock);
4af81310 981
6319d6a0
SN
982 switch (local->index) {
983 case FLITE_SD_PAD_SINK:
984 if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
985 ret = -EINVAL;
986 break;
987 }
4af81310 988 if (flags & MEDIA_LNK_FL_ENABLED) {
6319d6a0
SN
989 if (fimc->source_subdev_grp_id == 0)
990 fimc->source_subdev_grp_id = sd->grp_id;
991 else
992 ret = -EBUSY;
993 } else {
994 fimc->source_subdev_grp_id = 0;
995 fimc->sensor = NULL;
4af81310 996 }
6319d6a0 997 break;
4af81310 998
6319d6a0
SN
999 case FLITE_SD_PAD_SOURCE_DMA:
1000 if (!(flags & MEDIA_LNK_FL_ENABLED))
03878bb4 1001 atomic_set(&fimc->out_path, FIMC_IO_NONE);
6319d6a0 1002 else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
03878bb4 1003 atomic_set(&fimc->out_path, FIMC_IO_DMA);
6319d6a0
SN
1004 else
1005 ret = -EINVAL;
4af81310
SN
1006 break;
1007
6319d6a0
SN
1008 case FLITE_SD_PAD_SOURCE_ISP:
1009 if (!(flags & MEDIA_LNK_FL_ENABLED))
03878bb4 1010 atomic_set(&fimc->out_path, FIMC_IO_NONE);
6319d6a0 1011 else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
03878bb4 1012 atomic_set(&fimc->out_path, FIMC_IO_ISP);
4af81310 1013 else
6319d6a0 1014 ret = -EINVAL;
4af81310
SN
1015 break;
1016
1017 default:
1018 v4l2_err(sd, "Invalid pad index\n");
6319d6a0 1019 ret = -EINVAL;
4af81310 1020 }
03878bb4 1021 mb();
4af81310 1022
6319d6a0
SN
1023 mutex_unlock(&fimc->lock);
1024 return ret;
4af81310
SN
1025}
1026
1027static const struct media_entity_operations fimc_lite_subdev_media_ops = {
1028 .link_setup = fimc_lite_link_setup,
1029};
1030
1031static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1032 struct v4l2_subdev_fh *fh,
1033 struct v4l2_subdev_mbus_code_enum *code)
1034{
1035 const struct fimc_fmt *fmt;
1036
e90ad659 1037 fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
4af81310
SN
1038 if (!fmt)
1039 return -EINVAL;
1040 code->code = fmt->mbus_code;
1041 return 0;
1042}
1043
1044static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1045 struct v4l2_subdev_fh *fh,
1046 struct v4l2_subdev_format *fmt)
1047{
1048 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1049 struct v4l2_mbus_framefmt *mf = &fmt->format;
e90ad659 1050 struct flite_frame *f = &fimc->inp_frame;
4af81310
SN
1051
1052 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1053 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1054 fmt->format = *mf;
1055 return 0;
1056 }
1057 mf->colorspace = V4L2_COLORSPACE_JPEG;
1058
1059 mutex_lock(&fimc->lock);
e90ad659 1060 mf->code = f->fmt->mbus_code;
4af81310
SN
1061
1062 if (fmt->pad == FLITE_SD_PAD_SINK) {
1063 /* full camera input frame size */
1064 mf->width = f->f_width;
1065 mf->height = f->f_height;
1066 } else {
1067 /* crop size */
1068 mf->width = f->rect.width;
1069 mf->height = f->rect.height;
1070 }
1071 mutex_unlock(&fimc->lock);
1072 return 0;
1073}
1074
1075static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1076 struct v4l2_subdev_fh *fh,
1077 struct v4l2_subdev_format *fmt)
1078{
1079 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1080 struct v4l2_mbus_framefmt *mf = &fmt->format;
1081 struct flite_frame *sink = &fimc->inp_frame;
9356ac76 1082 struct flite_frame *source = &fimc->out_frame;
4af81310
SN
1083 const struct fimc_fmt *ffmt;
1084
969e877c 1085 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
4af81310
SN
1086 fmt->pad, mf->code, mf->width, mf->height);
1087
1088 mf->colorspace = V4L2_COLORSPACE_JPEG;
1089 mutex_lock(&fimc->lock);
1090
03878bb4
SN
1091 if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1092 sd->entity.stream_count > 0) ||
1093 (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1094 vb2_is_busy(&fimc->vb_queue))) {
4af81310
SN
1095 mutex_unlock(&fimc->lock);
1096 return -EBUSY;
1097 }
1098
1099 ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
1100 &mf->code, NULL, fmt->pad);
1101
1102 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1103 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1104 *mf = fmt->format;
1105 mutex_unlock(&fimc->lock);
1106 return 0;
1107 }
1108
1109 if (fmt->pad == FLITE_SD_PAD_SINK) {
1110 sink->f_width = mf->width;
1111 sink->f_height = mf->height;
e90ad659 1112 sink->fmt = ffmt;
4af81310
SN
1113 /* Set sink crop rectangle */
1114 sink->rect.width = mf->width;
1115 sink->rect.height = mf->height;
1116 sink->rect.left = 0;
1117 sink->rect.top = 0;
9356ac76
SN
1118 /* Reset source format and crop rectangle */
1119 source->rect = sink->rect;
1120 source->f_width = mf->width;
1121 source->f_height = mf->height;
4af81310
SN
1122 } else {
1123 /* Allow changing format only on sink pad */
e90ad659 1124 mf->code = sink->fmt->mbus_code;
4af81310
SN
1125 mf->width = sink->rect.width;
1126 mf->height = sink->rect.height;
1127 }
1128
1129 mutex_unlock(&fimc->lock);
1130 return 0;
1131}
1132
1133static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1134 struct v4l2_subdev_fh *fh,
1135 struct v4l2_subdev_selection *sel)
1136{
1137 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1138 struct flite_frame *f = &fimc->inp_frame;
1139
5689b288
SA
1140 if ((sel->target != V4L2_SEL_TGT_CROP &&
1141 sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1142 sel->pad != FLITE_SD_PAD_SINK)
4af81310
SN
1143 return -EINVAL;
1144
1145 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1146 sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
1147 return 0;
1148 }
1149
1150 mutex_lock(&fimc->lock);
5689b288 1151 if (sel->target == V4L2_SEL_TGT_CROP) {
4af81310
SN
1152 sel->r = f->rect;
1153 } else {
1154 sel->r.left = 0;
1155 sel->r.top = 0;
1156 sel->r.width = f->f_width;
1157 sel->r.height = f->f_height;
1158 }
1159 mutex_unlock(&fimc->lock);
1160
969e877c 1161 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
4af81310
SN
1162 __func__, f->rect.left, f->rect.top, f->rect.width,
1163 f->rect.height, f->f_width, f->f_height);
1164
1165 return 0;
1166}
1167
1168static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1169 struct v4l2_subdev_fh *fh,
1170 struct v4l2_subdev_selection *sel)
1171{
1172 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1173 struct flite_frame *f = &fimc->inp_frame;
1174 int ret = 0;
1175
5689b288 1176 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
4af81310
SN
1177 return -EINVAL;
1178
1179 mutex_lock(&fimc->lock);
1180 fimc_lite_try_crop(fimc, &sel->r);
1181
1182 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1183 *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
1184 } else {
1185 unsigned long flags;
1186 spin_lock_irqsave(&fimc->slock, flags);
1187 f->rect = sel->r;
1188 /* Same crop rectangle on the source pad */
1189 fimc->out_frame.rect = sel->r;
1190 set_bit(ST_FLITE_CONFIG, &fimc->state);
1191 spin_unlock_irqrestore(&fimc->slock, flags);
1192 }
1193 mutex_unlock(&fimc->lock);
1194
969e877c 1195 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
4af81310
SN
1196 __func__, f->rect.left, f->rect.top, f->rect.width,
1197 f->rect.height, f->f_width, f->f_height);
1198
1199 return ret;
1200}
1201
1202static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1203{
1204 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
6319d6a0
SN
1205 unsigned long flags;
1206 int ret;
4af81310 1207
6319d6a0
SN
1208 /*
1209 * Find sensor subdev linked to FIMC-LITE directly or through
1210 * MIPI-CSIS. This is required for configuration where FIMC-LITE
1211 * is used as a subdev only and feeds data internally to FIMC-IS.
1212 * The pipeline links are protected through entity.stream_count
1213 * so there is no need to take the media graph mutex here.
1214 */
1215 fimc->sensor = __find_remote_sensor(&sd->entity);
1216
03878bb4 1217 if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
4af81310
SN
1218 return -ENOIOCTLCMD;
1219
03878bb4 1220 mutex_lock(&fimc->lock);
6319d6a0
SN
1221 if (on) {
1222 flite_hw_reset(fimc);
1223 ret = fimc_lite_hw_init(fimc, true);
1224 if (!ret) {
1225 spin_lock_irqsave(&fimc->slock, flags);
1226 flite_hw_capture_start(fimc);
1227 spin_unlock_irqrestore(&fimc->slock, flags);
1228 }
1229 } else {
1230 set_bit(ST_FLITE_OFF, &fimc->state);
4af81310 1231
6319d6a0
SN
1232 spin_lock_irqsave(&fimc->slock, flags);
1233 flite_hw_capture_stop(fimc);
1234 spin_unlock_irqrestore(&fimc->slock, flags);
1235
1236 ret = wait_event_timeout(fimc->irq_queue,
1237 !test_bit(ST_FLITE_OFF, &fimc->state),
1238 msecs_to_jiffies(200));
1239 if (ret == 0)
1240 v4l2_err(sd, "s_stream(0) timeout\n");
1241 clear_bit(ST_FLITE_RUN, &fimc->state);
1242 }
1243
1244 mutex_unlock(&fimc->lock);
1245 return ret;
4af81310
SN
1246}
1247
4af81310
SN
1248static int fimc_lite_log_status(struct v4l2_subdev *sd)
1249{
1250 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1251
1252 flite_hw_dump_regs(fimc, __func__);
1253 return 0;
1254}
1255
1256static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1257{
1258 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1259 struct vb2_queue *q = &fimc->vb_queue;
1bcd7041 1260 struct video_device *vfd = &fimc->vfd;
4af81310
SN
1261 int ret;
1262
1bcd7041
SN
1263 memset(vfd, 0, sizeof(*vfd));
1264
e90ad659
SN
1265 fimc->inp_frame.fmt = &fimc_lite_formats[0];
1266 fimc->out_frame.fmt = &fimc_lite_formats[0];
03878bb4 1267 atomic_set(&fimc->out_path, FIMC_IO_DMA);
4af81310 1268
4af81310
SN
1269 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1270 fimc->index);
1271
1272 vfd->fops = &fimc_lite_fops;
1273 vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1274 vfd->v4l2_dev = sd->v4l2_dev;
1275 vfd->minor = -1;
1bcd7041 1276 vfd->release = video_device_release_empty;
ee12b049 1277 vfd->queue = q;
4af81310
SN
1278 fimc->reqbufs_count = 0;
1279
1280 INIT_LIST_HEAD(&fimc->pending_buf_q);
1281 INIT_LIST_HEAD(&fimc->active_buf_q);
1282
1283 memset(q, 0, sizeof(*q));
1284 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1285 q->io_modes = VB2_MMAP | VB2_USERPTR;
1286 q->ops = &fimc_lite_qops;
1287 q->mem_ops = &vb2_dma_contig_memops;
1288 q->buf_struct_size = sizeof(struct flite_buffer);
1289 q->drv_priv = fimc;
6aa69f99 1290 q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
ee12b049 1291 q->lock = &fimc->lock;
4af81310 1292
41fd087f
SN
1293 ret = vb2_queue_init(q);
1294 if (ret < 0)
1295 return ret;
4af81310
SN
1296
1297 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1298 ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
1bcd7041
SN
1299 if (ret < 0)
1300 return ret;
4af81310
SN
1301
1302 video_set_drvdata(vfd, fimc);
97d66c47 1303 fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
4af81310
SN
1304
1305 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1bcd7041
SN
1306 if (ret < 0) {
1307 media_entity_cleanup(&vfd->entity);
97d66c47 1308 fimc->pipeline_ops = NULL;
1bcd7041
SN
1309 return ret;
1310 }
4af81310
SN
1311
1312 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1313 vfd->name, video_device_node_name(vfd));
1314 return 0;
4af81310
SN
1315}
1316
1317static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1318{
1319 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1320
1321 if (fimc == NULL)
1322 return;
1323
1bcd7041
SN
1324 if (video_is_registered(&fimc->vfd)) {
1325 video_unregister_device(&fimc->vfd);
1326 media_entity_cleanup(&fimc->vfd.entity);
97d66c47 1327 fimc->pipeline_ops = NULL;
4af81310
SN
1328 }
1329}
1330
1331static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1332 .registered = fimc_lite_subdev_registered,
1333 .unregistered = fimc_lite_subdev_unregistered,
1334};
1335
1336static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1337 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1338 .get_selection = fimc_lite_subdev_get_selection,
1339 .set_selection = fimc_lite_subdev_set_selection,
1340 .get_fmt = fimc_lite_subdev_get_fmt,
1341 .set_fmt = fimc_lite_subdev_set_fmt,
1342};
1343
1344static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1345 .s_stream = fimc_lite_subdev_s_stream,
1346};
1347
1348static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
4af81310
SN
1349 .log_status = fimc_lite_log_status,
1350};
1351
1352static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1353 .core = &fimc_lite_core_ops,
1354 .video = &fimc_lite_subdev_video_ops,
1355 .pad = &fimc_lite_subdev_pad_ops,
1356};
1357
1358static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1359{
1360 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1361 ctrl_handler);
1362 set_bit(ST_FLITE_CONFIG, &fimc->state);
1363 return 0;
1364}
1365
1366static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1367 .s_ctrl = fimc_lite_s_ctrl,
1368};
1369
1370static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1371 .ops = &fimc_lite_ctrl_ops,
1372 .id = V4L2_CTRL_CLASS_USER | 0x1001,
1373 .type = V4L2_CTRL_TYPE_BOOLEAN,
1374 .name = "Test Pattern 640x480",
4cec1893 1375 .step = 1,
4af81310
SN
1376};
1377
1378static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1379{
1380 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1381 struct v4l2_subdev *sd = &fimc->subdev;
1382 int ret;
1383
1384 v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
5a66561f 1385 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
4af81310
SN
1386 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1387
6319d6a0
SN
1388 fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1389 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1390 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1391 ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
4af81310
SN
1392 fimc->subdev_pads, 0);
1393 if (ret)
1394 return ret;
1395
1396 v4l2_ctrl_handler_init(handler, 1);
1397 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1398 NULL);
1399 if (handler->error) {
1400 media_entity_cleanup(&sd->entity);
1401 return handler->error;
1402 }
1403
1404 sd->ctrl_handler = handler;
1405 sd->internal_ops = &fimc_lite_subdev_internal_ops;
1406 sd->entity.ops = &fimc_lite_subdev_media_ops;
a59ed48f 1407 sd->owner = THIS_MODULE;
4af81310
SN
1408 v4l2_set_subdevdata(sd, fimc);
1409
1410 return 0;
1411}
1412
1413static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1414{
1415 struct v4l2_subdev *sd = &fimc->subdev;
1416
1417 v4l2_device_unregister_subdev(sd);
1418 media_entity_cleanup(&sd->entity);
1419 v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1420 v4l2_set_subdevdata(sd, NULL);
1421}
1422
1423static void fimc_lite_clk_put(struct fimc_lite *fimc)
1424{
24f99dd0 1425 if (IS_ERR(fimc->clock))
4af81310
SN
1426 return;
1427
1428 clk_unprepare(fimc->clock);
1429 clk_put(fimc->clock);
24f99dd0 1430 fimc->clock = ERR_PTR(-EINVAL);
4af81310
SN
1431}
1432
1433static int fimc_lite_clk_get(struct fimc_lite *fimc)
1434{
1435 int ret;
1436
1437 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1438 if (IS_ERR(fimc->clock))
1439 return PTR_ERR(fimc->clock);
1440
1441 ret = clk_prepare(fimc->clock);
1442 if (ret < 0) {
1443 clk_put(fimc->clock);
24f99dd0 1444 fimc->clock = ERR_PTR(-EINVAL);
4af81310
SN
1445 }
1446 return ret;
1447}
1448
eb62d9e9
SN
1449static const struct of_device_id flite_of_match[];
1450
4c62e976 1451static int fimc_lite_probe(struct platform_device *pdev)
4af81310 1452{
eb62d9e9
SN
1453 struct flite_drvdata *drv_data = NULL;
1454 struct device *dev = &pdev->dev;
1455 const struct of_device_id *of_id;
4af81310
SN
1456 struct fimc_lite *fimc;
1457 struct resource *res;
1458 int ret;
1459
eb62d9e9 1460 fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
4af81310
SN
1461 if (!fimc)
1462 return -ENOMEM;
1463
eb62d9e9
SN
1464 if (dev->of_node) {
1465 of_id = of_match_node(flite_of_match, dev->of_node);
1466 if (of_id)
1467 drv_data = (struct flite_drvdata *)of_id->data;
1468 fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
1469 } else {
1470 drv_data = fimc_lite_get_drvdata(pdev);
1471 fimc->index = pdev->id;
1472 }
1473
1474 if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
1475 return -EINVAL;
1476
9c8399c8 1477 fimc->dd = drv_data;
4af81310
SN
1478 fimc->pdev = pdev;
1479
1480 init_waitqueue_head(&fimc->irq_queue);
1481 spin_lock_init(&fimc->slock);
1482 mutex_init(&fimc->lock);
1483
1484 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
eb62d9e9 1485 fimc->regs = devm_ioremap_resource(dev, res);
f23999ec
TR
1486 if (IS_ERR(fimc->regs))
1487 return PTR_ERR(fimc->regs);
4af81310
SN
1488
1489 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1490 if (res == NULL) {
eb62d9e9 1491 dev_err(dev, "Failed to get IRQ resource\n");
4af81310
SN
1492 return -ENXIO;
1493 }
1494
1495 ret = fimc_lite_clk_get(fimc);
1496 if (ret)
1497 return ret;
1498
eb62d9e9
SN
1499 ret = devm_request_irq(dev, res->start, flite_irq_handler,
1500 0, dev_name(dev), fimc);
4af81310 1501 if (ret) {
eb62d9e9 1502 dev_err(dev, "Failed to install irq (%d)\n", ret);
4af81310
SN
1503 goto err_clk;
1504 }
1505
1506 /* The video node will be created within the subdev's registered() op */
1507 ret = fimc_lite_create_capture_subdev(fimc);
1508 if (ret)
1509 goto err_clk;
1510
1511 platform_set_drvdata(pdev, fimc);
eb62d9e9
SN
1512 pm_runtime_enable(dev);
1513 ret = pm_runtime_get_sync(dev);
4af81310
SN
1514 if (ret < 0)
1515 goto err_sd;
1516
eb62d9e9 1517 fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
4af81310
SN
1518 if (IS_ERR(fimc->alloc_ctx)) {
1519 ret = PTR_ERR(fimc->alloc_ctx);
1520 goto err_pm;
1521 }
eb62d9e9 1522 pm_runtime_put(dev);
4af81310 1523
eb62d9e9 1524 dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
4af81310
SN
1525 fimc->index);
1526 return 0;
1527err_pm:
eb62d9e9 1528 pm_runtime_put(dev);
4af81310
SN
1529err_sd:
1530 fimc_lite_unregister_capture_subdev(fimc);
1531err_clk:
1532 fimc_lite_clk_put(fimc);
1533 return ret;
1534}
1535
1536static int fimc_lite_runtime_resume(struct device *dev)
1537{
1538 struct fimc_lite *fimc = dev_get_drvdata(dev);
1539
1540 clk_enable(fimc->clock);
1541 return 0;
1542}
1543
1544static int fimc_lite_runtime_suspend(struct device *dev)
1545{
1546 struct fimc_lite *fimc = dev_get_drvdata(dev);
1547
1548 clk_disable(fimc->clock);
1549 return 0;
1550}
1551
1552#ifdef CONFIG_PM_SLEEP
1553static int fimc_lite_resume(struct device *dev)
1554{
1555 struct fimc_lite *fimc = dev_get_drvdata(dev);
1556 struct flite_buffer *buf;
1557 unsigned long flags;
1558 int i;
1559
1560 spin_lock_irqsave(&fimc->slock, flags);
1561 if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1562 !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1563 spin_unlock_irqrestore(&fimc->slock, flags);
1564 return 0;
1565 }
1566 flite_hw_reset(fimc);
1567 spin_unlock_irqrestore(&fimc->slock, flags);
1568
1569 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1570 return 0;
1571
1572 INIT_LIST_HEAD(&fimc->active_buf_q);
b9ee31e6
SN
1573 fimc_pipeline_call(fimc, open, &fimc->pipeline,
1574 &fimc->vfd.entity, false);
03878bb4 1575 fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
4af81310
SN
1576 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1577
1578 for (i = 0; i < fimc->reqbufs_count; i++) {
1579 if (list_empty(&fimc->pending_buf_q))
1580 break;
1581 buf = fimc_lite_pending_queue_pop(fimc);
1582 buffer_queue(&buf->vb);
1583 }
1584 return 0;
1585}
1586
1587static int fimc_lite_suspend(struct device *dev)
1588{
1589 struct fimc_lite *fimc = dev_get_drvdata(dev);
1590 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1591 int ret;
1592
1593 if (test_and_set_bit(ST_LPM, &fimc->state))
1594 return 0;
1595
1596 ret = fimc_lite_stop_capture(fimc, suspend);
316efab3 1597 if (ret < 0 || !fimc_lite_active(fimc))
4af81310
SN
1598 return ret;
1599
b9ee31e6 1600 return fimc_pipeline_call(fimc, close, &fimc->pipeline);
4af81310
SN
1601}
1602#endif /* CONFIG_PM_SLEEP */
1603
4c62e976 1604static int fimc_lite_remove(struct platform_device *pdev)
4af81310
SN
1605{
1606 struct fimc_lite *fimc = platform_get_drvdata(pdev);
1607 struct device *dev = &pdev->dev;
1608
1609 pm_runtime_disable(dev);
1610 pm_runtime_set_suspended(dev);
1611 fimc_lite_unregister_capture_subdev(fimc);
1612 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
1613 fimc_lite_clk_put(fimc);
1614
1615 dev_info(dev, "Driver unloaded\n");
1616 return 0;
1617}
1618
eb62d9e9
SN
1619static const struct dev_pm_ops fimc_lite_pm_ops = {
1620 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1621 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1622 NULL)
1623};
1624
9c8399c8
SN
1625/* EXYNOS4212, EXYNOS4412 */
1626static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
4af81310
SN
1627 .max_width = 8192,
1628 .max_height = 8192,
1629 .out_width_align = 8,
1630 .win_hor_offs_align = 2,
1631 .out_hor_offs_align = 8,
1632};
1633
eb62d9e9
SN
1634static const struct of_device_id flite_of_match[] = {
1635 {
1636 .compatible = "samsung,exynos4212-fimc-lite",
1637 .data = &fimc_lite_drvdata_exynos4,
1638 },
1639 { /* sentinel */ },
4af81310 1640};
eb62d9e9 1641MODULE_DEVICE_TABLE(of, flite_of_match);
4af81310
SN
1642
1643static struct platform_driver fimc_lite_driver = {
1644 .probe = fimc_lite_probe,
4c62e976 1645 .remove = fimc_lite_remove,
4af81310 1646 .driver = {
eb62d9e9 1647 .of_match_table = flite_of_match,
4af81310
SN
1648 .name = FIMC_LITE_DRV_NAME,
1649 .owner = THIS_MODULE,
1650 .pm = &fimc_lite_pm_ops,
1651 }
1652};
1653module_platform_driver(fimc_lite_driver);
1654MODULE_LICENSE("GPL");
1655MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);
This page took 0.175788 seconds and 5 git commands to generate.