Commit | Line | Data |
---|---|---|
4af81310 SN |
1 | /* |
2 | * Samsung EXYNOS FIMC-LITE (camera host interface) driver | |
3 | * | |
8a0c28f5 SN |
4 | * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
4af81310 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__ | |
12 | ||
13 | #include <linux/bug.h> | |
4c8f0629 | 14 | #include <linux/clk.h> |
4af81310 SN |
15 | #include <linux/device.h> |
16 | #include <linux/errno.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/module.h> | |
eb62d9e9 | 21 | #include <linux/of.h> |
4af81310 SN |
22 | #include <linux/types.h> |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/pm_runtime.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/videodev2.h> | |
27 | ||
28 | #include <media/v4l2-device.h> | |
29 | #include <media/v4l2-ioctl.h> | |
30 | #include <media/v4l2-mem2mem.h> | |
c139990e | 31 | #include <media/videobuf2-v4l2.h> |
4af81310 | 32 | #include <media/videobuf2-dma-contig.h> |
d647f0b7 | 33 | #include <media/drv-intf/exynos-fimc.h> |
4af81310 | 34 | |
045a1fac | 35 | #include "common.h" |
4c8f0629 | 36 | #include "fimc-core.h" |
b9ee31e6 | 37 | #include "fimc-lite.h" |
4af81310 SN |
38 | #include "fimc-lite-reg.h" |
39 | ||
40 | static int debug; | |
41 | module_param(debug, int, 0644); | |
42 | ||
43 | static const struct fimc_fmt fimc_lite_formats[] = { | |
44 | { | |
45 | .name = "YUV 4:2:2 packed, YCbYCr", | |
46 | .fourcc = V4L2_PIX_FMT_YUYV, | |
1c26190a | 47 | .colorspace = V4L2_COLORSPACE_JPEG, |
4af81310 SN |
48 | .depth = { 16 }, |
49 | .color = FIMC_FMT_YCBYCR422, | |
50 | .memplanes = 1, | |
27ffaeb0 | 51 | .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, |
e90ad659 | 52 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
53 | }, { |
54 | .name = "YUV 4:2:2 packed, CbYCrY", | |
55 | .fourcc = V4L2_PIX_FMT_UYVY, | |
1c26190a | 56 | .colorspace = V4L2_COLORSPACE_JPEG, |
4af81310 SN |
57 | .depth = { 16 }, |
58 | .color = FIMC_FMT_CBYCRY422, | |
59 | .memplanes = 1, | |
27ffaeb0 | 60 | .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, |
e90ad659 | 61 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
62 | }, { |
63 | .name = "YUV 4:2:2 packed, CrYCbY", | |
64 | .fourcc = V4L2_PIX_FMT_VYUY, | |
1c26190a | 65 | .colorspace = V4L2_COLORSPACE_JPEG, |
4af81310 SN |
66 | .depth = { 16 }, |
67 | .color = FIMC_FMT_CRYCBY422, | |
68 | .memplanes = 1, | |
27ffaeb0 | 69 | .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, |
e90ad659 | 70 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
71 | }, { |
72 | .name = "YUV 4:2:2 packed, YCrYCb", | |
73 | .fourcc = V4L2_PIX_FMT_YVYU, | |
1c26190a | 74 | .colorspace = V4L2_COLORSPACE_JPEG, |
4af81310 SN |
75 | .depth = { 16 }, |
76 | .color = FIMC_FMT_YCRYCB422, | |
77 | .memplanes = 1, | |
27ffaeb0 | 78 | .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, |
e90ad659 | 79 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
80 | }, { |
81 | .name = "RAW8 (GRBG)", | |
82 | .fourcc = V4L2_PIX_FMT_SGRBG8, | |
1c26190a | 83 | .colorspace = V4L2_COLORSPACE_SRGB, |
4af81310 SN |
84 | .depth = { 8 }, |
85 | .color = FIMC_FMT_RAW8, | |
86 | .memplanes = 1, | |
27ffaeb0 | 87 | .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, |
e90ad659 | 88 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
89 | }, { |
90 | .name = "RAW10 (GRBG)", | |
91 | .fourcc = V4L2_PIX_FMT_SGRBG10, | |
1c26190a | 92 | .colorspace = V4L2_COLORSPACE_SRGB, |
3396b096 | 93 | .depth = { 16 }, |
4af81310 SN |
94 | .color = FIMC_FMT_RAW10, |
95 | .memplanes = 1, | |
27ffaeb0 | 96 | .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, |
e90ad659 | 97 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
98 | }, { |
99 | .name = "RAW12 (GRBG)", | |
100 | .fourcc = V4L2_PIX_FMT_SGRBG12, | |
1c26190a | 101 | .colorspace = V4L2_COLORSPACE_SRGB, |
3396b096 | 102 | .depth = { 16 }, |
4af81310 SN |
103 | .color = FIMC_FMT_RAW12, |
104 | .memplanes = 1, | |
27ffaeb0 | 105 | .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, |
e90ad659 | 106 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
107 | }, |
108 | }; | |
109 | ||
110 | /** | |
111 | * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code | |
112 | * @pixelformat: fourcc to match, ignored if null | |
113 | * @mbus_code: media bus code to match, ignored if null | |
e90ad659 | 114 | * @mask: the color format flags to match |
4af81310 SN |
115 | * @index: index to the fimc_lite_formats array, ignored if negative |
116 | */ | |
117 | static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat, | |
e90ad659 | 118 | const u32 *mbus_code, unsigned int mask, int index) |
4af81310 SN |
119 | { |
120 | const struct fimc_fmt *fmt, *def_fmt = NULL; | |
121 | unsigned int i; | |
122 | int id = 0; | |
123 | ||
124 | if (index >= (int)ARRAY_SIZE(fimc_lite_formats)) | |
125 | return NULL; | |
126 | ||
127 | for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) { | |
128 | fmt = &fimc_lite_formats[i]; | |
e90ad659 SN |
129 | if (mask && !(fmt->flags & mask)) |
130 | continue; | |
4af81310 SN |
131 | if (pixelformat && fmt->fourcc == *pixelformat) |
132 | return fmt; | |
133 | if (mbus_code && fmt->mbus_code == *mbus_code) | |
134 | return fmt; | |
135 | if (index == id) | |
136 | def_fmt = fmt; | |
137 | id++; | |
138 | } | |
139 | return def_fmt; | |
140 | } | |
141 | ||
6319d6a0 | 142 | static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output) |
4af81310 | 143 | { |
4c8f0629 | 144 | struct fimc_source_info *si; |
4af81310 SN |
145 | unsigned long flags; |
146 | ||
756e6e14 | 147 | if (fimc->sensor == NULL) |
4af81310 SN |
148 | return -ENXIO; |
149 | ||
e90ad659 | 150 | if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL) |
4af81310 SN |
151 | return -EINVAL; |
152 | ||
6319d6a0 | 153 | /* Get sensor configuration data from the sensor subdev */ |
756e6e14 | 154 | si = v4l2_get_subdev_hostdata(fimc->sensor); |
4c8f0629 SN |
155 | if (!si) |
156 | return -EINVAL; | |
157 | ||
4af81310 SN |
158 | spin_lock_irqsave(&fimc->slock, flags); |
159 | ||
4c8f0629 | 160 | flite_hw_set_camera_bus(fimc, si); |
4af81310 SN |
161 | flite_hw_set_source_format(fimc, &fimc->inp_frame); |
162 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); | |
086eca29 | 163 | flite_hw_set_dma_buf_mask(fimc, 0); |
6319d6a0 | 164 | flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output); |
4af81310 SN |
165 | flite_hw_set_interrupt_mask(fimc); |
166 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); | |
167 | ||
168 | if (debug > 0) | |
169 | flite_hw_dump_regs(fimc, __func__); | |
170 | ||
171 | spin_unlock_irqrestore(&fimc->slock, flags); | |
172 | return 0; | |
173 | } | |
174 | ||
175 | /* | |
176 | * Reinitialize the driver so it is ready to start the streaming again. | |
177 | * Set fimc->state to indicate stream off and the hardware shut down state. | |
178 | * If not suspending (@suspend is false), return any buffers to videobuf2. | |
179 | * Otherwise put any owned buffers onto the pending buffers queue, so they | |
180 | * can be re-spun when the device is being resumed. Also perform FIMC | |
181 | * software reset and disable streaming on the whole pipeline if required. | |
182 | */ | |
183 | static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend) | |
184 | { | |
185 | struct flite_buffer *buf; | |
186 | unsigned long flags; | |
187 | bool streaming; | |
188 | ||
189 | spin_lock_irqsave(&fimc->slock, flags); | |
190 | streaming = fimc->state & (1 << ST_SENSOR_STREAM); | |
191 | ||
192 | fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF | | |
193 | 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM); | |
194 | if (suspend) | |
195 | fimc->state |= (1 << ST_FLITE_SUSPENDED); | |
196 | else | |
197 | fimc->state &= ~(1 << ST_FLITE_PENDING | | |
198 | 1 << ST_FLITE_SUSPENDED); | |
199 | ||
200 | /* Release unused buffers */ | |
201 | while (!suspend && !list_empty(&fimc->pending_buf_q)) { | |
202 | buf = fimc_lite_pending_queue_pop(fimc); | |
2d700715 | 203 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
4af81310 SN |
204 | } |
205 | /* If suspending put unused buffers onto pending queue */ | |
206 | while (!list_empty(&fimc->active_buf_q)) { | |
207 | buf = fimc_lite_active_queue_pop(fimc); | |
208 | if (suspend) | |
209 | fimc_lite_pending_queue_add(fimc, buf); | |
210 | else | |
2d700715 | 211 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
4af81310 SN |
212 | } |
213 | ||
214 | spin_unlock_irqrestore(&fimc->slock, flags); | |
215 | ||
216 | flite_hw_reset(fimc); | |
217 | ||
218 | if (!streaming) | |
219 | return 0; | |
220 | ||
403dfbec | 221 | return fimc_pipeline_call(&fimc->ve, set_stream, 0); |
4af81310 SN |
222 | } |
223 | ||
224 | static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend) | |
225 | { | |
226 | unsigned long flags; | |
227 | ||
228 | if (!fimc_lite_active(fimc)) | |
229 | return 0; | |
230 | ||
231 | spin_lock_irqsave(&fimc->slock, flags); | |
232 | set_bit(ST_FLITE_OFF, &fimc->state); | |
233 | flite_hw_capture_stop(fimc); | |
234 | spin_unlock_irqrestore(&fimc->slock, flags); | |
235 | ||
236 | wait_event_timeout(fimc->irq_queue, | |
237 | !test_bit(ST_FLITE_OFF, &fimc->state), | |
238 | (2*HZ/10)); /* 200 ms */ | |
239 | ||
240 | return fimc_lite_reinit(fimc, suspend); | |
241 | } | |
242 | ||
243 | /* Must be called with fimc.slock spinlock held. */ | |
244 | static void fimc_lite_config_update(struct fimc_lite *fimc) | |
245 | { | |
246 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); | |
247 | flite_hw_set_dma_window(fimc, &fimc->out_frame); | |
248 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); | |
249 | clear_bit(ST_FLITE_CONFIG, &fimc->state); | |
250 | } | |
251 | ||
252 | static irqreturn_t flite_irq_handler(int irq, void *priv) | |
253 | { | |
254 | struct fimc_lite *fimc = priv; | |
255 | struct flite_buffer *vbuf; | |
256 | unsigned long flags; | |
4af81310 SN |
257 | u32 intsrc; |
258 | ||
259 | spin_lock_irqsave(&fimc->slock, flags); | |
260 | ||
261 | intsrc = flite_hw_get_interrupt_source(fimc); | |
262 | flite_hw_clear_pending_irq(fimc); | |
263 | ||
264 | if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) { | |
265 | wake_up(&fimc->irq_queue); | |
266 | goto done; | |
267 | } | |
268 | ||
269 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) { | |
270 | clear_bit(ST_FLITE_RUN, &fimc->state); | |
271 | fimc->events.data_overflow++; | |
272 | } | |
273 | ||
274 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) { | |
275 | flite_hw_clear_last_capture_end(fimc); | |
276 | clear_bit(ST_FLITE_STREAM, &fimc->state); | |
277 | wake_up(&fimc->irq_queue); | |
278 | } | |
279 | ||
03878bb4 | 280 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) |
4af81310 SN |
281 | goto done; |
282 | ||
283 | if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) && | |
284 | test_bit(ST_FLITE_RUN, &fimc->state) && | |
4af81310 | 285 | !list_empty(&fimc->pending_buf_q)) { |
086eca29 SN |
286 | vbuf = fimc_lite_pending_queue_pop(fimc); |
287 | flite_hw_set_dma_buffer(fimc, vbuf); | |
288 | fimc_lite_active_queue_add(fimc, vbuf); | |
289 | } | |
290 | ||
291 | if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) && | |
292 | test_bit(ST_FLITE_RUN, &fimc->state) && | |
293 | !list_empty(&fimc->active_buf_q)) { | |
4af81310 | 294 | vbuf = fimc_lite_active_queue_pop(fimc); |
d6dd645e | 295 | vbuf->vb.vb2_buf.timestamp = ktime_get_ns(); |
2d700715 | 296 | vbuf->vb.sequence = fimc->frame_count++; |
086eca29 | 297 | flite_hw_mask_dma_buffer(fimc, vbuf->index); |
2d700715 | 298 | vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE); |
4af81310 SN |
299 | } |
300 | ||
301 | if (test_bit(ST_FLITE_CONFIG, &fimc->state)) | |
302 | fimc_lite_config_update(fimc); | |
303 | ||
304 | if (list_empty(&fimc->pending_buf_q)) { | |
305 | flite_hw_capture_stop(fimc); | |
306 | clear_bit(ST_FLITE_STREAM, &fimc->state); | |
307 | } | |
308 | done: | |
309 | set_bit(ST_FLITE_RUN, &fimc->state); | |
310 | spin_unlock_irqrestore(&fimc->slock, flags); | |
311 | return IRQ_HANDLED; | |
312 | } | |
313 | ||
314 | static int start_streaming(struct vb2_queue *q, unsigned int count) | |
315 | { | |
316 | struct fimc_lite *fimc = q->drv_priv; | |
086eca29 | 317 | unsigned long flags; |
4af81310 SN |
318 | int ret; |
319 | ||
086eca29 SN |
320 | spin_lock_irqsave(&fimc->slock, flags); |
321 | ||
322 | fimc->buf_index = 0; | |
4af81310 SN |
323 | fimc->frame_count = 0; |
324 | ||
086eca29 SN |
325 | spin_unlock_irqrestore(&fimc->slock, flags); |
326 | ||
6319d6a0 | 327 | ret = fimc_lite_hw_init(fimc, false); |
4af81310 SN |
328 | if (ret) { |
329 | fimc_lite_reinit(fimc, false); | |
330 | return ret; | |
331 | } | |
332 | ||
333 | set_bit(ST_FLITE_PENDING, &fimc->state); | |
334 | ||
335 | if (!list_empty(&fimc->active_buf_q) && | |
336 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { | |
337 | flite_hw_capture_start(fimc); | |
338 | ||
339 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) | |
403dfbec | 340 | fimc_pipeline_call(&fimc->ve, set_stream, 1); |
4af81310 SN |
341 | } |
342 | if (debug > 0) | |
343 | flite_hw_dump_regs(fimc, __func__); | |
344 | ||
345 | return 0; | |
346 | } | |
347 | ||
e37559b2 | 348 | static void stop_streaming(struct vb2_queue *q) |
4af81310 SN |
349 | { |
350 | struct fimc_lite *fimc = q->drv_priv; | |
351 | ||
352 | if (!fimc_lite_active(fimc)) | |
e37559b2 | 353 | return; |
4af81310 | 354 | |
e37559b2 | 355 | fimc_lite_stop_capture(fimc, false); |
4af81310 SN |
356 | } |
357 | ||
df9ecb0c | 358 | static int queue_setup(struct vb2_queue *vq, |
4af81310 SN |
359 | unsigned int *num_buffers, unsigned int *num_planes, |
360 | unsigned int sizes[], void *allocators[]) | |
361 | { | |
4af81310 SN |
362 | struct fimc_lite *fimc = vq->drv_priv; |
363 | struct flite_frame *frame = &fimc->out_frame; | |
e90ad659 | 364 | const struct fimc_fmt *fmt = frame->fmt; |
df9ecb0c | 365 | unsigned long wh = frame->f_width * frame->f_height; |
4af81310 SN |
366 | int i; |
367 | ||
4af81310 SN |
368 | if (fmt == NULL) |
369 | return -EINVAL; | |
370 | ||
df9ecb0c HV |
371 | if (*num_planes) { |
372 | if (*num_planes != fmt->memplanes) | |
373 | return -EINVAL; | |
374 | for (i = 0; i < *num_planes; i++) { | |
375 | if (sizes[i] < (wh * fmt->depth[i]) / 8) | |
376 | return -EINVAL; | |
377 | allocators[i] = fimc->alloc_ctx; | |
378 | } | |
379 | return 0; | |
380 | } | |
381 | ||
4af81310 SN |
382 | *num_planes = fmt->memplanes; |
383 | ||
384 | for (i = 0; i < fmt->memplanes; i++) { | |
df9ecb0c | 385 | sizes[i] = (wh * fmt->depth[i]) / 8; |
4af81310 SN |
386 | allocators[i] = fimc->alloc_ctx; |
387 | } | |
388 | ||
389 | return 0; | |
390 | } | |
391 | ||
392 | static int buffer_prepare(struct vb2_buffer *vb) | |
393 | { | |
394 | struct vb2_queue *vq = vb->vb2_queue; | |
395 | struct fimc_lite *fimc = vq->drv_priv; | |
396 | int i; | |
397 | ||
e90ad659 | 398 | if (fimc->out_frame.fmt == NULL) |
4af81310 SN |
399 | return -EINVAL; |
400 | ||
e90ad659 | 401 | for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) { |
4af81310 SN |
402 | unsigned long size = fimc->payload[i]; |
403 | ||
404 | if (vb2_plane_size(vb, i) < size) { | |
bc7584b0 | 405 | v4l2_err(&fimc->ve.vdev, |
4af81310 SN |
406 | "User buffer too small (%ld < %ld)\n", |
407 | vb2_plane_size(vb, i), size); | |
408 | return -EINVAL; | |
409 | } | |
410 | vb2_set_plane_payload(vb, i, size); | |
411 | } | |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
416 | static void buffer_queue(struct vb2_buffer *vb) | |
417 | { | |
2d700715 | 418 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
4af81310 | 419 | struct flite_buffer *buf |
2d700715 | 420 | = container_of(vbuf, struct flite_buffer, vb); |
4af81310 SN |
421 | struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue); |
422 | unsigned long flags; | |
423 | ||
424 | spin_lock_irqsave(&fimc->slock, flags); | |
425 | buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0); | |
426 | ||
086eca29 SN |
427 | buf->index = fimc->buf_index++; |
428 | if (fimc->buf_index >= fimc->reqbufs_count) | |
429 | fimc->buf_index = 0; | |
430 | ||
4af81310 SN |
431 | if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) && |
432 | !test_bit(ST_FLITE_STREAM, &fimc->state) && | |
433 | list_empty(&fimc->active_buf_q)) { | |
086eca29 | 434 | flite_hw_set_dma_buffer(fimc, buf); |
4af81310 SN |
435 | fimc_lite_active_queue_add(fimc, buf); |
436 | } else { | |
437 | fimc_lite_pending_queue_add(fimc, buf); | |
438 | } | |
439 | ||
440 | if (vb2_is_streaming(&fimc->vb_queue) && | |
441 | !list_empty(&fimc->pending_buf_q) && | |
442 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { | |
443 | flite_hw_capture_start(fimc); | |
444 | spin_unlock_irqrestore(&fimc->slock, flags); | |
445 | ||
446 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) | |
403dfbec | 447 | fimc_pipeline_call(&fimc->ve, set_stream, 1); |
4af81310 SN |
448 | return; |
449 | } | |
450 | spin_unlock_irqrestore(&fimc->slock, flags); | |
451 | } | |
452 | ||
4af81310 SN |
453 | static const struct vb2_ops fimc_lite_qops = { |
454 | .queue_setup = queue_setup, | |
455 | .buf_prepare = buffer_prepare, | |
456 | .buf_queue = buffer_queue, | |
ee12b049 SN |
457 | .wait_prepare = vb2_ops_wait_prepare, |
458 | .wait_finish = vb2_ops_wait_finish, | |
4af81310 SN |
459 | .start_streaming = start_streaming, |
460 | .stop_streaming = stop_streaming, | |
461 | }; | |
462 | ||
463 | static void fimc_lite_clear_event_counters(struct fimc_lite *fimc) | |
464 | { | |
465 | unsigned long flags; | |
466 | ||
467 | spin_lock_irqsave(&fimc->slock, flags); | |
468 | memset(&fimc->events, 0, sizeof(fimc->events)); | |
469 | spin_unlock_irqrestore(&fimc->slock, flags); | |
470 | } | |
471 | ||
472 | static int fimc_lite_open(struct file *file) | |
473 | { | |
474 | struct fimc_lite *fimc = video_drvdata(file); | |
bc7584b0 | 475 | struct media_entity *me = &fimc->ve.vdev.entity; |
e3fc82e8 | 476 | int ret; |
4af81310 | 477 | |
740ad921 | 478 | mutex_lock(&fimc->lock); |
03878bb4 | 479 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) { |
6319d6a0 | 480 | ret = -EBUSY; |
ee12b049 | 481 | goto unlock; |
6319d6a0 SN |
482 | } |
483 | ||
4af81310 | 484 | set_bit(ST_FLITE_IN_USE, &fimc->state); |
e3fc82e8 SN |
485 | ret = pm_runtime_get_sync(&fimc->pdev->dev); |
486 | if (ret < 0) | |
ee12b049 | 487 | goto unlock; |
4af81310 | 488 | |
e3fc82e8 SN |
489 | ret = v4l2_fh_open(file); |
490 | if (ret < 0) | |
ee12b049 | 491 | goto err_pm; |
4af81310 | 492 | |
ee12b049 SN |
493 | if (!v4l2_fh_is_singular_file(file) || |
494 | atomic_read(&fimc->out_path) != FIMC_IO_DMA) | |
495 | goto unlock; | |
4af81310 | 496 | |
d10c9894 | 497 | mutex_lock(&me->graph_obj.mdev->graph_mutex); |
42625fdf | 498 | |
403dfbec | 499 | ret = fimc_pipeline_call(&fimc->ve, open, me, true); |
42625fdf SN |
500 | |
501 | /* Mark video pipeline ending at this video node as in use. */ | |
502 | if (ret == 0) | |
503 | me->use_count++; | |
504 | ||
d10c9894 | 505 | mutex_unlock(&me->graph_obj.mdev->graph_mutex); |
42625fdf | 506 | |
ee12b049 | 507 | if (!ret) { |
4e39da01 | 508 | fimc_lite_clear_event_counters(fimc); |
ee12b049 | 509 | goto unlock; |
4e39da01 | 510 | } |
ee12b049 SN |
511 | |
512 | v4l2_fh_release(file); | |
513 | err_pm: | |
514 | pm_runtime_put_sync(&fimc->pdev->dev); | |
515 | clear_bit(ST_FLITE_IN_USE, &fimc->state); | |
516 | unlock: | |
4e39da01 | 517 | mutex_unlock(&fimc->lock); |
4af81310 SN |
518 | return ret; |
519 | } | |
520 | ||
ee12b049 | 521 | static int fimc_lite_release(struct file *file) |
4af81310 SN |
522 | { |
523 | struct fimc_lite *fimc = video_drvdata(file); | |
42625fdf | 524 | struct media_entity *entity = &fimc->ve.vdev.entity; |
4e39da01 | 525 | |
ddc43d6d | 526 | mutex_lock(&fimc->lock); |
4af81310 | 527 | |
ee12b049 | 528 | if (v4l2_fh_is_singular_file(file) && |
03878bb4 | 529 | atomic_read(&fimc->out_path) == FIMC_IO_DMA) { |
9ea89e2b | 530 | if (fimc->streaming) { |
42625fdf | 531 | media_entity_pipeline_stop(entity); |
9ea89e2b SN |
532 | fimc->streaming = false; |
533 | } | |
4af81310 | 534 | fimc_lite_stop_capture(fimc, false); |
403dfbec SN |
535 | fimc_pipeline_call(&fimc->ve, close); |
536 | clear_bit(ST_FLITE_IN_USE, &fimc->state); | |
537 | ||
d10c9894 | 538 | mutex_lock(&entity->graph_obj.mdev->graph_mutex); |
42625fdf | 539 | entity->use_count--; |
d10c9894 | 540 | mutex_unlock(&entity->graph_obj.mdev->graph_mutex); |
4af81310 SN |
541 | } |
542 | ||
1380f575 | 543 | _vb2_fop_release(file, NULL); |
4af81310 | 544 | pm_runtime_put(&fimc->pdev->dev); |
ee12b049 | 545 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
4af81310 | 546 | |
4e39da01 | 547 | mutex_unlock(&fimc->lock); |
ee12b049 | 548 | return 0; |
4af81310 SN |
549 | } |
550 | ||
551 | static const struct v4l2_file_operations fimc_lite_fops = { | |
552 | .owner = THIS_MODULE, | |
553 | .open = fimc_lite_open, | |
ee12b049 SN |
554 | .release = fimc_lite_release, |
555 | .poll = vb2_fop_poll, | |
4af81310 | 556 | .unlocked_ioctl = video_ioctl2, |
ee12b049 | 557 | .mmap = vb2_fop_mmap, |
4af81310 SN |
558 | }; |
559 | ||
560 | /* | |
561 | * Format and crop negotiation helpers | |
562 | */ | |
563 | ||
b1d2dc5c | 564 | static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc, |
f7234138 | 565 | struct v4l2_subdev_pad_config *cfg, |
b1d2dc5c | 566 | struct v4l2_subdev_format *format) |
4af81310 | 567 | { |
9c8399c8 | 568 | struct flite_drvdata *dd = fimc->dd; |
b1d2dc5c SN |
569 | struct v4l2_mbus_framefmt *mf = &format->format; |
570 | const struct fimc_fmt *fmt = NULL; | |
571 | ||
572 | if (format->pad == FLITE_SD_PAD_SINK) { | |
573 | v4l_bound_align_image(&mf->width, 8, dd->max_width, | |
574 | ffs(dd->out_width_align) - 1, | |
575 | &mf->height, 0, dd->max_height, 0, 0); | |
4af81310 | 576 | |
b1d2dc5c SN |
577 | fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0); |
578 | if (WARN_ON(!fmt)) | |
579 | return NULL; | |
580 | ||
1c26190a | 581 | mf->colorspace = fmt->colorspace; |
b1d2dc5c | 582 | mf->code = fmt->mbus_code; |
4af81310 | 583 | } else { |
b1d2dc5c SN |
584 | struct flite_frame *sink = &fimc->inp_frame; |
585 | struct v4l2_mbus_framefmt *sink_fmt; | |
586 | struct v4l2_rect *rect; | |
4af81310 | 587 | |
b1d2dc5c | 588 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { |
f7234138 | 589 | sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg, |
b1d2dc5c | 590 | FLITE_SD_PAD_SINK); |
e90ad659 | 591 | |
b1d2dc5c | 592 | mf->code = sink_fmt->code; |
1c26190a | 593 | mf->colorspace = sink_fmt->colorspace; |
b1d2dc5c | 594 | |
f7234138 | 595 | rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg, |
b1d2dc5c SN |
596 | FLITE_SD_PAD_SINK); |
597 | } else { | |
598 | mf->code = sink->fmt->mbus_code; | |
1c26190a | 599 | mf->colorspace = sink->fmt->colorspace; |
b1d2dc5c SN |
600 | rect = &sink->rect; |
601 | } | |
602 | ||
603 | /* Allow changing format only on sink pad */ | |
604 | mf->width = rect->width; | |
605 | mf->height = rect->height; | |
606 | } | |
e90ad659 | 607 | |
b1d2dc5c SN |
608 | mf->field = V4L2_FIELD_NONE; |
609 | ||
610 | v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n", | |
611 | mf->code, mf->colorspace, mf->width, mf->height); | |
4af81310 SN |
612 | |
613 | return fmt; | |
614 | } | |
615 | ||
616 | static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r) | |
617 | { | |
618 | struct flite_frame *frame = &fimc->inp_frame; | |
619 | ||
620 | v4l_bound_align_image(&r->width, 0, frame->f_width, 0, | |
621 | &r->height, 0, frame->f_height, 0, 0); | |
622 | ||
623 | /* Adjust left/top if cropping rectangle got out of bounds */ | |
624 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); | |
9c8399c8 | 625 | r->left = round_down(r->left, fimc->dd->win_hor_offs_align); |
4af81310 SN |
626 | r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height); |
627 | ||
969e877c | 628 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n", |
4af81310 SN |
629 | r->left, r->top, r->width, r->height, |
630 | frame->f_width, frame->f_height); | |
631 | } | |
632 | ||
633 | static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r) | |
634 | { | |
635 | struct flite_frame *frame = &fimc->out_frame; | |
636 | struct v4l2_rect *crop_rect = &fimc->inp_frame.rect; | |
637 | ||
638 | /* Scaling is not supported so we enforce compose rectangle size | |
639 | same as size of the sink crop rectangle. */ | |
640 | r->width = crop_rect->width; | |
641 | r->height = crop_rect->height; | |
642 | ||
643 | /* Adjust left/top if the composing rectangle got out of bounds */ | |
644 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); | |
9c8399c8 | 645 | r->left = round_down(r->left, fimc->dd->out_hor_offs_align); |
4af81310 SN |
646 | r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height); |
647 | ||
969e877c | 648 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n", |
4af81310 SN |
649 | r->left, r->top, r->width, r->height, |
650 | frame->f_width, frame->f_height); | |
651 | } | |
652 | ||
653 | /* | |
654 | * Video node ioctl operations | |
655 | */ | |
793ad32d | 656 | static int fimc_lite_querycap(struct file *file, void *priv, |
4af81310 SN |
657 | struct v4l2_capability *cap) |
658 | { | |
793ad32d SN |
659 | struct fimc_lite *fimc = video_drvdata(file); |
660 | ||
4af81310 | 661 | strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver)); |
793ad32d SN |
662 | strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card)); |
663 | snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", | |
664 | dev_name(&fimc->pdev->dev)); | |
665 | ||
666 | cap->device_caps = V4L2_CAP_STREAMING; | |
667 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; | |
4af81310 SN |
668 | return 0; |
669 | } | |
670 | ||
671 | static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv, | |
672 | struct v4l2_fmtdesc *f) | |
673 | { | |
674 | const struct fimc_fmt *fmt; | |
675 | ||
676 | if (f->index >= ARRAY_SIZE(fimc_lite_formats)) | |
677 | return -EINVAL; | |
678 | ||
679 | fmt = &fimc_lite_formats[f->index]; | |
680 | strlcpy(f->description, fmt->name, sizeof(f->description)); | |
681 | f->pixelformat = fmt->fourcc; | |
682 | ||
683 | return 0; | |
684 | } | |
685 | ||
686 | static int fimc_lite_g_fmt_mplane(struct file *file, void *fh, | |
687 | struct v4l2_format *f) | |
688 | { | |
689 | struct fimc_lite *fimc = video_drvdata(file); | |
690 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; | |
691 | struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0]; | |
692 | struct flite_frame *frame = &fimc->out_frame; | |
e90ad659 | 693 | const struct fimc_fmt *fmt = frame->fmt; |
4af81310 SN |
694 | |
695 | plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8; | |
696 | plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height; | |
697 | ||
698 | pixm->num_planes = fmt->memplanes; | |
699 | pixm->pixelformat = fmt->fourcc; | |
700 | pixm->width = frame->f_width; | |
701 | pixm->height = frame->f_height; | |
702 | pixm->field = V4L2_FIELD_NONE; | |
1c26190a | 703 | pixm->colorspace = fmt->colorspace; |
4af81310 SN |
704 | return 0; |
705 | } | |
706 | ||
707 | static int fimc_lite_try_fmt(struct fimc_lite *fimc, | |
708 | struct v4l2_pix_format_mplane *pixm, | |
709 | const struct fimc_fmt **ffmt) | |
710 | { | |
4af81310 | 711 | u32 bpl = pixm->plane_fmt[0].bytesperline; |
9c8399c8 | 712 | struct flite_drvdata *dd = fimc->dd; |
e90ad659 | 713 | const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt; |
4af81310 SN |
714 | const struct fimc_fmt *fmt; |
715 | ||
e90ad659 SN |
716 | if (WARN_ON(inp_fmt == NULL)) |
717 | return -EINVAL; | |
718 | /* | |
719 | * We allow some flexibility only for YUV formats. In case of raw | |
720 | * raw Bayer the FIMC-LITE's output format must match its camera | |
721 | * interface input format. | |
722 | */ | |
723 | if (inp_fmt->flags & FMT_FLAGS_YUV) | |
724 | fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, | |
725 | inp_fmt->flags, 0); | |
726 | else | |
727 | fmt = inp_fmt; | |
728 | ||
4af81310 SN |
729 | if (WARN_ON(fmt == NULL)) |
730 | return -EINVAL; | |
731 | if (ffmt) | |
732 | *ffmt = fmt; | |
9c8399c8 SN |
733 | v4l_bound_align_image(&pixm->width, 8, dd->max_width, |
734 | ffs(dd->out_width_align) - 1, | |
735 | &pixm->height, 0, dd->max_height, 0, 0); | |
4af81310 SN |
736 | |
737 | if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width)) | |
738 | pixm->plane_fmt[0].bytesperline = (pixm->width * | |
739 | fmt->depth[0]) / 8; | |
740 | ||
741 | if (pixm->plane_fmt[0].sizeimage == 0) | |
742 | pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height * | |
743 | fmt->depth[0]) / 8; | |
744 | pixm->num_planes = fmt->memplanes; | |
745 | pixm->pixelformat = fmt->fourcc; | |
1c26190a | 746 | pixm->colorspace = fmt->colorspace; |
4af81310 SN |
747 | pixm->field = V4L2_FIELD_NONE; |
748 | return 0; | |
749 | } | |
750 | ||
751 | static int fimc_lite_try_fmt_mplane(struct file *file, void *fh, | |
752 | struct v4l2_format *f) | |
753 | { | |
754 | struct fimc_lite *fimc = video_drvdata(file); | |
4af81310 SN |
755 | return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL); |
756 | } | |
757 | ||
758 | static int fimc_lite_s_fmt_mplane(struct file *file, void *priv, | |
759 | struct v4l2_format *f) | |
760 | { | |
761 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; | |
762 | struct fimc_lite *fimc = video_drvdata(file); | |
763 | struct flite_frame *frame = &fimc->out_frame; | |
764 | const struct fimc_fmt *fmt = NULL; | |
765 | int ret; | |
766 | ||
767 | if (vb2_is_busy(&fimc->vb_queue)) | |
768 | return -EBUSY; | |
769 | ||
770 | ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt); | |
771 | if (ret < 0) | |
772 | return ret; | |
773 | ||
e90ad659 | 774 | frame->fmt = fmt; |
4af81310 SN |
775 | fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8, |
776 | pixm->plane_fmt[0].sizeimage); | |
777 | frame->f_width = pixm->width; | |
778 | frame->f_height = pixm->height; | |
779 | ||
780 | return 0; | |
781 | } | |
782 | ||
783 | static int fimc_pipeline_validate(struct fimc_lite *fimc) | |
784 | { | |
785 | struct v4l2_subdev *sd = &fimc->subdev; | |
786 | struct v4l2_subdev_format sink_fmt, src_fmt; | |
787 | struct media_pad *pad; | |
788 | int ret; | |
789 | ||
790 | while (1) { | |
791 | /* Retrieve format at the sink pad */ | |
792 | pad = &sd->entity.pads[0]; | |
793 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) | |
794 | break; | |
795 | /* Don't call FIMC subdev operation to avoid nested locking */ | |
796 | if (sd == &fimc->subdev) { | |
797 | struct flite_frame *ff = &fimc->out_frame; | |
798 | sink_fmt.format.width = ff->f_width; | |
799 | sink_fmt.format.height = ff->f_height; | |
e90ad659 | 800 | sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code; |
4af81310 SN |
801 | } else { |
802 | sink_fmt.pad = pad->index; | |
803 | sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
804 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, | |
805 | &sink_fmt); | |
806 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
807 | return -EPIPE; | |
808 | } | |
809 | /* Retrieve format at the source pad */ | |
1bddf1b3 | 810 | pad = media_entity_remote_pad(pad); |
3efdf62c | 811 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
4af81310 SN |
812 | break; |
813 | ||
814 | sd = media_entity_to_v4l2_subdev(pad->entity); | |
815 | src_fmt.pad = pad->index; | |
816 | src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
817 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); | |
818 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
819 | return -EPIPE; | |
820 | ||
821 | if (src_fmt.format.width != sink_fmt.format.width || | |
822 | src_fmt.format.height != sink_fmt.format.height || | |
823 | src_fmt.format.code != sink_fmt.format.code) | |
824 | return -EPIPE; | |
825 | } | |
826 | return 0; | |
827 | } | |
828 | ||
829 | static int fimc_lite_streamon(struct file *file, void *priv, | |
830 | enum v4l2_buf_type type) | |
831 | { | |
832 | struct fimc_lite *fimc = video_drvdata(file); | |
bc7584b0 | 833 | struct media_entity *entity = &fimc->ve.vdev.entity; |
4af81310 SN |
834 | int ret; |
835 | ||
836 | if (fimc_lite_active(fimc)) | |
837 | return -EBUSY; | |
838 | ||
403dfbec | 839 | ret = media_entity_pipeline_start(entity, &fimc->ve.pipe->mp); |
a1a5861b SK |
840 | if (ret < 0) |
841 | return ret; | |
4af81310 SN |
842 | |
843 | ret = fimc_pipeline_validate(fimc); | |
ee12b049 SN |
844 | if (ret < 0) |
845 | goto err_p_stop; | |
4af81310 | 846 | |
045a1fac | 847 | fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity); |
756e6e14 | 848 | |
ee12b049 | 849 | ret = vb2_ioctl_streamon(file, priv, type); |
9ea89e2b SN |
850 | if (!ret) { |
851 | fimc->streaming = true; | |
ee12b049 | 852 | return ret; |
9ea89e2b SN |
853 | } |
854 | ||
ee12b049 SN |
855 | err_p_stop: |
856 | media_entity_pipeline_stop(entity); | |
857 | return 0; | |
4af81310 SN |
858 | } |
859 | ||
860 | static int fimc_lite_streamoff(struct file *file, void *priv, | |
861 | enum v4l2_buf_type type) | |
862 | { | |
863 | struct fimc_lite *fimc = video_drvdata(file); | |
4af81310 SN |
864 | int ret; |
865 | ||
ee12b049 | 866 | ret = vb2_ioctl_streamoff(file, priv, type); |
9ea89e2b SN |
867 | if (ret < 0) |
868 | return ret; | |
869 | ||
bc7584b0 | 870 | media_entity_pipeline_stop(&fimc->ve.vdev.entity); |
9ea89e2b SN |
871 | fimc->streaming = false; |
872 | return 0; | |
4af81310 SN |
873 | } |
874 | ||
875 | static int fimc_lite_reqbufs(struct file *file, void *priv, | |
876 | struct v4l2_requestbuffers *reqbufs) | |
877 | { | |
878 | struct fimc_lite *fimc = video_drvdata(file); | |
879 | int ret; | |
880 | ||
881 | reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count); | |
ee12b049 | 882 | ret = vb2_ioctl_reqbufs(file, priv, reqbufs); |
f68247fc | 883 | if (!ret) |
4af81310 SN |
884 | fimc->reqbufs_count = reqbufs->count; |
885 | ||
886 | return ret; | |
887 | } | |
888 | ||
4af81310 SN |
889 | /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */ |
890 | static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b) | |
891 | { | |
892 | if (a->left < b->left || a->top < b->top) | |
893 | return 0; | |
894 | if (a->left + a->width > b->left + b->width) | |
895 | return 0; | |
896 | if (a->top + a->height > b->top + b->height) | |
897 | return 0; | |
898 | ||
899 | return 1; | |
900 | } | |
901 | ||
902 | static int fimc_lite_g_selection(struct file *file, void *fh, | |
903 | struct v4l2_selection *sel) | |
904 | { | |
905 | struct fimc_lite *fimc = video_drvdata(file); | |
906 | struct flite_frame *f = &fimc->out_frame; | |
907 | ||
908 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
909 | return -EINVAL; | |
910 | ||
911 | switch (sel->target) { | |
912 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | |
913 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | |
914 | sel->r.left = 0; | |
915 | sel->r.top = 0; | |
916 | sel->r.width = f->f_width; | |
917 | sel->r.height = f->f_height; | |
918 | return 0; | |
919 | ||
c1334823 | 920 | case V4L2_SEL_TGT_COMPOSE: |
4af81310 SN |
921 | sel->r = f->rect; |
922 | return 0; | |
923 | } | |
924 | ||
925 | return -EINVAL; | |
926 | } | |
927 | ||
928 | static int fimc_lite_s_selection(struct file *file, void *fh, | |
929 | struct v4l2_selection *sel) | |
930 | { | |
931 | struct fimc_lite *fimc = video_drvdata(file); | |
932 | struct flite_frame *f = &fimc->out_frame; | |
933 | struct v4l2_rect rect = sel->r; | |
934 | unsigned long flags; | |
935 | ||
936 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE || | |
c1334823 | 937 | sel->target != V4L2_SEL_TGT_COMPOSE) |
4af81310 SN |
938 | return -EINVAL; |
939 | ||
940 | fimc_lite_try_compose(fimc, &rect); | |
941 | ||
942 | if ((sel->flags & V4L2_SEL_FLAG_LE) && | |
943 | !enclosed_rectangle(&rect, &sel->r)) | |
944 | return -ERANGE; | |
945 | ||
946 | if ((sel->flags & V4L2_SEL_FLAG_GE) && | |
947 | !enclosed_rectangle(&sel->r, &rect)) | |
948 | return -ERANGE; | |
949 | ||
950 | sel->r = rect; | |
951 | spin_lock_irqsave(&fimc->slock, flags); | |
952 | f->rect = rect; | |
953 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
954 | spin_unlock_irqrestore(&fimc->slock, flags); | |
955 | ||
956 | return 0; | |
957 | } | |
958 | ||
959 | static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = { | |
793ad32d | 960 | .vidioc_querycap = fimc_lite_querycap, |
4af81310 SN |
961 | .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane, |
962 | .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane, | |
963 | .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane, | |
964 | .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane, | |
965 | .vidioc_g_selection = fimc_lite_g_selection, | |
966 | .vidioc_s_selection = fimc_lite_s_selection, | |
967 | .vidioc_reqbufs = fimc_lite_reqbufs, | |
ee12b049 SN |
968 | .vidioc_querybuf = vb2_ioctl_querybuf, |
969 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
970 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | |
971 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
972 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
4af81310 SN |
973 | .vidioc_streamon = fimc_lite_streamon, |
974 | .vidioc_streamoff = fimc_lite_streamoff, | |
975 | }; | |
976 | ||
977 | /* Capture subdev media entity operations */ | |
978 | static int fimc_lite_link_setup(struct media_entity *entity, | |
979 | const struct media_pad *local, | |
980 | const struct media_pad *remote, u32 flags) | |
981 | { | |
982 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); | |
983 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
6319d6a0 | 984 | int ret = 0; |
4af81310 SN |
985 | |
986 | if (WARN_ON(fimc == NULL)) | |
987 | return 0; | |
988 | ||
969e877c | 989 | v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n", |
6319d6a0 | 990 | __func__, remote->entity->name, local->entity->name, |
4af81310 SN |
991 | flags, fimc->source_subdev_grp_id); |
992 | ||
6319d6a0 SN |
993 | switch (local->index) { |
994 | case FLITE_SD_PAD_SINK: | |
3efdf62c | 995 | if (!is_media_entity_v4l2_subdev(remote->entity)) { |
6319d6a0 SN |
996 | ret = -EINVAL; |
997 | break; | |
998 | } | |
4af81310 | 999 | if (flags & MEDIA_LNK_FL_ENABLED) { |
6319d6a0 SN |
1000 | if (fimc->source_subdev_grp_id == 0) |
1001 | fimc->source_subdev_grp_id = sd->grp_id; | |
1002 | else | |
1003 | ret = -EBUSY; | |
1004 | } else { | |
1005 | fimc->source_subdev_grp_id = 0; | |
1006 | fimc->sensor = NULL; | |
4af81310 | 1007 | } |
6319d6a0 | 1008 | break; |
4af81310 | 1009 | |
6319d6a0 SN |
1010 | case FLITE_SD_PAD_SOURCE_DMA: |
1011 | if (!(flags & MEDIA_LNK_FL_ENABLED)) | |
03878bb4 | 1012 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
3efdf62c | 1013 | else if (is_media_entity_v4l2_io(remote->entity)) |
03878bb4 | 1014 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
6319d6a0 SN |
1015 | else |
1016 | ret = -EINVAL; | |
4af81310 SN |
1017 | break; |
1018 | ||
6319d6a0 SN |
1019 | case FLITE_SD_PAD_SOURCE_ISP: |
1020 | if (!(flags & MEDIA_LNK_FL_ENABLED)) | |
03878bb4 | 1021 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
3efdf62c | 1022 | else if (is_media_entity_v4l2_subdev(remote->entity)) |
03878bb4 | 1023 | atomic_set(&fimc->out_path, FIMC_IO_ISP); |
4af81310 | 1024 | else |
6319d6a0 | 1025 | ret = -EINVAL; |
4af81310 SN |
1026 | break; |
1027 | ||
1028 | default: | |
1029 | v4l2_err(sd, "Invalid pad index\n"); | |
6319d6a0 | 1030 | ret = -EINVAL; |
4af81310 | 1031 | } |
03878bb4 | 1032 | mb(); |
4af81310 | 1033 | |
6319d6a0 | 1034 | return ret; |
4af81310 SN |
1035 | } |
1036 | ||
1037 | static const struct media_entity_operations fimc_lite_subdev_media_ops = { | |
1038 | .link_setup = fimc_lite_link_setup, | |
1039 | }; | |
1040 | ||
1041 | static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd, | |
f7234138 | 1042 | struct v4l2_subdev_pad_config *cfg, |
4af81310 SN |
1043 | struct v4l2_subdev_mbus_code_enum *code) |
1044 | { | |
1045 | const struct fimc_fmt *fmt; | |
1046 | ||
e90ad659 | 1047 | fmt = fimc_lite_find_format(NULL, NULL, 0, code->index); |
4af81310 SN |
1048 | if (!fmt) |
1049 | return -EINVAL; | |
1050 | code->code = fmt->mbus_code; | |
1051 | return 0; | |
1052 | } | |
1053 | ||
b1d2dc5c | 1054 | static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt( |
f7234138 HV |
1055 | struct v4l2_subdev *sd, |
1056 | struct v4l2_subdev_pad_config *cfg, unsigned int pad) | |
b1d2dc5c SN |
1057 | { |
1058 | if (pad != FLITE_SD_PAD_SINK) | |
1059 | pad = FLITE_SD_PAD_SOURCE_DMA; | |
1060 | ||
f7234138 | 1061 | return v4l2_subdev_get_try_format(sd, cfg, pad); |
b1d2dc5c SN |
1062 | } |
1063 | ||
4af81310 | 1064 | static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd, |
f7234138 | 1065 | struct v4l2_subdev_pad_config *cfg, |
4af81310 SN |
1066 | struct v4l2_subdev_format *fmt) |
1067 | { | |
1068 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1069 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
e90ad659 | 1070 | struct flite_frame *f = &fimc->inp_frame; |
4af81310 SN |
1071 | |
1072 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
f7234138 | 1073 | mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad); |
4af81310 SN |
1074 | fmt->format = *mf; |
1075 | return 0; | |
1076 | } | |
4af81310 SN |
1077 | |
1078 | mutex_lock(&fimc->lock); | |
1c26190a | 1079 | mf->colorspace = f->fmt->colorspace; |
e90ad659 | 1080 | mf->code = f->fmt->mbus_code; |
4af81310 SN |
1081 | |
1082 | if (fmt->pad == FLITE_SD_PAD_SINK) { | |
1083 | /* full camera input frame size */ | |
1084 | mf->width = f->f_width; | |
1085 | mf->height = f->f_height; | |
1086 | } else { | |
1087 | /* crop size */ | |
1088 | mf->width = f->rect.width; | |
1089 | mf->height = f->rect.height; | |
1090 | } | |
1091 | mutex_unlock(&fimc->lock); | |
1092 | return 0; | |
1093 | } | |
1094 | ||
1095 | static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd, | |
f7234138 | 1096 | struct v4l2_subdev_pad_config *cfg, |
4af81310 SN |
1097 | struct v4l2_subdev_format *fmt) |
1098 | { | |
1099 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1100 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
1101 | struct flite_frame *sink = &fimc->inp_frame; | |
9356ac76 | 1102 | struct flite_frame *source = &fimc->out_frame; |
4af81310 SN |
1103 | const struct fimc_fmt *ffmt; |
1104 | ||
969e877c | 1105 | v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n", |
4af81310 SN |
1106 | fmt->pad, mf->code, mf->width, mf->height); |
1107 | ||
4af81310 SN |
1108 | mutex_lock(&fimc->lock); |
1109 | ||
03878bb4 SN |
1110 | if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP && |
1111 | sd->entity.stream_count > 0) || | |
1112 | (atomic_read(&fimc->out_path) == FIMC_IO_DMA && | |
1113 | vb2_is_busy(&fimc->vb_queue))) { | |
4af81310 SN |
1114 | mutex_unlock(&fimc->lock); |
1115 | return -EBUSY; | |
1116 | } | |
1117 | ||
f7234138 | 1118 | ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt); |
4af81310 SN |
1119 | |
1120 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
b1d2dc5c SN |
1121 | struct v4l2_mbus_framefmt *src_fmt; |
1122 | ||
f7234138 | 1123 | mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad); |
4af81310 | 1124 | *mf = fmt->format; |
b1d2dc5c SN |
1125 | |
1126 | if (fmt->pad == FLITE_SD_PAD_SINK) { | |
1127 | unsigned int pad = FLITE_SD_PAD_SOURCE_DMA; | |
f7234138 | 1128 | src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad); |
b1d2dc5c SN |
1129 | *src_fmt = *mf; |
1130 | } | |
1131 | ||
4af81310 SN |
1132 | mutex_unlock(&fimc->lock); |
1133 | return 0; | |
1134 | } | |
1135 | ||
1136 | if (fmt->pad == FLITE_SD_PAD_SINK) { | |
1137 | sink->f_width = mf->width; | |
1138 | sink->f_height = mf->height; | |
e90ad659 | 1139 | sink->fmt = ffmt; |
4af81310 SN |
1140 | /* Set sink crop rectangle */ |
1141 | sink->rect.width = mf->width; | |
1142 | sink->rect.height = mf->height; | |
1143 | sink->rect.left = 0; | |
1144 | sink->rect.top = 0; | |
9356ac76 SN |
1145 | /* Reset source format and crop rectangle */ |
1146 | source->rect = sink->rect; | |
1147 | source->f_width = mf->width; | |
1148 | source->f_height = mf->height; | |
4af81310 SN |
1149 | } |
1150 | ||
1151 | mutex_unlock(&fimc->lock); | |
1152 | return 0; | |
1153 | } | |
1154 | ||
1155 | static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd, | |
f7234138 | 1156 | struct v4l2_subdev_pad_config *cfg, |
4af81310 SN |
1157 | struct v4l2_subdev_selection *sel) |
1158 | { | |
1159 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1160 | struct flite_frame *f = &fimc->inp_frame; | |
1161 | ||
5689b288 SA |
1162 | if ((sel->target != V4L2_SEL_TGT_CROP && |
1163 | sel->target != V4L2_SEL_TGT_CROP_BOUNDS) || | |
1164 | sel->pad != FLITE_SD_PAD_SINK) | |
4af81310 SN |
1165 | return -EINVAL; |
1166 | ||
1167 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { | |
f7234138 | 1168 | sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad); |
4af81310 SN |
1169 | return 0; |
1170 | } | |
1171 | ||
1172 | mutex_lock(&fimc->lock); | |
5689b288 | 1173 | if (sel->target == V4L2_SEL_TGT_CROP) { |
4af81310 SN |
1174 | sel->r = f->rect; |
1175 | } else { | |
1176 | sel->r.left = 0; | |
1177 | sel->r.top = 0; | |
1178 | sel->r.width = f->f_width; | |
1179 | sel->r.height = f->f_height; | |
1180 | } | |
1181 | mutex_unlock(&fimc->lock); | |
1182 | ||
969e877c | 1183 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
4af81310 SN |
1184 | __func__, f->rect.left, f->rect.top, f->rect.width, |
1185 | f->rect.height, f->f_width, f->f_height); | |
1186 | ||
1187 | return 0; | |
1188 | } | |
1189 | ||
1190 | static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd, | |
f7234138 | 1191 | struct v4l2_subdev_pad_config *cfg, |
4af81310 SN |
1192 | struct v4l2_subdev_selection *sel) |
1193 | { | |
1194 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1195 | struct flite_frame *f = &fimc->inp_frame; | |
1196 | int ret = 0; | |
1197 | ||
5689b288 | 1198 | if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK) |
4af81310 SN |
1199 | return -EINVAL; |
1200 | ||
1201 | mutex_lock(&fimc->lock); | |
1202 | fimc_lite_try_crop(fimc, &sel->r); | |
1203 | ||
1204 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { | |
f7234138 | 1205 | *v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r; |
4af81310 SN |
1206 | } else { |
1207 | unsigned long flags; | |
1208 | spin_lock_irqsave(&fimc->slock, flags); | |
1209 | f->rect = sel->r; | |
1210 | /* Same crop rectangle on the source pad */ | |
1211 | fimc->out_frame.rect = sel->r; | |
1212 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
1213 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1214 | } | |
1215 | mutex_unlock(&fimc->lock); | |
1216 | ||
969e877c | 1217 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
4af81310 SN |
1218 | __func__, f->rect.left, f->rect.top, f->rect.width, |
1219 | f->rect.height, f->f_width, f->f_height); | |
1220 | ||
1221 | return ret; | |
1222 | } | |
1223 | ||
1224 | static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on) | |
1225 | { | |
1226 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
6319d6a0 SN |
1227 | unsigned long flags; |
1228 | int ret; | |
4af81310 | 1229 | |
6319d6a0 SN |
1230 | /* |
1231 | * Find sensor subdev linked to FIMC-LITE directly or through | |
1232 | * MIPI-CSIS. This is required for configuration where FIMC-LITE | |
1233 | * is used as a subdev only and feeds data internally to FIMC-IS. | |
1234 | * The pipeline links are protected through entity.stream_count | |
1235 | * so there is no need to take the media graph mutex here. | |
1236 | */ | |
045a1fac | 1237 | fimc->sensor = fimc_find_remote_sensor(&sd->entity); |
6319d6a0 | 1238 | |
03878bb4 | 1239 | if (atomic_read(&fimc->out_path) != FIMC_IO_ISP) |
4af81310 SN |
1240 | return -ENOIOCTLCMD; |
1241 | ||
03878bb4 | 1242 | mutex_lock(&fimc->lock); |
6319d6a0 SN |
1243 | if (on) { |
1244 | flite_hw_reset(fimc); | |
1245 | ret = fimc_lite_hw_init(fimc, true); | |
1246 | if (!ret) { | |
1247 | spin_lock_irqsave(&fimc->slock, flags); | |
1248 | flite_hw_capture_start(fimc); | |
1249 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1250 | } | |
1251 | } else { | |
1252 | set_bit(ST_FLITE_OFF, &fimc->state); | |
4af81310 | 1253 | |
6319d6a0 SN |
1254 | spin_lock_irqsave(&fimc->slock, flags); |
1255 | flite_hw_capture_stop(fimc); | |
1256 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1257 | ||
1258 | ret = wait_event_timeout(fimc->irq_queue, | |
1259 | !test_bit(ST_FLITE_OFF, &fimc->state), | |
1260 | msecs_to_jiffies(200)); | |
1261 | if (ret == 0) | |
1262 | v4l2_err(sd, "s_stream(0) timeout\n"); | |
1263 | clear_bit(ST_FLITE_RUN, &fimc->state); | |
1264 | } | |
1265 | ||
1266 | mutex_unlock(&fimc->lock); | |
1267 | return ret; | |
4af81310 SN |
1268 | } |
1269 | ||
4af81310 SN |
1270 | static int fimc_lite_log_status(struct v4l2_subdev *sd) |
1271 | { | |
1272 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1273 | ||
1274 | flite_hw_dump_regs(fimc, __func__); | |
1275 | return 0; | |
1276 | } | |
1277 | ||
1278 | static int fimc_lite_subdev_registered(struct v4l2_subdev *sd) | |
1279 | { | |
1280 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1281 | struct vb2_queue *q = &fimc->vb_queue; | |
bc7584b0 | 1282 | struct video_device *vfd = &fimc->ve.vdev; |
4af81310 SN |
1283 | int ret; |
1284 | ||
1bcd7041 | 1285 | memset(vfd, 0, sizeof(*vfd)); |
03878bb4 | 1286 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
4af81310 | 1287 | |
4af81310 SN |
1288 | snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture", |
1289 | fimc->index); | |
1290 | ||
1291 | vfd->fops = &fimc_lite_fops; | |
1292 | vfd->ioctl_ops = &fimc_lite_ioctl_ops; | |
1293 | vfd->v4l2_dev = sd->v4l2_dev; | |
1294 | vfd->minor = -1; | |
1bcd7041 | 1295 | vfd->release = video_device_release_empty; |
ee12b049 | 1296 | vfd->queue = q; |
4af81310 SN |
1297 | fimc->reqbufs_count = 0; |
1298 | ||
1299 | INIT_LIST_HEAD(&fimc->pending_buf_q); | |
1300 | INIT_LIST_HEAD(&fimc->active_buf_q); | |
1301 | ||
1302 | memset(q, 0, sizeof(*q)); | |
1303 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | |
1304 | q->io_modes = VB2_MMAP | VB2_USERPTR; | |
1305 | q->ops = &fimc_lite_qops; | |
1306 | q->mem_ops = &vb2_dma_contig_memops; | |
1307 | q->buf_struct_size = sizeof(struct flite_buffer); | |
1308 | q->drv_priv = fimc; | |
ade48681 | 1309 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
ee12b049 | 1310 | q->lock = &fimc->lock; |
4af81310 | 1311 | |
41fd087f SN |
1312 | ret = vb2_queue_init(q); |
1313 | if (ret < 0) | |
1314 | return ret; | |
4af81310 SN |
1315 | |
1316 | fimc->vd_pad.flags = MEDIA_PAD_FL_SINK; | |
18095107 | 1317 | ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad); |
1bcd7041 SN |
1318 | if (ret < 0) |
1319 | return ret; | |
4af81310 SN |
1320 | |
1321 | video_set_drvdata(vfd, fimc); | |
403dfbec | 1322 | fimc->ve.pipe = v4l2_get_subdev_hostdata(sd); |
4af81310 SN |
1323 | |
1324 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1); | |
1bcd7041 SN |
1325 | if (ret < 0) { |
1326 | media_entity_cleanup(&vfd->entity); | |
403dfbec | 1327 | fimc->ve.pipe = NULL; |
1bcd7041 SN |
1328 | return ret; |
1329 | } | |
4af81310 SN |
1330 | |
1331 | v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n", | |
1332 | vfd->name, video_device_node_name(vfd)); | |
1333 | return 0; | |
4af81310 SN |
1334 | } |
1335 | ||
1336 | static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd) | |
1337 | { | |
1338 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1339 | ||
1340 | if (fimc == NULL) | |
1341 | return; | |
1342 | ||
26d63d13 SN |
1343 | mutex_lock(&fimc->lock); |
1344 | ||
bc7584b0 SN |
1345 | if (video_is_registered(&fimc->ve.vdev)) { |
1346 | video_unregister_device(&fimc->ve.vdev); | |
1347 | media_entity_cleanup(&fimc->ve.vdev.entity); | |
403dfbec | 1348 | fimc->ve.pipe = NULL; |
4af81310 | 1349 | } |
26d63d13 SN |
1350 | |
1351 | mutex_unlock(&fimc->lock); | |
4af81310 SN |
1352 | } |
1353 | ||
1354 | static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = { | |
1355 | .registered = fimc_lite_subdev_registered, | |
1356 | .unregistered = fimc_lite_subdev_unregistered, | |
1357 | }; | |
1358 | ||
1359 | static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = { | |
1360 | .enum_mbus_code = fimc_lite_subdev_enum_mbus_code, | |
1361 | .get_selection = fimc_lite_subdev_get_selection, | |
1362 | .set_selection = fimc_lite_subdev_set_selection, | |
1363 | .get_fmt = fimc_lite_subdev_get_fmt, | |
1364 | .set_fmt = fimc_lite_subdev_set_fmt, | |
1365 | }; | |
1366 | ||
1367 | static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = { | |
1368 | .s_stream = fimc_lite_subdev_s_stream, | |
1369 | }; | |
1370 | ||
1371 | static const struct v4l2_subdev_core_ops fimc_lite_core_ops = { | |
4af81310 SN |
1372 | .log_status = fimc_lite_log_status, |
1373 | }; | |
1374 | ||
1375 | static struct v4l2_subdev_ops fimc_lite_subdev_ops = { | |
1376 | .core = &fimc_lite_core_ops, | |
1377 | .video = &fimc_lite_subdev_video_ops, | |
1378 | .pad = &fimc_lite_subdev_pad_ops, | |
1379 | }; | |
1380 | ||
1381 | static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl) | |
1382 | { | |
1383 | struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite, | |
1384 | ctrl_handler); | |
1385 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
1386 | return 0; | |
1387 | } | |
1388 | ||
1389 | static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = { | |
1390 | .s_ctrl = fimc_lite_s_ctrl, | |
1391 | }; | |
1392 | ||
1393 | static const struct v4l2_ctrl_config fimc_lite_ctrl = { | |
1394 | .ops = &fimc_lite_ctrl_ops, | |
1395 | .id = V4L2_CTRL_CLASS_USER | 0x1001, | |
1396 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1397 | .name = "Test Pattern 640x480", | |
4cec1893 | 1398 | .step = 1, |
4af81310 SN |
1399 | }; |
1400 | ||
a055d970 SN |
1401 | static void fimc_lite_set_default_config(struct fimc_lite *fimc) |
1402 | { | |
1403 | struct flite_frame *sink = &fimc->inp_frame; | |
1404 | struct flite_frame *source = &fimc->out_frame; | |
1405 | ||
1406 | sink->fmt = &fimc_lite_formats[0]; | |
1407 | sink->f_width = FLITE_DEFAULT_WIDTH; | |
1408 | sink->f_height = FLITE_DEFAULT_HEIGHT; | |
1409 | ||
1410 | sink->rect.width = FLITE_DEFAULT_WIDTH; | |
1411 | sink->rect.height = FLITE_DEFAULT_HEIGHT; | |
1412 | sink->rect.left = 0; | |
1413 | sink->rect.top = 0; | |
1414 | ||
1415 | *source = *sink; | |
1416 | } | |
1417 | ||
4af81310 SN |
1418 | static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc) |
1419 | { | |
1420 | struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler; | |
1421 | struct v4l2_subdev *sd = &fimc->subdev; | |
1422 | int ret; | |
1423 | ||
1424 | v4l2_subdev_init(sd, &fimc_lite_subdev_ops); | |
5a66561f | 1425 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
4af81310 SN |
1426 | snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index); |
1427 | ||
6319d6a0 SN |
1428 | fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
1429 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE; | |
1430 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE; | |
1431 | ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM, | |
18095107 | 1432 | fimc->subdev_pads); |
4af81310 SN |
1433 | if (ret) |
1434 | return ret; | |
1435 | ||
1436 | v4l2_ctrl_handler_init(handler, 1); | |
1437 | fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl, | |
1438 | NULL); | |
1439 | if (handler->error) { | |
1440 | media_entity_cleanup(&sd->entity); | |
1441 | return handler->error; | |
1442 | } | |
1443 | ||
1444 | sd->ctrl_handler = handler; | |
1445 | sd->internal_ops = &fimc_lite_subdev_internal_ops; | |
1446 | sd->entity.ops = &fimc_lite_subdev_media_ops; | |
a59ed48f | 1447 | sd->owner = THIS_MODULE; |
4af81310 SN |
1448 | v4l2_set_subdevdata(sd, fimc); |
1449 | ||
1450 | return 0; | |
1451 | } | |
1452 | ||
1453 | static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc) | |
1454 | { | |
1455 | struct v4l2_subdev *sd = &fimc->subdev; | |
1456 | ||
1457 | v4l2_device_unregister_subdev(sd); | |
1458 | media_entity_cleanup(&sd->entity); | |
1459 | v4l2_ctrl_handler_free(&fimc->ctrl_handler); | |
1460 | v4l2_set_subdevdata(sd, NULL); | |
1461 | } | |
1462 | ||
1463 | static void fimc_lite_clk_put(struct fimc_lite *fimc) | |
1464 | { | |
24f99dd0 | 1465 | if (IS_ERR(fimc->clock)) |
4af81310 SN |
1466 | return; |
1467 | ||
1468 | clk_unprepare(fimc->clock); | |
1469 | clk_put(fimc->clock); | |
24f99dd0 | 1470 | fimc->clock = ERR_PTR(-EINVAL); |
4af81310 SN |
1471 | } |
1472 | ||
1473 | static int fimc_lite_clk_get(struct fimc_lite *fimc) | |
1474 | { | |
1475 | int ret; | |
1476 | ||
1477 | fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME); | |
1478 | if (IS_ERR(fimc->clock)) | |
1479 | return PTR_ERR(fimc->clock); | |
1480 | ||
1481 | ret = clk_prepare(fimc->clock); | |
1482 | if (ret < 0) { | |
1483 | clk_put(fimc->clock); | |
24f99dd0 | 1484 | fimc->clock = ERR_PTR(-EINVAL); |
4af81310 SN |
1485 | } |
1486 | return ret; | |
1487 | } | |
1488 | ||
eb62d9e9 SN |
1489 | static const struct of_device_id flite_of_match[]; |
1490 | ||
4c62e976 | 1491 | static int fimc_lite_probe(struct platform_device *pdev) |
4af81310 | 1492 | { |
eb62d9e9 SN |
1493 | struct flite_drvdata *drv_data = NULL; |
1494 | struct device *dev = &pdev->dev; | |
1495 | const struct of_device_id *of_id; | |
4af81310 SN |
1496 | struct fimc_lite *fimc; |
1497 | struct resource *res; | |
1498 | int ret; | |
1499 | ||
6a40cbbe SK |
1500 | if (!dev->of_node) |
1501 | return -ENODEV; | |
1502 | ||
eb62d9e9 | 1503 | fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL); |
4af81310 SN |
1504 | if (!fimc) |
1505 | return -ENOMEM; | |
1506 | ||
6a40cbbe SK |
1507 | of_id = of_match_node(flite_of_match, dev->of_node); |
1508 | if (of_id) | |
1509 | drv_data = (struct flite_drvdata *)of_id->data; | |
1510 | fimc->index = of_alias_get_id(dev->of_node, "fimc-lite"); | |
eb62d9e9 | 1511 | |
086eca29 SN |
1512 | if (!drv_data || fimc->index >= drv_data->num_instances || |
1513 | fimc->index < 0) { | |
1514 | dev_err(dev, "Wrong %s node alias\n", | |
1515 | dev->of_node->full_name); | |
eb62d9e9 | 1516 | return -EINVAL; |
086eca29 | 1517 | } |
eb62d9e9 | 1518 | |
9c8399c8 | 1519 | fimc->dd = drv_data; |
4af81310 SN |
1520 | fimc->pdev = pdev; |
1521 | ||
1522 | init_waitqueue_head(&fimc->irq_queue); | |
1523 | spin_lock_init(&fimc->slock); | |
1524 | mutex_init(&fimc->lock); | |
1525 | ||
1526 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
eb62d9e9 | 1527 | fimc->regs = devm_ioremap_resource(dev, res); |
f23999ec TR |
1528 | if (IS_ERR(fimc->regs)) |
1529 | return PTR_ERR(fimc->regs); | |
4af81310 SN |
1530 | |
1531 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1532 | if (res == NULL) { | |
eb62d9e9 | 1533 | dev_err(dev, "Failed to get IRQ resource\n"); |
4af81310 SN |
1534 | return -ENXIO; |
1535 | } | |
1536 | ||
1537 | ret = fimc_lite_clk_get(fimc); | |
1538 | if (ret) | |
1539 | return ret; | |
1540 | ||
eb62d9e9 SN |
1541 | ret = devm_request_irq(dev, res->start, flite_irq_handler, |
1542 | 0, dev_name(dev), fimc); | |
4af81310 | 1543 | if (ret) { |
eb62d9e9 | 1544 | dev_err(dev, "Failed to install irq (%d)\n", ret); |
84f14456 | 1545 | goto err_clk_put; |
4af81310 SN |
1546 | } |
1547 | ||
1548 | /* The video node will be created within the subdev's registered() op */ | |
1549 | ret = fimc_lite_create_capture_subdev(fimc); | |
1550 | if (ret) | |
84f14456 | 1551 | goto err_clk_put; |
4af81310 SN |
1552 | |
1553 | platform_set_drvdata(pdev, fimc); | |
eb62d9e9 | 1554 | pm_runtime_enable(dev); |
84f14456 SN |
1555 | |
1556 | if (!pm_runtime_enabled(dev)) { | |
1557 | ret = clk_enable(fimc->clock); | |
1558 | if (ret < 0) | |
a27a19d6 | 1559 | goto err_sd; |
84f14456 | 1560 | } |
4af81310 | 1561 | |
eb62d9e9 | 1562 | fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev); |
4af81310 SN |
1563 | if (IS_ERR(fimc->alloc_ctx)) { |
1564 | ret = PTR_ERR(fimc->alloc_ctx); | |
84f14456 | 1565 | goto err_clk_dis; |
4af81310 | 1566 | } |
a055d970 | 1567 | |
a055d970 SN |
1568 | fimc_lite_set_default_config(fimc); |
1569 | ||
eb62d9e9 | 1570 | dev_dbg(dev, "FIMC-LITE.%d registered successfully\n", |
4af81310 SN |
1571 | fimc->index); |
1572 | return 0; | |
84f14456 SN |
1573 | |
1574 | err_clk_dis: | |
a27a19d6 SN |
1575 | if (!pm_runtime_enabled(dev)) |
1576 | clk_disable(fimc->clock); | |
4af81310 SN |
1577 | err_sd: |
1578 | fimc_lite_unregister_capture_subdev(fimc); | |
84f14456 | 1579 | err_clk_put: |
4af81310 SN |
1580 | fimc_lite_clk_put(fimc); |
1581 | return ret; | |
1582 | } | |
1583 | ||
e243c7c1 | 1584 | #ifdef CONFIG_PM |
4af81310 SN |
1585 | static int fimc_lite_runtime_resume(struct device *dev) |
1586 | { | |
1587 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1588 | ||
1589 | clk_enable(fimc->clock); | |
1590 | return 0; | |
1591 | } | |
1592 | ||
1593 | static int fimc_lite_runtime_suspend(struct device *dev) | |
1594 | { | |
1595 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1596 | ||
1597 | clk_disable(fimc->clock); | |
1598 | return 0; | |
1599 | } | |
656e62dc | 1600 | #endif |
4af81310 SN |
1601 | |
1602 | #ifdef CONFIG_PM_SLEEP | |
1603 | static int fimc_lite_resume(struct device *dev) | |
1604 | { | |
1605 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1606 | struct flite_buffer *buf; | |
1607 | unsigned long flags; | |
1608 | int i; | |
1609 | ||
1610 | spin_lock_irqsave(&fimc->slock, flags); | |
1611 | if (!test_and_clear_bit(ST_LPM, &fimc->state) || | |
1612 | !test_bit(ST_FLITE_IN_USE, &fimc->state)) { | |
1613 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1614 | return 0; | |
1615 | } | |
1616 | flite_hw_reset(fimc); | |
1617 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1618 | ||
1619 | if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state)) | |
1620 | return 0; | |
1621 | ||
1622 | INIT_LIST_HEAD(&fimc->active_buf_q); | |
403dfbec | 1623 | fimc_pipeline_call(&fimc->ve, open, |
bc7584b0 | 1624 | &fimc->ve.vdev.entity, false); |
03878bb4 | 1625 | fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP); |
4af81310 SN |
1626 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
1627 | ||
1628 | for (i = 0; i < fimc->reqbufs_count; i++) { | |
1629 | if (list_empty(&fimc->pending_buf_q)) | |
1630 | break; | |
1631 | buf = fimc_lite_pending_queue_pop(fimc); | |
2d700715 | 1632 | buffer_queue(&buf->vb.vb2_buf); |
4af81310 SN |
1633 | } |
1634 | return 0; | |
1635 | } | |
1636 | ||
1637 | static int fimc_lite_suspend(struct device *dev) | |
1638 | { | |
1639 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1640 | bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state); | |
1641 | int ret; | |
1642 | ||
1643 | if (test_and_set_bit(ST_LPM, &fimc->state)) | |
1644 | return 0; | |
1645 | ||
1646 | ret = fimc_lite_stop_capture(fimc, suspend); | |
316efab3 | 1647 | if (ret < 0 || !fimc_lite_active(fimc)) |
4af81310 SN |
1648 | return ret; |
1649 | ||
403dfbec | 1650 | return fimc_pipeline_call(&fimc->ve, close); |
4af81310 SN |
1651 | } |
1652 | #endif /* CONFIG_PM_SLEEP */ | |
1653 | ||
4c62e976 | 1654 | static int fimc_lite_remove(struct platform_device *pdev) |
4af81310 SN |
1655 | { |
1656 | struct fimc_lite *fimc = platform_get_drvdata(pdev); | |
1657 | struct device *dev = &pdev->dev; | |
1658 | ||
1659 | pm_runtime_disable(dev); | |
1660 | pm_runtime_set_suspended(dev); | |
1661 | fimc_lite_unregister_capture_subdev(fimc); | |
1662 | vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); | |
1663 | fimc_lite_clk_put(fimc); | |
1664 | ||
1665 | dev_info(dev, "Driver unloaded\n"); | |
1666 | return 0; | |
1667 | } | |
1668 | ||
eb62d9e9 SN |
1669 | static const struct dev_pm_ops fimc_lite_pm_ops = { |
1670 | SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume) | |
1671 | SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume, | |
1672 | NULL) | |
1673 | }; | |
1674 | ||
9c8399c8 SN |
1675 | /* EXYNOS4212, EXYNOS4412 */ |
1676 | static struct flite_drvdata fimc_lite_drvdata_exynos4 = { | |
4af81310 SN |
1677 | .max_width = 8192, |
1678 | .max_height = 8192, | |
1679 | .out_width_align = 8, | |
1680 | .win_hor_offs_align = 2, | |
1681 | .out_hor_offs_align = 8, | |
086eca29 SN |
1682 | .max_dma_bufs = 1, |
1683 | .num_instances = 2, | |
1684 | }; | |
1685 | ||
1686 | /* EXYNOS5250 */ | |
1687 | static struct flite_drvdata fimc_lite_drvdata_exynos5 = { | |
1688 | .max_width = 8192, | |
1689 | .max_height = 8192, | |
1690 | .out_width_align = 8, | |
1691 | .win_hor_offs_align = 2, | |
1692 | .out_hor_offs_align = 8, | |
1693 | .max_dma_bufs = 32, | |
1694 | .num_instances = 3, | |
4af81310 SN |
1695 | }; |
1696 | ||
eb62d9e9 SN |
1697 | static const struct of_device_id flite_of_match[] = { |
1698 | { | |
1699 | .compatible = "samsung,exynos4212-fimc-lite", | |
1700 | .data = &fimc_lite_drvdata_exynos4, | |
1701 | }, | |
086eca29 SN |
1702 | { |
1703 | .compatible = "samsung,exynos5250-fimc-lite", | |
1704 | .data = &fimc_lite_drvdata_exynos5, | |
1705 | }, | |
eb62d9e9 | 1706 | { /* sentinel */ }, |
4af81310 | 1707 | }; |
eb62d9e9 | 1708 | MODULE_DEVICE_TABLE(of, flite_of_match); |
4af81310 SN |
1709 | |
1710 | static struct platform_driver fimc_lite_driver = { | |
1711 | .probe = fimc_lite_probe, | |
4c62e976 | 1712 | .remove = fimc_lite_remove, |
4af81310 | 1713 | .driver = { |
eb62d9e9 | 1714 | .of_match_table = flite_of_match, |
4af81310 | 1715 | .name = FIMC_LITE_DRV_NAME, |
4af81310 SN |
1716 | .pm = &fimc_lite_pm_ops, |
1717 | } | |
1718 | }; | |
1719 | module_platform_driver(fimc_lite_driver); | |
1720 | MODULE_LICENSE("GPL"); | |
1721 | MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME); |