[media] exynos4-is: Add support for asynchronous subdevices registration
[deliverable/linux.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
52917bcb
SN
4 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
d3f5e0c5
SN
14#include <linux/clk.h>
15#include <linux/clk-provider.h>
d3953223
SN
16#include <linux/device.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/kernel.h>
20#include <linux/list.h>
21#include <linux/module.h>
e2985a26
SN
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_device.h>
d3953223
SN
25#include <linux/platform_device.h>
26#include <linux/pm_runtime.h>
27#include <linux/types.h>
28#include <linux/slab.h>
fa91f105 29#include <media/v4l2-async.h>
131b6c61 30#include <media/v4l2-ctrls.h>
e2985a26 31#include <media/v4l2-of.h>
d3953223 32#include <media/media-device.h>
b9ee31e6 33#include <media/s5p_fimc.h>
d3953223 34
56fa1a6a 35#include "media-dev.h"
d3953223 36#include "fimc-core.h"
e781bbe3 37#include "fimc-is.h"
0f735f52 38#include "fimc-lite.h"
d3953223
SN
39#include "mipi-csis.h"
40
41static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 42 struct fimc_source_info *si,
d3953223 43 bool on);
52917bcb
SN
44
45/* Set up image sensor subdev -> FIMC capture node notifications. */
46static void __setup_sensor_notification(struct fimc_md *fmd,
47 struct v4l2_subdev *sensor,
48 struct v4l2_subdev *fimc_sd)
49{
50 struct fimc_source_info *src_inf;
51 struct fimc_sensor_info *md_si;
52 unsigned long flags;
53
54 src_inf = v4l2_get_subdev_hostdata(sensor);
55 if (!src_inf || WARN_ON(fmd == NULL))
56 return;
57
58 md_si = source_to_sensor_info(src_inf);
59 spin_lock_irqsave(&fmd->slock, flags);
60 md_si->host = v4l2_get_subdevdata(fimc_sd);
61 spin_unlock_irqrestore(&fmd->slock, flags);
62}
63
d3953223
SN
64/**
65 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 66 * @me: media entity terminating the pipeline
d3953223
SN
67 *
68 * Caller holds the graph mutex.
69 */
b9ee31e6 70static void fimc_pipeline_prepare(struct fimc_pipeline *p,
403dfbec 71 struct media_entity *me)
d3953223 72{
52917bcb 73 struct fimc_md *fmd = entity_to_fimc_mdev(me);
d3953223 74 struct v4l2_subdev *sd;
52917bcb 75 struct v4l2_subdev *sensor = NULL;
0f735f52 76 int i;
d3953223 77
0f735f52
SN
78 for (i = 0; i < IDX_MAX; i++)
79 p->subdevs[i] = NULL;
d3953223 80
0f735f52 81 while (1) {
39bb6df6
SN
82 struct media_pad *pad = NULL;
83
84 /* Find remote source pad */
85 for (i = 0; i < me->num_pads; i++) {
86 struct media_pad *spad = &me->pads[i];
87 if (!(spad->flags & MEDIA_PAD_FL_SINK))
88 continue;
1bddf1b3 89 pad = media_entity_remote_pad(spad);
39bb6df6
SN
90 if (pad)
91 break;
92 }
0f735f52 93
0f735f52
SN
94 if (pad == NULL ||
95 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
96 break;
0f735f52
SN
97 sd = media_entity_to_v4l2_subdev(pad->entity);
98
99 switch (sd->grp_id) {
588c87be 100 case GRP_ID_SENSOR:
52917bcb
SN
101 sensor = sd;
102 /* fall through */
103 case GRP_ID_FIMC_IS_SENSOR:
0f735f52
SN
104 p->subdevs[IDX_SENSOR] = sd;
105 break;
588c87be 106 case GRP_ID_CSIS:
0f735f52
SN
107 p->subdevs[IDX_CSIS] = sd;
108 break;
588c87be 109 case GRP_ID_FLITE:
4af81310
SN
110 p->subdevs[IDX_FLITE] = sd;
111 break;
588c87be 112 case GRP_ID_FIMC:
52917bcb 113 p->subdevs[IDX_FIMC] = sd;
0f735f52 114 break;
e781bbe3
SN
115 case GRP_ID_FIMC_IS:
116 p->subdevs[IDX_IS_ISP] = sd;
117 break;
0f735f52 118 default:
e781bbe3 119 break;
0f735f52 120 }
39bb6df6
SN
121 me = &sd->entity;
122 if (me->num_pads == 1)
123 break;
d3953223 124 }
52917bcb
SN
125
126 if (sensor && p->subdevs[IDX_FIMC])
127 __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
d3953223
SN
128}
129
130/**
131 * __subdev_set_power - change power state of a single subdev
132 * @sd: subdevice to change power state for
133 * @on: 1 to enable power or 0 to disable
134 *
135 * Return result of s_power subdev operation or -ENXIO if sd argument
136 * is NULL. Return 0 if the subdevice does not implement s_power.
137 */
138static int __subdev_set_power(struct v4l2_subdev *sd, int on)
139{
140 int *use_count;
141 int ret;
142
143 if (sd == NULL)
144 return -ENXIO;
145
146 use_count = &sd->entity.use_count;
147 if (on && (*use_count)++ > 0)
148 return 0;
149 else if (!on && (*use_count == 0 || --(*use_count) > 0))
150 return 0;
151 ret = v4l2_subdev_call(sd, core, s_power, on);
152
153 return ret != -ENOIOCTLCMD ? ret : 0;
154}
155
156/**
157 * fimc_pipeline_s_power - change power state of all pipeline subdevs
158 * @fimc: fimc device terminating the pipeline
0f735f52 159 * @state: true to power on, false to power off
d3953223 160 *
0f735f52 161 * Needs to be called with the graph mutex held.
d3953223 162 */
f8bca4f5 163static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 164{
f8bca4f5
SN
165 static const u8 seq[2][IDX_MAX - 1] = {
166 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
167 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
168 };
169 int i, ret = 0;
d3953223 170
0f735f52 171 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
172 return -ENXIO;
173
f8bca4f5
SN
174 for (i = 0; i < IDX_MAX - 1; i++) {
175 unsigned int idx = seq[on][i];
176
177 ret = __subdev_set_power(p->subdevs[idx], on);
178
0f735f52 179
0f735f52 180 if (ret < 0 && ret != -ENXIO)
f8bca4f5 181 goto error;
d3953223 182 }
0f735f52 183 return 0;
f8bca4f5
SN
184error:
185 for (; i >= 0; i--) {
186 unsigned int idx = seq[on][i];
187 __subdev_set_power(p->subdevs[idx], !on);
188 }
189 return ret;
d3953223
SN
190}
191
192/**
b9ee31e6
SN
193 * __fimc_pipeline_open - update the pipeline information, enable power
194 * of all pipeline subdevs and the sensor clock
d3953223 195 * @me: media entity to start graph walk with
056f4f30 196 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 197 *
740ad921 198 * Called with the graph mutex held.
d3953223 199 */
403dfbec 200static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
056f4f30 201 struct media_entity *me, bool prepare)
d3953223 202{
056f4f30 203 struct fimc_md *fmd = entity_to_fimc_mdev(me);
403dfbec 204 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30 205 struct v4l2_subdev *sd;
d3953223
SN
206 int ret;
207
056f4f30
SN
208 if (WARN_ON(p == NULL || me == NULL))
209 return -EINVAL;
210
211 if (prepare)
0f735f52
SN
212 fimc_pipeline_prepare(p, me);
213
056f4f30
SN
214 sd = p->subdevs[IDX_SENSOR];
215 if (sd == NULL)
d3953223 216 return -EINVAL;
0f735f52 217
056f4f30
SN
218 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
219 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
220 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
221 if (ret < 0)
222 return ret;
223 }
fa91f105 224
056f4f30
SN
225 ret = fimc_md_set_camclk(sd, true);
226 if (ret < 0)
227 goto err_wbclk;
228
229 ret = fimc_pipeline_s_power(p, 1);
230 if (!ret)
231 return 0;
0f735f52 232
056f4f30
SN
233 fimc_md_set_camclk(sd, false);
234
235err_wbclk:
236 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
237 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
238
239 return ret;
d3953223
SN
240}
241
d3953223 242/**
b9ee31e6 243 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
244 * @fimc: fimc device terminating the pipeline
245 *
740ad921 246 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 247 */
403dfbec 248static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
d3953223 249{
403dfbec 250 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30
SN
251 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
252 struct fimc_md *fmd;
36da6fcd 253 int ret;
740ad921 254
36da6fcd
SN
255 if (sd == NULL) {
256 pr_warn("%s(): No sensor subdev\n", __func__);
257 return 0;
d3953223 258 }
056f4f30 259
36da6fcd
SN
260 ret = fimc_pipeline_s_power(p, 0);
261 fimc_md_set_camclk(sd, false);
262
056f4f30
SN
263 fmd = entity_to_fimc_mdev(&sd->entity);
264
265 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
266 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
267 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
268
d3953223
SN
269 return ret == -ENXIO ? 0 : ret;
270}
271
d3953223 272/**
8d274e7c 273 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 274 * @pipeline: video pipeline structure
8d274e7c 275 * @on: passed as the s_stream() callback argument
d3953223 276 */
403dfbec 277static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
d3953223 278{
8d274e7c
SN
279 static const u8 seq[2][IDX_MAX] = {
280 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
281 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
282 };
403dfbec 283 struct fimc_pipeline *p = to_fimc_pipeline(ep);
8d274e7c 284 int i, ret = 0;
d3953223 285
0f735f52 286 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
287 return -ENODEV;
288
0f735f52 289 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 290 unsigned int idx = seq[on][i];
0f735f52
SN
291
292 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
293
294 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 295 goto error;
0f735f52 296 }
0f735f52 297 return 0;
8d274e7c
SN
298error:
299 for (; i >= 0; i--) {
300 unsigned int idx = seq[on][i];
301 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
302 }
303 return ret;
d3953223 304}
b9ee31e6
SN
305
306/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
403dfbec 307static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
308 .open = __fimc_pipeline_open,
309 .close = __fimc_pipeline_close,
310 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 311};
d3953223 312
403dfbec
SN
313static struct exynos_media_pipeline *fimc_md_pipeline_create(
314 struct fimc_md *fmd)
315{
316 struct fimc_pipeline *p;
317
318 p = kzalloc(sizeof(*p), GFP_KERNEL);
319 if (!p)
320 return NULL;
321
322 list_add_tail(&p->list, &fmd->pipelines);
323
324 p->ep.ops = &fimc_pipeline_ops;
325 return &p->ep;
326}
327
328static void fimc_md_pipelines_free(struct fimc_md *fmd)
329{
330 while (!list_empty(&fmd->pipelines)) {
331 struct fimc_pipeline *p;
332
333 p = list_entry(fmd->pipelines.next, typeof(*p), list);
334 list_del(&p->list);
335 kfree(p);
336 }
337}
338
d3953223
SN
339/*
340 * Sensor subdevice helper functions
341 */
342static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
4c8f0629 343 struct fimc_source_info *si)
d3953223
SN
344{
345 struct i2c_adapter *adapter;
346 struct v4l2_subdev *sd = NULL;
347
4c8f0629 348 if (!si || !fmd)
d3953223 349 return NULL;
88fa8311
SN
350 /*
351 * If FIMC bus type is not Writeback FIFO assume it is same
352 * as sensor_bus_type.
353 */
4c8f0629 354 si->fimc_bus_type = si->sensor_bus_type;
d3953223 355
4c8f0629 356 adapter = i2c_get_adapter(si->i2c_bus_num);
ecd9acbf
SN
357 if (!adapter) {
358 v4l2_warn(&fmd->v4l2_dev,
359 "Failed to get I2C adapter %d, deferring probe\n",
4c8f0629 360 si->i2c_bus_num);
ecd9acbf
SN
361 return ERR_PTR(-EPROBE_DEFER);
362 }
d3953223 363 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
4c8f0629 364 si->board_info, NULL);
d3953223 365 if (IS_ERR_OR_NULL(sd)) {
7acde02a 366 i2c_put_adapter(adapter);
ecd9acbf
SN
367 v4l2_warn(&fmd->v4l2_dev,
368 "Failed to acquire subdev %s, deferring probe\n",
4c8f0629 369 si->board_info->type);
ecd9acbf 370 return ERR_PTR(-EPROBE_DEFER);
d3953223 371 }
4c8f0629 372 v4l2_set_subdev_hostdata(sd, si);
588c87be 373 sd->grp_id = GRP_ID_SENSOR;
d3953223
SN
374
375 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
2b13f7d4 376 sd->name);
d3953223
SN
377 return sd;
378}
379
380static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
381{
382 struct i2c_client *client = v4l2_get_subdevdata(sd);
7acde02a 383 struct i2c_adapter *adapter;
d3953223 384
fa91f105 385 if (!client || client->dev.of_node)
d3953223 386 return;
e781bbe3 387
d3953223 388 v4l2_device_unregister_subdev(sd);
2b13f7d4 389
fa91f105
SN
390 adapter = client->adapter;
391 i2c_unregister_device(client);
392 if (adapter)
393 i2c_put_adapter(adapter);
d3953223
SN
394}
395
e2985a26 396#ifdef CONFIG_OF
2b13f7d4
SN
397/* Parse port node and register as a sub-device any sensor specified there. */
398static int fimc_md_parse_port_node(struct fimc_md *fmd,
399 struct device_node *port,
400 unsigned int index)
401{
402 struct device_node *rem, *ep, *np;
403 struct fimc_source_info *pd;
404 struct v4l2_of_endpoint endpoint;
2b13f7d4
SN
405 u32 val;
406
407 pd = &fmd->sensor[index].pdata;
408
409 /* Assume here a port node can have only one endpoint node. */
410 ep = of_get_next_child(port, NULL);
411 if (!ep)
412 return 0;
413
414 v4l2_of_parse_endpoint(ep, &endpoint);
415 if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
416 return -EINVAL;
417
418 pd->mux_id = (endpoint.port - 1) & 0x1;
419
420 rem = v4l2_of_get_remote_port_parent(ep);
421 of_node_put(ep);
422 if (rem == NULL) {
423 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
424 ep->full_name);
425 return 0;
426 }
427 if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
428 pd->clk_id = val;
429
430 if (!of_property_read_u32(rem, "clock-frequency", &val))
431 pd->clk_frequency = val;
fa91f105
SN
432 else
433 pd->clk_frequency = DEFAULT_SENSOR_CLK_FREQ;
2b13f7d4
SN
434
435 if (pd->clk_frequency == 0) {
436 v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
437 rem->full_name);
438 of_node_put(rem);
439 return -EINVAL;
440 }
441
442 if (fimc_input_is_parallel(endpoint.port)) {
443 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
444 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
445 else
446 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
447 pd->flags = endpoint.bus.parallel.flags;
448 } else if (fimc_input_is_mipi_csi(endpoint.port)) {
449 /*
450 * MIPI CSI-2: only input mux selection and
451 * the sensor's clock frequency is needed.
452 */
453 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
454 } else {
455 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
456 endpoint.port, rem->full_name);
457 }
458 /*
459 * For FIMC-IS handled sensors, that are placed under i2c-isp device
460 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
461 * input. Sensors are attached to the FIMC-LITE hostdata interface
462 * directly or through MIPI-CSIS, depending on the external media bus
463 * used. This needs to be handled in a more reliable way, not by just
464 * checking parent's node name.
465 */
466 np = of_get_parent(rem);
467
468 if (np && !of_node_cmp(np->name, "i2c-isp"))
469 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
470 else
471 pd->fimc_bus_type = pd->sensor_bus_type;
472
fa91f105
SN
473 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
474 return -EINVAL;
2b13f7d4 475
fa91f105
SN
476 fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
477 fmd->sensor[index].asd.match.of.node = rem;
478 fmd->async_subdevs[index] = &fmd->sensor[index].asd;
479
480 fmd->num_sensors++;
481
482 of_node_put(rem);
483 return 0;
2b13f7d4
SN
484}
485
486/* Register all SoC external sub-devices */
487static int fimc_md_of_sensors_register(struct fimc_md *fmd,
488 struct device_node *np)
489{
490 struct device_node *parent = fmd->pdev->dev.of_node;
491 struct device_node *node, *ports;
492 int index = 0;
493 int ret;
494
495 /* Attach sensors linked to MIPI CSI-2 receivers */
496 for_each_available_child_of_node(parent, node) {
497 struct device_node *port;
498
499 if (of_node_cmp(node->name, "csis"))
500 continue;
501 /* The csis node can have only port subnode. */
502 port = of_get_next_child(node, NULL);
503 if (!port)
504 continue;
505
506 ret = fimc_md_parse_port_node(fmd, port, index);
507 if (ret < 0)
508 return ret;
509 index++;
510 }
511
512 /* Attach sensors listed in the parallel-ports node */
513 ports = of_get_child_by_name(parent, "parallel-ports");
514 if (!ports)
515 return 0;
516
517 for_each_child_of_node(ports, node) {
518 ret = fimc_md_parse_port_node(fmd, node, index);
519 if (ret < 0)
520 break;
521 index++;
522 }
523
524 return 0;
525}
526
e2985a26
SN
527static int __of_get_csis_id(struct device_node *np)
528{
529 u32 reg = 0;
530
531 np = of_get_child_by_name(np, "port");
532 if (!np)
533 return -EINVAL;
534 of_property_read_u32(np, "reg", &reg);
535 return reg - FIMC_INPUT_MIPI_CSI2_0;
536}
537#else
2b13f7d4 538#define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
e2985a26
SN
539#define __of_get_csis_id(np) (-ENOSYS)
540#endif
541
d3953223
SN
542static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
543{
544 struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
2b13f7d4 545 struct device_node *of_node = fmd->pdev->dev.of_node;
2b13f7d4
SN
546 int num_clients = 0;
547 int ret, i;
d3953223
SN
548
549 /*
550 * Runtime resume one of the FIMC entities to make sure
551 * the sclk_cam clocks are not globally disabled.
552 */
3e20c345 553 if (!fmd->pmf)
d3953223 554 return -ENXIO;
2b13f7d4 555
3e20c345 556 ret = pm_runtime_get_sync(fmd->pmf);
d3953223
SN
557 if (ret < 0)
558 return ret;
559
2b13f7d4
SN
560 if (of_node) {
561 fmd->num_sensors = 0;
562 ret = fimc_md_of_sensors_register(fmd, of_node);
563 } else if (pdata) {
564 WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
565 num_clients = min_t(u32, pdata->num_clients,
566 ARRAY_SIZE(fmd->sensor));
567 fmd->num_sensors = num_clients;
d3953223 568
2b13f7d4 569 for (i = 0; i < num_clients; i++) {
4c8f0629 570 struct fimc_sensor_info *si = &fmd->sensor[i];
2b13f7d4 571 struct v4l2_subdev *sd;
ecd9acbf 572
4c8f0629
SN
573 si->pdata = pdata->source_info[i];
574 ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
2b13f7d4
SN
575 if (ret)
576 break;
4c8f0629
SN
577 sd = fimc_md_register_sensor(fmd, &si->pdata);
578 ret = __fimc_md_set_camclk(fmd, &si->pdata, false);
2b13f7d4
SN
579
580 if (IS_ERR(sd)) {
4c8f0629 581 si->subdev = NULL;
2b13f7d4
SN
582 ret = PTR_ERR(sd);
583 break;
584 }
4c8f0629 585 si->subdev = sd;
2b13f7d4
SN
586 if (ret)
587 break;
ecd9acbf 588 }
d3953223 589 }
2b13f7d4 590
3e20c345 591 pm_runtime_put(fmd->pmf);
d3953223
SN
592 return ret;
593}
594
595/*
7b43a6f3 596 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 597 */
7b43a6f3
SN
598
599static int register_fimc_lite_entity(struct fimc_md *fmd,
600 struct fimc_lite *fimc_lite)
d3953223 601{
8163ec0b 602 struct v4l2_subdev *sd;
403dfbec 603 struct exynos_media_pipeline *ep;
afd7348c 604 int ret;
4af81310 605
7b43a6f3
SN
606 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
607 fmd->fimc_lite[fimc_lite->index]))
608 return -EBUSY;
d3953223 609
7b43a6f3
SN
610 sd = &fimc_lite->subdev;
611 sd->grp_id = GRP_ID_FLITE;
403dfbec
SN
612
613 ep = fimc_md_pipeline_create(fmd);
614 if (!ep)
615 return -ENOMEM;
616
617 v4l2_set_subdev_hostdata(sd, ep);
693f5c40
SN
618
619 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
620 if (!ret)
621 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
622 else
623 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
624 fimc_lite->index);
625 return ret;
d3953223
SN
626}
627
7b43a6f3 628static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 629{
7b43a6f3 630 struct v4l2_subdev *sd;
403dfbec 631 struct exynos_media_pipeline *ep;
4af81310
SN
632 int ret;
633
7b43a6f3
SN
634 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
635 return -EBUSY;
4af81310 636
7b43a6f3
SN
637 sd = &fimc->vid_cap.subdev;
638 sd->grp_id = GRP_ID_FIMC;
403dfbec
SN
639
640 ep = fimc_md_pipeline_create(fmd);
641 if (!ep)
642 return -ENOMEM;
643
644 v4l2_set_subdev_hostdata(sd, ep);
4af81310 645
7b43a6f3
SN
646 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
647 if (!ret) {
3e20c345
SN
648 if (!fmd->pmf && fimc->pdev)
649 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
650 fmd->fimc[fimc->id] = fimc;
651 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
652 } else {
653 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
654 fimc->id, ret);
4af81310 655 }
7b43a6f3 656 return ret;
4af81310
SN
657}
658
7b43a6f3
SN
659static int register_csis_entity(struct fimc_md *fmd,
660 struct platform_device *pdev,
661 struct v4l2_subdev *sd)
d3953223 662{
7b43a6f3 663 struct device_node *node = pdev->dev.of_node;
d3953223
SN
664 int id, ret;
665
e2985a26 666 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 667
e2985a26
SN
668 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
669 return -ENOENT;
7b43a6f3 670
e2985a26
SN
671 if (WARN_ON(fmd->csis[id].sd))
672 return -EBUSY;
d3953223 673
588c87be 674 sd->grp_id = GRP_ID_CSIS;
d3953223 675 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
676 if (!ret)
677 fmd->csis[id].sd = sd;
678 else
d3953223 679 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 680 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
681 return ret;
682}
683
e781bbe3
SN
684static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
685{
686 struct v4l2_subdev *sd = &is->isp.subdev;
687 int ret;
688
689 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
690 if (ret) {
691 v4l2_err(&fmd->v4l2_dev,
692 "Failed to register FIMC-ISP (%d)\n", ret);
693 return ret;
694 }
695
696 fmd->fimc_is = is;
697 return 0;
698}
699
7b43a6f3
SN
700static int fimc_md_register_platform_entity(struct fimc_md *fmd,
701 struct platform_device *pdev,
702 int plat_entity)
d3953223 703{
7b43a6f3
SN
704 struct device *dev = &pdev->dev;
705 int ret = -EPROBE_DEFER;
706 void *drvdata;
707
708 /* Lock to ensure dev->driver won't change. */
709 device_lock(dev);
710
711 if (!dev->driver || !try_module_get(dev->driver->owner))
712 goto dev_unlock;
713
714 drvdata = dev_get_drvdata(dev);
39c1cb2b 715 /* Some subdev didn't probe successfully id drvdata is NULL */
7b43a6f3
SN
716 if (drvdata) {
717 switch (plat_entity) {
718 case IDX_FIMC:
719 ret = register_fimc_entity(fmd, drvdata);
720 break;
721 case IDX_FLITE:
722 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 723 break;
7b43a6f3
SN
724 case IDX_CSIS:
725 ret = register_csis_entity(fmd, pdev, drvdata);
726 break;
e781bbe3
SN
727 case IDX_IS_ISP:
728 ret = register_fimc_is_entity(fmd, drvdata);
729 break;
7b43a6f3
SN
730 default:
731 ret = -ENODEV;
ecd9acbf
SN
732 }
733 }
d3953223 734
7b43a6f3
SN
735 module_put(dev->driver->owner);
736dev_unlock:
737 device_unlock(dev);
738 if (ret == -EPROBE_DEFER)
739 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
740 dev_name(dev));
741 else if (ret < 0)
742 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
743 dev_name(dev), ret);
744 return ret;
745}
746
747static int fimc_md_pdev_match(struct device *dev, void *data)
748{
749 struct platform_device *pdev = to_platform_device(dev);
750 int plat_entity = -1;
751 int ret;
752 char *p;
753
754 if (!get_device(dev))
755 return -ENODEV;
756
757 if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
758 plat_entity = IDX_CSIS;
7b43a6f3
SN
759 } else {
760 p = strstr(pdev->name, "fimc");
761 if (p && *(p + 4) == 0)
762 plat_entity = IDX_FIMC;
ecd9acbf
SN
763 }
764
7b43a6f3
SN
765 if (plat_entity >= 0)
766 ret = fimc_md_register_platform_entity(data, pdev,
767 plat_entity);
768 put_device(dev);
769 return 0;
d3953223
SN
770}
771
e2985a26
SN
772/* Register FIMC, FIMC-LITE and CSIS media entities */
773#ifdef CONFIG_OF
774static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
775 struct device_node *parent)
776{
777 struct device_node *node;
778 int ret = 0;
779
780 for_each_available_child_of_node(parent, node) {
781 struct platform_device *pdev;
782 int plat_entity = -1;
783
784 pdev = of_find_device_by_node(node);
785 if (!pdev)
786 continue;
787
788 /* If driver of any entity isn't ready try all again later. */
789 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
790 plat_entity = IDX_CSIS;
e781bbe3
SN
791 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
792 plat_entity = IDX_IS_ISP;
e2985a26
SN
793 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
794 plat_entity = IDX_FLITE;
795 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
796 !of_property_read_bool(node, "samsung,lcd-wb"))
797 plat_entity = IDX_FIMC;
798
799 if (plat_entity >= 0)
800 ret = fimc_md_register_platform_entity(fmd, pdev,
801 plat_entity);
802 put_device(&pdev->dev);
803 if (ret < 0)
804 break;
805 }
806
807 return ret;
808}
809#else
810#define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
811#endif
812
d3953223
SN
813static void fimc_md_unregister_entities(struct fimc_md *fmd)
814{
815 int i;
816
817 for (i = 0; i < FIMC_MAX_DEVS; i++) {
403dfbec
SN
818 struct fimc_dev *dev = fmd->fimc[i];
819 if (dev == NULL)
d3953223 820 continue;
403dfbec
SN
821 v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
822 dev->vid_cap.ve.pipe = NULL;
d3953223
SN
823 fmd->fimc[i] = NULL;
824 }
4af81310 825 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
403dfbec
SN
826 struct fimc_lite *dev = fmd->fimc_lite[i];
827 if (dev == NULL)
4af81310 828 continue;
403dfbec
SN
829 v4l2_device_unregister_subdev(&dev->subdev);
830 dev->ve.pipe = NULL;
4af81310
SN
831 fmd->fimc_lite[i] = NULL;
832 }
d3953223
SN
833 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
834 if (fmd->csis[i].sd == NULL)
835 continue;
836 v4l2_device_unregister_subdev(fmd->csis[i].sd);
837 fmd->csis[i].sd = NULL;
838 }
fa91f105
SN
839 if (fmd->pdev->dev.of_node == NULL) {
840 for (i = 0; i < fmd->num_sensors; i++) {
841 if (fmd->sensor[i].subdev == NULL)
842 continue;
843 fimc_md_unregister_sensor(fmd->sensor[i].subdev);
844 fmd->sensor[i].subdev = NULL;
845 }
d3953223 846 }
e41a35cb
SN
847
848 if (fmd->fimc_is)
849 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
850
7b43a6f3 851 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
852}
853
d3953223
SN
854/**
855 * __fimc_md_create_fimc_links - create links to all FIMC entities
856 * @fmd: fimc media device
857 * @source: the source entity to create links to all fimc entities from
858 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
859 * @pad: the source entity pad index
d0da3c35 860 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 861 */
4af81310
SN
862static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
863 struct media_entity *source,
864 struct v4l2_subdev *sensor,
d0da3c35 865 int pad, int link_mask)
d3953223 866{
4c8f0629 867 struct fimc_source_info *si = NULL;
d3953223 868 struct media_entity *sink;
4af81310 869 unsigned int flags = 0;
f998bb7b 870 int i, ret = 0;
d3953223 871
f998bb7b
SN
872 if (sensor) {
873 si = v4l2_get_subdev_hostdata(sensor);
874 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 875 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
876 ret = 1;
877 }
878
879 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 880 if (!fmd->fimc[i])
4af81310 881 continue;
d3953223
SN
882 /*
883 * Some FIMC variants are not fitted with camera capture
884 * interface. Skip creating a link from sensor for those.
885 */
4af81310 886 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
887 continue;
888
d0da3c35 889 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 890
693f5c40 891 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
237e0265 892 ret = media_entity_create_link(source, pad, sink,
88fa8311 893 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
894 if (ret)
895 return ret;
896
237e0265
SN
897 /* Notify FIMC capture subdev entity */
898 ret = media_entity_call(sink, link_setup, &sink->pads[0],
899 &source->pads[pad], flags);
900 if (ret)
901 break;
902
542fb082 903 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223 904 source->name, flags ? '=' : '-', sink->name);
d3953223 905 }
4af81310
SN
906
907 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
908 if (!fmd->fimc_lite[i])
909 continue;
910
4af81310
SN
911 sink = &fmd->fimc_lite[i]->subdev.entity;
912 ret = media_entity_create_link(source, pad, sink,
f998bb7b 913 FLITE_SD_PAD_SINK, 0);
4af81310
SN
914 if (ret)
915 return ret;
916
917 /* Notify FIMC-LITE subdev entity */
918 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 919 &source->pads[pad], 0);
4af81310
SN
920 if (ret)
921 break;
922
f998bb7b
SN
923 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
924 source->name, sink->name);
4af81310 925 }
d3953223
SN
926 return 0;
927}
928
4af81310
SN
929/* Create links from FIMC-LITE source pads to other entities */
930static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
931{
932 struct media_entity *source, *sink;
a26860bd 933 int i, ret = 0;
4af81310
SN
934
935 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
936 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 937
4af81310
SN
938 if (fimc == NULL)
939 continue;
f998bb7b 940
4af81310 941 source = &fimc->subdev.entity;
bc7584b0 942 sink = &fimc->ve.vdev.entity;
4af81310 943 /* FIMC-LITE's subdev and video node */
6319d6a0 944 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
945 sink, 0, 0);
946 if (ret)
947 break;
948 /* Link from FIMC-LITE to IS-ISP subdev */
949 sink = &fmd->fimc_is->isp.subdev.entity;
950 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP,
951 sink, 0, 0);
4af81310
SN
952 if (ret)
953 break;
f998bb7b
SN
954 }
955
956 return ret;
957}
958
959/* Create FIMC-IS links */
960static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
961{
962 struct media_entity *source, *sink;
963 int i, ret;
964
965 source = &fmd->fimc_is->isp.subdev.entity;
966
967 for (i = 0; i < FIMC_MAX_DEVS; i++) {
968 if (fmd->fimc[i] == NULL)
969 continue;
970
971 /* Link from IS-ISP subdev to FIMC */
972 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
973 ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
974 sink, FIMC_SD_PAD_SINK_FIFO, 0);
975 if (ret)
976 return ret;
4af81310
SN
977 }
978
979 return ret;
980}
981
d3953223
SN
982/**
983 * fimc_md_create_links - create default links between registered entities
984 *
985 * Parallel interface sensor entities are connected directly to FIMC capture
986 * entities. The sensors using MIPI CSIS bus are connected through immutable
987 * link with CSI receiver entity specified by mux_id. Any registered CSIS
988 * entity has a link to each registered FIMC capture entity. Enabled links
989 * are created by default between each subsequent registered sensor and
990 * subsequent FIMC capture entity. The number of default active links is
991 * determined by the number of available sensors or FIMC entities,
992 * whichever is less.
993 */
994static int fimc_md_create_links(struct fimc_md *fmd)
995{
a8697ec8 996 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 997 struct v4l2_subdev *sensor, *csis;
56bc911a 998 struct fimc_source_info *pdata;
237e0265 999 struct media_entity *source, *sink;
d0da3c35
SN
1000 int i, pad, fimc_id = 0, ret = 0;
1001 u32 flags, link_mask = 0;
d3953223
SN
1002
1003 for (i = 0; i < fmd->num_sensors; i++) {
1004 if (fmd->sensor[i].subdev == NULL)
1005 continue;
1006
1007 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
1008 pdata = v4l2_get_subdev_hostdata(sensor);
1009 if (!pdata)
d3953223
SN
1010 continue;
1011
1012 source = NULL;
d3953223 1013
56bc911a
SN
1014 switch (pdata->sensor_bus_type) {
1015 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
1016 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
1017 "Wrong CSI channel id: %d\n", pdata->mux_id))
1018 return -EINVAL;
1019
1020 csis = fmd->csis[pdata->mux_id].sd;
1021 if (WARN(csis == NULL,
1022 "MIPI-CSI interface specified "
1023 "but s5p-csis module is not loaded!\n"))
d12392ec 1024 return -EINVAL;
d3953223 1025
1c9f5bd7
AH
1026 pad = sensor->entity.num_pads - 1;
1027 ret = media_entity_create_link(&sensor->entity, pad,
d3953223
SN
1028 &csis->entity, CSIS_PAD_SINK,
1029 MEDIA_LNK_FL_IMMUTABLE |
1030 MEDIA_LNK_FL_ENABLED);
1031 if (ret)
1032 return ret;
1033
969e877c 1034 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
1035 sensor->entity.name, csis->entity.name);
1036
4af81310 1037 source = NULL;
5d33ee92 1038 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
1039 break;
1040
56bc911a 1041 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
1042 source = &sensor->entity;
1043 pad = 0;
1044 break;
1045
1046 default:
1047 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 1048 pdata->sensor_bus_type);
d3953223
SN
1049 return -EINVAL;
1050 }
1051 if (source == NULL)
1052 continue;
1053
d0da3c35 1054 link_mask = 1 << fimc_id++;
4af81310 1055 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1056 pad, link_mask);
4af81310
SN
1057 }
1058
a8697ec8 1059 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
1060 if (fmd->csis[i].sd == NULL)
1061 continue;
f998bb7b 1062
4af81310
SN
1063 source = &fmd->csis[i].sd->entity;
1064 pad = CSIS_PAD_SOURCE;
5d33ee92 1065 sensor = csi_sensors[i];
4af81310 1066
d0da3c35 1067 link_mask = 1 << fimc_id++;
5d33ee92 1068 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1069 pad, link_mask);
d3953223 1070 }
4af81310 1071
237e0265
SN
1072 /* Create immutable links between each FIMC's subdev and video node */
1073 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1074 for (i = 0; i < FIMC_MAX_DEVS; i++) {
1075 if (!fmd->fimc[i])
1076 continue;
f998bb7b 1077
693f5c40 1078 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 1079 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 1080
237e0265
SN
1081 ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
1082 sink, 0, flags);
1083 if (ret)
1084 break;
1085 }
1086
f998bb7b
SN
1087 ret = __fimc_md_create_flite_source_links(fmd);
1088 if (ret < 0)
1089 return ret;
1090
1091 if (fmd->use_isp)
1092 ret = __fimc_md_create_fimc_is_links(fmd);
1093
1094 return ret;
d3953223
SN
1095}
1096
1097/*
056f4f30 1098 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1099 */
0e23cbbe
SN
1100static void fimc_md_put_clocks(struct fimc_md *fmd)
1101{
1102 int i = FIMC_MAX_CAMCLKS;
1103
1104 while (--i >= 0) {
1105 if (IS_ERR(fmd->camclk[i].clock))
1106 continue;
0e23cbbe
SN
1107 clk_put(fmd->camclk[i].clock);
1108 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1109 }
056f4f30
SN
1110
1111 /* Writeback (PIXELASYNCMx) clocks */
1112 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1113 if (IS_ERR(fmd->wbclk[i]))
1114 continue;
1115 clk_put(fmd->wbclk[i]);
1116 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1117 }
0e23cbbe
SN
1118}
1119
d3953223
SN
1120static int fimc_md_get_clocks(struct fimc_md *fmd)
1121{
0e23cbbe 1122 struct device *dev = NULL;
d3953223
SN
1123 char clk_name[32];
1124 struct clk *clock;
044c372a 1125 int i, ret = 0;
0e23cbbe
SN
1126
1127 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1128 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1129
1130 if (fmd->pdev->dev.of_node)
1131 dev = &fmd->pdev->dev;
d3953223
SN
1132
1133 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1134 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1135 clock = clk_get(dev, clk_name);
1136
dc3ae328 1137 if (IS_ERR(clock)) {
0e23cbbe
SN
1138 dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
1139 clk_name);
1140 ret = PTR_ERR(clock);
1141 break;
1142 }
d3953223
SN
1143 fmd->camclk[i].clock = clock;
1144 }
0e23cbbe
SN
1145 if (ret)
1146 fimc_md_put_clocks(fmd);
d3953223 1147
056f4f30
SN
1148 if (!fmd->use_isp)
1149 return 0;
1150 /*
1151 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1152 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1153 */
1154 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1155
1156 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1157 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1158 clock = clk_get(dev, clk_name);
1159 if (IS_ERR(clock)) {
1160 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1161 clk_name);
1162 ret = PTR_ERR(clock);
1163 break;
1164 }
1165 fmd->wbclk[i] = clock;
1166 }
1167 if (ret)
1168 fimc_md_put_clocks(fmd);
1169
0e23cbbe 1170 return ret;
d3953223
SN
1171}
1172
1173static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 1174 struct fimc_source_info *si,
e3fc82e8 1175 bool on)
d3953223 1176{
d3953223
SN
1177 struct fimc_camclk_info *camclk;
1178 int ret = 0;
1179
fa91f105
SN
1180 /*
1181 * When device tree is used the sensor drivers are supposed to
1182 * control the clock themselves. This whole function will be
1183 * removed once S5PV210 platform is converted to the device tree.
1184 */
1185 if (fmd->pdev->dev.of_node)
1186 return 0;
1187
4c8f0629 1188 if (WARN_ON(si->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
d3953223
SN
1189 return -EINVAL;
1190
4c8f0629 1191 camclk = &fmd->camclk[si->clk_id];
d3953223 1192
e3fc82e8 1193 dbg("camclk %d, f: %lu, use_count: %d, on: %d",
4c8f0629 1194 si->clk_id, si->clk_frequency, camclk->use_count, on);
d3953223
SN
1195
1196 if (on) {
1197 if (camclk->use_count > 0 &&
4c8f0629 1198 camclk->frequency != si->clk_frequency)
d3953223
SN
1199 return -EINVAL;
1200
1201 if (camclk->use_count++ == 0) {
4c8f0629
SN
1202 clk_set_rate(camclk->clock, si->clk_frequency);
1203 camclk->frequency = si->clk_frequency;
3e20c345
SN
1204 ret = pm_runtime_get_sync(fmd->pmf);
1205 if (ret < 0)
1206 return ret;
044c372a 1207 ret = clk_prepare_enable(camclk->clock);
4c8f0629 1208 dbg("Enabled camclk %d: f: %lu", si->clk_id,
e3fc82e8 1209 clk_get_rate(camclk->clock));
d3953223 1210 }
d3953223
SN
1211 return ret;
1212 }
1213
1214 if (WARN_ON(camclk->use_count == 0))
1215 return 0;
1216
1217 if (--camclk->use_count == 0) {
044c372a 1218 clk_disable_unprepare(camclk->clock);
3e20c345 1219 pm_runtime_put(fmd->pmf);
4c8f0629 1220 dbg("Disabled camclk %d", si->clk_id);
d3953223
SN
1221 }
1222 return ret;
1223}
1224
1225/**
1226 * fimc_md_set_camclk - peripheral sensor clock setup
1227 * @sd: sensor subdev to configure sclk_cam clock for
1228 * @on: 1 to enable or 0 to disable the clock
1229 *
1230 * There are 2 separate clock outputs available in the SoC for external
1231 * image processors. These clocks are shared between all registered FIMC
1232 * devices to which sensors can be attached, either directly or through
1233 * the MIPI CSI receiver. The clock is allowed here to be used by
1234 * multiple sensors concurrently if they use same frequency.
d3953223
SN
1235 * This function should only be called when the graph mutex is held.
1236 */
1237int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
1238{
4c8f0629 1239 struct fimc_source_info *si = v4l2_get_subdev_hostdata(sd);
d3953223
SN
1240 struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
1241
d3f5e0c5
SN
1242 /*
1243 * If there is a clock provider registered the sensors will
1244 * handle their clock themselves, no need to control it on
1245 * the host interface side.
1246 */
1247 if (fmd->clk_provider.num_clocks > 0)
1248 return 0;
1249
4c8f0629 1250 return __fimc_md_set_camclk(fmd, si, on);
d3953223
SN
1251}
1252
d3775fa7 1253static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
d3953223 1254{
403dfbec 1255 struct exynos_video_entity *ve;
d3775fa7 1256 struct fimc_pipeline *p;
403dfbec 1257 struct video_device *vdev;
d3775fa7 1258 int ret;
d3953223 1259
d3775fa7
SN
1260 vdev = media_entity_to_video_device(entity);
1261 if (vdev->entity.use_count == 0)
d3953223
SN
1262 return 0;
1263
403dfbec 1264 ve = vdev_to_exynos_video_entity(vdev);
d3775fa7
SN
1265 p = to_fimc_pipeline(ve->pipe);
1266 /*
1267 * Nothing to do if we are disabling the pipeline, some link
1268 * has been disconnected and p->subdevs array is cleared now.
1269 */
1270 if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1271 return 0;
403dfbec 1272
d3775fa7
SN
1273 if (enable)
1274 ret = __fimc_pipeline_open(ve->pipe, entity, true);
1275 else
1276 ret = __fimc_pipeline_close(ve->pipe);
131b6c61 1277
d3775fa7
SN
1278 if (ret == 0 && !enable)
1279 memset(p->subdevs, 0, sizeof(p->subdevs));
1280
1281 return ret;
1282}
1283
1284/* Locking: called with entity->parent->graph_mutex mutex held. */
1285static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable)
1286{
1287 struct media_entity *entity_err = entity;
1288 struct media_entity_graph graph;
1289 int ret;
1290
1291 /*
1292 * Walk current graph and call the pipeline open/close routine for each
1293 * opened video node that belongs to the graph of entities connected
1294 * through active links. This is needed as we cannot power on/off the
1295 * subdevs in random order.
1296 */
1297 media_entity_graph_walk_start(&graph, entity);
1298
1299 while ((entity = media_entity_graph_walk_next(&graph))) {
1300 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
1301 continue;
1302
1303 ret = __fimc_md_modify_pipeline(entity, enable);
1304
1305 if (ret < 0)
1306 goto err;
1307 }
1308
1309 return 0;
1310 err:
1311 media_entity_graph_walk_start(&graph, entity_err);
1312
1313 while ((entity_err = media_entity_graph_walk_next(&graph))) {
1314 if (media_entity_type(entity_err) != MEDIA_ENT_T_DEVNODE)
1315 continue;
1316
1317 __fimc_md_modify_pipeline(entity_err, !enable);
1318
1319 if (entity_err == entity)
1320 break;
1321 }
1322
1323 return ret;
1324}
1325
1326static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1327 unsigned int notification)
1328{
1329 struct media_entity *sink = link->sink->entity;
1330 int ret = 0;
1331
1332 /* Before link disconnection */
1333 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
1334 if (!(flags & MEDIA_LNK_FL_ENABLED))
1335 ret = __fimc_md_modify_pipelines(sink, false);
1336 else
1337 ; /* TODO: Link state change validation */
1338 /* After link activation */
1339 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
1340 (link->flags & MEDIA_LNK_FL_ENABLED)) {
1341 ret = __fimc_md_modify_pipelines(sink, true);
d3953223 1342 }
740ad921 1343
d3775fa7 1344 return ret ? -EPIPE : 0;
d3953223
SN
1345}
1346
1347static ssize_t fimc_md_sysfs_show(struct device *dev,
1348 struct device_attribute *attr, char *buf)
1349{
1350 struct platform_device *pdev = to_platform_device(dev);
1351 struct fimc_md *fmd = platform_get_drvdata(pdev);
1352
1353 if (fmd->user_subdev_api)
1354 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1355
1356 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1357}
1358
1359static ssize_t fimc_md_sysfs_store(struct device *dev,
1360 struct device_attribute *attr,
1361 const char *buf, size_t count)
1362{
1363 struct platform_device *pdev = to_platform_device(dev);
1364 struct fimc_md *fmd = platform_get_drvdata(pdev);
1365 bool subdev_api;
1366 int i;
1367
1368 if (!strcmp(buf, "vid-dev\n"))
1369 subdev_api = false;
1370 else if (!strcmp(buf, "sub-dev\n"))
1371 subdev_api = true;
1372 else
1373 return count;
1374
1375 fmd->user_subdev_api = subdev_api;
1376 for (i = 0; i < FIMC_MAX_DEVS; i++)
1377 if (fmd->fimc[i])
1378 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1379 return count;
1380}
1381/*
1382 * This device attribute is to select video pipeline configuration method.
1383 * There are following valid values:
1384 * vid-dev - for V4L2 video node API only, subdevice will be configured
1385 * by the host driver.
1386 * sub-dev - for media controller API, subdevs must be configured in user
1387 * space before starting streaming.
1388 */
1389static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1390 fimc_md_sysfs_show, fimc_md_sysfs_store);
1391
4163851f
SN
1392static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1393{
1394 struct device *dev = &fmd->pdev->dev;
1395 struct fimc_pinctrl *pctl = &fmd->pinctl;
1396
1397 pctl->pinctrl = devm_pinctrl_get(dev);
1398 if (IS_ERR(pctl->pinctrl))
1399 return PTR_ERR(pctl->pinctrl);
1400
1401 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1402 PINCTRL_STATE_DEFAULT);
1403 if (IS_ERR(pctl->state_default))
1404 return PTR_ERR(pctl->state_default);
1405
1406 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1407 PINCTRL_STATE_IDLE);
1408 return 0;
1409}
1410
d3f5e0c5
SN
1411#ifdef CONFIG_OF
1412static int cam_clk_prepare(struct clk_hw *hw)
1413{
1414 struct cam_clk *camclk = to_cam_clk(hw);
1415 int ret;
1416
1417 if (camclk->fmd->pmf == NULL)
1418 return -ENODEV;
1419
1420 ret = pm_runtime_get_sync(camclk->fmd->pmf);
1421 return ret < 0 ? ret : 0;
1422}
1423
1424static void cam_clk_unprepare(struct clk_hw *hw)
1425{
1426 struct cam_clk *camclk = to_cam_clk(hw);
1427
1428 if (camclk->fmd->pmf == NULL)
1429 return;
1430
1431 pm_runtime_put_sync(camclk->fmd->pmf);
1432}
1433
1434static const struct clk_ops cam_clk_ops = {
1435 .prepare = cam_clk_prepare,
1436 .unprepare = cam_clk_unprepare,
1437};
1438
1439static void fimc_md_unregister_clk_provider(struct fimc_md *fmd)
1440{
1441 struct cam_clk_provider *cp = &fmd->clk_provider;
1442 unsigned int i;
1443
1444 if (cp->of_node)
1445 of_clk_del_provider(cp->of_node);
1446
1447 for (i = 0; i < cp->num_clocks; i++)
1448 clk_unregister(cp->clks[i]);
1449}
1450
1451static int fimc_md_register_clk_provider(struct fimc_md *fmd)
1452{
1453 struct cam_clk_provider *cp = &fmd->clk_provider;
1454 struct device *dev = &fmd->pdev->dev;
1455 int i, ret;
1456
1457 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1458 struct cam_clk *camclk = &cp->camclk[i];
1459 struct clk_init_data init;
1460 const char *p_name;
1461
1462 ret = of_property_read_string_index(dev->of_node,
1463 "clock-output-names", i, &init.name);
1464 if (ret < 0)
1465 break;
1466
1467 p_name = __clk_get_name(fmd->camclk[i].clock);
1468
1469 /* It's safe since clk_register() will duplicate the string. */
1470 init.parent_names = &p_name;
1471 init.num_parents = 1;
1472 init.ops = &cam_clk_ops;
1473 init.flags = CLK_SET_RATE_PARENT;
1474 camclk->hw.init = &init;
1475 camclk->fmd = fmd;
1476
1477 cp->clks[i] = clk_register(NULL, &camclk->hw);
1478 if (IS_ERR(cp->clks[i])) {
1479 dev_err(dev, "failed to register clock: %s (%ld)\n",
1480 init.name, PTR_ERR(cp->clks[i]));
1481 ret = PTR_ERR(cp->clks[i]);
1482 goto err;
1483 }
1484 cp->num_clocks++;
1485 }
1486
1487 if (cp->num_clocks == 0) {
1488 dev_warn(dev, "clk provider not registered\n");
1489 return 0;
1490 }
1491
1492 cp->clk_data.clks = cp->clks;
1493 cp->clk_data.clk_num = cp->num_clocks;
1494 cp->of_node = dev->of_node;
1495 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1496 &cp->clk_data);
1497 if (ret == 0)
1498 return 0;
1499err:
1500 fimc_md_unregister_clk_provider(fmd);
1501 return ret;
1502}
1503#else
1504#define fimc_md_register_clk_provider(fmd) (0)
1505#define fimc_md_unregister_clk_provider(fmd) (0)
1506#endif
1507
fa91f105
SN
1508static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
1509 struct v4l2_subdev *subdev,
1510 struct v4l2_async_subdev *asd)
1511{
1512 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1513 struct fimc_sensor_info *si = NULL;
1514 int i;
1515
1516 /* Find platform data for this sensor subdev */
1517 for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
1518 if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node)
1519 si = &fmd->sensor[i];
1520
1521 if (si == NULL)
1522 return -EINVAL;
1523
1524 v4l2_set_subdev_hostdata(subdev, &si->pdata);
1525
1526 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
1527 subdev->grp_id = GRP_ID_FIMC_IS_SENSOR;
1528 else
1529 subdev->grp_id = GRP_ID_SENSOR;
1530
1531 si->subdev = subdev;
1532
1533 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
1534 subdev->name, fmd->num_sensors);
1535
1536 fmd->num_sensors++;
1537
1538 return 0;
1539}
1540
1541static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
1542{
1543 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1544 int ret;
1545
1546 mutex_lock(&fmd->media_dev.graph_mutex);
1547
1548 ret = fimc_md_create_links(fmd);
1549 if (ret < 0)
1550 goto unlock;
1551
1552 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1553unlock:
1554 mutex_unlock(&fmd->media_dev.graph_mutex);
1555 return ret;
1556}
1557
ecd9acbf 1558static int fimc_md_probe(struct platform_device *pdev)
d3953223 1559{
e2985a26 1560 struct device *dev = &pdev->dev;
d3953223
SN
1561 struct v4l2_device *v4l2_dev;
1562 struct fimc_md *fmd;
1563 int ret;
1564
e2985a26 1565 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1566 if (!fmd)
1567 return -ENOMEM;
1568
1569 spin_lock_init(&fmd->slock);
1570 fmd->pdev = pdev;
403dfbec 1571 INIT_LIST_HEAD(&fmd->pipelines);
d3953223
SN
1572
1573 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1574 sizeof(fmd->media_dev.model));
1575 fmd->media_dev.link_notify = fimc_md_link_notify;
e2985a26 1576 fmd->media_dev.dev = dev;
d3953223
SN
1577
1578 v4l2_dev = &fmd->v4l2_dev;
1579 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1580 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1581 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1582
e781bbe3
SN
1583 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
1584
e2985a26 1585 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1586 if (ret < 0) {
1587 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1588 return ret;
d3953223 1589 }
d3f5e0c5 1590
d3953223
SN
1591 ret = media_device_register(&fmd->media_dev);
1592 if (ret < 0) {
1593 v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
fa91f105 1594 goto err_v4l2_dev;
d3953223 1595 }
d3f5e0c5 1596
d3953223
SN
1597 ret = fimc_md_get_clocks(fmd);
1598 if (ret)
fa91f105 1599 goto err_md;
d3953223 1600
e2985a26 1601 fmd->user_subdev_api = (dev->of_node != NULL);
693f5c40 1602
4163851f
SN
1603 ret = fimc_md_get_pinctrl(fmd);
1604 if (ret < 0) {
1605 if (ret != EPROBE_DEFER)
1606 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
fa91f105 1607 goto err_clk;
4163851f
SN
1608 }
1609
fa91f105
SN
1610 platform_set_drvdata(pdev, fmd);
1611
1612 /* Protect the media graph while we're registering entities */
1613 mutex_lock(&fmd->media_dev.graph_mutex);
1614
e2985a26
SN
1615 if (dev->of_node)
1616 ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
1617 else
1618 ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
1619 fimc_md_pdev_match);
fa91f105
SN
1620 if (ret) {
1621 mutex_unlock(&fmd->media_dev.graph_mutex);
1622 goto err_clk;
1623 }
d3953223 1624
2b13f7d4 1625 if (dev->platform_data || dev->of_node) {
5cbf6f16 1626 ret = fimc_md_register_sensor_entities(fmd);
fa91f105
SN
1627 if (ret) {
1628 mutex_unlock(&fmd->media_dev.graph_mutex);
1629 goto err_m_ent;
1630 }
5cbf6f16 1631 }
e2985a26 1632
fa91f105 1633 mutex_unlock(&fmd->media_dev.graph_mutex);
d3953223
SN
1634
1635 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1636 if (ret)
fa91f105
SN
1637 goto err_m_ent;
1638 /*
1639 * FIMC platform devices need to be registered before the sclk_cam
1640 * clocks provider, as one of these devices needs to be activated
1641 * to enable the clock.
1642 */
1643 ret = fimc_md_register_clk_provider(fmd);
1644 if (ret < 0) {
1645 v4l2_err(v4l2_dev, "clock provider registration failed\n");
1646 goto err_attr;
1647 }
1648
1649 if (fmd->num_sensors > 0) {
1650 fmd->subdev_notifier.subdevs = fmd->async_subdevs;
1651 fmd->subdev_notifier.num_subdevs = fmd->num_sensors;
1652 fmd->subdev_notifier.bound = subdev_notifier_bound;
1653 fmd->subdev_notifier.complete = subdev_notifier_complete;
1654 fmd->num_sensors = 0;
1655
1656 ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
1657 &fmd->subdev_notifier);
1658 if (ret)
1659 goto err_clk_p;
1660 }
693f5c40 1661
693f5c40
SN
1662 return 0;
1663
fa91f105
SN
1664err_clk_p:
1665 fimc_md_unregister_clk_provider(fmd);
1666err_attr:
1667 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1668err_clk:
d3953223 1669 fimc_md_put_clocks(fmd);
fa91f105 1670err_m_ent:
d3953223 1671 fimc_md_unregister_entities(fmd);
693f5c40 1672err_md:
fa91f105
SN
1673 media_device_unregister(&fmd->media_dev);
1674err_v4l2_dev:
d3953223 1675 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1676 return ret;
1677}
1678
4c62e976 1679static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1680{
1681 struct fimc_md *fmd = platform_get_drvdata(pdev);
1682
1683 if (!fmd)
1684 return 0;
b74bee15 1685
d3f5e0c5 1686 fimc_md_unregister_clk_provider(fmd);
fa91f105
SN
1687 v4l2_async_notifier_unregister(&fmd->subdev_notifier);
1688
b74bee15 1689 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1690 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1691 fimc_md_unregister_entities(fmd);
403dfbec 1692 fimc_md_pipelines_free(fmd);
d3953223
SN
1693 media_device_unregister(&fmd->media_dev);
1694 fimc_md_put_clocks(fmd);
fa91f105 1695
d3953223
SN
1696 return 0;
1697}
1698
e2985a26
SN
1699static struct platform_device_id fimc_driver_ids[] __always_unused = {
1700 { .name = "s5p-fimc-md" },
1701 { },
1702};
1703MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1704
1705static const struct of_device_id fimc_md_of_match[] = {
1706 { .compatible = "samsung,fimc" },
1707 { },
1708};
1709MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1710
d3953223
SN
1711static struct platform_driver fimc_md_driver = {
1712 .probe = fimc_md_probe,
4c62e976 1713 .remove = fimc_md_remove,
d3953223 1714 .driver = {
e2985a26
SN
1715 .of_match_table = of_match_ptr(fimc_md_of_match),
1716 .name = "s5p-fimc-md",
1717 .owner = THIS_MODULE,
d3953223
SN
1718 }
1719};
1720
7e566be2 1721static int __init fimc_md_init(void)
d3953223
SN
1722{
1723 int ret;
ecd9acbf 1724
d3953223
SN
1725 request_module("s5p-csis");
1726 ret = fimc_register_driver();
1727 if (ret)
1728 return ret;
ecd9acbf 1729
d3953223
SN
1730 return platform_driver_register(&fimc_md_driver);
1731}
7e566be2
SK
1732
1733static void __exit fimc_md_exit(void)
d3953223
SN
1734{
1735 platform_driver_unregister(&fimc_md_driver);
1736 fimc_unregister_driver();
1737}
1738
1739module_init(fimc_md_init);
1740module_exit(fimc_md_exit);
1741
1742MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1743MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1744MODULE_LICENSE("GPL");
1745MODULE_VERSION("2.0.1");
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