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95c5d605 AG |
1 | /* |
2 | * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Freescale VIU video driver | |
5 | * | |
6 | * Authors: Hongjun Chen <hong-jun.chen@freescale.com> | |
7 | * Porting to 2.6.35 by DENX Software Engineering, | |
8 | * Anatolij Gustschin <agust@denx.de> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/io.h> | |
5af50730 RH |
24 | #include <linux/of_address.h> |
25 | #include <linux/of_irq.h> | |
95c5d605 | 26 | #include <linux/of_platform.h> |
e69e34e9 | 27 | #include <linux/slab.h> |
95c5d605 AG |
28 | #include <media/v4l2-common.h> |
29 | #include <media/v4l2-device.h> | |
30 | #include <media/v4l2-ioctl.h> | |
31 | #include <media/videobuf-dma-contig.h> | |
32 | ||
33 | #define DRV_NAME "fsl_viu" | |
64dc3c1a | 34 | #define VIU_VERSION "0.5.1" |
95c5d605 AG |
35 | |
36 | #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */ | |
37 | ||
38 | #define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */ | |
39 | ||
40 | /* I2C address of video decoder chip is 0x4A */ | |
41 | #define VIU_VIDEO_DECODER_ADDR 0x25 | |
42 | ||
43 | /* supported controls */ | |
44 | static struct v4l2_queryctrl viu_qctrl[] = { | |
45 | { | |
46 | .id = V4L2_CID_BRIGHTNESS, | |
47 | .type = V4L2_CTRL_TYPE_INTEGER, | |
48 | .name = "Brightness", | |
49 | .minimum = 0, | |
50 | .maximum = 255, | |
51 | .step = 1, | |
52 | .default_value = 127, | |
53 | .flags = 0, | |
54 | }, { | |
55 | .id = V4L2_CID_CONTRAST, | |
56 | .type = V4L2_CTRL_TYPE_INTEGER, | |
57 | .name = "Contrast", | |
58 | .minimum = 0, | |
59 | .maximum = 255, | |
60 | .step = 0x1, | |
61 | .default_value = 0x10, | |
62 | .flags = 0, | |
63 | }, { | |
64 | .id = V4L2_CID_SATURATION, | |
65 | .type = V4L2_CTRL_TYPE_INTEGER, | |
66 | .name = "Saturation", | |
67 | .minimum = 0, | |
68 | .maximum = 255, | |
69 | .step = 0x1, | |
70 | .default_value = 127, | |
71 | .flags = 0, | |
72 | }, { | |
73 | .id = V4L2_CID_HUE, | |
74 | .type = V4L2_CTRL_TYPE_INTEGER, | |
75 | .name = "Hue", | |
76 | .minimum = -128, | |
77 | .maximum = 127, | |
78 | .step = 0x1, | |
79 | .default_value = 0, | |
80 | .flags = 0, | |
81 | } | |
82 | }; | |
83 | ||
84 | static int qctl_regs[ARRAY_SIZE(viu_qctrl)]; | |
85 | ||
86 | static int info_level; | |
87 | ||
88 | #define dprintk(level, fmt, arg...) \ | |
89 | do { \ | |
90 | if (level <= info_level) \ | |
91 | printk(KERN_DEBUG "viu: " fmt , ## arg); \ | |
92 | } while (0) | |
93 | ||
94 | /* | |
95 | * Basic structures | |
96 | */ | |
97 | struct viu_fmt { | |
98 | char name[32]; | |
99 | u32 fourcc; /* v4l2 format id */ | |
100 | u32 pixelformat; | |
101 | int depth; | |
102 | }; | |
103 | ||
104 | static struct viu_fmt formats[] = { | |
105 | { | |
106 | .name = "RGB-16 (5/B-6/G-5/R)", | |
107 | .fourcc = V4L2_PIX_FMT_RGB565, | |
108 | .pixelformat = V4L2_PIX_FMT_RGB565, | |
109 | .depth = 16, | |
110 | }, { | |
111 | .name = "RGB-32 (A-R-G-B)", | |
112 | .fourcc = V4L2_PIX_FMT_RGB32, | |
113 | .pixelformat = V4L2_PIX_FMT_RGB32, | |
114 | .depth = 32, | |
115 | } | |
116 | }; | |
117 | ||
118 | struct viu_dev; | |
119 | struct viu_buf; | |
120 | ||
121 | /* buffer for one video frame */ | |
122 | struct viu_buf { | |
123 | /* common v4l buffer stuff -- must be first */ | |
124 | struct videobuf_buffer vb; | |
125 | struct viu_fmt *fmt; | |
126 | }; | |
127 | ||
128 | struct viu_dmaqueue { | |
129 | struct viu_dev *dev; | |
130 | struct list_head active; | |
131 | struct list_head queued; | |
132 | struct timer_list timeout; | |
133 | }; | |
134 | ||
135 | struct viu_status { | |
136 | u32 field_irq; | |
137 | u32 vsync_irq; | |
138 | u32 hsync_irq; | |
139 | u32 vstart_irq; | |
140 | u32 dma_end_irq; | |
141 | u32 error_irq; | |
142 | }; | |
143 | ||
144 | struct viu_reg { | |
145 | u32 status_cfg; | |
146 | u32 luminance; | |
147 | u32 chroma_r; | |
148 | u32 chroma_g; | |
149 | u32 chroma_b; | |
150 | u32 field_base_addr; | |
151 | u32 dma_inc; | |
152 | u32 picture_count; | |
153 | u32 req_alarm; | |
154 | u32 alpha; | |
155 | } __attribute__ ((packed)); | |
156 | ||
157 | struct viu_dev { | |
158 | struct v4l2_device v4l2_dev; | |
159 | struct mutex lock; | |
160 | spinlock_t slock; | |
161 | int users; | |
162 | ||
163 | struct device *dev; | |
164 | /* various device info */ | |
165 | struct video_device *vdev; | |
166 | struct viu_dmaqueue vidq; | |
167 | enum v4l2_field capfield; | |
168 | int field; | |
169 | int first; | |
170 | int dma_done; | |
171 | ||
172 | /* Hardware register area */ | |
173 | struct viu_reg *vr; | |
174 | ||
175 | /* Interrupt vector */ | |
176 | int irq; | |
177 | struct viu_status irqs; | |
178 | ||
179 | /* video overlay */ | |
180 | struct v4l2_framebuffer ovbuf; | |
181 | struct viu_fmt *ovfmt; | |
182 | unsigned int ovenable; | |
183 | enum v4l2_field ovfield; | |
184 | ||
185 | /* crop */ | |
186 | struct v4l2_rect crop_current; | |
187 | ||
188 | /* clock pointer */ | |
189 | struct clk *clk; | |
190 | ||
191 | /* decoder */ | |
192 | struct v4l2_subdev *decoder; | |
50155c25 AG |
193 | |
194 | v4l2_std_id std; | |
95c5d605 AG |
195 | }; |
196 | ||
197 | struct viu_fh { | |
198 | struct viu_dev *dev; | |
199 | ||
200 | /* video capture */ | |
201 | struct videobuf_queue vb_vidq; | |
202 | spinlock_t vbq_lock; /* spinlock for the videobuf queue */ | |
203 | ||
204 | /* video overlay */ | |
205 | struct v4l2_window win; | |
206 | struct v4l2_clip clips[1]; | |
207 | ||
208 | /* video capture */ | |
209 | struct viu_fmt *fmt; | |
210 | int width, height, sizeimage; | |
211 | enum v4l2_buf_type type; | |
212 | }; | |
213 | ||
214 | static struct viu_reg reg_val; | |
215 | ||
216 | /* | |
217 | * Macro definitions of VIU registers | |
218 | */ | |
219 | ||
220 | /* STATUS_CONFIG register */ | |
221 | enum status_config { | |
222 | SOFT_RST = 1 << 0, | |
223 | ||
224 | ERR_MASK = 0x0f << 4, /* Error code mask */ | |
225 | ERR_NO = 0x00, /* No error */ | |
226 | ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */ | |
227 | ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */ | |
228 | ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */ | |
229 | ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */ | |
230 | ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */ | |
231 | ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */ | |
232 | ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */ | |
233 | ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */ | |
234 | ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */ | |
235 | ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */ | |
236 | ||
237 | INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */ | |
238 | INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */ | |
239 | INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */ | |
240 | INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */ | |
241 | INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */ | |
242 | INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */ | |
243 | INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */ | |
244 | ||
245 | INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */ | |
246 | INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */ | |
247 | INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */ | |
248 | INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */ | |
249 | INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */ | |
250 | INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */ | |
251 | ||
252 | DMA_ACT = 0x01 << 27, /* Enable DMA transfer */ | |
253 | FIELD_NO = 0x01 << 28, /* Field number */ | |
254 | DITHER_ON = 0x01 << 29, /* Dithering is on */ | |
255 | ROUND_ON = 0x01 << 30, /* Round is on */ | |
256 | MODE_32BIT = 0x01 << 31, /* Data in RGBa888, | |
257 | * 0 in RGB565 | |
258 | */ | |
259 | }; | |
260 | ||
261 | #define norm_maxw() 720 | |
262 | #define norm_maxh() 576 | |
263 | ||
264 | #define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \ | |
265 | INT_HSYNC_STATUS | INT_VSTART_STATUS | \ | |
266 | INT_DMA_END_STATUS | INT_ERROR_STATUS) | |
267 | ||
268 | #define NUM_FORMATS ARRAY_SIZE(formats) | |
269 | ||
270 | static irqreturn_t viu_intr(int irq, void *dev_id); | |
271 | ||
272 | struct viu_fmt *format_by_fourcc(int fourcc) | |
273 | { | |
274 | int i; | |
275 | ||
276 | for (i = 0; i < NUM_FORMATS; i++) { | |
277 | if (formats[i].pixelformat == fourcc) | |
278 | return formats + i; | |
279 | } | |
280 | ||
281 | dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc); | |
282 | return NULL; | |
283 | } | |
284 | ||
285 | void viu_start_dma(struct viu_dev *dev) | |
286 | { | |
287 | struct viu_reg *vr = dev->vr; | |
288 | ||
289 | dev->field = 0; | |
290 | ||
291 | /* Enable DMA operation */ | |
292 | out_be32(&vr->status_cfg, SOFT_RST); | |
293 | out_be32(&vr->status_cfg, INT_FIELD_EN); | |
294 | } | |
295 | ||
296 | void viu_stop_dma(struct viu_dev *dev) | |
297 | { | |
298 | struct viu_reg *vr = dev->vr; | |
299 | int cnt = 100; | |
300 | u32 status_cfg; | |
301 | ||
302 | out_be32(&vr->status_cfg, 0); | |
303 | ||
304 | /* Clear pending interrupts */ | |
305 | status_cfg = in_be32(&vr->status_cfg); | |
306 | if (status_cfg & 0x3f0000) | |
307 | out_be32(&vr->status_cfg, status_cfg & 0x3f0000); | |
308 | ||
309 | if (status_cfg & DMA_ACT) { | |
310 | do { | |
311 | status_cfg = in_be32(&vr->status_cfg); | |
312 | if (status_cfg & INT_DMA_END_STATUS) | |
313 | break; | |
314 | } while (cnt--); | |
315 | ||
316 | if (cnt < 0) { | |
317 | /* timed out, issue soft reset */ | |
318 | out_be32(&vr->status_cfg, SOFT_RST); | |
319 | out_be32(&vr->status_cfg, 0); | |
320 | } else { | |
321 | /* clear DMA_END and other pending irqs */ | |
322 | out_be32(&vr->status_cfg, status_cfg & 0x3f0000); | |
323 | } | |
324 | } | |
325 | ||
326 | dev->field = 0; | |
327 | } | |
328 | ||
329 | static int restart_video_queue(struct viu_dmaqueue *vidq) | |
330 | { | |
331 | struct viu_buf *buf, *prev; | |
332 | ||
333 | dprintk(1, "%s vidq=0x%08lx\n", __func__, (unsigned long)vidq); | |
334 | if (!list_empty(&vidq->active)) { | |
335 | buf = list_entry(vidq->active.next, struct viu_buf, vb.queue); | |
336 | dprintk(2, "restart_queue [%p/%d]: restart dma\n", | |
337 | buf, buf->vb.i); | |
338 | ||
339 | viu_stop_dma(vidq->dev); | |
340 | ||
341 | /* cancel all outstanding capture requests */ | |
342 | list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) { | |
343 | list_del(&buf->vb.queue); | |
344 | buf->vb.state = VIDEOBUF_ERROR; | |
345 | wake_up(&buf->vb.done); | |
346 | } | |
347 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
348 | return 0; | |
349 | } | |
350 | ||
351 | prev = NULL; | |
352 | for (;;) { | |
353 | if (list_empty(&vidq->queued)) | |
354 | return 0; | |
355 | buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue); | |
356 | if (prev == NULL) { | |
0666c6b8 | 357 | list_move_tail(&buf->vb.queue, &vidq->active); |
95c5d605 AG |
358 | |
359 | dprintk(1, "Restarting video dma\n"); | |
360 | viu_stop_dma(vidq->dev); | |
361 | viu_start_dma(vidq->dev); | |
362 | ||
363 | buf->vb.state = VIDEOBUF_ACTIVE; | |
364 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
365 | dprintk(2, "[%p/%d] restart_queue - first active\n", | |
366 | buf, buf->vb.i); | |
367 | ||
368 | } else if (prev->vb.width == buf->vb.width && | |
369 | prev->vb.height == buf->vb.height && | |
370 | prev->fmt == buf->fmt) { | |
0666c6b8 | 371 | list_move_tail(&buf->vb.queue, &vidq->active); |
95c5d605 AG |
372 | buf->vb.state = VIDEOBUF_ACTIVE; |
373 | dprintk(2, "[%p/%d] restart_queue - move to active\n", | |
374 | buf, buf->vb.i); | |
375 | } else { | |
376 | return 0; | |
377 | } | |
378 | prev = buf; | |
379 | } | |
380 | } | |
381 | ||
382 | static void viu_vid_timeout(unsigned long data) | |
383 | { | |
384 | struct viu_dev *dev = (struct viu_dev *)data; | |
385 | struct viu_buf *buf; | |
386 | struct viu_dmaqueue *vidq = &dev->vidq; | |
387 | ||
388 | while (!list_empty(&vidq->active)) { | |
389 | buf = list_entry(vidq->active.next, struct viu_buf, vb.queue); | |
390 | list_del(&buf->vb.queue); | |
391 | buf->vb.state = VIDEOBUF_ERROR; | |
392 | wake_up(&buf->vb.done); | |
393 | dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i); | |
394 | } | |
395 | ||
396 | restart_video_queue(vidq); | |
397 | } | |
398 | ||
399 | /* | |
400 | * Videobuf operations | |
401 | */ | |
402 | static int buffer_setup(struct videobuf_queue *vq, unsigned int *count, | |
403 | unsigned int *size) | |
404 | { | |
405 | struct viu_fh *fh = vq->priv_data; | |
406 | ||
407 | *size = fh->width * fh->height * fh->fmt->depth >> 3; | |
408 | if (*count == 0) | |
409 | *count = 32; | |
410 | ||
411 | while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024) | |
412 | (*count)--; | |
413 | ||
414 | dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size); | |
415 | return 0; | |
416 | } | |
417 | ||
418 | static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf) | |
419 | { | |
420 | struct videobuf_buffer *vb = &buf->vb; | |
421 | void *vaddr = NULL; | |
422 | ||
423 | BUG_ON(in_interrupt()); | |
424 | ||
0e0809a5 | 425 | videobuf_waiton(vq, &buf->vb, 0, 0); |
95c5d605 AG |
426 | |
427 | if (vq->int_ops && vq->int_ops->vaddr) | |
428 | vaddr = vq->int_ops->vaddr(vb); | |
429 | ||
430 | if (vaddr) | |
431 | videobuf_dma_contig_free(vq, &buf->vb); | |
432 | ||
433 | buf->vb.state = VIDEOBUF_NEEDS_INIT; | |
434 | } | |
435 | ||
436 | inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf) | |
437 | { | |
438 | struct viu_reg *vr = dev->vr; | |
439 | int bpp; | |
440 | ||
441 | /* setup the DMA base address */ | |
442 | reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb); | |
443 | ||
444 | dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n", | |
445 | buf, buf->vb.i, (unsigned long)reg_val.field_base_addr); | |
446 | ||
447 | /* interlace is on by default, set horizontal DMA increment */ | |
448 | reg_val.status_cfg = 0; | |
449 | bpp = buf->fmt->depth >> 3; | |
450 | switch (bpp) { | |
451 | case 2: | |
452 | reg_val.status_cfg &= ~MODE_32BIT; | |
453 | reg_val.dma_inc = buf->vb.width * 2; | |
454 | break; | |
455 | case 4: | |
456 | reg_val.status_cfg |= MODE_32BIT; | |
457 | reg_val.dma_inc = buf->vb.width * 4; | |
458 | break; | |
459 | default: | |
460 | dprintk(0, "doesn't support color depth(%d)\n", | |
461 | bpp * 8); | |
462 | return -EINVAL; | |
463 | } | |
464 | ||
465 | /* setup picture_count register */ | |
466 | reg_val.picture_count = (buf->vb.height / 2) << 16 | | |
467 | buf->vb.width; | |
468 | ||
469 | reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN; | |
470 | ||
471 | buf->vb.state = VIDEOBUF_ACTIVE; | |
472 | dev->capfield = buf->vb.field; | |
473 | ||
474 | /* reset dma increment if needed */ | |
475 | if (!V4L2_FIELD_HAS_BOTH(buf->vb.field)) | |
476 | reg_val.dma_inc = 0; | |
477 | ||
478 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
479 | out_be32(&vr->picture_count, reg_val.picture_count); | |
480 | out_be32(&vr->field_base_addr, reg_val.field_base_addr); | |
481 | mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT); | |
482 | return 0; | |
483 | } | |
484 | ||
485 | static int buffer_prepare(struct videobuf_queue *vq, | |
486 | struct videobuf_buffer *vb, | |
487 | enum v4l2_field field) | |
488 | { | |
489 | struct viu_fh *fh = vq->priv_data; | |
490 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
491 | int rc; | |
492 | ||
493 | BUG_ON(fh->fmt == NULL); | |
494 | ||
495 | if (fh->width < 48 || fh->width > norm_maxw() || | |
496 | fh->height < 32 || fh->height > norm_maxh()) | |
497 | return -EINVAL; | |
498 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
499 | if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size) | |
500 | return -EINVAL; | |
501 | ||
502 | if (buf->fmt != fh->fmt || | |
503 | buf->vb.width != fh->width || | |
504 | buf->vb.height != fh->height || | |
505 | buf->vb.field != field) { | |
506 | buf->fmt = fh->fmt; | |
507 | buf->vb.width = fh->width; | |
508 | buf->vb.height = fh->height; | |
509 | buf->vb.field = field; | |
510 | } | |
511 | ||
512 | if (buf->vb.state == VIDEOBUF_NEEDS_INIT) { | |
513 | rc = videobuf_iolock(vq, &buf->vb, NULL); | |
514 | if (rc != 0) | |
515 | goto fail; | |
516 | ||
517 | buf->vb.width = fh->width; | |
518 | buf->vb.height = fh->height; | |
519 | buf->vb.field = field; | |
520 | buf->fmt = fh->fmt; | |
521 | } | |
522 | ||
523 | buf->vb.state = VIDEOBUF_PREPARED; | |
524 | return 0; | |
525 | ||
526 | fail: | |
527 | free_buffer(vq, buf); | |
528 | return rc; | |
529 | } | |
530 | ||
531 | static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
532 | { | |
533 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
534 | struct viu_fh *fh = vq->priv_data; | |
535 | struct viu_dev *dev = fh->dev; | |
536 | struct viu_dmaqueue *vidq = &dev->vidq; | |
537 | struct viu_buf *prev; | |
538 | ||
539 | if (!list_empty(&vidq->queued)) { | |
540 | dprintk(1, "adding vb queue=0x%08lx\n", | |
541 | (unsigned long)&buf->vb.queue); | |
542 | dprintk(1, "vidq pointer 0x%p, queued 0x%p\n", | |
543 | vidq, &vidq->queued); | |
544 | dprintk(1, "dev %p, queued: self %p, next %p, head %p\n", | |
545 | dev, &vidq->queued, vidq->queued.next, | |
546 | vidq->queued.prev); | |
547 | list_add_tail(&buf->vb.queue, &vidq->queued); | |
548 | buf->vb.state = VIDEOBUF_QUEUED; | |
549 | dprintk(2, "[%p/%d] buffer_queue - append to queued\n", | |
550 | buf, buf->vb.i); | |
551 | } else if (list_empty(&vidq->active)) { | |
552 | dprintk(1, "adding vb active=0x%08lx\n", | |
553 | (unsigned long)&buf->vb.queue); | |
554 | list_add_tail(&buf->vb.queue, &vidq->active); | |
555 | buf->vb.state = VIDEOBUF_ACTIVE; | |
556 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
557 | dprintk(2, "[%p/%d] buffer_queue - first active\n", | |
558 | buf, buf->vb.i); | |
559 | ||
560 | buffer_activate(dev, buf); | |
561 | } else { | |
562 | dprintk(1, "adding vb queue2=0x%08lx\n", | |
563 | (unsigned long)&buf->vb.queue); | |
564 | prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue); | |
565 | if (prev->vb.width == buf->vb.width && | |
566 | prev->vb.height == buf->vb.height && | |
567 | prev->fmt == buf->fmt) { | |
568 | list_add_tail(&buf->vb.queue, &vidq->active); | |
569 | buf->vb.state = VIDEOBUF_ACTIVE; | |
570 | dprintk(2, "[%p/%d] buffer_queue - append to active\n", | |
571 | buf, buf->vb.i); | |
572 | } else { | |
573 | list_add_tail(&buf->vb.queue, &vidq->queued); | |
574 | buf->vb.state = VIDEOBUF_QUEUED; | |
575 | dprintk(2, "[%p/%d] buffer_queue - first queued\n", | |
576 | buf, buf->vb.i); | |
577 | } | |
578 | } | |
579 | } | |
580 | ||
581 | static void buffer_release(struct videobuf_queue *vq, | |
582 | struct videobuf_buffer *vb) | |
583 | { | |
584 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
585 | struct viu_fh *fh = vq->priv_data; | |
586 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
587 | ||
588 | viu_stop_dma(dev); | |
589 | free_buffer(vq, buf); | |
590 | } | |
591 | ||
592 | static struct videobuf_queue_ops viu_video_qops = { | |
593 | .buf_setup = buffer_setup, | |
594 | .buf_prepare = buffer_prepare, | |
595 | .buf_queue = buffer_queue, | |
596 | .buf_release = buffer_release, | |
597 | }; | |
598 | ||
599 | /* | |
600 | * IOCTL vidioc handling | |
601 | */ | |
602 | static int vidioc_querycap(struct file *file, void *priv, | |
603 | struct v4l2_capability *cap) | |
604 | { | |
605 | strcpy(cap->driver, "viu"); | |
606 | strcpy(cap->card, "viu"); | |
a020c747 | 607 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | |
95c5d605 AG |
608 | V4L2_CAP_STREAMING | |
609 | V4L2_CAP_VIDEO_OVERLAY | | |
610 | V4L2_CAP_READWRITE; | |
a020c747 | 611 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; |
95c5d605 AG |
612 | return 0; |
613 | } | |
614 | ||
615 | static int vidioc_enum_fmt(struct file *file, void *priv, | |
616 | struct v4l2_fmtdesc *f) | |
617 | { | |
618 | int index = f->index; | |
619 | ||
620 | if (f->index > NUM_FORMATS) | |
621 | return -EINVAL; | |
622 | ||
623 | strlcpy(f->description, formats[index].name, sizeof(f->description)); | |
624 | f->pixelformat = formats[index].fourcc; | |
625 | return 0; | |
626 | } | |
627 | ||
628 | static int vidioc_g_fmt_cap(struct file *file, void *priv, | |
629 | struct v4l2_format *f) | |
630 | { | |
631 | struct viu_fh *fh = priv; | |
632 | ||
633 | f->fmt.pix.width = fh->width; | |
634 | f->fmt.pix.height = fh->height; | |
635 | f->fmt.pix.field = fh->vb_vidq.field; | |
636 | f->fmt.pix.pixelformat = fh->fmt->pixelformat; | |
637 | f->fmt.pix.bytesperline = | |
638 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
639 | f->fmt.pix.sizeimage = fh->sizeimage; | |
640 | return 0; | |
641 | } | |
642 | ||
643 | static int vidioc_try_fmt_cap(struct file *file, void *priv, | |
644 | struct v4l2_format *f) | |
645 | { | |
646 | struct viu_fmt *fmt; | |
647 | enum v4l2_field field; | |
648 | unsigned int maxw, maxh; | |
649 | ||
650 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
651 | if (!fmt) { | |
652 | dprintk(1, "Fourcc format (0x%08x) invalid.", | |
653 | f->fmt.pix.pixelformat); | |
654 | return -EINVAL; | |
655 | } | |
656 | ||
657 | field = f->fmt.pix.field; | |
658 | ||
659 | if (field == V4L2_FIELD_ANY) { | |
660 | field = V4L2_FIELD_INTERLACED; | |
661 | } else if (field != V4L2_FIELD_INTERLACED) { | |
662 | dprintk(1, "Field type invalid.\n"); | |
663 | return -EINVAL; | |
664 | } | |
665 | ||
666 | maxw = norm_maxw(); | |
667 | maxh = norm_maxh(); | |
668 | ||
669 | f->fmt.pix.field = field; | |
670 | if (f->fmt.pix.height < 32) | |
671 | f->fmt.pix.height = 32; | |
672 | if (f->fmt.pix.height > maxh) | |
673 | f->fmt.pix.height = maxh; | |
674 | if (f->fmt.pix.width < 48) | |
675 | f->fmt.pix.width = 48; | |
676 | if (f->fmt.pix.width > maxw) | |
677 | f->fmt.pix.width = maxw; | |
678 | f->fmt.pix.width &= ~0x03; | |
679 | f->fmt.pix.bytesperline = | |
680 | (f->fmt.pix.width * fmt->depth) >> 3; | |
681 | ||
682 | return 0; | |
683 | } | |
684 | ||
685 | static int vidioc_s_fmt_cap(struct file *file, void *priv, | |
686 | struct v4l2_format *f) | |
687 | { | |
688 | struct viu_fh *fh = priv; | |
689 | int ret; | |
690 | ||
691 | ret = vidioc_try_fmt_cap(file, fh, f); | |
692 | if (ret < 0) | |
693 | return ret; | |
694 | ||
695 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
696 | fh->width = f->fmt.pix.width; | |
697 | fh->height = f->fmt.pix.height; | |
698 | fh->sizeimage = f->fmt.pix.sizeimage; | |
699 | fh->vb_vidq.field = f->fmt.pix.field; | |
700 | fh->type = f->type; | |
701 | dprintk(1, "set to pixelformat '%4.6s'\n", (char *)&fh->fmt->name); | |
702 | return 0; | |
703 | } | |
704 | ||
705 | static int vidioc_g_fmt_overlay(struct file *file, void *priv, | |
706 | struct v4l2_format *f) | |
707 | { | |
708 | struct viu_fh *fh = priv; | |
709 | ||
710 | f->fmt.win = fh->win; | |
711 | return 0; | |
712 | } | |
713 | ||
714 | static int verify_preview(struct viu_dev *dev, struct v4l2_window *win) | |
715 | { | |
716 | enum v4l2_field field; | |
717 | int maxw, maxh; | |
718 | ||
719 | if (dev->ovbuf.base == NULL) | |
720 | return -EINVAL; | |
721 | if (dev->ovfmt == NULL) | |
722 | return -EINVAL; | |
723 | if (win->w.width < 48 || win->w.height < 32) | |
724 | return -EINVAL; | |
725 | ||
726 | field = win->field; | |
727 | maxw = dev->crop_current.width; | |
728 | maxh = dev->crop_current.height; | |
729 | ||
730 | if (field == V4L2_FIELD_ANY) { | |
731 | field = (win->w.height > maxh/2) | |
732 | ? V4L2_FIELD_INTERLACED | |
733 | : V4L2_FIELD_TOP; | |
734 | } | |
735 | switch (field) { | |
736 | case V4L2_FIELD_TOP: | |
737 | case V4L2_FIELD_BOTTOM: | |
738 | maxh = maxh / 2; | |
739 | break; | |
740 | case V4L2_FIELD_INTERLACED: | |
741 | break; | |
742 | default: | |
743 | return -EINVAL; | |
744 | } | |
745 | ||
746 | win->field = field; | |
747 | if (win->w.width > maxw) | |
748 | win->w.width = maxw; | |
749 | if (win->w.height > maxh) | |
750 | win->w.height = maxh; | |
751 | return 0; | |
752 | } | |
753 | ||
754 | inline void viu_activate_overlay(struct viu_reg *viu_reg) | |
755 | { | |
756 | struct viu_reg *vr = viu_reg; | |
757 | ||
758 | out_be32(&vr->field_base_addr, reg_val.field_base_addr); | |
759 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
760 | out_be32(&vr->picture_count, reg_val.picture_count); | |
761 | } | |
762 | ||
791ae699 | 763 | static int viu_setup_preview(struct viu_dev *dev, struct viu_fh *fh) |
95c5d605 AG |
764 | { |
765 | int bpp; | |
766 | ||
767 | dprintk(1, "%s %dx%d %s\n", __func__, | |
768 | fh->win.w.width, fh->win.w.height, dev->ovfmt->name); | |
769 | ||
770 | reg_val.status_cfg = 0; | |
771 | ||
772 | /* setup window */ | |
773 | reg_val.picture_count = (fh->win.w.height / 2) << 16 | | |
774 | fh->win.w.width; | |
775 | ||
776 | /* setup color depth and dma increment */ | |
777 | bpp = dev->ovfmt->depth / 8; | |
778 | switch (bpp) { | |
779 | case 2: | |
780 | reg_val.status_cfg &= ~MODE_32BIT; | |
781 | reg_val.dma_inc = fh->win.w.width * 2; | |
782 | break; | |
783 | case 4: | |
784 | reg_val.status_cfg |= MODE_32BIT; | |
785 | reg_val.dma_inc = fh->win.w.width * 4; | |
786 | break; | |
787 | default: | |
788 | dprintk(0, "device doesn't support color depth(%d)\n", | |
789 | bpp * 8); | |
790 | return -EINVAL; | |
791 | } | |
792 | ||
793 | dev->ovfield = fh->win.field; | |
794 | if (!V4L2_FIELD_HAS_BOTH(dev->ovfield)) | |
795 | reg_val.dma_inc = 0; | |
796 | ||
797 | reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN; | |
798 | ||
799 | /* setup the base address of the overlay buffer */ | |
800 | reg_val.field_base_addr = (u32)dev->ovbuf.base; | |
801 | ||
95c5d605 AG |
802 | return 0; |
803 | } | |
804 | ||
805 | static int vidioc_s_fmt_overlay(struct file *file, void *priv, | |
806 | struct v4l2_format *f) | |
807 | { | |
808 | struct viu_fh *fh = priv; | |
809 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
810 | unsigned long flags; | |
811 | int err; | |
812 | ||
813 | err = verify_preview(dev, &f->fmt.win); | |
814 | if (err) | |
815 | return err; | |
816 | ||
95c5d605 AG |
817 | fh->win = f->fmt.win; |
818 | ||
819 | spin_lock_irqsave(&dev->slock, flags); | |
791ae699 | 820 | viu_setup_preview(dev, fh); |
95c5d605 | 821 | spin_unlock_irqrestore(&dev->slock, flags); |
95c5d605 AG |
822 | return 0; |
823 | } | |
824 | ||
825 | static int vidioc_try_fmt_overlay(struct file *file, void *priv, | |
826 | struct v4l2_format *f) | |
827 | { | |
828 | return 0; | |
829 | } | |
830 | ||
791ae699 AG |
831 | static int vidioc_overlay(struct file *file, void *priv, unsigned int on) |
832 | { | |
833 | struct viu_fh *fh = priv; | |
834 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
835 | unsigned long flags; | |
836 | ||
837 | if (on) { | |
838 | spin_lock_irqsave(&dev->slock, flags); | |
839 | viu_activate_overlay(dev->vr); | |
840 | dev->ovenable = 1; | |
841 | ||
842 | /* start dma */ | |
843 | viu_start_dma(dev); | |
844 | spin_unlock_irqrestore(&dev->slock, flags); | |
845 | } else { | |
846 | viu_stop_dma(dev); | |
847 | dev->ovenable = 0; | |
848 | } | |
849 | ||
850 | return 0; | |
851 | } | |
852 | ||
95c5d605 AG |
853 | int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg) |
854 | { | |
855 | struct viu_fh *fh = priv; | |
856 | struct viu_dev *dev = fh->dev; | |
857 | struct v4l2_framebuffer *fb = arg; | |
858 | ||
859 | *fb = dev->ovbuf; | |
860 | fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING; | |
861 | return 0; | |
862 | } | |
863 | ||
e6eb28c2 | 864 | int vidioc_s_fbuf(struct file *file, void *priv, const struct v4l2_framebuffer *arg) |
95c5d605 AG |
865 | { |
866 | struct viu_fh *fh = priv; | |
867 | struct viu_dev *dev = fh->dev; | |
99b32b24 | 868 | const struct v4l2_framebuffer *fb = arg; |
95c5d605 AG |
869 | struct viu_fmt *fmt; |
870 | ||
871 | if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO)) | |
872 | return -EPERM; | |
873 | ||
874 | /* check args */ | |
875 | fmt = format_by_fourcc(fb->fmt.pixelformat); | |
876 | if (fmt == NULL) | |
877 | return -EINVAL; | |
878 | ||
879 | /* ok, accept it */ | |
880 | dev->ovbuf = *fb; | |
881 | dev->ovfmt = fmt; | |
882 | if (dev->ovbuf.fmt.bytesperline == 0) { | |
883 | dev->ovbuf.fmt.bytesperline = | |
884 | dev->ovbuf.fmt.width * fmt->depth / 8; | |
885 | } | |
886 | return 0; | |
887 | } | |
888 | ||
889 | static int vidioc_reqbufs(struct file *file, void *priv, | |
890 | struct v4l2_requestbuffers *p) | |
891 | { | |
892 | struct viu_fh *fh = priv; | |
893 | ||
894 | return videobuf_reqbufs(&fh->vb_vidq, p); | |
895 | } | |
896 | ||
897 | static int vidioc_querybuf(struct file *file, void *priv, | |
898 | struct v4l2_buffer *p) | |
899 | { | |
900 | struct viu_fh *fh = priv; | |
901 | ||
902 | return videobuf_querybuf(&fh->vb_vidq, p); | |
903 | } | |
904 | ||
905 | static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p) | |
906 | { | |
907 | struct viu_fh *fh = priv; | |
908 | ||
909 | return videobuf_qbuf(&fh->vb_vidq, p); | |
910 | } | |
911 | ||
912 | static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p) | |
913 | { | |
914 | struct viu_fh *fh = priv; | |
915 | ||
916 | return videobuf_dqbuf(&fh->vb_vidq, p, | |
917 | file->f_flags & O_NONBLOCK); | |
918 | } | |
919 | ||
920 | static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) | |
921 | { | |
922 | struct viu_fh *fh = priv; | |
f3b1af19 | 923 | struct viu_dev *dev = fh->dev; |
95c5d605 AG |
924 | |
925 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
926 | return -EINVAL; | |
927 | if (fh->type != i) | |
928 | return -EINVAL; | |
929 | ||
f3b1af19 AG |
930 | if (dev->ovenable) |
931 | dev->ovenable = 0; | |
932 | ||
c3353330 AG |
933 | viu_start_dma(fh->dev); |
934 | ||
95c5d605 AG |
935 | return videobuf_streamon(&fh->vb_vidq); |
936 | } | |
937 | ||
938 | static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | |
939 | { | |
940 | struct viu_fh *fh = priv; | |
941 | ||
942 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
943 | return -EINVAL; | |
944 | if (fh->type != i) | |
945 | return -EINVAL; | |
946 | ||
c3353330 AG |
947 | viu_stop_dma(fh->dev); |
948 | ||
95c5d605 AG |
949 | return videobuf_streamoff(&fh->vb_vidq); |
950 | } | |
951 | ||
952 | #define decoder_call(viu, o, f, args...) \ | |
953 | v4l2_subdev_call(viu->decoder, o, f, ##args) | |
954 | ||
50155c25 AG |
955 | static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std_id) |
956 | { | |
957 | struct viu_fh *fh = priv; | |
958 | ||
959 | decoder_call(fh->dev, video, querystd, std_id); | |
960 | return 0; | |
961 | } | |
962 | ||
314527ac | 963 | static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id) |
95c5d605 AG |
964 | { |
965 | struct viu_fh *fh = priv; | |
966 | ||
314527ac | 967 | fh->dev->std = id; |
8774bed9 | 968 | decoder_call(fh->dev, video, s_std, id); |
95c5d605 AG |
969 | return 0; |
970 | } | |
971 | ||
50155c25 AG |
972 | static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std_id) |
973 | { | |
974 | struct viu_fh *fh = priv; | |
975 | ||
976 | *std_id = fh->dev->std; | |
977 | return 0; | |
978 | } | |
979 | ||
95c5d605 AG |
980 | /* only one input in this driver */ |
981 | static int vidioc_enum_input(struct file *file, void *priv, | |
982 | struct v4l2_input *inp) | |
983 | { | |
984 | struct viu_fh *fh = priv; | |
985 | ||
986 | if (inp->index != 0) | |
987 | return -EINVAL; | |
988 | ||
989 | inp->type = V4L2_INPUT_TYPE_CAMERA; | |
990 | inp->std = fh->dev->vdev->tvnorms; | |
991 | strcpy(inp->name, "Camera"); | |
992 | return 0; | |
993 | } | |
994 | ||
995 | static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) | |
996 | { | |
997 | *i = 0; | |
998 | return 0; | |
999 | } | |
1000 | ||
1001 | static int vidioc_s_input(struct file *file, void *priv, unsigned int i) | |
1002 | { | |
1003 | struct viu_fh *fh = priv; | |
1004 | ||
1005 | if (i > 1) | |
1006 | return -EINVAL; | |
1007 | ||
1008 | decoder_call(fh->dev, video, s_routing, i, 0, 0); | |
1009 | return 0; | |
1010 | } | |
1011 | ||
1012 | /* Controls */ | |
1013 | static int vidioc_queryctrl(struct file *file, void *priv, | |
1014 | struct v4l2_queryctrl *qc) | |
1015 | { | |
1016 | int i; | |
1017 | ||
1018 | for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) { | |
1019 | if (qc->id && qc->id == viu_qctrl[i].id) { | |
1020 | memcpy(qc, &(viu_qctrl[i]), sizeof(*qc)); | |
1021 | return 0; | |
1022 | } | |
1023 | } | |
1024 | return -EINVAL; | |
1025 | } | |
1026 | ||
1027 | static int vidioc_g_ctrl(struct file *file, void *priv, | |
1028 | struct v4l2_control *ctrl) | |
1029 | { | |
1030 | int i; | |
1031 | ||
1032 | for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) { | |
1033 | if (ctrl->id == viu_qctrl[i].id) { | |
1034 | ctrl->value = qctl_regs[i]; | |
1035 | return 0; | |
1036 | } | |
1037 | } | |
1038 | return -EINVAL; | |
1039 | } | |
1040 | static int vidioc_s_ctrl(struct file *file, void *priv, | |
1041 | struct v4l2_control *ctrl) | |
1042 | { | |
1043 | int i; | |
1044 | ||
1045 | for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) { | |
1046 | if (ctrl->id == viu_qctrl[i].id) { | |
1047 | if (ctrl->value < viu_qctrl[i].minimum | |
1048 | || ctrl->value > viu_qctrl[i].maximum) | |
1049 | return -ERANGE; | |
1050 | qctl_regs[i] = ctrl->value; | |
1051 | return 0; | |
1052 | } | |
1053 | } | |
1054 | return -EINVAL; | |
1055 | } | |
1056 | ||
1057 | inline void viu_activate_next_buf(struct viu_dev *dev, | |
1058 | struct viu_dmaqueue *viuq) | |
1059 | { | |
1060 | struct viu_dmaqueue *vidq = viuq; | |
1061 | struct viu_buf *buf; | |
1062 | ||
1063 | /* launch another DMA operation for an active/queued buffer */ | |
1064 | if (!list_empty(&vidq->active)) { | |
1065 | buf = list_entry(vidq->active.next, struct viu_buf, | |
1066 | vb.queue); | |
1067 | dprintk(1, "start another queued buffer: 0x%p\n", buf); | |
1068 | buffer_activate(dev, buf); | |
1069 | } else if (!list_empty(&vidq->queued)) { | |
1070 | buf = list_entry(vidq->queued.next, struct viu_buf, | |
1071 | vb.queue); | |
1072 | list_del(&buf->vb.queue); | |
1073 | ||
1074 | dprintk(1, "start another queued buffer: 0x%p\n", buf); | |
1075 | list_add_tail(&buf->vb.queue, &vidq->active); | |
1076 | buf->vb.state = VIDEOBUF_ACTIVE; | |
1077 | buffer_activate(dev, buf); | |
1078 | } | |
1079 | } | |
1080 | ||
1081 | inline void viu_default_settings(struct viu_reg *viu_reg) | |
1082 | { | |
1083 | struct viu_reg *vr = viu_reg; | |
1084 | ||
1085 | out_be32(&vr->luminance, 0x9512A254); | |
1086 | out_be32(&vr->chroma_r, 0x03310000); | |
1087 | out_be32(&vr->chroma_g, 0x06600F38); | |
1088 | out_be32(&vr->chroma_b, 0x00000409); | |
1089 | out_be32(&vr->alpha, 0x000000ff); | |
1090 | out_be32(&vr->req_alarm, 0x00000090); | |
1091 | dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n", | |
1092 | in_be32(&vr->status_cfg), in_be32(&vr->field_base_addr)); | |
1093 | } | |
1094 | ||
1095 | static void viu_overlay_intr(struct viu_dev *dev, u32 status) | |
1096 | { | |
1097 | struct viu_reg *vr = dev->vr; | |
1098 | ||
1099 | if (status & INT_DMA_END_STATUS) | |
1100 | dev->dma_done = 1; | |
1101 | ||
1102 | if (status & INT_FIELD_STATUS) { | |
1103 | if (dev->dma_done) { | |
1104 | u32 addr = reg_val.field_base_addr; | |
1105 | ||
1106 | dev->dma_done = 0; | |
1107 | if (status & FIELD_NO) | |
1108 | addr += reg_val.dma_inc; | |
1109 | ||
1110 | out_be32(&vr->field_base_addr, addr); | |
1111 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
1112 | out_be32(&vr->status_cfg, | |
1113 | (status & 0xffc0ffff) | | |
1114 | (status & INT_ALL_STATUS) | | |
1115 | reg_val.status_cfg); | |
1116 | } else if (status & INT_VSYNC_STATUS) { | |
1117 | out_be32(&vr->status_cfg, | |
1118 | (status & 0xffc0ffff) | | |
1119 | (status & INT_ALL_STATUS) | | |
1120 | reg_val.status_cfg); | |
1121 | } | |
1122 | } | |
1123 | } | |
1124 | ||
1125 | static void viu_capture_intr(struct viu_dev *dev, u32 status) | |
1126 | { | |
1127 | struct viu_dmaqueue *vidq = &dev->vidq; | |
1128 | struct viu_reg *vr = dev->vr; | |
1129 | struct viu_buf *buf; | |
1130 | int field_num; | |
1131 | int need_two; | |
1132 | int dma_done = 0; | |
1133 | ||
1134 | field_num = status & FIELD_NO; | |
1135 | need_two = V4L2_FIELD_HAS_BOTH(dev->capfield); | |
1136 | ||
1137 | if (status & INT_DMA_END_STATUS) { | |
1138 | dma_done = 1; | |
1139 | if (((field_num == 0) && (dev->field == 0)) || | |
1140 | (field_num && (dev->field == 1))) | |
1141 | dev->field++; | |
1142 | } | |
1143 | ||
1144 | if (status & INT_FIELD_STATUS) { | |
1145 | dprintk(1, "irq: field %d, done %d\n", | |
1146 | !!field_num, dma_done); | |
1147 | if (unlikely(dev->first)) { | |
1148 | if (field_num == 0) { | |
1149 | dev->first = 0; | |
1150 | dprintk(1, "activate first buf\n"); | |
1151 | viu_activate_next_buf(dev, vidq); | |
1152 | } else | |
1153 | dprintk(1, "wait field 0\n"); | |
1154 | return; | |
1155 | } | |
1156 | ||
1157 | /* setup buffer address for next dma operation */ | |
1158 | if (!list_empty(&vidq->active)) { | |
1159 | u32 addr = reg_val.field_base_addr; | |
1160 | ||
1161 | if (field_num && need_two) { | |
1162 | addr += reg_val.dma_inc; | |
1163 | dprintk(1, "field 1, 0x%lx, dev field %d\n", | |
1164 | (unsigned long)addr, dev->field); | |
1165 | } | |
1166 | out_be32(&vr->field_base_addr, addr); | |
1167 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
1168 | out_be32(&vr->status_cfg, | |
1169 | (status & 0xffc0ffff) | | |
1170 | (status & INT_ALL_STATUS) | | |
1171 | reg_val.status_cfg); | |
1172 | return; | |
1173 | } | |
1174 | } | |
1175 | ||
1176 | if (dma_done && field_num && (dev->field == 2)) { | |
1177 | dev->field = 0; | |
1178 | buf = list_entry(vidq->active.next, | |
1179 | struct viu_buf, vb.queue); | |
1180 | dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n", | |
1181 | buf, buf->vb.i, | |
1182 | (unsigned long)videobuf_to_dma_contig(&buf->vb), | |
1183 | (unsigned long)in_be32(&vr->field_base_addr)); | |
1184 | ||
1185 | if (waitqueue_active(&buf->vb.done)) { | |
1186 | list_del(&buf->vb.queue); | |
8e6057b5 | 1187 | v4l2_get_timestamp(&buf->vb.ts); |
95c5d605 AG |
1188 | buf->vb.state = VIDEOBUF_DONE; |
1189 | buf->vb.field_count++; | |
1190 | wake_up(&buf->vb.done); | |
1191 | } | |
1192 | /* activate next dma buffer */ | |
1193 | viu_activate_next_buf(dev, vidq); | |
1194 | } | |
1195 | } | |
1196 | ||
1197 | static irqreturn_t viu_intr(int irq, void *dev_id) | |
1198 | { | |
1199 | struct viu_dev *dev = (struct viu_dev *)dev_id; | |
1200 | struct viu_reg *vr = dev->vr; | |
1201 | u32 status; | |
1202 | u32 error; | |
1203 | ||
1204 | status = in_be32(&vr->status_cfg); | |
1205 | ||
1206 | if (status & INT_ERROR_STATUS) { | |
1207 | dev->irqs.error_irq++; | |
1208 | error = status & ERR_MASK; | |
1209 | if (error) | |
1210 | dprintk(1, "Err: error(%d), times:%d!\n", | |
1211 | error >> 4, dev->irqs.error_irq); | |
1212 | /* Clear interrupt error bit and error flags */ | |
1213 | out_be32(&vr->status_cfg, | |
1214 | (status & 0xffc0ffff) | INT_ERROR_STATUS); | |
1215 | } | |
1216 | ||
1217 | if (status & INT_DMA_END_STATUS) { | |
1218 | dev->irqs.dma_end_irq++; | |
1219 | dev->dma_done = 1; | |
1220 | dprintk(2, "VIU DMA end interrupt times: %d\n", | |
1221 | dev->irqs.dma_end_irq); | |
1222 | } | |
1223 | ||
1224 | if (status & INT_HSYNC_STATUS) | |
1225 | dev->irqs.hsync_irq++; | |
1226 | ||
1227 | if (status & INT_FIELD_STATUS) { | |
1228 | dev->irqs.field_irq++; | |
1229 | dprintk(2, "VIU field interrupt times: %d\n", | |
1230 | dev->irqs.field_irq); | |
1231 | } | |
1232 | ||
1233 | if (status & INT_VSTART_STATUS) | |
1234 | dev->irqs.vstart_irq++; | |
1235 | ||
1236 | if (status & INT_VSYNC_STATUS) { | |
1237 | dev->irqs.vsync_irq++; | |
1238 | dprintk(2, "VIU vsync interrupt times: %d\n", | |
1239 | dev->irqs.vsync_irq); | |
1240 | } | |
1241 | ||
1242 | /* clear all pending irqs */ | |
1243 | status = in_be32(&vr->status_cfg); | |
1244 | out_be32(&vr->status_cfg, | |
1245 | (status & 0xffc0ffff) | (status & INT_ALL_STATUS)); | |
1246 | ||
1247 | if (dev->ovenable) { | |
1248 | viu_overlay_intr(dev, status); | |
1249 | return IRQ_HANDLED; | |
1250 | } | |
1251 | ||
1252 | /* Capture mode */ | |
1253 | viu_capture_intr(dev, status); | |
1254 | return IRQ_HANDLED; | |
1255 | } | |
1256 | ||
1257 | /* | |
1258 | * File operations for the device | |
1259 | */ | |
1260 | static int viu_open(struct file *file) | |
1261 | { | |
1262 | struct video_device *vdev = video_devdata(file); | |
1263 | struct viu_dev *dev = video_get_drvdata(vdev); | |
1264 | struct viu_fh *fh; | |
1265 | struct viu_reg *vr; | |
1266 | int minor = vdev->minor; | |
1267 | u32 status_cfg; | |
1268 | int i; | |
1269 | ||
1270 | dprintk(1, "viu: open (minor=%d)\n", minor); | |
1271 | ||
1272 | dev->users++; | |
1273 | if (dev->users > 1) { | |
1274 | dev->users--; | |
1275 | return -EBUSY; | |
1276 | } | |
1277 | ||
1278 | vr = dev->vr; | |
1279 | ||
1280 | dprintk(1, "open minor=%d type=%s users=%d\n", minor, | |
1281 | v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users); | |
1282 | ||
87cb0278 HV |
1283 | if (mutex_lock_interruptible(&dev->lock)) { |
1284 | dev->users--; | |
1285 | return -ERESTARTSYS; | |
1286 | } | |
1287 | ||
95c5d605 AG |
1288 | /* allocate and initialize per filehandle data */ |
1289 | fh = kzalloc(sizeof(*fh), GFP_KERNEL); | |
1290 | if (!fh) { | |
1291 | dev->users--; | |
87cb0278 | 1292 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1293 | return -ENOMEM; |
1294 | } | |
1295 | ||
1296 | file->private_data = fh; | |
1297 | fh->dev = dev; | |
1298 | ||
1299 | fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1300 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_RGB32); | |
1301 | fh->width = norm_maxw(); | |
1302 | fh->height = norm_maxh(); | |
1303 | dev->crop_current.width = fh->width; | |
1304 | dev->crop_current.height = fh->height; | |
1305 | ||
1306 | /* Put all controls at a sane state */ | |
1307 | for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) | |
1308 | qctl_regs[i] = viu_qctrl[i].default_value; | |
1309 | ||
1310 | dprintk(1, "Open: fh=0x%08lx, dev=0x%08lx, dev->vidq=0x%08lx\n", | |
1311 | (unsigned long)fh, (unsigned long)dev, | |
1312 | (unsigned long)&dev->vidq); | |
1313 | dprintk(1, "Open: list_empty queued=%d\n", | |
1314 | list_empty(&dev->vidq.queued)); | |
1315 | dprintk(1, "Open: list_empty active=%d\n", | |
1316 | list_empty(&dev->vidq.active)); | |
1317 | ||
1318 | viu_default_settings(vr); | |
1319 | ||
1320 | status_cfg = in_be32(&vr->status_cfg); | |
1321 | out_be32(&vr->status_cfg, | |
1322 | status_cfg & ~(INT_VSYNC_EN | INT_HSYNC_EN | | |
1323 | INT_FIELD_EN | INT_VSTART_EN | | |
1324 | INT_DMA_END_EN | INT_ERROR_EN | INT_ECC_EN)); | |
1325 | ||
1326 | status_cfg = in_be32(&vr->status_cfg); | |
1327 | out_be32(&vr->status_cfg, status_cfg | INT_ALL_STATUS); | |
1328 | ||
1329 | spin_lock_init(&fh->vbq_lock); | |
1330 | videobuf_queue_dma_contig_init(&fh->vb_vidq, &viu_video_qops, | |
1331 | dev->dev, &fh->vbq_lock, | |
1332 | fh->type, V4L2_FIELD_INTERLACED, | |
2f970006 AG |
1333 | sizeof(struct viu_buf), fh, |
1334 | &fh->dev->lock); | |
87cb0278 | 1335 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1336 | return 0; |
1337 | } | |
1338 | ||
1339 | static ssize_t viu_read(struct file *file, char __user *data, size_t count, | |
1340 | loff_t *ppos) | |
1341 | { | |
1342 | struct viu_fh *fh = file->private_data; | |
1343 | struct viu_dev *dev = fh->dev; | |
1344 | int ret = 0; | |
1345 | ||
1346 | dprintk(2, "%s\n", __func__); | |
1347 | if (dev->ovenable) | |
1348 | dev->ovenable = 0; | |
1349 | ||
1350 | if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { | |
87cb0278 HV |
1351 | if (mutex_lock_interruptible(&dev->lock)) |
1352 | return -ERESTARTSYS; | |
95c5d605 AG |
1353 | viu_start_dma(dev); |
1354 | ret = videobuf_read_stream(&fh->vb_vidq, data, count, | |
1355 | ppos, 0, file->f_flags & O_NONBLOCK); | |
87cb0278 | 1356 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1357 | return ret; |
1358 | } | |
1359 | return 0; | |
1360 | } | |
1361 | ||
1362 | static unsigned int viu_poll(struct file *file, struct poll_table_struct *wait) | |
1363 | { | |
1364 | struct viu_fh *fh = file->private_data; | |
1365 | struct videobuf_queue *q = &fh->vb_vidq; | |
87cb0278 HV |
1366 | struct viu_dev *dev = fh->dev; |
1367 | unsigned int res; | |
95c5d605 AG |
1368 | |
1369 | if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type) | |
1370 | return POLLERR; | |
1371 | ||
87cb0278 HV |
1372 | mutex_lock(&dev->lock); |
1373 | res = videobuf_poll_stream(file, q, wait); | |
1374 | mutex_unlock(&dev->lock); | |
1375 | return res; | |
95c5d605 AG |
1376 | } |
1377 | ||
1378 | static int viu_release(struct file *file) | |
1379 | { | |
1380 | struct viu_fh *fh = file->private_data; | |
1381 | struct viu_dev *dev = fh->dev; | |
1382 | int minor = video_devdata(file)->minor; | |
1383 | ||
87cb0278 | 1384 | mutex_lock(&dev->lock); |
95c5d605 AG |
1385 | viu_stop_dma(dev); |
1386 | videobuf_stop(&fh->vb_vidq); | |
c3353330 | 1387 | videobuf_mmap_free(&fh->vb_vidq); |
87cb0278 | 1388 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1389 | |
1390 | kfree(fh); | |
1391 | ||
1392 | dev->users--; | |
1393 | dprintk(1, "close (minor=%d, users=%d)\n", | |
1394 | minor, dev->users); | |
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | void viu_reset(struct viu_reg *reg) | |
1399 | { | |
1400 | out_be32(®->status_cfg, 0); | |
1401 | out_be32(®->luminance, 0x9512a254); | |
1402 | out_be32(®->chroma_r, 0x03310000); | |
1403 | out_be32(®->chroma_g, 0x06600f38); | |
1404 | out_be32(®->chroma_b, 0x00000409); | |
1405 | out_be32(®->field_base_addr, 0); | |
1406 | out_be32(®->dma_inc, 0); | |
1407 | out_be32(®->picture_count, 0x01e002d0); | |
1408 | out_be32(®->req_alarm, 0x00000090); | |
1409 | out_be32(®->alpha, 0x000000ff); | |
1410 | } | |
1411 | ||
1412 | static int viu_mmap(struct file *file, struct vm_area_struct *vma) | |
1413 | { | |
1414 | struct viu_fh *fh = file->private_data; | |
87cb0278 | 1415 | struct viu_dev *dev = fh->dev; |
95c5d605 AG |
1416 | int ret; |
1417 | ||
1418 | dprintk(1, "mmap called, vma=0x%08lx\n", (unsigned long)vma); | |
1419 | ||
87cb0278 HV |
1420 | if (mutex_lock_interruptible(&dev->lock)) |
1421 | return -ERESTARTSYS; | |
95c5d605 | 1422 | ret = videobuf_mmap_mapper(&fh->vb_vidq, vma); |
87cb0278 | 1423 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1424 | |
1425 | dprintk(1, "vma start=0x%08lx, size=%ld, ret=%d\n", | |
1426 | (unsigned long)vma->vm_start, | |
1427 | (unsigned long)vma->vm_end-(unsigned long)vma->vm_start, | |
1428 | ret); | |
1429 | ||
1430 | return ret; | |
1431 | } | |
1432 | ||
1433 | static struct v4l2_file_operations viu_fops = { | |
1434 | .owner = THIS_MODULE, | |
1435 | .open = viu_open, | |
1436 | .release = viu_release, | |
1437 | .read = viu_read, | |
1438 | .poll = viu_poll, | |
2f970006 | 1439 | .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ |
95c5d605 AG |
1440 | .mmap = viu_mmap, |
1441 | }; | |
1442 | ||
1443 | static const struct v4l2_ioctl_ops viu_ioctl_ops = { | |
1444 | .vidioc_querycap = vidioc_querycap, | |
1445 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt, | |
1446 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_cap, | |
1447 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_cap, | |
1448 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_cap, | |
1449 | .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt, | |
1450 | .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_overlay, | |
1451 | .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_overlay, | |
1452 | .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_overlay, | |
791ae699 | 1453 | .vidioc_overlay = vidioc_overlay, |
95c5d605 AG |
1454 | .vidioc_g_fbuf = vidioc_g_fbuf, |
1455 | .vidioc_s_fbuf = vidioc_s_fbuf, | |
1456 | .vidioc_reqbufs = vidioc_reqbufs, | |
1457 | .vidioc_querybuf = vidioc_querybuf, | |
1458 | .vidioc_qbuf = vidioc_qbuf, | |
1459 | .vidioc_dqbuf = vidioc_dqbuf, | |
50155c25 | 1460 | .vidioc_g_std = vidioc_g_std, |
95c5d605 | 1461 | .vidioc_s_std = vidioc_s_std, |
50155c25 | 1462 | .vidioc_querystd = vidioc_querystd, |
95c5d605 AG |
1463 | .vidioc_enum_input = vidioc_enum_input, |
1464 | .vidioc_g_input = vidioc_g_input, | |
1465 | .vidioc_s_input = vidioc_s_input, | |
1466 | .vidioc_queryctrl = vidioc_queryctrl, | |
1467 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1468 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1469 | .vidioc_streamon = vidioc_streamon, | |
1470 | .vidioc_streamoff = vidioc_streamoff, | |
1471 | }; | |
1472 | ||
1473 | static struct video_device viu_template = { | |
1474 | .name = "FSL viu", | |
1475 | .fops = &viu_fops, | |
1476 | .minor = -1, | |
1477 | .ioctl_ops = &viu_ioctl_ops, | |
1478 | .release = video_device_release, | |
1479 | ||
1480 | .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL, | |
95c5d605 AG |
1481 | }; |
1482 | ||
4c62e976 | 1483 | static int viu_of_probe(struct platform_device *op) |
95c5d605 AG |
1484 | { |
1485 | struct viu_dev *viu_dev; | |
1486 | struct video_device *vdev; | |
1487 | struct resource r; | |
1488 | struct viu_reg __iomem *viu_regs; | |
1489 | struct i2c_adapter *ad; | |
1490 | int ret, viu_irq; | |
a5d7a6de | 1491 | struct clk *clk; |
95c5d605 AG |
1492 | |
1493 | ret = of_address_to_resource(op->dev.of_node, 0, &r); | |
1494 | if (ret) { | |
1495 | dev_err(&op->dev, "Can't parse device node resource\n"); | |
1496 | return -ENODEV; | |
1497 | } | |
1498 | ||
1499 | viu_irq = irq_of_parse_and_map(op->dev.of_node, 0); | |
1500 | if (viu_irq == NO_IRQ) { | |
1501 | dev_err(&op->dev, "Error while mapping the irq\n"); | |
1502 | return -EINVAL; | |
1503 | } | |
1504 | ||
1505 | /* request mem region */ | |
1506 | if (!devm_request_mem_region(&op->dev, r.start, | |
1507 | sizeof(struct viu_reg), DRV_NAME)) { | |
1508 | dev_err(&op->dev, "Error while requesting mem region\n"); | |
1509 | ret = -EBUSY; | |
1510 | goto err; | |
1511 | } | |
1512 | ||
1513 | /* remap registers */ | |
1514 | viu_regs = devm_ioremap(&op->dev, r.start, sizeof(struct viu_reg)); | |
1515 | if (!viu_regs) { | |
1516 | dev_err(&op->dev, "Can't map register set\n"); | |
1517 | ret = -ENOMEM; | |
1518 | goto err; | |
1519 | } | |
1520 | ||
1521 | /* Prepare our private structure */ | |
1522 | viu_dev = devm_kzalloc(&op->dev, sizeof(struct viu_dev), GFP_ATOMIC); | |
1523 | if (!viu_dev) { | |
1524 | dev_err(&op->dev, "Can't allocate private structure\n"); | |
1525 | ret = -ENOMEM; | |
1526 | goto err; | |
1527 | } | |
1528 | ||
1529 | viu_dev->vr = viu_regs; | |
1530 | viu_dev->irq = viu_irq; | |
1531 | viu_dev->dev = &op->dev; | |
1532 | ||
1533 | /* init video dma queues */ | |
1534 | INIT_LIST_HEAD(&viu_dev->vidq.active); | |
1535 | INIT_LIST_HEAD(&viu_dev->vidq.queued); | |
1536 | ||
95c5d605 AG |
1537 | snprintf(viu_dev->v4l2_dev.name, |
1538 | sizeof(viu_dev->v4l2_dev.name), "%s", "VIU"); | |
1539 | ret = v4l2_device_register(viu_dev->dev, &viu_dev->v4l2_dev); | |
1540 | if (ret < 0) { | |
1541 | dev_err(&op->dev, "v4l2_device_register() failed: %d\n", ret); | |
1542 | goto err; | |
1543 | } | |
1544 | ||
1545 | ad = i2c_get_adapter(0); | |
1546 | viu_dev->decoder = v4l2_i2c_new_subdev(&viu_dev->v4l2_dev, ad, | |
9a1f8b34 | 1547 | "saa7113", VIU_VIDEO_DECODER_ADDR, NULL); |
95c5d605 AG |
1548 | |
1549 | viu_dev->vidq.timeout.function = viu_vid_timeout; | |
1550 | viu_dev->vidq.timeout.data = (unsigned long)viu_dev; | |
1551 | init_timer(&viu_dev->vidq.timeout); | |
28221f88 | 1552 | viu_dev->std = V4L2_STD_NTSC_M; |
95c5d605 AG |
1553 | viu_dev->first = 1; |
1554 | ||
1555 | /* Allocate memory for video device */ | |
1556 | vdev = video_device_alloc(); | |
1557 | if (vdev == NULL) { | |
1558 | ret = -ENOMEM; | |
1559 | goto err_vdev; | |
1560 | } | |
1561 | ||
1562 | memcpy(vdev, &viu_template, sizeof(viu_template)); | |
1563 | ||
1564 | vdev->v4l2_dev = &viu_dev->v4l2_dev; | |
1565 | ||
1566 | viu_dev->vdev = vdev; | |
1567 | ||
2f970006 AG |
1568 | /* initialize locks */ |
1569 | mutex_init(&viu_dev->lock); | |
1570 | viu_dev->vdev->lock = &viu_dev->lock; | |
1571 | spin_lock_init(&viu_dev->slock); | |
1572 | ||
95c5d605 AG |
1573 | video_set_drvdata(viu_dev->vdev, viu_dev); |
1574 | ||
2f970006 AG |
1575 | mutex_lock(&viu_dev->lock); |
1576 | ||
95c5d605 AG |
1577 | ret = video_register_device(viu_dev->vdev, VFL_TYPE_GRABBER, -1); |
1578 | if (ret < 0) { | |
1579 | video_device_release(viu_dev->vdev); | |
1580 | goto err_vdev; | |
1581 | } | |
1582 | ||
1583 | /* enable VIU clock */ | |
17552189 | 1584 | clk = devm_clk_get(&op->dev, "ipg"); |
a5d7a6de GS |
1585 | if (IS_ERR(clk)) { |
1586 | dev_err(&op->dev, "failed to lookup the clock!\n"); | |
1587 | ret = PTR_ERR(clk); | |
1588 | goto err_clk; | |
1589 | } | |
1590 | ret = clk_prepare_enable(clk); | |
1591 | if (ret) { | |
1592 | dev_err(&op->dev, "failed to enable the clock!\n"); | |
95c5d605 | 1593 | goto err_clk; |
95c5d605 | 1594 | } |
a5d7a6de | 1595 | viu_dev->clk = clk; |
95c5d605 AG |
1596 | |
1597 | /* reset VIU module */ | |
1598 | viu_reset(viu_dev->vr); | |
1599 | ||
1600 | /* install interrupt handler */ | |
1601 | if (request_irq(viu_dev->irq, viu_intr, 0, "viu", (void *)viu_dev)) { | |
1602 | dev_err(&op->dev, "Request VIU IRQ failed.\n"); | |
1603 | ret = -ENODEV; | |
1604 | goto err_irq; | |
1605 | } | |
1606 | ||
2f970006 AG |
1607 | mutex_unlock(&viu_dev->lock); |
1608 | ||
95c5d605 AG |
1609 | dev_info(&op->dev, "Freescale VIU Video Capture Board\n"); |
1610 | return ret; | |
1611 | ||
1612 | err_irq: | |
a5d7a6de | 1613 | clk_disable_unprepare(viu_dev->clk); |
95c5d605 AG |
1614 | err_clk: |
1615 | video_unregister_device(viu_dev->vdev); | |
1616 | err_vdev: | |
2f970006 | 1617 | mutex_unlock(&viu_dev->lock); |
95c5d605 AG |
1618 | i2c_put_adapter(ad); |
1619 | v4l2_device_unregister(&viu_dev->v4l2_dev); | |
1620 | err: | |
1621 | irq_dispose_mapping(viu_irq); | |
1622 | return ret; | |
1623 | } | |
1624 | ||
4c62e976 | 1625 | static int viu_of_remove(struct platform_device *op) |
95c5d605 AG |
1626 | { |
1627 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1628 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1629 | struct v4l2_subdev *sdev = list_entry(v4l2_dev->subdevs.next, | |
1630 | struct v4l2_subdev, list); | |
1631 | struct i2c_client *client = v4l2_get_subdevdata(sdev); | |
1632 | ||
1633 | free_irq(dev->irq, (void *)dev); | |
1634 | irq_dispose_mapping(dev->irq); | |
1635 | ||
a5d7a6de | 1636 | clk_disable_unprepare(dev->clk); |
95c5d605 AG |
1637 | |
1638 | video_unregister_device(dev->vdev); | |
1639 | i2c_put_adapter(client->adapter); | |
1640 | v4l2_device_unregister(&dev->v4l2_dev); | |
1641 | return 0; | |
1642 | } | |
1643 | ||
1644 | #ifdef CONFIG_PM | |
2dc11581 | 1645 | static int viu_suspend(struct platform_device *op, pm_message_t state) |
95c5d605 AG |
1646 | { |
1647 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1648 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1649 | ||
1650 | clk_disable(dev->clk); | |
1651 | return 0; | |
1652 | } | |
1653 | ||
2dc11581 | 1654 | static int viu_resume(struct platform_device *op) |
95c5d605 AG |
1655 | { |
1656 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1657 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1658 | ||
1659 | clk_enable(dev->clk); | |
1660 | return 0; | |
1661 | } | |
1662 | #endif | |
1663 | ||
1664 | /* | |
1665 | * Initialization and module stuff | |
1666 | */ | |
1667 | static struct of_device_id mpc512x_viu_of_match[] = { | |
1668 | { | |
1669 | .compatible = "fsl,mpc5121-viu", | |
1670 | }, | |
1671 | {}, | |
1672 | }; | |
1673 | MODULE_DEVICE_TABLE(of, mpc512x_viu_of_match); | |
1674 | ||
1c48a5c9 | 1675 | static struct platform_driver viu_of_platform_driver = { |
95c5d605 | 1676 | .probe = viu_of_probe, |
4c62e976 | 1677 | .remove = viu_of_remove, |
95c5d605 AG |
1678 | #ifdef CONFIG_PM |
1679 | .suspend = viu_suspend, | |
1680 | .resume = viu_resume, | |
1681 | #endif | |
1682 | .driver = { | |
1683 | .name = DRV_NAME, | |
95c5d605 AG |
1684 | .of_match_table = mpc512x_viu_of_match, |
1685 | }, | |
1686 | }; | |
1687 | ||
1d6629b1 | 1688 | module_platform_driver(viu_of_platform_driver); |
95c5d605 AG |
1689 | |
1690 | MODULE_DESCRIPTION("Freescale Video-In(VIU)"); | |
1691 | MODULE_AUTHOR("Hongjun Chen"); | |
1692 | MODULE_LICENSE("GPL"); | |
64dc3c1a | 1693 | MODULE_VERSION(VIU_VERSION); |