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[media] omap3isp: Configure CSI-2 phy based on platform data
[deliverable/linux.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
58#include <linux/delay.h>
59#include <linux/device.h>
60#include <linux/dma-mapping.h>
61#include <linux/i2c.h>
62#include <linux/interrupt.h>
63#include <linux/module.h>
64#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h>
66#include <linux/slab.h>
67#include <linux/sched.h>
68#include <linux/vmalloc.h>
69
70#include <media/v4l2-common.h>
71#include <media/v4l2-device.h>
72
ec2c0825
TL		 73#include <plat/cpu.h>
74
448de7e7
SA		 75#include "isp.h"
76#include "ispreg.h"
77#include "ispccdc.h"
78#include "isppreview.h"
79#include "ispresizer.h"
80#include "ispcsi2.h"
81#include "ispccp2.h"
82#include "isph3a.h"
83#include "isphist.h"
84
85static unsigned int autoidle;
86module_param(autoidle, int, 0444);
87MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
88
89static void isp_save_ctx(struct isp_device *isp);
90
91static void isp_restore_ctx(struct isp_device *isp);
92
93static const struct isp_res_mapping isp_res_maps[] = {
94 {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
c19d19eb
SA		 105 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
106 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
448de7e7
SA		 107 },
108 {
109 .isp_rev = ISP_REVISION_15_0,
110 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
111 1 << OMAP3_ISP_IOMEM_CCP2 |
112 1 << OMAP3_ISP_IOMEM_CCDC |
113 1 << OMAP3_ISP_IOMEM_HIST |
114 1 << OMAP3_ISP_IOMEM_H3A |
115 1 << OMAP3_ISP_IOMEM_PREV |
116 1 << OMAP3_ISP_IOMEM_RESZ |
117 1 << OMAP3_ISP_IOMEM_SBL |
118 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
121 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
122 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
c19d19eb
SA		 123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
124 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
448de7e7
SA		 125 },
126};
127
128/* Structure for saving/restoring ISP module registers */
129static struct isp_reg isp_reg_list[] = {
130 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
131 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
132 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
133 {0, ISP_TOK_TERM, 0}
134};
135
136/*
137 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
138 * @isp: OMAP3 ISP device
139 *
140 * In order to force posting of pending writes, we need to write and
141 * readback the same register, in this case the revision register.
142 *
143 * See this link for reference:
144 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
145 */
146void omap3isp_flush(struct isp_device *isp)
147{
148 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
149 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
150}
151
152/*
153 * isp_enable_interrupts - Enable ISP interrupts.
154 * @isp: OMAP3 ISP device
155 */
156static void isp_enable_interrupts(struct isp_device *isp)
157{
158 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
159 | IRQ0ENABLE_CSIB_IRQ
160 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
161 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
162 | IRQ0ENABLE_CCDC_VD0_IRQ
163 | IRQ0ENABLE_CCDC_VD1_IRQ
164 | IRQ0ENABLE_HS_VS_IRQ
165 | IRQ0ENABLE_HIST_DONE_IRQ
166 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
167 | IRQ0ENABLE_H3A_AF_DONE_IRQ
168 | IRQ0ENABLE_PRV_DONE_IRQ
169 | IRQ0ENABLE_RSZ_DONE_IRQ;
170
171 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
172 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
173}
174
175/*
176 * isp_disable_interrupts - Disable ISP interrupts.
177 * @isp: OMAP3 ISP device
178 */
179static void isp_disable_interrupts(struct isp_device *isp)
180{
181 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
182}
183
184/**
185 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
186 * @isp: OMAP3 ISP device
187 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
188 * @xclksel: XCLK to configure (0 = A, 1 = B).
189 *
190 * Configures the specified MCLK divisor in the ISP timing control register
191 * (TCTRL_CTRL) to generate the desired xclk clock value.
192 *
193 * Divisor = cam_mclk_hz / xclk
194 *
195 * Returns the final frequency that is actually being generated
196 **/
197static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
198{
199 u32 divisor;
200 u32 currentxclk;
201 unsigned long mclk_hz;
202
203 if (!omap3isp_get(isp))
204 return 0;
205
206 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
207
208 if (xclk >= mclk_hz) {
209 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
210 currentxclk = mclk_hz;
211 } else if (xclk >= 2) {
212 divisor = mclk_hz / xclk;
213 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
214 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
215 currentxclk = mclk_hz / divisor;
216 } else {
217 divisor = xclk;
218 currentxclk = 0;
219 }
220
221 switch (xclksel) {
7c2c8f42 222 case ISP_XCLK_A:
448de7e7
SA		 223 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
224 ISPTCTRL_CTRL_DIVA_MASK,
225 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
226 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
227 currentxclk);
228 break;
7c2c8f42 229 case ISP_XCLK_B:
448de7e7
SA		 230 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
231 ISPTCTRL_CTRL_DIVB_MASK,
232 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
233 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
234 currentxclk);
235 break;
7c2c8f42 236 case ISP_XCLK_NONE:
448de7e7
SA		 237 default:
238 omap3isp_put(isp);
239 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
240 "xclk. Must be 0 (A) or 1 (B).\n");
241 return -EINVAL;
242 }
243
244 /* Do we go from stable whatever to clock? */
7c2c8f42 245 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
448de7e7
SA		 246 omap3isp_get(isp);
247 /* Stopping the clock. */
7c2c8f42 248 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
448de7e7
SA		 249 omap3isp_put(isp);
250
7c2c8f42 251 isp->xclk_divisor[xclksel - 1] = divisor;
448de7e7
SA		 252
253 omap3isp_put(isp);
254
255 return currentxclk;
256}
257
258/*
96d62ae2 259 * isp_core_init - ISP core settings
448de7e7
SA		 260 * @isp: OMAP3 ISP device
261 * @idle: Consider idle state.
262 *
96d62ae2
LP		 263 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
264 * interrupt source.
265 *
266 * We need to configure the HS/VS interrupt source before interrupts get
267 * enabled, as the sensor might be free-running and the ISP default setting
268 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 269 */
96d62ae2 270static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 271{
272 isp_reg_writel(isp,
273 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
274 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
275 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
276 ((isp->revision == ISP_REVISION_15_0) ?
277 ISP_SYSCONFIG_AUTOIDLE : 0),
278 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
279
96d62ae2
LP		 280 isp_reg_writel(isp,
281 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
282 ISPCTRL_SYNC_DETECT_VSRISE,
283 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 284}
285
286/*
287 * Configure the bridge and lane shifter. Valid inputs are
288 *
289 * CCDC_INPUT_PARALLEL: Parallel interface
290 * CCDC_INPUT_CSI2A: CSI2a receiver
291 * CCDC_INPUT_CCP2B: CCP2b receiver
292 * CCDC_INPUT_CSI2C: CSI2c receiver
293 *
294 * The bridge and lane shifter are configured according to the selected input
295 * and the ISP platform data.
296 */
297void omap3isp_configure_bridge(struct isp_device *isp,
298 enum ccdc_input_entity input,
c09af044 299 const struct isp_parallel_platform_data *pdata,
c51364ca 300 unsigned int shift, unsigned int bridge)
448de7e7
SA		 301{
302 u32 ispctrl_val;
303
304 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
305 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
306 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
307 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
308 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 309 ispctrl_val |= bridge;
448de7e7
SA		 310
311 switch (input) {
312 case CCDC_INPUT_PARALLEL:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7 314 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
c09af044 315 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 316 break;
317
318 case CCDC_INPUT_CSI2A:
319 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
320 break;
321
322 case CCDC_INPUT_CCP2B:
323 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
324 break;
325
326 case CCDC_INPUT_CSI2C:
327 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
328 break;
329
330 default:
331 return;
332 }
333
c09af044
MJ		 334 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
335
448de7e7
SA		 336 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
337}
338
448de7e7
SA		 339void omap3isp_hist_dma_done(struct isp_device *isp)
340{
341 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
342 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
343 /* Histogram cannot be enabled in this frame anymore */
344 atomic_set(&isp->isp_hist.buf_err, 1);
345 dev_dbg(isp->dev, "hist: Out of synchronization with "
346 "CCDC. Ignoring next buffer.\n");
347 }
348}
349
350static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
351{
352 static const char *name[] = {
353 "CSIA_IRQ",
354 "res1",
355 "res2",
356 "CSIB_LCM_IRQ",
357 "CSIB_IRQ",
358 "res5",
359 "res6",
360 "res7",
361 "CCDC_VD0_IRQ",
362 "CCDC_VD1_IRQ",
363 "CCDC_VD2_IRQ",
364 "CCDC_ERR_IRQ",
365 "H3A_AF_DONE_IRQ",
366 "H3A_AWB_DONE_IRQ",
367 "res14",
368 "res15",
369 "HIST_DONE_IRQ",
370 "CCDC_LSC_DONE",
371 "CCDC_LSC_PREFETCH_COMPLETED",
372 "CCDC_LSC_PREFETCH_ERROR",
373 "PRV_DONE_IRQ",
374 "CBUFF_IRQ",
375 "res22",
376 "res23",
377 "RSZ_DONE_IRQ",
378 "OVF_IRQ",
379 "res26",
380 "res27",
381 "MMU_ERR_IRQ",
382 "OCP_ERR_IRQ",
383 "SEC_ERR_IRQ",
384 "HS_VS_IRQ",
385 };
386 int i;
387
6c20c635 388 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 389
390 for (i = 0; i < ARRAY_SIZE(name); i++) {
391 if ((1 << i) & irqstatus)
392 printk(KERN_CONT "%s ", name[i]);
393 }
394 printk(KERN_CONT "\n");
395}
396
397static void isp_isr_sbl(struct isp_device *isp)
398{
399 struct device *dev = isp->dev;
875e2e3e 400 struct isp_pipeline *pipe;
448de7e7
SA		 401 u32 sbl_pcr;
402
403 /*
404 * Handle shared buffer logic overflows for video buffers.
405 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
406 */
407 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
408 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
409 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
410
411 if (sbl_pcr)
412 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
413
875e2e3e
LP		 414 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
415 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
416 if (pipe != NULL)
417 pipe->error = true;
418 }
419
420 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
422 if (pipe != NULL)
423 pipe->error = true;
424 }
425
426 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
428 if (pipe != NULL)
429 pipe->error = true;
448de7e7
SA		 430 }
431
432 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 433 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
434 if (pipe != NULL)
435 pipe->error = true;
448de7e7
SA		 436 }
437
438 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
439 | ISPSBL_PCR_RSZ2_WBL_OVF
440 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 441 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
442 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
443 if (pipe != NULL)
444 pipe->error = true;
445 }
448de7e7
SA		 446
447 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
448 omap3isp_stat_sbl_overflow(&isp->isp_af);
449
450 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
451 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
452}
453
454/*
455 * isp_isr - Interrupt Service Routine for Camera ISP module.
456 * @irq: Not used currently.
457 * @_isp: Pointer to the OMAP3 ISP device
458 *
459 * Handles the corresponding callback if plugged in.
460 *
461 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
462 * IRQ wasn't handled.
463 */
464static irqreturn_t isp_isr(int irq, void *_isp)
465{
466 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
467 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
468 IRQ0STATUS_CCDC_VD0_IRQ |
469 IRQ0STATUS_CCDC_VD1_IRQ |
470 IRQ0STATUS_HS_VS_IRQ;
471 struct isp_device *isp = _isp;
472 u32 irqstatus;
448de7e7
SA		 473
474 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
475 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
476
477 isp_isr_sbl(isp);
478
875e2e3e
LP		 479 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
480 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 481
875e2e3e
LP		 482 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
483 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 484
485 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
486 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
487 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
488 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
489 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
490 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
491 omap3isp_stat_isr_frame_sync(&isp->isp_af);
492 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
493 }
494
495 if (irqstatus & ccdc_events)
496 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
497
498 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
499 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
500 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
501 omap3isp_preview_isr(&isp->isp_prev);
502 }
503
504 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
505 omap3isp_resizer_isr(&isp->isp_res);
506
507 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
508 omap3isp_stat_isr(&isp->isp_aewb);
509
510 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
511 omap3isp_stat_isr(&isp->isp_af);
512
513 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_hist);
515
516 omap3isp_flush(isp);
517
518#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
519 isp_isr_dbg(isp, irqstatus);
520#endif
521
522 return IRQ_HANDLED;
523}
524
525/* -----------------------------------------------------------------------------
526 * Pipeline power management
527 *
528 * Entities must be powered up when part of a pipeline that contains at least
529 * one open video device node.
530 *
531 * To achieve this use the entity use_count field to track the number of users.
532 * For entities corresponding to video device nodes the use_count field stores
533 * the users count of the node. For entities corresponding to subdevs the
534 * use_count field stores the total number of users of all video device nodes
535 * in the pipeline.
536 *
537 * The omap3isp_pipeline_pm_use() function must be called in the open() and
538 * close() handlers of video device nodes. It increments or decrements the use
539 * count of all subdev entities in the pipeline.
540 *
541 * To react to link management on powered pipelines, the link setup notification
542 * callback updates the use count of all entities in the source and sink sides
543 * of the link.
544 */
545
546/*
547 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
548 * @entity: The entity
549 *
550 * Return the total number of users of all video device nodes in the pipeline.
551 */
552static int isp_pipeline_pm_use_count(struct media_entity *entity)
553{
554 struct media_entity_graph graph;
555 int use = 0;
556
557 media_entity_graph_walk_start(&graph, entity);
558
559 while ((entity = media_entity_graph_walk_next(&graph))) {
560 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
561 use += entity->use_count;
562 }
563
564 return use;
565}
566
567/*
568 * isp_pipeline_pm_power_one - Apply power change to an entity
569 * @entity: The entity
570 * @change: Use count change
571 *
572 * Change the entity use count by @change. If the entity is a subdev update its
573 * power state by calling the core::s_power operation when the use count goes
574 * from 0 to != 0 or from != 0 to 0.
575 *
576 * Return 0 on success or a negative error code on failure.
577 */
578static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
579{
580 struct v4l2_subdev *subdev;
581 int ret;
582
583 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
584 ? media_entity_to_v4l2_subdev(entity) : NULL;
585
586 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
587 ret = v4l2_subdev_call(subdev, core, s_power, 1);
588 if (ret < 0 && ret != -ENOIOCTLCMD)
589 return ret;
590 }
591
592 entity->use_count += change;
593 WARN_ON(entity->use_count < 0);
594
595 if (entity->use_count == 0 && change < 0 && subdev != NULL)
596 v4l2_subdev_call(subdev, core, s_power, 0);
597
598 return 0;
599}
600
601/*
602 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
603 * @entity: The entity
604 * @change: Use count change
605 *
606 * Walk the pipeline to update the use count and the power state of all non-node
607 * entities.
608 *
609 * Return 0 on success or a negative error code on failure.
610 */
611static int isp_pipeline_pm_power(struct media_entity *entity, int change)
612{
613 struct media_entity_graph graph;
614 struct media_entity *first = entity;
615 int ret = 0;
616
617 if (!change)
618 return 0;
619
620 media_entity_graph_walk_start(&graph, entity);
621
622 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
623 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
624 ret = isp_pipeline_pm_power_one(entity, change);
625
626 if (!ret)
627 return 0;
628
629 media_entity_graph_walk_start(&graph, first);
630
631 while ((first = media_entity_graph_walk_next(&graph))
632 && first != entity)
633 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
634 isp_pipeline_pm_power_one(first, -change);
635
636 return ret;
637}
638
639/*
640 * omap3isp_pipeline_pm_use - Update the use count of an entity
641 * @entity: The entity
642 * @use: Use (1) or stop using (0) the entity
643 *
644 * Update the use count of all entities in the pipeline and power entities on or
645 * off accordingly.
646 *
647 * Return 0 on success or a negative error code on failure. Powering entities
648 * off is assumed to never fail. No failure can occur when the use parameter is
649 * set to 0.
650 */
651int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
652{
653 int change = use ? 1 : -1;
654 int ret;
655
656 mutex_lock(&entity->parent->graph_mutex);
657
658 /* Apply use count to node. */
659 entity->use_count += change;
660 WARN_ON(entity->use_count < 0);
661
662 /* Apply power change to connected non-nodes. */
663 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 664 if (ret < 0)
665 entity->use_count -= change;
448de7e7
SA		 666
667 mutex_unlock(&entity->parent->graph_mutex);
668
669 return ret;
670}
671
672/*
673 * isp_pipeline_link_notify - Link management notification callback
674 * @source: Pad at the start of the link
675 * @sink: Pad at the end of the link
676 * @flags: New link flags that will be applied
677 *
678 * React to link management on powered pipelines by updating the use count of
679 * all entities in the source and sink sides of the link. Entities are powered
680 * on or off accordingly.
681 *
682 * Return 0 on success or a negative error code on failure. Powering entities
683 * off is assumed to never fail. This function will not fail for disconnection
684 * events.
685 */
686static int isp_pipeline_link_notify(struct media_pad *source,
687 struct media_pad *sink, u32 flags)
688{
689 int source_use = isp_pipeline_pm_use_count(source->entity);
690 int sink_use = isp_pipeline_pm_use_count(sink->entity);
691 int ret;
692
693 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
694 /* Powering off entities is assumed to never fail. */
695 isp_pipeline_pm_power(source->entity, -sink_use);
696 isp_pipeline_pm_power(sink->entity, -source_use);
697 return 0;
698 }
699
700 ret = isp_pipeline_pm_power(source->entity, sink_use);
701 if (ret < 0)
702 return ret;
703
704 ret = isp_pipeline_pm_power(sink->entity, source_use);
705 if (ret < 0)
706 isp_pipeline_pm_power(source->entity, -sink_use);
707
708 return ret;
709}
710
711/* -----------------------------------------------------------------------------
712 * Pipeline stream management
713 */
714
715/*
716 * isp_pipeline_enable - Enable streaming on a pipeline
717 * @pipe: ISP pipeline
718 * @mode: Stream mode (single shot or continuous)
719 *
720 * Walk the entities chain starting at the pipeline output video node and start
721 * all modules in the chain in the given mode.
722 *
25985edc 723 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 724 * operation otherwise.
725 */
726static int isp_pipeline_enable(struct isp_pipeline *pipe,
727 enum isp_pipeline_stream_state mode)
728{
729 struct isp_device *isp = pipe->output->isp;
730 struct media_entity *entity;
731 struct media_pad *pad;
732 struct v4l2_subdev *subdev;
733 unsigned long flags;
c62e2a19 734 int ret;
448de7e7 735
1567bb7d
LP		 736 /* If the preview engine crashed it might not respond to read/write
737 * operations on the L4 bus. This would result in a bus fault and a
738 * kernel oops. Refuse to start streaming in that case. This check must
739 * be performed before the loop below to avoid starting entities if the
740 * pipeline won't start anyway (those entities would then likely fail to
741 * stop, making the problem worse).
742 */
743 if ((pipe->entities & isp->crashed) &
744 (1U << isp->isp_prev.subdev.entity.id))
745 return -EIO;
746
448de7e7
SA		 747 spin_lock_irqsave(&pipe->lock, flags);
748 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
749 spin_unlock_irqrestore(&pipe->lock, flags);
750
751 pipe->do_propagation = false;
752
753 entity = &pipe->output->video.entity;
754 while (1) {
755 pad = &entity->pads[0];
756 if (!(pad->flags & MEDIA_PAD_FL_SINK))
757 break;
758
759 pad = media_entity_remote_source(pad);
760 if (pad == NULL ||
761 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
762 break;
763
764 entity = pad->entity;
765 subdev = media_entity_to_v4l2_subdev(entity);
766
767 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
768 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 769 return ret;
448de7e7
SA		 770
771 if (subdev == &isp->isp_ccdc.subdev) {
772 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
773 s_stream, mode);
774 v4l2_subdev_call(&isp->isp_af.subdev, video,
775 s_stream, mode);
776 v4l2_subdev_call(&isp->isp_hist.subdev, video,
777 s_stream, mode);
778 pipe->do_propagation = true;
779 }
780 }
781
c62e2a19 782 return 0;
448de7e7
SA		 783}
784
785static int isp_pipeline_wait_resizer(struct isp_device *isp)
786{
787 return omap3isp_resizer_busy(&isp->isp_res);
788}
789
790static int isp_pipeline_wait_preview(struct isp_device *isp)
791{
792 return omap3isp_preview_busy(&isp->isp_prev);
793}
794
795static int isp_pipeline_wait_ccdc(struct isp_device *isp)
796{
797 return omap3isp_stat_busy(&isp->isp_af)
798 || omap3isp_stat_busy(&isp->isp_aewb)
799 || omap3isp_stat_busy(&isp->isp_hist)
800 || omap3isp_ccdc_busy(&isp->isp_ccdc);
801}
802
803#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
804
805static int isp_pipeline_wait(struct isp_device *isp,
806 int(*busy)(struct isp_device *isp))
807{
808 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
809
810 while (!time_after(jiffies, timeout)) {
811 if (!busy(isp))
812 return 0;
813 }
814
815 return 1;
816}
817
818/*
819 * isp_pipeline_disable - Disable streaming on a pipeline
820 * @pipe: ISP pipeline
821 *
822 * Walk the entities chain starting at the pipeline output video node and stop
823 * all modules in the chain. Wait synchronously for the modules to be stopped if
824 * necessary.
825 *
826 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
827 * can't be stopped (in which case a software reset of the ISP is probably
828 * necessary).
829 */
830static int isp_pipeline_disable(struct isp_pipeline *pipe)
831{
832 struct isp_device *isp = pipe->output->isp;
833 struct media_entity *entity;
834 struct media_pad *pad;
835 struct v4l2_subdev *subdev;
836 int failure = 0;
837 int ret;
838
839 /*
840 * We need to stop all the modules after CCDC first or they'll
841 * never stop since they may not get a full frame from CCDC.
842 */
843 entity = &pipe->output->video.entity;
844 while (1) {
845 pad = &entity->pads[0];
846 if (!(pad->flags & MEDIA_PAD_FL_SINK))
847 break;
848
849 pad = media_entity_remote_source(pad);
850 if (pad == NULL ||
851 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
852 break;
853
854 entity = pad->entity;
855 subdev = media_entity_to_v4l2_subdev(entity);
856
857 if (subdev == &isp->isp_ccdc.subdev) {
858 v4l2_subdev_call(&isp->isp_aewb.subdev,
859 video, s_stream, 0);
860 v4l2_subdev_call(&isp->isp_af.subdev,
861 video, s_stream, 0);
862 v4l2_subdev_call(&isp->isp_hist.subdev,
863 video, s_stream, 0);
864 }
865
866 v4l2_subdev_call(subdev, video, s_stream, 0);
867
868 if (subdev == &isp->isp_res.subdev)
869 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
870 else if (subdev == &isp->isp_prev.subdev)
871 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
872 else if (subdev == &isp->isp_ccdc.subdev)
873 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
874 else
875 ret = 0;
876
877 if (ret) {
878 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1567bb7d
LP		 879 /* If the entity failed to stopped, assume it has
880 * crashed. Mark it as such, the ISP will be reset when
881 * applications will release it.
882 */
883 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 884 failure = -ETIMEDOUT;
885 }
886 }
887
888 return failure;
889}
890
891/*
892 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
893 * @pipe: ISP pipeline
894 * @state: Stream state (stopped, single shot or continuous)
895 *
896 * Set the pipeline to the given stream state. Pipelines can be started in
897 * single-shot or continuous mode.
898 *
25985edc 899 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 900 * operation otherwise. The pipeline state is not updated when the operation
901 * fails, except when stopping the pipeline.
448de7e7
SA		 902 */
903int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
904 enum isp_pipeline_stream_state state)
905{
906 int ret;
907
908 if (state == ISP_PIPELINE_STREAM_STOPPED)
909 ret = isp_pipeline_disable(pipe);
910 else
911 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 912
913 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
914 pipe->stream_state = state;
448de7e7
SA		 915
916 return ret;
917}
918
919/*
920 * isp_pipeline_resume - Resume streaming on a pipeline
921 * @pipe: ISP pipeline
922 *
923 * Resume video output and input and re-enable pipeline.
924 */
925static void isp_pipeline_resume(struct isp_pipeline *pipe)
926{
927 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
928
929 omap3isp_video_resume(pipe->output, !singleshot);
930 if (singleshot)
931 omap3isp_video_resume(pipe->input, 0);
932 isp_pipeline_enable(pipe, pipe->stream_state);
933}
934
935/*
936 * isp_pipeline_suspend - Suspend streaming on a pipeline
937 * @pipe: ISP pipeline
938 *
939 * Suspend pipeline.
940 */
941static void isp_pipeline_suspend(struct isp_pipeline *pipe)
942{
943 isp_pipeline_disable(pipe);
944}
945
946/*
947 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
948 * video node
949 * @me: ISP module's media entity
950 *
951 * Returns 1 if the entity has an enabled link to the output video node or 0
952 * otherwise. It's true only while pipeline can have no more than one output
953 * node.
954 */
955static int isp_pipeline_is_last(struct media_entity *me)
956{
957 struct isp_pipeline *pipe;
958 struct media_pad *pad;
959
960 if (!me->pipe)
961 return 0;
962 pipe = to_isp_pipeline(me);
963 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
964 return 0;
965 pad = media_entity_remote_source(&pipe->output->pad);
966 return pad->entity == me;
967}
968
969/*
970 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
971 * @me: ISP module's media entity
972 *
973 * Suspend the whole pipeline if module's entity has an enabled link to the
974 * output video node. It works only while pipeline can have no more than one
975 * output node.
976 */
977static void isp_suspend_module_pipeline(struct media_entity *me)
978{
979 if (isp_pipeline_is_last(me))
980 isp_pipeline_suspend(to_isp_pipeline(me));
981}
982
983/*
984 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
985 * @me: ISP module's media entity
986 *
987 * Resume the whole pipeline if module's entity has an enabled link to the
988 * output video node. It works only while pipeline can have no more than one
989 * output node.
990 */
991static void isp_resume_module_pipeline(struct media_entity *me)
992{
993 if (isp_pipeline_is_last(me))
994 isp_pipeline_resume(to_isp_pipeline(me));
995}
996
997/*
998 * isp_suspend_modules - Suspend ISP submodules.
999 * @isp: OMAP3 ISP device
1000 *
1001 * Returns 0 if suspend left in idle state all the submodules properly,
1002 * or returns 1 if a general Reset is required to suspend the submodules.
1003 */
1004static int isp_suspend_modules(struct isp_device *isp)
1005{
1006 unsigned long timeout;
1007
1008 omap3isp_stat_suspend(&isp->isp_aewb);
1009 omap3isp_stat_suspend(&isp->isp_af);
1010 omap3isp_stat_suspend(&isp->isp_hist);
1011 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1012 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1014 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1016
1017 timeout = jiffies + ISP_STOP_TIMEOUT;
1018 while (omap3isp_stat_busy(&isp->isp_af)
1019 || omap3isp_stat_busy(&isp->isp_aewb)
1020 || omap3isp_stat_busy(&isp->isp_hist)
1021 || omap3isp_preview_busy(&isp->isp_prev)
1022 || omap3isp_resizer_busy(&isp->isp_res)
1023 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1024 if (time_after(jiffies, timeout)) {
1025 dev_info(isp->dev, "can't stop modules.\n");
1026 return 1;
1027 }
1028 msleep(1);
1029 }
1030
1031 return 0;
1032}
1033
1034/*
1035 * isp_resume_modules - Resume ISP submodules.
1036 * @isp: OMAP3 ISP device
1037 */
1038static void isp_resume_modules(struct isp_device *isp)
1039{
1040 omap3isp_stat_resume(&isp->isp_aewb);
1041 omap3isp_stat_resume(&isp->isp_af);
1042 omap3isp_stat_resume(&isp->isp_hist);
1043 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1044 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1046 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1048}
1049
1050/*
1051 * isp_reset - Reset ISP with a timeout wait for idle.
1052 * @isp: OMAP3 ISP device
1053 */
1054static int isp_reset(struct isp_device *isp)
1055{
1056 unsigned long timeout = 0;
1057
1058 isp_reg_writel(isp,
1059 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1060 | ISP_SYSCONFIG_SOFTRESET,
1061 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1062 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1063 ISP_SYSSTATUS) & 0x1)) {
1064 if (timeout++ > 10000) {
1065 dev_alert(isp->dev, "cannot reset ISP\n");
1066 return -ETIMEDOUT;
1067 }
1068 udelay(1);
1069 }
1070
1567bb7d 1071 isp->crashed = 0;
448de7e7
SA		 1072 return 0;
1073}
1074
1075/*
1076 * isp_save_context - Saves the values of the ISP module registers.
1077 * @isp: OMAP3 ISP device
1078 * @reg_list: Structure containing pairs of register address and value to
1079 * modify on OMAP.
1080 */
1081static void
1082isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1083{
1084 struct isp_reg *next = reg_list;
1085
1086 for (; next->reg != ISP_TOK_TERM; next++)
1087 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1088}
1089
1090/*
1091 * isp_restore_context - Restores the values of the ISP module registers.
1092 * @isp: OMAP3 ISP device
1093 * @reg_list: Structure containing pairs of register address and value to
1094 * modify on OMAP.
1095 */
1096static void
1097isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1098{
1099 struct isp_reg *next = reg_list;
1100
1101 for (; next->reg != ISP_TOK_TERM; next++)
1102 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1103}
1104
1105/*
1106 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1107 * @isp: OMAP3 ISP device
1108 *
1109 * Routine for saving the context of each module in the ISP.
1110 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1111 */
1112static void isp_save_ctx(struct isp_device *isp)
1113{
1114 isp_save_context(isp, isp_reg_list);
fabdbca8 1115 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1116}
1117
1118/*
1119 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1120 * @isp: OMAP3 ISP device
1121 *
1122 * Routine for restoring the context of each module in the ISP.
1123 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1124 */
1125static void isp_restore_ctx(struct isp_device *isp)
1126{
1127 isp_restore_context(isp, isp_reg_list);
fabdbca8 1128 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1129 omap3isp_ccdc_restore_context(isp);
1130 omap3isp_preview_restore_context(isp);
1131}
1132
1133/* -----------------------------------------------------------------------------
1134 * SBL resources management
1135 */
1136#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1137 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1138 OMAP3_ISP_SBL_PREVIEW_READ | \
1139 OMAP3_ISP_SBL_RESIZER_READ)
1140#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1141 OMAP3_ISP_SBL_CSI2A_WRITE | \
1142 OMAP3_ISP_SBL_CSI2C_WRITE | \
1143 OMAP3_ISP_SBL_CCDC_WRITE | \
1144 OMAP3_ISP_SBL_PREVIEW_WRITE)
1145
1146void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1147{
1148 u32 sbl = 0;
1149
1150 isp->sbl_resources |= res;
1151
1152 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1153 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1154
1155 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1156 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1157
1158 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1159 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1160
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1162 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1163
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1165 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1166
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1168 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1169
1170 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1171}
1172
1173void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1174{
1175 u32 sbl = 0;
1176
1177 isp->sbl_resources &= ~res;
1178
1179 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1180 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1181
1182 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1183 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1184
1185 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1186 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1187
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1189 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1190
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1192 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1193
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1195 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1196
1197 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1198}
1199
1200/*
1201 * isp_module_sync_idle - Helper to sync module with its idle state
1202 * @me: ISP submodule's media entity
1203 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1204 * @stopping: flag which tells module wants to stop
1205 *
1206 * This function checks if ISP submodule needs to wait for next interrupt. If
1207 * yes, makes the caller to sleep while waiting for such event.
1208 */
1209int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1210 atomic_t *stopping)
1211{
1212 struct isp_pipeline *pipe = to_isp_pipeline(me);
1213
1214 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1215 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1216 !isp_pipeline_ready(pipe)))
1217 return 0;
1218
1219 /*
1220 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1221 * scenario. We'll call it here to avoid race conditions.
1222 */
1223 atomic_set(stopping, 1);
1224 smp_mb();
1225
1226 /*
1227 * If module is the last one, it's writing to memory. In this case,
1228 * it's necessary to check if the module is already paused due to
1229 * DMA queue underrun or if it has to wait for next interrupt to be
1230 * idle.
1231 * If it isn't the last one, the function won't sleep but *stopping
1232 * will still be set to warn next submodule caller's interrupt the
1233 * module wants to be idle.
1234 */
1235 if (isp_pipeline_is_last(me)) {
1236 struct isp_video *video = pipe->output;
1237 unsigned long flags;
1238 spin_lock_irqsave(&video->queue->irqlock, flags);
1239 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1240 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1241 atomic_set(stopping, 0);
1242 smp_mb();
1243 return 0;
1244 }
1245 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1246 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1247 msecs_to_jiffies(1000))) {
1248 atomic_set(stopping, 0);
1249 smp_mb();
1250 return -ETIMEDOUT;
1251 }
1252 }
1253
1254 return 0;
1255}
1256
1257/*
1258 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1259 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1260 * @stopping: flag which tells module wants to stop
1261 *
1262 * This function checks if ISP submodule was stopping. In case of yes, it
1263 * notices the caller by setting stopping to 0 and waking up the wait queue.
1264 * Returns 1 if it was stopping or 0 otherwise.
1265 */
1266int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1267 atomic_t *stopping)
1268{
1269 if (atomic_cmpxchg(stopping, 1, 0)) {
1270 wake_up(wait);
1271 return 1;
1272 }
1273
1274 return 0;
1275}
1276
1277/* --------------------------------------------------------------------------
1278 * Clock management
1279 */
1280
1281#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1282 ISPCTRL_HIST_CLK_EN | \
1283 ISPCTRL_RSZ_CLK_EN | \
1284 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1285 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1286
1287static void __isp_subclk_update(struct isp_device *isp)
1288{
1289 u32 clk = 0;
1290
be9a1b98
LP		 1291 /* AEWB and AF share the same clock. */
1292 if (isp->subclk_resources &
1293 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1294 clk |= ISPCTRL_H3A_CLK_EN;
1295
1296 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1297 clk |= ISPCTRL_HIST_CLK_EN;
1298
1299 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1300 clk |= ISPCTRL_RSZ_CLK_EN;
1301
1302 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1303 * RAM as well.
448de7e7
SA		 1304 */
1305 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1306 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1307
1308 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1309 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1310
1311 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1312 ISPCTRL_CLKS_MASK, clk);
1313}
1314
1315void omap3isp_subclk_enable(struct isp_device *isp,
1316 enum isp_subclk_resource res)
1317{
1318 isp->subclk_resources |= res;
1319
1320 __isp_subclk_update(isp);
1321}
1322
1323void omap3isp_subclk_disable(struct isp_device *isp,
1324 enum isp_subclk_resource res)
1325{
1326 isp->subclk_resources &= ~res;
1327
1328 __isp_subclk_update(isp);
1329}
1330
1331/*
1332 * isp_enable_clocks - Enable ISP clocks
1333 * @isp: OMAP3 ISP device
1334 *
1335 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1336 */
1337static int isp_enable_clocks(struct isp_device *isp)
1338{
1339 int r;
1340 unsigned long rate;
1341 int divisor;
1342
1343 /*
1344 * cam_mclk clock chain:
1345 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1346 *
1347 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1348 * set to the same value. Hence the rate set for dpll4_m5
1349 * has to be twice of what is set on OMAP3430 to get
1350 * the required value for cam_mclk
1351 */
1352 if (cpu_is_omap3630())
1353 divisor = 1;
1354 else
1355 divisor = 2;
1356
1357 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1358 if (r) {
1359 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1360 goto out_clk_enable_ick;
1361 }
1362 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1363 CM_CAM_MCLK_HZ/divisor);
1364 if (r) {
1365 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1366 goto out_clk_enable_mclk;
1367 }
1368 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1369 if (r) {
1370 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1371 goto out_clk_enable_mclk;
1372 }
1373 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1374 if (rate != CM_CAM_MCLK_HZ)
1375 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1376 " expected : %d\n"
1377 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1378 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1379 if (r) {
1380 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1381 goto out_clk_enable_csi2_fclk;
1382 }
1383 return 0;
1384
1385out_clk_enable_csi2_fclk:
1386 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1387out_clk_enable_mclk:
1388 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1389out_clk_enable_ick:
1390 return r;
1391}
1392
1393/*
1394 * isp_disable_clocks - Disable ISP clocks
1395 * @isp: OMAP3 ISP device
1396 */
1397static void isp_disable_clocks(struct isp_device *isp)
1398{
1399 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1400 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1401 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1402}
1403
1404static const char *isp_clocks[] = {
1405 "cam_ick",
1406 "cam_mclk",
1407 "dpll4_m5_ck",
1408 "csi2_96m_fck",
1409 "l3_ick",
1410};
1411
1412static void isp_put_clocks(struct isp_device *isp)
1413{
1414 unsigned int i;
1415
1416 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1417 if (isp->clock[i]) {
1418 clk_put(isp->clock[i]);
1419 isp->clock[i] = NULL;
1420 }
1421 }
1422}
1423
1424static int isp_get_clocks(struct isp_device *isp)
1425{
1426 struct clk *clk;
1427 unsigned int i;
1428
1429 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1430 clk = clk_get(isp->dev, isp_clocks[i]);
1431 if (IS_ERR(clk)) {
1432 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1433 isp_put_clocks(isp);
1434 return PTR_ERR(clk);
1435 }
1436
1437 isp->clock[i] = clk;
1438 }
1439
1440 return 0;
1441}
1442
1443/*
1444 * omap3isp_get - Acquire the ISP resource.
1445 *
1446 * Initializes the clocks for the first acquire.
1447 *
1448 * Increment the reference count on the ISP. If the first reference is taken,
1449 * enable clocks and power-up all submodules.
1450 *
25985edc 1451 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1452 */
96d62ae2 1453static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1454{
1455 struct isp_device *__isp = isp;
1456
1457 if (isp == NULL)
1458 return NULL;
1459
1460 mutex_lock(&isp->isp_mutex);
1461 if (isp->ref_count > 0)
1462 goto out;
1463
1464 if (isp_enable_clocks(isp) < 0) {
1465 __isp = NULL;
1466 goto out;
1467 }
1468
1469 /* We don't want to restore context before saving it! */
1470 if (isp->has_context)
1471 isp_restore_ctx(isp);
448de7e7 1472
96d62ae2
LP		 1473 if (irq)
1474 isp_enable_interrupts(isp);
448de7e7
SA		 1475
1476out:
1477 if (__isp != NULL)
1478 isp->ref_count++;
1479 mutex_unlock(&isp->isp_mutex);
1480
1481 return __isp;
1482}
1483
96d62ae2
LP		 1484struct isp_device *omap3isp_get(struct isp_device *isp)
1485{
1486 return __omap3isp_get(isp, true);
1487}
1488
448de7e7
SA		 1489/*
1490 * omap3isp_put - Release the ISP
1491 *
1492 * Decrement the reference count on the ISP. If the last reference is released,
1493 * power-down all submodules, disable clocks and free temporary buffers.
1494 */
1495void omap3isp_put(struct isp_device *isp)
1496{
1497 if (isp == NULL)
1498 return;
1499
1500 mutex_lock(&isp->isp_mutex);
1501 BUG_ON(isp->ref_count == 0);
1502 if (--isp->ref_count == 0) {
1503 isp_disable_interrupts(isp);
96d62ae2 1504 if (isp->domain) {
a32f2f90 1505 isp_save_ctx(isp);
96d62ae2
LP		 1506 isp->has_context = 1;
1507 }
1567bb7d
LP		 1508 /* Reset the ISP if an entity has failed to stop. This is the
1509 * only way to recover from such conditions.
1510 */
1511 if (isp->crashed)
994d5375 1512 isp_reset(isp);
448de7e7
SA		 1513 isp_disable_clocks(isp);
1514 }
1515 mutex_unlock(&isp->isp_mutex);
1516}
1517
1518/* --------------------------------------------------------------------------
1519 * Platform device driver
1520 */
1521
1522/*
1523 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1524 * @isp: OMAP3 ISP device
1525 */
1526#define ISP_PRINT_REGISTER(isp, name)\
1527 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1528 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1529#define SBL_PRINT_REGISTER(isp, name)\
1530 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1531 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1532
1533void omap3isp_print_status(struct isp_device *isp)
1534{
1535 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1536
1537 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1538 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1539 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1540 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1541 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1542 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1543 ISP_PRINT_REGISTER(isp, CTRL);
1544 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1545 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1546 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1548 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1549 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1550 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1551 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1552
1553 SBL_PRINT_REGISTER(isp, PCR);
1554 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1555
1556 dev_dbg(isp->dev, "--------------------------------------------\n");
1557}
1558
1559#ifdef CONFIG_PM
1560
1561/*
1562 * Power management support.
1563 *
1564 * As the ISP can't properly handle an input video stream interruption on a non
1565 * frame boundary, the ISP pipelines need to be stopped before sensors get
1566 * suspended. However, as suspending the sensors can require a running clock,
1567 * which can be provided by the ISP, the ISP can't be completely suspended
1568 * before the sensor.
1569 *
1570 * To solve this problem power management support is split into prepare/complete
1571 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1572 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1573 * resume(), and the the pipelines are restarted in complete().
1574 *
1575 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1576 * yet.
1577 */
1578static int isp_pm_prepare(struct device *dev)
1579{
1580 struct isp_device *isp = dev_get_drvdata(dev);
1581 int reset;
1582
1583 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1584
1585 if (isp->ref_count == 0)
1586 return 0;
1587
1588 reset = isp_suspend_modules(isp);
1589 isp_disable_interrupts(isp);
1590 isp_save_ctx(isp);
1591 if (reset)
1592 isp_reset(isp);
1593
1594 return 0;
1595}
1596
1597static int isp_pm_suspend(struct device *dev)
1598{
1599 struct isp_device *isp = dev_get_drvdata(dev);
1600
1601 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1602
1603 if (isp->ref_count)
1604 isp_disable_clocks(isp);
1605
1606 return 0;
1607}
1608
1609static int isp_pm_resume(struct device *dev)
1610{
1611 struct isp_device *isp = dev_get_drvdata(dev);
1612
1613 if (isp->ref_count == 0)
1614 return 0;
1615
1616 return isp_enable_clocks(isp);
1617}
1618
1619static void isp_pm_complete(struct device *dev)
1620{
1621 struct isp_device *isp = dev_get_drvdata(dev);
1622
1623 if (isp->ref_count == 0)
1624 return;
1625
1626 isp_restore_ctx(isp);
1627 isp_enable_interrupts(isp);
1628 isp_resume_modules(isp);
1629}
1630
1631#else
1632
1633#define isp_pm_prepare NULL
1634#define isp_pm_suspend NULL
1635#define isp_pm_resume NULL
1636#define isp_pm_complete NULL
1637
1638#endif /* CONFIG_PM */
1639
1640static void isp_unregister_entities(struct isp_device *isp)
1641{
1642 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1643 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1644 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1645 omap3isp_preview_unregister_entities(&isp->isp_prev);
1646 omap3isp_resizer_unregister_entities(&isp->isp_res);
1647 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1648 omap3isp_stat_unregister_entities(&isp->isp_af);
1649 omap3isp_stat_unregister_entities(&isp->isp_hist);
1650
1651 v4l2_device_unregister(&isp->v4l2_dev);
1652 media_device_unregister(&isp->media_dev);
1653}
1654
1655/*
1656 * isp_register_subdev_group - Register a group of subdevices
1657 * @isp: OMAP3 ISP device
1658 * @board_info: I2C subdevs board information array
1659 *
1660 * Register all I2C subdevices in the board_info array. The array must be
1661 * terminated by a NULL entry, and the first entry must be the sensor.
1662 *
1663 * Return a pointer to the sensor media entity if it has been successfully
1664 * registered, or NULL otherwise.
1665 */
1666static struct v4l2_subdev *
1667isp_register_subdev_group(struct isp_device *isp,
1668 struct isp_subdev_i2c_board_info *board_info)
1669{
1670 struct v4l2_subdev *sensor = NULL;
1671 unsigned int first;
1672
1673 if (board_info->board_info == NULL)
1674 return NULL;
1675
1676 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1677 struct v4l2_subdev *subdev;
1678 struct i2c_adapter *adapter;
1679
1680 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1681 if (adapter == NULL) {
1682 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1683 "device %s\n", __func__,
1684 board_info->i2c_adapter_id,
1685 board_info->board_info->type);
1686 continue;
1687 }
1688
1689 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1690 board_info->board_info, NULL);
1691 if (subdev == NULL) {
1692 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1693 __func__, board_info->board_info->type);
1694 continue;
1695 }
1696
1697 if (first)
1698 sensor = subdev;
1699 }
1700
1701 return sensor;
1702}
1703
1704static int isp_register_entities(struct isp_device *isp)
1705{
1706 struct isp_platform_data *pdata = isp->pdata;
1707 struct isp_v4l2_subdevs_group *subdevs;
1708 int ret;
1709
1710 isp->media_dev.dev = isp->dev;
1711 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1712 sizeof(isp->media_dev.model));
083eb078 1713 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1714 isp->media_dev.link_notify = isp_pipeline_link_notify;
1715 ret = media_device_register(&isp->media_dev);
1716 if (ret < 0) {
1717 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1718 __func__, ret);
1719 return ret;
1720 }
1721
1722 isp->v4l2_dev.mdev = &isp->media_dev;
1723 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1724 if (ret < 0) {
1725 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1726 __func__, ret);
1727 goto done;
1728 }
1729
1730 /* Register internal entities */
1731 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1732 if (ret < 0)
1733 goto done;
1734
1735 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1736 if (ret < 0)
1737 goto done;
1738
1739 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1740 if (ret < 0)
1741 goto done;
1742
1743 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1744 &isp->v4l2_dev);
1745 if (ret < 0)
1746 goto done;
1747
1748 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1749 if (ret < 0)
1750 goto done;
1751
1752 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1753 if (ret < 0)
1754 goto done;
1755
1756 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1757 if (ret < 0)
1758 goto done;
1759
1760 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1761 if (ret < 0)
1762 goto done;
1763
1764 /* Register external entities */
ca4186f0 1765 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1766 struct v4l2_subdev *sensor;
1767 struct media_entity *input;
1768 unsigned int flags;
1769 unsigned int pad;
1770
1771 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1772 if (sensor == NULL)
1773 continue;
1774
1775 sensor->host_priv = subdevs;
1776
1777 /* Connect the sensor to the correct interface module. Parallel
1778 * sensors are connected directly to the CCDC, while serial
1779 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1780 * through CSIPHY1 or CSIPHY2.
1781 */
1782 switch (subdevs->interface) {
1783 case ISP_INTERFACE_PARALLEL:
1784 input = &isp->isp_ccdc.subdev.entity;
1785 pad = CCDC_PAD_SINK;
1786 flags = 0;
1787 break;
1788
1789 case ISP_INTERFACE_CSI2A_PHY2:
1790 input = &isp->isp_csi2a.subdev.entity;
1791 pad = CSI2_PAD_SINK;
1792 flags = MEDIA_LNK_FL_IMMUTABLE
1793 | MEDIA_LNK_FL_ENABLED;
1794 break;
1795
1796 case ISP_INTERFACE_CCP2B_PHY1:
1797 case ISP_INTERFACE_CCP2B_PHY2:
1798 input = &isp->isp_ccp2.subdev.entity;
1799 pad = CCP2_PAD_SINK;
1800 flags = 0;
1801 break;
1802
1803 case ISP_INTERFACE_CSI2C_PHY1:
1804 input = &isp->isp_csi2c.subdev.entity;
1805 pad = CSI2_PAD_SINK;
1806 flags = MEDIA_LNK_FL_IMMUTABLE
1807 | MEDIA_LNK_FL_ENABLED;
1808 break;
1809
1810 default:
1811 printk(KERN_ERR "%s: invalid interface type %u\n",
1812 __func__, subdevs->interface);
1813 ret = -EINVAL;
1814 goto done;
1815 }
1816
1817 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1818 flags);
1819 if (ret < 0)
1820 goto done;
1821 }
1822
1823 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1824
1825done:
1826 if (ret < 0)
1827 isp_unregister_entities(isp);
1828
1829 return ret;
1830}
1831
1832static void isp_cleanup_modules(struct isp_device *isp)
1833{
1834 omap3isp_h3a_aewb_cleanup(isp);
1835 omap3isp_h3a_af_cleanup(isp);
1836 omap3isp_hist_cleanup(isp);
1837 omap3isp_resizer_cleanup(isp);
1838 omap3isp_preview_cleanup(isp);
1839 omap3isp_ccdc_cleanup(isp);
1840 omap3isp_ccp2_cleanup(isp);
1841 omap3isp_csi2_cleanup(isp);
1842}
1843
1844static int isp_initialize_modules(struct isp_device *isp)
1845{
1846 int ret;
1847
1848 ret = omap3isp_csiphy_init(isp);
1849 if (ret < 0) {
1850 dev_err(isp->dev, "CSI PHY initialization failed\n");
1851 goto error_csiphy;
1852 }
1853
1854 ret = omap3isp_csi2_init(isp);
1855 if (ret < 0) {
1856 dev_err(isp->dev, "CSI2 initialization failed\n");
1857 goto error_csi2;
1858 }
1859
1860 ret = omap3isp_ccp2_init(isp);
1861 if (ret < 0) {
1862 dev_err(isp->dev, "CCP2 initialization failed\n");
1863 goto error_ccp2;
1864 }
1865
1866 ret = omap3isp_ccdc_init(isp);
1867 if (ret < 0) {
1868 dev_err(isp->dev, "CCDC initialization failed\n");
1869 goto error_ccdc;
1870 }
1871
1872 ret = omap3isp_preview_init(isp);
1873 if (ret < 0) {
1874 dev_err(isp->dev, "Preview initialization failed\n");
1875 goto error_preview;
1876 }
1877
1878 ret = omap3isp_resizer_init(isp);
1879 if (ret < 0) {
1880 dev_err(isp->dev, "Resizer initialization failed\n");
1881 goto error_resizer;
1882 }
1883
1884 ret = omap3isp_hist_init(isp);
1885 if (ret < 0) {
1886 dev_err(isp->dev, "Histogram initialization failed\n");
1887 goto error_hist;
1888 }
1889
1890 ret = omap3isp_h3a_aewb_init(isp);
1891 if (ret < 0) {
1892 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1893 goto error_h3a_aewb;
1894 }
1895
1896 ret = omap3isp_h3a_af_init(isp);
1897 if (ret < 0) {
1898 dev_err(isp->dev, "H3A AF initialization failed\n");
1899 goto error_h3a_af;
1900 }
1901
1902 /* Connect the submodules. */
1903 ret = media_entity_create_link(
1904 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1905 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1906 if (ret < 0)
1907 goto error_link;
1908
1909 ret = media_entity_create_link(
1910 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1911 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1912 if (ret < 0)
1913 goto error_link;
1914
1915 ret = media_entity_create_link(
1916 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1917 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1918 if (ret < 0)
1919 goto error_link;
1920
1921 ret = media_entity_create_link(
1922 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1923 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1924 if (ret < 0)
1925 goto error_link;
1926
1927 ret = media_entity_create_link(
1928 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1929 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1930 if (ret < 0)
1931 goto error_link;
1932
1933 ret = media_entity_create_link(
1934 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1935 &isp->isp_aewb.subdev.entity, 0,
1936 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1937 if (ret < 0)
1938 goto error_link;
1939
1940 ret = media_entity_create_link(
1941 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1942 &isp->isp_af.subdev.entity, 0,
1943 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1944 if (ret < 0)
1945 goto error_link;
1946
1947 ret = media_entity_create_link(
1948 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1949 &isp->isp_hist.subdev.entity, 0,
1950 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1951 if (ret < 0)
1952 goto error_link;
1953
1954 return 0;
1955
1956error_link:
1957 omap3isp_h3a_af_cleanup(isp);
1958error_h3a_af:
1959 omap3isp_h3a_aewb_cleanup(isp);
1960error_h3a_aewb:
1961 omap3isp_hist_cleanup(isp);
1962error_hist:
1963 omap3isp_resizer_cleanup(isp);
1964error_resizer:
1965 omap3isp_preview_cleanup(isp);
1966error_preview:
1967 omap3isp_ccdc_cleanup(isp);
1968error_ccdc:
1969 omap3isp_ccp2_cleanup(isp);
1970error_ccp2:
1971 omap3isp_csi2_cleanup(isp);
1972error_csi2:
1973error_csiphy:
1974 return ret;
1975}
1976
1977/*
1978 * isp_remove - Remove ISP platform device
1979 * @pdev: Pointer to ISP platform device
1980 *
1981 * Always returns 0.
1982 */
79c3a07d 1983static int __devexit isp_remove(struct platform_device *pdev)
448de7e7
SA		 1984{
1985 struct isp_device *isp = platform_get_drvdata(pdev);
1986 int i;
1987
1988 isp_unregister_entities(isp);
1989 isp_cleanup_modules(isp);
1990
96d62ae2 1991 __omap3isp_get(isp, false);
fabdbca8 1992 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d 1993 iommu_domain_free(isp->domain);
a32f2f90 1994 isp->domain = NULL;
448de7e7
SA		 1995 omap3isp_put(isp);
1996
1997 free_irq(isp->irq_num, isp);
1998 isp_put_clocks(isp);
1999
2000 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2001 if (isp->mmio_base[i]) {
2002 iounmap(isp->mmio_base[i]);
2003 isp->mmio_base[i] = NULL;
2004 }
2005
2006 if (isp->mmio_base_phys[i]) {
2007 release_mem_region(isp->mmio_base_phys[i],
2008 isp->mmio_size[i]);
2009 isp->mmio_base_phys[i] = 0;
2010 }
2011 }
2012
2013 regulator_put(isp->isp_csiphy1.vdd);
2014 regulator_put(isp->isp_csiphy2.vdd);
2015 kfree(isp);
2016
2017 return 0;
2018}
2019
2020static int isp_map_mem_resource(struct platform_device *pdev,
2021 struct isp_device *isp,
2022 enum isp_mem_resources res)
2023{
2024 struct resource *mem;
2025
2026 /* request the mem region for the camera registers */
2027
2028 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2029 if (!mem) {
2030 dev_err(isp->dev, "no mem resource?\n");
2031 return -ENODEV;
2032 }
2033
2034 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2035 dev_err(isp->dev,
2036 "cannot reserve camera register I/O region\n");
2037 return -ENODEV;
2038 }
2039 isp->mmio_base_phys[res] = mem->start;
2040 isp->mmio_size[res] = resource_size(mem);
2041
2042 /* map the region */
2043 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2044 isp->mmio_size[res]);
2045 if (!isp->mmio_base[res]) {
2046 dev_err(isp->dev, "cannot map camera register I/O region\n");
2047 return -ENODEV;
2048 }
2049
2050 return 0;
2051}
2052
2053/*
2054 * isp_probe - Probe ISP platform device
2055 * @pdev: Pointer to ISP platform device
2056 *
2057 * Returns 0 if successful,
2058 * -ENOMEM if no memory available,
2059 * -ENODEV if no platform device resources found
2060 * or no space for remapping registers,
2061 * -EINVAL if couldn't install ISR,
2062 * or clk_get return error value.
2063 */
79c3a07d 2064static int __devinit isp_probe(struct platform_device *pdev)
448de7e7
SA		 2065{
2066 struct isp_platform_data *pdata = pdev->dev.platform_data;
2067 struct isp_device *isp;
2068 int ret;
2069 int i, m;
2070
2071 if (pdata == NULL)
2072 return -EINVAL;
2073
2074 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2075 if (!isp) {
2076 dev_err(&pdev->dev, "could not allocate memory\n");
2077 return -ENOMEM;
2078 }
2079
2080 isp->autoidle = autoidle;
2081 isp->platform_cb.set_xclk = isp_set_xclk;
448de7e7
SA		 2082
2083 mutex_init(&isp->isp_mutex);
2084 spin_lock_init(&isp->stat_lock);
2085
2086 isp->dev = &pdev->dev;
2087 isp->pdata = pdata;
2088 isp->ref_count = 0;
2089
2090 isp->raw_dmamask = DMA_BIT_MASK(32);
2091 isp->dev->dma_mask = &isp->raw_dmamask;
2092 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2093
2094 platform_set_drvdata(pdev, isp);
2095
2096 /* Regulators */
2097 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2098 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2099
2100 /* Clocks */
2101 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2102 if (ret < 0)
2103 goto error;
2104
2105 ret = isp_get_clocks(isp);
2106 if (ret < 0)
2107 goto error;
2108
0bd0dbee
PST		 2109 if (__omap3isp_get(isp, false) == NULL) {
2110 ret = -ENODEV;
448de7e7 2111 goto error;
0bd0dbee 2112 }
448de7e7
SA		 2113
2114 ret = isp_reset(isp);
2115 if (ret < 0)
2116 goto error_isp;
2117
2118 /* Memory resources */
2119 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2120 dev_info(isp->dev, "Revision %d.%d found\n",
2121 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2122
2123 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2124 if (isp->revision == isp_res_maps[m].isp_rev)
2125 break;
2126
2127 if (m == ARRAY_SIZE(isp_res_maps)) {
2128 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2129 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2130 ret = -ENODEV;
2131 goto error_isp;
2132 }
2133
2134 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2135 if (isp_res_maps[m].map & 1 << i) {
2136 ret = isp_map_mem_resource(pdev, isp, i);
2137 if (ret)
2138 goto error_isp;
2139 }
2140 }
2141
905d66c1 2142 isp->domain = iommu_domain_alloc(pdev->dev.bus);
f626b52d
OBC		 2143 if (!isp->domain) {
2144 dev_err(isp->dev, "can't alloc iommu domain\n");
2145 ret = -ENOMEM;
2146 goto error_isp;
2147 }
2148
fabdbca8 2149 ret = iommu_attach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2150 if (ret) {
2151 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2152 goto free_domain;
2153 }
2154
448de7e7
SA		 2155 /* Interrupt */
2156 isp->irq_num = platform_get_irq(pdev, 0);
2157 if (isp->irq_num <= 0) {
2158 dev_err(isp->dev, "No IRQ resource\n");
2159 ret = -ENODEV;
f626b52d 2160 goto detach_dev;
448de7e7
SA		 2161 }
2162
2163 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2164 dev_err(isp->dev, "Unable to request IRQ\n");
2165 ret = -EINVAL;
f626b52d 2166 goto detach_dev;
448de7e7
SA		 2167 }
2168
2169 /* Entities */
2170 ret = isp_initialize_modules(isp);
2171 if (ret < 0)
2172 goto error_irq;
2173
2174 ret = isp_register_entities(isp);
2175 if (ret < 0)
2176 goto error_modules;
2177
96d62ae2 2178 isp_core_init(isp, 1);
448de7e7
SA		 2179 omap3isp_put(isp);
2180
2181 return 0;
2182
2183error_modules:
2184 isp_cleanup_modules(isp);
2185error_irq:
2186 free_irq(isp->irq_num, isp);
f626b52d 2187detach_dev:
fabdbca8 2188 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2189free_domain:
2190 iommu_domain_free(isp->domain);
448de7e7 2191error_isp:
448de7e7
SA		 2192 omap3isp_put(isp);
2193error:
2194 isp_put_clocks(isp);
2195
2196 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2197 if (isp->mmio_base[i]) {
2198 iounmap(isp->mmio_base[i]);
2199 isp->mmio_base[i] = NULL;
2200 }
2201
2202 if (isp->mmio_base_phys[i]) {
2203 release_mem_region(isp->mmio_base_phys[i],
2204 isp->mmio_size[i]);
2205 isp->mmio_base_phys[i] = 0;
2206 }
2207 }
2208 regulator_put(isp->isp_csiphy2.vdd);
2209 regulator_put(isp->isp_csiphy1.vdd);
2210 platform_set_drvdata(pdev, NULL);
ed33ac8e
LP		 2211
2212 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2213 kfree(isp);
2214
2215 return ret;
2216}
2217
2218static const struct dev_pm_ops omap3isp_pm_ops = {
2219 .prepare = isp_pm_prepare,
2220 .suspend = isp_pm_suspend,
2221 .resume = isp_pm_resume,
2222 .complete = isp_pm_complete,
2223};
2224
2225static struct platform_device_id omap3isp_id_table[] = {
2226 { "omap3isp", 0 },
2227 { },
2228};
2229MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2230
2231static struct platform_driver omap3isp_driver = {
2232 .probe = isp_probe,
79c3a07d 2233 .remove = __devexit_p(isp_remove),
448de7e7
SA		 2234 .id_table = omap3isp_id_table,
2235 .driver = {
2236 .owner = THIS_MODULE,
2237 .name = "omap3isp",
2238 .pm = &omap3isp_pm_ops,
2239 },
2240};
2241
1d6629b1 2242module_platform_driver(omap3isp_driver);
448de7e7
SA		 2243
2244MODULE_AUTHOR("Nokia Corporation");
2245MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2246MODULE_LICENSE("GPL");
64dc3c1a 2247MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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