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[media] omap3isp: Fix division by 0
[deliverable/linux.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
448de7e7
SA		 43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
9b28ee3c 48#include <linux/clkdev.h>
448de7e7
SA		 49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
54#include <linux/module.h>
c8d35c84 55#include <linux/omap-iommu.h>
448de7e7
SA		 56#include <linux/platform_device.h>
57#include <linux/regulator/consumer.h>
58#include <linux/slab.h>
59#include <linux/sched.h>
60#include <linux/vmalloc.h>
61
2a0a5472
LP		 62#include <asm/dma-iommu.h>
63
448de7e7
SA		 64#include <media/v4l2-common.h>
65#include <media/v4l2-device.h>
66
67#include "isp.h"
68#include "ispreg.h"
69#include "ispccdc.h"
70#include "isppreview.h"
71#include "ispresizer.h"
72#include "ispcsi2.h"
73#include "ispccp2.h"
74#include "isph3a.h"
75#include "isphist.h"
76
77static unsigned int autoidle;
78module_param(autoidle, int, 0444);
79MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
80
81static void isp_save_ctx(struct isp_device *isp);
82
83static void isp_restore_ctx(struct isp_device *isp);
84
85static const struct isp_res_mapping isp_res_maps[] = {
86 {
87 .isp_rev = ISP_REVISION_2_0,
88 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
89 1 << OMAP3_ISP_IOMEM_CCP2 |
90 1 << OMAP3_ISP_IOMEM_CCDC |
91 1 << OMAP3_ISP_IOMEM_HIST |
92 1 << OMAP3_ISP_IOMEM_H3A |
93 1 << OMAP3_ISP_IOMEM_PREV |
94 1 << OMAP3_ISP_IOMEM_RESZ |
95 1 << OMAP3_ISP_IOMEM_SBL |
96 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
c19d19eb
SA		 97 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
98 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
448de7e7
SA		 99 },
100 {
101 .isp_rev = ISP_REVISION_15_0,
102 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
103 1 << OMAP3_ISP_IOMEM_CCP2 |
104 1 << OMAP3_ISP_IOMEM_CCDC |
105 1 << OMAP3_ISP_IOMEM_HIST |
106 1 << OMAP3_ISP_IOMEM_H3A |
107 1 << OMAP3_ISP_IOMEM_PREV |
108 1 << OMAP3_ISP_IOMEM_RESZ |
109 1 << OMAP3_ISP_IOMEM_SBL |
110 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
111 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
112 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
113 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
114 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
c19d19eb
SA		 115 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
116 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
448de7e7
SA		 117 },
118};
119
120/* Structure for saving/restoring ISP module registers */
121static struct isp_reg isp_reg_list[] = {
122 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
123 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
124 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
125 {0, ISP_TOK_TERM, 0}
126};
127
128/*
129 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
130 * @isp: OMAP3 ISP device
131 *
132 * In order to force posting of pending writes, we need to write and
133 * readback the same register, in this case the revision register.
134 *
135 * See this link for reference:
136 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
137 */
138void omap3isp_flush(struct isp_device *isp)
139{
140 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
141 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
142}
143
9b28ee3c
LP		 144/* -----------------------------------------------------------------------------
145 * XCLK
146 */
147
148#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
149
150static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
151{
152 switch (xclk->id) {
153 case ISP_XCLK_A:
154 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
155 ISPTCTRL_CTRL_DIVA_MASK,
156 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
157 break;
158 case ISP_XCLK_B:
159 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
160 ISPTCTRL_CTRL_DIVB_MASK,
161 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
162 break;
163 }
164}
165
166static int isp_xclk_prepare(struct clk_hw *hw)
167{
168 struct isp_xclk *xclk = to_isp_xclk(hw);
169
170 omap3isp_get(xclk->isp);
171
172 return 0;
173}
174
175static void isp_xclk_unprepare(struct clk_hw *hw)
176{
177 struct isp_xclk *xclk = to_isp_xclk(hw);
178
179 omap3isp_put(xclk->isp);
180}
181
182static int isp_xclk_enable(struct clk_hw *hw)
183{
184 struct isp_xclk *xclk = to_isp_xclk(hw);
185 unsigned long flags;
186
187 spin_lock_irqsave(&xclk->lock, flags);
188 isp_xclk_update(xclk, xclk->divider);
189 xclk->enabled = true;
190 spin_unlock_irqrestore(&xclk->lock, flags);
191
192 return 0;
193}
194
195static void isp_xclk_disable(struct clk_hw *hw)
196{
197 struct isp_xclk *xclk = to_isp_xclk(hw);
198 unsigned long flags;
199
200 spin_lock_irqsave(&xclk->lock, flags);
201 isp_xclk_update(xclk, 0);
202 xclk->enabled = false;
203 spin_unlock_irqrestore(&xclk->lock, flags);
204}
205
206static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208{
209 struct isp_xclk *xclk = to_isp_xclk(hw);
210
211 return parent_rate / xclk->divider;
212}
213
214static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
215{
216 u32 divider;
217
218 if (*rate >= parent_rate) {
219 *rate = parent_rate;
220 return ISPTCTRL_CTRL_DIV_BYPASS;
221 }
222
aadec012
LP		 223 if (*rate == 0)
224 *rate = 1;
225
9b28ee3c
LP		 226 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
227 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
228 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
229
230 *rate = parent_rate / divider;
231 return divider;
232}
233
234static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
235 unsigned long *parent_rate)
236{
237 isp_xclk_calc_divider(&rate, *parent_rate);
238 return rate;
239}
240
241static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
242 unsigned long parent_rate)
243{
244 struct isp_xclk *xclk = to_isp_xclk(hw);
245 unsigned long flags;
246 u32 divider;
247
248 divider = isp_xclk_calc_divider(&rate, parent_rate);
249
250 spin_lock_irqsave(&xclk->lock, flags);
251
252 xclk->divider = divider;
253 if (xclk->enabled)
254 isp_xclk_update(xclk, divider);
255
256 spin_unlock_irqrestore(&xclk->lock, flags);
257
258 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
259 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
260 return 0;
261}
262
263static const struct clk_ops isp_xclk_ops = {
264 .prepare = isp_xclk_prepare,
265 .unprepare = isp_xclk_unprepare,
266 .enable = isp_xclk_enable,
267 .disable = isp_xclk_disable,
268 .recalc_rate = isp_xclk_recalc_rate,
269 .round_rate = isp_xclk_round_rate,
270 .set_rate = isp_xclk_set_rate,
271};
272
273static const char *isp_xclk_parent_name = "cam_mclk";
274
275static const struct clk_init_data isp_xclk_init_data = {
276 .name = "cam_xclk",
277 .ops = &isp_xclk_ops,
278 .parent_names = &isp_xclk_parent_name,
279 .num_parents = 1,
280};
281
282static int isp_xclk_init(struct isp_device *isp)
283{
284 struct isp_platform_data *pdata = isp->pdata;
285 struct clk_init_data init;
286 unsigned int i;
287
f8e2ff26
SN		 288 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
289 isp->xclks[i].clk = ERR_PTR(-EINVAL);
290
9b28ee3c
LP		 291 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
292 struct isp_xclk *xclk = &isp->xclks[i];
9b28ee3c
LP		 293
294 xclk->isp = isp;
295 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
296 xclk->divider = 1;
297 spin_lock_init(&xclk->lock);
298
299 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
300 init.ops = &isp_xclk_ops;
301 init.parent_names = &isp_xclk_parent_name;
302 init.num_parents = 1;
303
304 xclk->hw.init = &init;
f8e2ff26
SN		 305 /*
306 * The first argument is NULL in order to avoid circular
307 * reference, as this driver takes reference on the
308 * sensor subdevice modules and the sensors would take
309 * reference on this module through clk_get().
310 */
311 xclk->clk = clk_register(NULL, &xclk->hw);
312 if (IS_ERR(xclk->clk))
313 return PTR_ERR(xclk->clk);
9b28ee3c
LP		 314
315 if (pdata->xclks[i].con_id == NULL &&
316 pdata->xclks[i].dev_id == NULL)
317 continue;
318
319 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
320 if (xclk->lookup == NULL)
321 return -ENOMEM;
322
323 xclk->lookup->con_id = pdata->xclks[i].con_id;
324 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
f8e2ff26 325 xclk->lookup->clk = xclk->clk;
9b28ee3c
LP		 326
327 clkdev_add(xclk->lookup);
328 }
329
330 return 0;
331}
332
333static void isp_xclk_cleanup(struct isp_device *isp)
334{
335 unsigned int i;
336
337 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
338 struct isp_xclk *xclk = &isp->xclks[i];
339
f8e2ff26
SN		 340 if (!IS_ERR(xclk->clk))
341 clk_unregister(xclk->clk);
342
9b28ee3c
LP		 343 if (xclk->lookup)
344 clkdev_drop(xclk->lookup);
345 }
346}
347
348/* -----------------------------------------------------------------------------
349 * Interrupts
350 */
351
448de7e7
SA		 352/*
353 * isp_enable_interrupts - Enable ISP interrupts.
354 * @isp: OMAP3 ISP device
355 */
356static void isp_enable_interrupts(struct isp_device *isp)
357{
358 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
359 | IRQ0ENABLE_CSIB_IRQ
360 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
361 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
362 | IRQ0ENABLE_CCDC_VD0_IRQ
363 | IRQ0ENABLE_CCDC_VD1_IRQ
364 | IRQ0ENABLE_HS_VS_IRQ
365 | IRQ0ENABLE_HIST_DONE_IRQ
366 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
367 | IRQ0ENABLE_H3A_AF_DONE_IRQ
368 | IRQ0ENABLE_PRV_DONE_IRQ
369 | IRQ0ENABLE_RSZ_DONE_IRQ;
370
371 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
372 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
373}
374
375/*
376 * isp_disable_interrupts - Disable ISP interrupts.
377 * @isp: OMAP3 ISP device
378 */
379static void isp_disable_interrupts(struct isp_device *isp)
380{
381 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
382}
383
448de7e7 384/*
96d62ae2 385 * isp_core_init - ISP core settings
448de7e7
SA		 386 * @isp: OMAP3 ISP device
387 * @idle: Consider idle state.
388 *
25aeb418 389 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP		 390 * interrupt source.
391 *
392 * We need to configure the HS/VS interrupt source before interrupts get
393 * enabled, as the sensor might be free-running and the ISP default setting
394 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 395 */
96d62ae2 396static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 397{
398 isp_reg_writel(isp,
399 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
400 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
401 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
402 ((isp->revision == ISP_REVISION_15_0) ?
403 ISP_SYSCONFIG_AUTOIDLE : 0),
404 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
405
96d62ae2
LP		 406 isp_reg_writel(isp,
407 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
408 ISPCTRL_SYNC_DETECT_VSRISE,
409 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 410}
411
412/*
413 * Configure the bridge and lane shifter. Valid inputs are
414 *
415 * CCDC_INPUT_PARALLEL: Parallel interface
416 * CCDC_INPUT_CSI2A: CSI2a receiver
417 * CCDC_INPUT_CCP2B: CCP2b receiver
418 * CCDC_INPUT_CSI2C: CSI2c receiver
419 *
420 * The bridge and lane shifter are configured according to the selected input
421 * and the ISP platform data.
422 */
423void omap3isp_configure_bridge(struct isp_device *isp,
424 enum ccdc_input_entity input,
c09af044 425 const struct isp_parallel_platform_data *pdata,
c51364ca 426 unsigned int shift, unsigned int bridge)
448de7e7
SA		 427{
428 u32 ispctrl_val;
429
430 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
431 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
432 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
433 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
434 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 435 ispctrl_val |= bridge;
448de7e7
SA		 436
437 switch (input) {
438 case CCDC_INPUT_PARALLEL:
439 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7 440 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
c09af044 441 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 442 break;
443
444 case CCDC_INPUT_CSI2A:
445 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
446 break;
447
448 case CCDC_INPUT_CCP2B:
449 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
450 break;
451
452 case CCDC_INPUT_CSI2C:
453 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
454 break;
455
456 default:
457 return;
458 }
459
c09af044
MJ		 460 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
461
448de7e7
SA		 462 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
463}
464
448de7e7
SA		 465void omap3isp_hist_dma_done(struct isp_device *isp)
466{
467 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
468 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
469 /* Histogram cannot be enabled in this frame anymore */
470 atomic_set(&isp->isp_hist.buf_err, 1);
471 dev_dbg(isp->dev, "hist: Out of synchronization with "
472 "CCDC. Ignoring next buffer.\n");
473 }
474}
475
476static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
477{
478 static const char *name[] = {
479 "CSIA_IRQ",
480 "res1",
481 "res2",
482 "CSIB_LCM_IRQ",
483 "CSIB_IRQ",
484 "res5",
485 "res6",
486 "res7",
487 "CCDC_VD0_IRQ",
488 "CCDC_VD1_IRQ",
489 "CCDC_VD2_IRQ",
490 "CCDC_ERR_IRQ",
491 "H3A_AF_DONE_IRQ",
492 "H3A_AWB_DONE_IRQ",
493 "res14",
494 "res15",
495 "HIST_DONE_IRQ",
496 "CCDC_LSC_DONE",
497 "CCDC_LSC_PREFETCH_COMPLETED",
498 "CCDC_LSC_PREFETCH_ERROR",
499 "PRV_DONE_IRQ",
500 "CBUFF_IRQ",
501 "res22",
502 "res23",
503 "RSZ_DONE_IRQ",
504 "OVF_IRQ",
505 "res26",
506 "res27",
507 "MMU_ERR_IRQ",
508 "OCP_ERR_IRQ",
509 "SEC_ERR_IRQ",
510 "HS_VS_IRQ",
511 };
512 int i;
513
6c20c635 514 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 515
516 for (i = 0; i < ARRAY_SIZE(name); i++) {
517 if ((1 << i) & irqstatus)
518 printk(KERN_CONT "%s ", name[i]);
519 }
520 printk(KERN_CONT "\n");
521}
522
523static void isp_isr_sbl(struct isp_device *isp)
524{
525 struct device *dev = isp->dev;
875e2e3e 526 struct isp_pipeline *pipe;
448de7e7
SA		 527 u32 sbl_pcr;
528
529 /*
530 * Handle shared buffer logic overflows for video buffers.
531 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
532 */
533 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
534 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
535 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
536
537 if (sbl_pcr)
538 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
539
875e2e3e
LP		 540 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
541 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
542 if (pipe != NULL)
543 pipe->error = true;
544 }
545
546 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
547 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
548 if (pipe != NULL)
549 pipe->error = true;
550 }
551
552 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
553 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
554 if (pipe != NULL)
555 pipe->error = true;
448de7e7
SA		 556 }
557
558 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 559 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
560 if (pipe != NULL)
561 pipe->error = true;
448de7e7
SA		 562 }
563
564 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
565 | ISPSBL_PCR_RSZ2_WBL_OVF
566 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 567 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
568 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
569 if (pipe != NULL)
570 pipe->error = true;
571 }
448de7e7
SA		 572
573 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
574 omap3isp_stat_sbl_overflow(&isp->isp_af);
575
576 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
577 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
578}
579
580/*
581 * isp_isr - Interrupt Service Routine for Camera ISP module.
582 * @irq: Not used currently.
583 * @_isp: Pointer to the OMAP3 ISP device
584 *
585 * Handles the corresponding callback if plugged in.
448de7e7
SA		 586 */
587static irqreturn_t isp_isr(int irq, void *_isp)
588{
589 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
590 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
591 IRQ0STATUS_CCDC_VD0_IRQ |
592 IRQ0STATUS_CCDC_VD1_IRQ |
593 IRQ0STATUS_HS_VS_IRQ;
594 struct isp_device *isp = _isp;
595 u32 irqstatus;
448de7e7
SA		 596
597 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
598 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
599
600 isp_isr_sbl(isp);
601
875e2e3e
LP		 602 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
603 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 604
875e2e3e
LP		 605 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
606 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 607
608 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
609 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
610 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
611 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
612 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
613 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
614 omap3isp_stat_isr_frame_sync(&isp->isp_af);
615 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
616 }
617
618 if (irqstatus & ccdc_events)
619 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
620
621 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
622 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
623 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
624 omap3isp_preview_isr(&isp->isp_prev);
625 }
626
627 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
628 omap3isp_resizer_isr(&isp->isp_res);
629
630 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
631 omap3isp_stat_isr(&isp->isp_aewb);
632
633 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
634 omap3isp_stat_isr(&isp->isp_af);
635
636 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
637 omap3isp_stat_isr(&isp->isp_hist);
638
639 omap3isp_flush(isp);
640
641#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
642 isp_isr_dbg(isp, irqstatus);
643#endif
644
645 return IRQ_HANDLED;
646}
647
648/* -----------------------------------------------------------------------------
649 * Pipeline power management
650 *
651 * Entities must be powered up when part of a pipeline that contains at least
652 * one open video device node.
653 *
654 * To achieve this use the entity use_count field to track the number of users.
655 * For entities corresponding to video device nodes the use_count field stores
656 * the users count of the node. For entities corresponding to subdevs the
657 * use_count field stores the total number of users of all video device nodes
658 * in the pipeline.
659 *
660 * The omap3isp_pipeline_pm_use() function must be called in the open() and
661 * close() handlers of video device nodes. It increments or decrements the use
662 * count of all subdev entities in the pipeline.
663 *
664 * To react to link management on powered pipelines, the link setup notification
665 * callback updates the use count of all entities in the source and sink sides
666 * of the link.
667 */
668
669/*
670 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
671 * @entity: The entity
672 *
673 * Return the total number of users of all video device nodes in the pipeline.
674 */
675static int isp_pipeline_pm_use_count(struct media_entity *entity)
676{
677 struct media_entity_graph graph;
678 int use = 0;
679
680 media_entity_graph_walk_start(&graph, entity);
681
682 while ((entity = media_entity_graph_walk_next(&graph))) {
683 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
684 use += entity->use_count;
685 }
686
687 return use;
688}
689
690/*
691 * isp_pipeline_pm_power_one - Apply power change to an entity
692 * @entity: The entity
693 * @change: Use count change
694 *
695 * Change the entity use count by @change. If the entity is a subdev update its
696 * power state by calling the core::s_power operation when the use count goes
697 * from 0 to != 0 or from != 0 to 0.
698 *
699 * Return 0 on success or a negative error code on failure.
700 */
701static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
702{
703 struct v4l2_subdev *subdev;
704 int ret;
705
706 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
707 ? media_entity_to_v4l2_subdev(entity) : NULL;
708
709 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
710 ret = v4l2_subdev_call(subdev, core, s_power, 1);
711 if (ret < 0 && ret != -ENOIOCTLCMD)
712 return ret;
713 }
714
715 entity->use_count += change;
716 WARN_ON(entity->use_count < 0);
717
718 if (entity->use_count == 0 && change < 0 && subdev != NULL)
719 v4l2_subdev_call(subdev, core, s_power, 0);
720
721 return 0;
722}
723
724/*
725 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
726 * @entity: The entity
727 * @change: Use count change
728 *
729 * Walk the pipeline to update the use count and the power state of all non-node
730 * entities.
731 *
732 * Return 0 on success or a negative error code on failure.
733 */
734static int isp_pipeline_pm_power(struct media_entity *entity, int change)
735{
736 struct media_entity_graph graph;
737 struct media_entity *first = entity;
738 int ret = 0;
739
740 if (!change)
741 return 0;
742
743 media_entity_graph_walk_start(&graph, entity);
744
745 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
746 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
747 ret = isp_pipeline_pm_power_one(entity, change);
748
749 if (!ret)
750 return 0;
751
752 media_entity_graph_walk_start(&graph, first);
753
754 while ((first = media_entity_graph_walk_next(&graph))
755 && first != entity)
756 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
757 isp_pipeline_pm_power_one(first, -change);
758
759 return ret;
760}
761
762/*
763 * omap3isp_pipeline_pm_use - Update the use count of an entity
764 * @entity: The entity
765 * @use: Use (1) or stop using (0) the entity
766 *
767 * Update the use count of all entities in the pipeline and power entities on or
768 * off accordingly.
769 *
770 * Return 0 on success or a negative error code on failure. Powering entities
771 * off is assumed to never fail. No failure can occur when the use parameter is
772 * set to 0.
773 */
774int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
775{
776 int change = use ? 1 : -1;
777 int ret;
778
779 mutex_lock(&entity->parent->graph_mutex);
780
781 /* Apply use count to node. */
782 entity->use_count += change;
783 WARN_ON(entity->use_count < 0);
784
785 /* Apply power change to connected non-nodes. */
786 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 787 if (ret < 0)
788 entity->use_count -= change;
448de7e7
SA		 789
790 mutex_unlock(&entity->parent->graph_mutex);
791
792 return ret;
793}
794
795/*
796 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 797 * @link: The link
448de7e7 798 * @flags: New link flags that will be applied
813f5c0a 799 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 800 *
801 * React to link management on powered pipelines by updating the use count of
802 * all entities in the source and sink sides of the link. Entities are powered
803 * on or off accordingly.
804 *
805 * Return 0 on success or a negative error code on failure. Powering entities
806 * off is assumed to never fail. This function will not fail for disconnection
807 * events.
808 */
813f5c0a
SN		 809static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
810 unsigned int notification)
448de7e7 811{
813f5c0a
SN		 812 struct media_entity *source = link->source->entity;
813 struct media_entity *sink = link->sink->entity;
814 int source_use = isp_pipeline_pm_use_count(source);
815 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA		 816 int ret;
817
813f5c0a
SN		 818 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
819 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 820 /* Powering off entities is assumed to never fail. */
813f5c0a
SN		 821 isp_pipeline_pm_power(source, -sink_use);
822 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA		 823 return 0;
824 }
825
813f5c0a
SN		 826 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
827 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 828
813f5c0a
SN		 829 ret = isp_pipeline_pm_power(source, sink_use);
830 if (ret < 0)
831 return ret;
448de7e7 832
813f5c0a
SN		 833 ret = isp_pipeline_pm_power(sink, source_use);
834 if (ret < 0)
835 isp_pipeline_pm_power(source, -sink_use);
836
837 return ret;
838 }
839
840 return 0;
448de7e7
SA		 841}
842
843/* -----------------------------------------------------------------------------
844 * Pipeline stream management
845 */
846
847/*
848 * isp_pipeline_enable - Enable streaming on a pipeline
849 * @pipe: ISP pipeline
850 * @mode: Stream mode (single shot or continuous)
851 *
852 * Walk the entities chain starting at the pipeline output video node and start
853 * all modules in the chain in the given mode.
854 *
25985edc 855 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 856 * operation otherwise.
857 */
858static int isp_pipeline_enable(struct isp_pipeline *pipe,
859 enum isp_pipeline_stream_state mode)
860{
861 struct isp_device *isp = pipe->output->isp;
862 struct media_entity *entity;
863 struct media_pad *pad;
864 struct v4l2_subdev *subdev;
865 unsigned long flags;
c62e2a19 866 int ret;
448de7e7 867
112eee0c
LP		 868 /* Refuse to start streaming if an entity included in the pipeline has
869 * crashed. This check must be performed before the loop below to avoid
870 * starting entities if the pipeline won't start anyway (those entities
871 * would then likely fail to stop, making the problem worse).
1567bb7d 872 */
112eee0c 873 if (pipe->entities & isp->crashed)
1567bb7d
LP		 874 return -EIO;
875
448de7e7
SA		 876 spin_lock_irqsave(&pipe->lock, flags);
877 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
878 spin_unlock_irqrestore(&pipe->lock, flags);
879
880 pipe->do_propagation = false;
881
882 entity = &pipe->output->video.entity;
883 while (1) {
884 pad = &entity->pads[0];
885 if (!(pad->flags & MEDIA_PAD_FL_SINK))
886 break;
887
1bddf1b3 888 pad = media_entity_remote_pad(pad);
448de7e7
SA		 889 if (pad == NULL ||
890 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
891 break;
892
893 entity = pad->entity;
894 subdev = media_entity_to_v4l2_subdev(entity);
895
896 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
897 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 898 return ret;
448de7e7
SA		 899
900 if (subdev == &isp->isp_ccdc.subdev) {
901 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
902 s_stream, mode);
903 v4l2_subdev_call(&isp->isp_af.subdev, video,
904 s_stream, mode);
905 v4l2_subdev_call(&isp->isp_hist.subdev, video,
906 s_stream, mode);
907 pipe->do_propagation = true;
908 }
909 }
910
c62e2a19 911 return 0;
448de7e7
SA		 912}
913
914static int isp_pipeline_wait_resizer(struct isp_device *isp)
915{
916 return omap3isp_resizer_busy(&isp->isp_res);
917}
918
919static int isp_pipeline_wait_preview(struct isp_device *isp)
920{
921 return omap3isp_preview_busy(&isp->isp_prev);
922}
923
924static int isp_pipeline_wait_ccdc(struct isp_device *isp)
925{
926 return omap3isp_stat_busy(&isp->isp_af)
927 || omap3isp_stat_busy(&isp->isp_aewb)
928 || omap3isp_stat_busy(&isp->isp_hist)
929 || omap3isp_ccdc_busy(&isp->isp_ccdc);
930}
931
932#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
933
934static int isp_pipeline_wait(struct isp_device *isp,
935 int(*busy)(struct isp_device *isp))
936{
937 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
938
939 while (!time_after(jiffies, timeout)) {
940 if (!busy(isp))
941 return 0;
942 }
943
944 return 1;
945}
946
947/*
948 * isp_pipeline_disable - Disable streaming on a pipeline
949 * @pipe: ISP pipeline
950 *
951 * Walk the entities chain starting at the pipeline output video node and stop
952 * all modules in the chain. Wait synchronously for the modules to be stopped if
953 * necessary.
954 *
955 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
956 * can't be stopped (in which case a software reset of the ISP is probably
957 * necessary).
958 */
959static int isp_pipeline_disable(struct isp_pipeline *pipe)
960{
961 struct isp_device *isp = pipe->output->isp;
962 struct media_entity *entity;
963 struct media_pad *pad;
964 struct v4l2_subdev *subdev;
965 int failure = 0;
966 int ret;
967
968 /*
969 * We need to stop all the modules after CCDC first or they'll
970 * never stop since they may not get a full frame from CCDC.
971 */
972 entity = &pipe->output->video.entity;
973 while (1) {
974 pad = &entity->pads[0];
975 if (!(pad->flags & MEDIA_PAD_FL_SINK))
976 break;
977
1bddf1b3 978 pad = media_entity_remote_pad(pad);
448de7e7
SA		 979 if (pad == NULL ||
980 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
981 break;
982
983 entity = pad->entity;
984 subdev = media_entity_to_v4l2_subdev(entity);
985
986 if (subdev == &isp->isp_ccdc.subdev) {
987 v4l2_subdev_call(&isp->isp_aewb.subdev,
988 video, s_stream, 0);
989 v4l2_subdev_call(&isp->isp_af.subdev,
990 video, s_stream, 0);
991 v4l2_subdev_call(&isp->isp_hist.subdev,
992 video, s_stream, 0);
993 }
994
eb228e89 995 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
448de7e7
SA		 996
997 if (subdev == &isp->isp_res.subdev)
eb228e89 998 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
448de7e7 999 else if (subdev == &isp->isp_prev.subdev)
eb228e89 1000 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
448de7e7 1001 else if (subdev == &isp->isp_ccdc.subdev)
eb228e89 1002 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
448de7e7 1003
112eee0c
LP		 1004 /* Handle stop failures. An entity that fails to stop can
1005 * usually just be restarted. Flag the stop failure nonetheless
1006 * to trigger an ISP reset the next time the device is released,
1007 * just in case.
1008 *
1009 * The preview engine is a special case. A failure to stop can
1010 * mean a hardware crash. When that happens the preview engine
1011 * won't respond to read/write operations on the L4 bus anymore,
1012 * resulting in a bus fault and a kernel oops next time it gets
1013 * accessed. Mark it as crashed to prevent pipelines including
1014 * it from being started.
1015 */
448de7e7
SA		 1016 if (ret) {
1017 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c
LP		 1018 isp->stop_failure = true;
1019 if (subdev == &isp->isp_prev.subdev)
1020 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 1021 failure = -ETIMEDOUT;
1022 }
1023 }
1024
1025 return failure;
1026}
1027
1028/*
1029 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1030 * @pipe: ISP pipeline
1031 * @state: Stream state (stopped, single shot or continuous)
1032 *
1033 * Set the pipeline to the given stream state. Pipelines can be started in
1034 * single-shot or continuous mode.
1035 *
25985edc 1036 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1037 * operation otherwise. The pipeline state is not updated when the operation
1038 * fails, except when stopping the pipeline.
448de7e7
SA		 1039 */
1040int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1041 enum isp_pipeline_stream_state state)
1042{
1043 int ret;
1044
1045 if (state == ISP_PIPELINE_STREAM_STOPPED)
1046 ret = isp_pipeline_disable(pipe);
1047 else
1048 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1049
1050 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1051 pipe->stream_state = state;
448de7e7
SA		 1052
1053 return ret;
1054}
1055
661112cb
LP		 1056/*
1057 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1058 * @pipe: ISP pipeline
1059 *
1060 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1061 * erroneous and makes sure no new buffer can be queued. This function is called
1062 * when a fatal error that prevents any further operation on the pipeline
1063 * occurs.
1064 */
1065void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1066{
1067 if (pipe->input)
1068 omap3isp_video_cancel_stream(pipe->input);
1069 if (pipe->output)
1070 omap3isp_video_cancel_stream(pipe->output);
1071}
1072
448de7e7
SA		 1073/*
1074 * isp_pipeline_resume - Resume streaming on a pipeline
1075 * @pipe: ISP pipeline
1076 *
1077 * Resume video output and input and re-enable pipeline.
1078 */
1079static void isp_pipeline_resume(struct isp_pipeline *pipe)
1080{
1081 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1082
1083 omap3isp_video_resume(pipe->output, !singleshot);
1084 if (singleshot)
1085 omap3isp_video_resume(pipe->input, 0);
1086 isp_pipeline_enable(pipe, pipe->stream_state);
1087}
1088
1089/*
1090 * isp_pipeline_suspend - Suspend streaming on a pipeline
1091 * @pipe: ISP pipeline
1092 *
1093 * Suspend pipeline.
1094 */
1095static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1096{
1097 isp_pipeline_disable(pipe);
1098}
1099
1100/*
1101 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1102 * video node
1103 * @me: ISP module's media entity
1104 *
1105 * Returns 1 if the entity has an enabled link to the output video node or 0
1106 * otherwise. It's true only while pipeline can have no more than one output
1107 * node.
1108 */
1109static int isp_pipeline_is_last(struct media_entity *me)
1110{
1111 struct isp_pipeline *pipe;
1112 struct media_pad *pad;
1113
1114 if (!me->pipe)
1115 return 0;
1116 pipe = to_isp_pipeline(me);
1117 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1118 return 0;
1bddf1b3 1119 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1120 return pad->entity == me;
1121}
1122
1123/*
1124 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1125 * @me: ISP module's media entity
1126 *
1127 * Suspend the whole pipeline if module's entity has an enabled link to the
1128 * output video node. It works only while pipeline can have no more than one
1129 * output node.
1130 */
1131static void isp_suspend_module_pipeline(struct media_entity *me)
1132{
1133 if (isp_pipeline_is_last(me))
1134 isp_pipeline_suspend(to_isp_pipeline(me));
1135}
1136
1137/*
1138 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1139 * @me: ISP module's media entity
1140 *
1141 * Resume the whole pipeline if module's entity has an enabled link to the
1142 * output video node. It works only while pipeline can have no more than one
1143 * output node.
1144 */
1145static void isp_resume_module_pipeline(struct media_entity *me)
1146{
1147 if (isp_pipeline_is_last(me))
1148 isp_pipeline_resume(to_isp_pipeline(me));
1149}
1150
1151/*
1152 * isp_suspend_modules - Suspend ISP submodules.
1153 * @isp: OMAP3 ISP device
1154 *
1155 * Returns 0 if suspend left in idle state all the submodules properly,
1156 * or returns 1 if a general Reset is required to suspend the submodules.
1157 */
1158static int isp_suspend_modules(struct isp_device *isp)
1159{
1160 unsigned long timeout;
1161
1162 omap3isp_stat_suspend(&isp->isp_aewb);
1163 omap3isp_stat_suspend(&isp->isp_af);
1164 omap3isp_stat_suspend(&isp->isp_hist);
1165 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1166 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1167 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1168 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1169 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1170
1171 timeout = jiffies + ISP_STOP_TIMEOUT;
1172 while (omap3isp_stat_busy(&isp->isp_af)
1173 || omap3isp_stat_busy(&isp->isp_aewb)
1174 || omap3isp_stat_busy(&isp->isp_hist)
1175 || omap3isp_preview_busy(&isp->isp_prev)
1176 || omap3isp_resizer_busy(&isp->isp_res)
1177 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1178 if (time_after(jiffies, timeout)) {
1179 dev_info(isp->dev, "can't stop modules.\n");
1180 return 1;
1181 }
1182 msleep(1);
1183 }
1184
1185 return 0;
1186}
1187
1188/*
1189 * isp_resume_modules - Resume ISP submodules.
1190 * @isp: OMAP3 ISP device
1191 */
1192static void isp_resume_modules(struct isp_device *isp)
1193{
1194 omap3isp_stat_resume(&isp->isp_aewb);
1195 omap3isp_stat_resume(&isp->isp_af);
1196 omap3isp_stat_resume(&isp->isp_hist);
1197 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1198 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1199 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1200 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1201 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1202}
1203
1204/*
1205 * isp_reset - Reset ISP with a timeout wait for idle.
1206 * @isp: OMAP3 ISP device
1207 */
1208static int isp_reset(struct isp_device *isp)
1209{
1210 unsigned long timeout = 0;
1211
1212 isp_reg_writel(isp,
1213 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1214 | ISP_SYSCONFIG_SOFTRESET,
1215 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1216 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1217 ISP_SYSSTATUS) & 0x1)) {
1218 if (timeout++ > 10000) {
1219 dev_alert(isp->dev, "cannot reset ISP\n");
1220 return -ETIMEDOUT;
1221 }
1222 udelay(1);
1223 }
1224
112eee0c 1225 isp->stop_failure = false;
1567bb7d 1226 isp->crashed = 0;
448de7e7
SA		 1227 return 0;
1228}
1229
1230/*
1231 * isp_save_context - Saves the values of the ISP module registers.
1232 * @isp: OMAP3 ISP device
1233 * @reg_list: Structure containing pairs of register address and value to
1234 * modify on OMAP.
1235 */
1236static void
1237isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1238{
1239 struct isp_reg *next = reg_list;
1240
1241 for (; next->reg != ISP_TOK_TERM; next++)
1242 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1243}
1244
1245/*
1246 * isp_restore_context - Restores the values of the ISP module registers.
1247 * @isp: OMAP3 ISP device
1248 * @reg_list: Structure containing pairs of register address and value to
1249 * modify on OMAP.
1250 */
1251static void
1252isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1253{
1254 struct isp_reg *next = reg_list;
1255
1256 for (; next->reg != ISP_TOK_TERM; next++)
1257 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1258}
1259
1260/*
1261 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1262 * @isp: OMAP3 ISP device
1263 *
1264 * Routine for saving the context of each module in the ISP.
1265 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1266 */
1267static void isp_save_ctx(struct isp_device *isp)
1268{
1269 isp_save_context(isp, isp_reg_list);
fabdbca8 1270 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1271}
1272
1273/*
1274 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1275 * @isp: OMAP3 ISP device
1276 *
1277 * Routine for restoring the context of each module in the ISP.
1278 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1279 */
1280static void isp_restore_ctx(struct isp_device *isp)
1281{
1282 isp_restore_context(isp, isp_reg_list);
fabdbca8 1283 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1284 omap3isp_ccdc_restore_context(isp);
1285 omap3isp_preview_restore_context(isp);
1286}
1287
1288/* -----------------------------------------------------------------------------
1289 * SBL resources management
1290 */
1291#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1292 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1293 OMAP3_ISP_SBL_PREVIEW_READ | \
1294 OMAP3_ISP_SBL_RESIZER_READ)
1295#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1296 OMAP3_ISP_SBL_CSI2A_WRITE | \
1297 OMAP3_ISP_SBL_CSI2C_WRITE | \
1298 OMAP3_ISP_SBL_CCDC_WRITE | \
1299 OMAP3_ISP_SBL_PREVIEW_WRITE)
1300
1301void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1302{
1303 u32 sbl = 0;
1304
1305 isp->sbl_resources |= res;
1306
1307 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1308 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1309
1310 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1311 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1312
1313 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1314 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1315
1316 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1317 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1318
1319 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1320 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1321
1322 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1323 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1324
1325 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1326}
1327
1328void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1329{
1330 u32 sbl = 0;
1331
1332 isp->sbl_resources &= ~res;
1333
1334 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1335 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1336
1337 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1338 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1339
1340 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1341 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1342
1343 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1344 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1345
1346 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1347 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1348
1349 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1350 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1351
1352 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1353}
1354
1355/*
1356 * isp_module_sync_idle - Helper to sync module with its idle state
1357 * @me: ISP submodule's media entity
1358 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1359 * @stopping: flag which tells module wants to stop
1360 *
1361 * This function checks if ISP submodule needs to wait for next interrupt. If
1362 * yes, makes the caller to sleep while waiting for such event.
1363 */
1364int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1365 atomic_t *stopping)
1366{
1367 struct isp_pipeline *pipe = to_isp_pipeline(me);
1368
1369 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1370 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1371 !isp_pipeline_ready(pipe)))
1372 return 0;
1373
1374 /*
1375 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1376 * scenario. We'll call it here to avoid race conditions.
1377 */
1378 atomic_set(stopping, 1);
1379 smp_mb();
1380
1381 /*
1382 * If module is the last one, it's writing to memory. In this case,
1383 * it's necessary to check if the module is already paused due to
1384 * DMA queue underrun or if it has to wait for next interrupt to be
1385 * idle.
1386 * If it isn't the last one, the function won't sleep but *stopping
1387 * will still be set to warn next submodule caller's interrupt the
1388 * module wants to be idle.
1389 */
1390 if (isp_pipeline_is_last(me)) {
1391 struct isp_video *video = pipe->output;
1392 unsigned long flags;
e8feb876 1393 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1394 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1395 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1396 atomic_set(stopping, 0);
1397 smp_mb();
1398 return 0;
1399 }
e8feb876 1400 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1401 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1402 msecs_to_jiffies(1000))) {
1403 atomic_set(stopping, 0);
1404 smp_mb();
1405 return -ETIMEDOUT;
1406 }
1407 }
1408
1409 return 0;
1410}
1411
1412/*
1e9c4d49 1413 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA		 1414 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1415 * @stopping: flag which tells module wants to stop
1416 *
1417 * This function checks if ISP submodule was stopping. In case of yes, it
1418 * notices the caller by setting stopping to 0 and waking up the wait queue.
1419 * Returns 1 if it was stopping or 0 otherwise.
1420 */
1421int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1422 atomic_t *stopping)
1423{
1424 if (atomic_cmpxchg(stopping, 1, 0)) {
1425 wake_up(wait);
1426 return 1;
1427 }
1428
1429 return 0;
1430}
1431
1432/* --------------------------------------------------------------------------
1433 * Clock management
1434 */
1435
1436#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1437 ISPCTRL_HIST_CLK_EN | \
1438 ISPCTRL_RSZ_CLK_EN | \
1439 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1440 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1441
1442static void __isp_subclk_update(struct isp_device *isp)
1443{
1444 u32 clk = 0;
1445
be9a1b98
LP		 1446 /* AEWB and AF share the same clock. */
1447 if (isp->subclk_resources &
1448 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1449 clk |= ISPCTRL_H3A_CLK_EN;
1450
1451 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1452 clk |= ISPCTRL_HIST_CLK_EN;
1453
1454 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1455 clk |= ISPCTRL_RSZ_CLK_EN;
1456
1457 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1458 * RAM as well.
448de7e7
SA		 1459 */
1460 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1461 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1462
1463 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1464 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1465
1466 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1467 ISPCTRL_CLKS_MASK, clk);
1468}
1469
1470void omap3isp_subclk_enable(struct isp_device *isp,
1471 enum isp_subclk_resource res)
1472{
1473 isp->subclk_resources |= res;
1474
1475 __isp_subclk_update(isp);
1476}
1477
1478void omap3isp_subclk_disable(struct isp_device *isp,
1479 enum isp_subclk_resource res)
1480{
1481 isp->subclk_resources &= ~res;
1482
1483 __isp_subclk_update(isp);
1484}
1485
1486/*
1487 * isp_enable_clocks - Enable ISP clocks
1488 * @isp: OMAP3 ISP device
1489 *
b057c3c3
LP		 1490 * Return 0 if successful, or clk_prepare_enable return value if any of them
1491 * fails.
448de7e7
SA		 1492 */
1493static int isp_enable_clocks(struct isp_device *isp)
1494{
1495 int r;
1496 unsigned long rate;
448de7e7 1497
b057c3c3 1498 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1499 if (r) {
b057c3c3 1500 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1501 goto out_clk_enable_ick;
1502 }
6d1aa02f 1503 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1504 if (r) {
6d1aa02f 1505 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1506 goto out_clk_enable_mclk;
1507 }
b057c3c3 1508 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1509 if (r) {
b057c3c3 1510 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1511 goto out_clk_enable_mclk;
1512 }
1513 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1514 if (rate != CM_CAM_MCLK_HZ)
1515 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1516 " expected : %d\n"
1517 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1518 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1519 if (r) {
b057c3c3 1520 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1521 goto out_clk_enable_csi2_fclk;
1522 }
1523 return 0;
1524
1525out_clk_enable_csi2_fclk:
b057c3c3 1526 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1527out_clk_enable_mclk:
b057c3c3 1528 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1529out_clk_enable_ick:
1530 return r;
1531}
1532
1533/*
1534 * isp_disable_clocks - Disable ISP clocks
1535 * @isp: OMAP3 ISP device
1536 */
1537static void isp_disable_clocks(struct isp_device *isp)
1538{
b057c3c3
LP		 1539 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1540 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1541 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1542}
1543
1544static const char *isp_clocks[] = {
1545 "cam_ick",
1546 "cam_mclk",
448de7e7
SA		 1547 "csi2_96m_fck",
1548 "l3_ick",
1549};
1550
448de7e7
SA		 1551static int isp_get_clocks(struct isp_device *isp)
1552{
1553 struct clk *clk;
1554 unsigned int i;
1555
1556 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1557 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1558 if (IS_ERR(clk)) {
1559 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1560 return PTR_ERR(clk);
1561 }
1562
1563 isp->clock[i] = clk;
1564 }
1565
1566 return 0;
1567}
1568
1569/*
1570 * omap3isp_get - Acquire the ISP resource.
1571 *
1572 * Initializes the clocks for the first acquire.
1573 *
1574 * Increment the reference count on the ISP. If the first reference is taken,
1575 * enable clocks and power-up all submodules.
1576 *
25985edc 1577 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1578 */
96d62ae2 1579static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1580{
1581 struct isp_device *__isp = isp;
1582
1583 if (isp == NULL)
1584 return NULL;
1585
1586 mutex_lock(&isp->isp_mutex);
1587 if (isp->ref_count > 0)
1588 goto out;
1589
1590 if (isp_enable_clocks(isp) < 0) {
1591 __isp = NULL;
1592 goto out;
1593 }
1594
1595 /* We don't want to restore context before saving it! */
1596 if (isp->has_context)
1597 isp_restore_ctx(isp);
448de7e7 1598
96d62ae2
LP		 1599 if (irq)
1600 isp_enable_interrupts(isp);
448de7e7
SA		 1601
1602out:
1603 if (__isp != NULL)
1604 isp->ref_count++;
1605 mutex_unlock(&isp->isp_mutex);
1606
1607 return __isp;
1608}
1609
96d62ae2
LP		 1610struct isp_device *omap3isp_get(struct isp_device *isp)
1611{
1612 return __omap3isp_get(isp, true);
1613}
1614
448de7e7
SA		 1615/*
1616 * omap3isp_put - Release the ISP
1617 *
1618 * Decrement the reference count on the ISP. If the last reference is released,
1619 * power-down all submodules, disable clocks and free temporary buffers.
1620 */
2a0a5472 1621static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA		 1622{
1623 if (isp == NULL)
1624 return;
1625
1626 mutex_lock(&isp->isp_mutex);
1627 BUG_ON(isp->ref_count == 0);
1628 if (--isp->ref_count == 0) {
1629 isp_disable_interrupts(isp);
2a0a5472 1630 if (save_ctx) {
a32f2f90 1631 isp_save_ctx(isp);
96d62ae2
LP		 1632 isp->has_context = 1;
1633 }
1567bb7d
LP		 1634 /* Reset the ISP if an entity has failed to stop. This is the
1635 * only way to recover from such conditions.
1636 */
112eee0c 1637 if (isp->crashed || isp->stop_failure)
994d5375 1638 isp_reset(isp);
448de7e7
SA		 1639 isp_disable_clocks(isp);
1640 }
1641 mutex_unlock(&isp->isp_mutex);
1642}
1643
2a0a5472
LP		 1644void omap3isp_put(struct isp_device *isp)
1645{
1646 __omap3isp_put(isp, true);
1647}
1648
448de7e7
SA		 1649/* --------------------------------------------------------------------------
1650 * Platform device driver
1651 */
1652
1653/*
1654 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1655 * @isp: OMAP3 ISP device
1656 */
1657#define ISP_PRINT_REGISTER(isp, name)\
1658 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1659 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1660#define SBL_PRINT_REGISTER(isp, name)\
1661 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1662 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1663
1664void omap3isp_print_status(struct isp_device *isp)
1665{
1666 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1667
1668 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1669 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1670 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1671 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1672 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1673 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1674 ISP_PRINT_REGISTER(isp, CTRL);
1675 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1676 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1677 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1678 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1679 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1680 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1681 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1682 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1683
1684 SBL_PRINT_REGISTER(isp, PCR);
1685 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1686
1687 dev_dbg(isp->dev, "--------------------------------------------\n");
1688}
1689
1690#ifdef CONFIG_PM
1691
1692/*
1693 * Power management support.
1694 *
1695 * As the ISP can't properly handle an input video stream interruption on a non
1696 * frame boundary, the ISP pipelines need to be stopped before sensors get
1697 * suspended. However, as suspending the sensors can require a running clock,
1698 * which can be provided by the ISP, the ISP can't be completely suspended
1699 * before the sensor.
1700 *
1701 * To solve this problem power management support is split into prepare/complete
1702 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1703 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1704 * resume(), and the the pipelines are restarted in complete().
1705 *
39c1cb2b 1706 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA		 1707 * yet.
1708 */
1709static int isp_pm_prepare(struct device *dev)
1710{
1711 struct isp_device *isp = dev_get_drvdata(dev);
1712 int reset;
1713
1714 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1715
1716 if (isp->ref_count == 0)
1717 return 0;
1718
1719 reset = isp_suspend_modules(isp);
1720 isp_disable_interrupts(isp);
1721 isp_save_ctx(isp);
1722 if (reset)
1723 isp_reset(isp);
1724
1725 return 0;
1726}
1727
1728static int isp_pm_suspend(struct device *dev)
1729{
1730 struct isp_device *isp = dev_get_drvdata(dev);
1731
1732 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1733
1734 if (isp->ref_count)
1735 isp_disable_clocks(isp);
1736
1737 return 0;
1738}
1739
1740static int isp_pm_resume(struct device *dev)
1741{
1742 struct isp_device *isp = dev_get_drvdata(dev);
1743
1744 if (isp->ref_count == 0)
1745 return 0;
1746
1747 return isp_enable_clocks(isp);
1748}
1749
1750static void isp_pm_complete(struct device *dev)
1751{
1752 struct isp_device *isp = dev_get_drvdata(dev);
1753
1754 if (isp->ref_count == 0)
1755 return;
1756
1757 isp_restore_ctx(isp);
1758 isp_enable_interrupts(isp);
1759 isp_resume_modules(isp);
1760}
1761
1762#else
1763
1764#define isp_pm_prepare NULL
1765#define isp_pm_suspend NULL
1766#define isp_pm_resume NULL
1767#define isp_pm_complete NULL
1768
1769#endif /* CONFIG_PM */
1770
1771static void isp_unregister_entities(struct isp_device *isp)
1772{
1773 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1774 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1775 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1776 omap3isp_preview_unregister_entities(&isp->isp_prev);
1777 omap3isp_resizer_unregister_entities(&isp->isp_res);
1778 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1779 omap3isp_stat_unregister_entities(&isp->isp_af);
1780 omap3isp_stat_unregister_entities(&isp->isp_hist);
1781
1782 v4l2_device_unregister(&isp->v4l2_dev);
1783 media_device_unregister(&isp->media_dev);
1784}
1785
1786/*
1787 * isp_register_subdev_group - Register a group of subdevices
1788 * @isp: OMAP3 ISP device
1789 * @board_info: I2C subdevs board information array
1790 *
1791 * Register all I2C subdevices in the board_info array. The array must be
1792 * terminated by a NULL entry, and the first entry must be the sensor.
1793 *
1794 * Return a pointer to the sensor media entity if it has been successfully
1795 * registered, or NULL otherwise.
1796 */
1797static struct v4l2_subdev *
1798isp_register_subdev_group(struct isp_device *isp,
1799 struct isp_subdev_i2c_board_info *board_info)
1800{
1801 struct v4l2_subdev *sensor = NULL;
1802 unsigned int first;
1803
1804 if (board_info->board_info == NULL)
1805 return NULL;
1806
1807 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1808 struct v4l2_subdev *subdev;
1809 struct i2c_adapter *adapter;
1810
1811 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1812 if (adapter == NULL) {
4feca39b 1813 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
448de7e7
SA		 1814 "device %s\n", __func__,
1815 board_info->i2c_adapter_id,
1816 board_info->board_info->type);
1817 continue;
1818 }
1819
1820 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1821 board_info->board_info, NULL);
1822 if (subdev == NULL) {
4feca39b 1823 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
448de7e7
SA		 1824 __func__, board_info->board_info->type);
1825 continue;
1826 }
1827
1828 if (first)
1829 sensor = subdev;
1830 }
1831
1832 return sensor;
1833}
1834
1835static int isp_register_entities(struct isp_device *isp)
1836{
1837 struct isp_platform_data *pdata = isp->pdata;
1838 struct isp_v4l2_subdevs_group *subdevs;
1839 int ret;
1840
1841 isp->media_dev.dev = isp->dev;
1842 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1843 sizeof(isp->media_dev.model));
083eb078 1844 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1845 isp->media_dev.link_notify = isp_pipeline_link_notify;
1846 ret = media_device_register(&isp->media_dev);
1847 if (ret < 0) {
4feca39b 1848 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA		 1849 __func__, ret);
1850 return ret;
1851 }
1852
1853 isp->v4l2_dev.mdev = &isp->media_dev;
1854 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1855 if (ret < 0) {
4feca39b 1856 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1857 __func__, ret);
1858 goto done;
1859 }
1860
1861 /* Register internal entities */
1862 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1863 if (ret < 0)
1864 goto done;
1865
1866 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1867 if (ret < 0)
1868 goto done;
1869
1870 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1871 if (ret < 0)
1872 goto done;
1873
1874 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1875 &isp->v4l2_dev);
1876 if (ret < 0)
1877 goto done;
1878
1879 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1880 if (ret < 0)
1881 goto done;
1882
1883 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1884 if (ret < 0)
1885 goto done;
1886
1887 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1888 if (ret < 0)
1889 goto done;
1890
1891 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1892 if (ret < 0)
1893 goto done;
1894
1895 /* Register external entities */
ca4186f0 1896 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1897 struct v4l2_subdev *sensor;
1898 struct media_entity *input;
1899 unsigned int flags;
1900 unsigned int pad;
aab84f55 1901 unsigned int i;
448de7e7
SA		 1902
1903 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1904 if (sensor == NULL)
1905 continue;
1906
1907 sensor->host_priv = subdevs;
1908
1909 /* Connect the sensor to the correct interface module. Parallel
1910 * sensors are connected directly to the CCDC, while serial
1911 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1912 * through CSIPHY1 or CSIPHY2.
1913 */
1914 switch (subdevs->interface) {
1915 case ISP_INTERFACE_PARALLEL:
1916 input = &isp->isp_ccdc.subdev.entity;
1917 pad = CCDC_PAD_SINK;
1918 flags = 0;
1919 break;
1920
1921 case ISP_INTERFACE_CSI2A_PHY2:
1922 input = &isp->isp_csi2a.subdev.entity;
1923 pad = CSI2_PAD_SINK;
1924 flags = MEDIA_LNK_FL_IMMUTABLE
1925 | MEDIA_LNK_FL_ENABLED;
1926 break;
1927
1928 case ISP_INTERFACE_CCP2B_PHY1:
1929 case ISP_INTERFACE_CCP2B_PHY2:
1930 input = &isp->isp_ccp2.subdev.entity;
1931 pad = CCP2_PAD_SINK;
1932 flags = 0;
1933 break;
1934
1935 case ISP_INTERFACE_CSI2C_PHY1:
1936 input = &isp->isp_csi2c.subdev.entity;
1937 pad = CSI2_PAD_SINK;
1938 flags = MEDIA_LNK_FL_IMMUTABLE
1939 | MEDIA_LNK_FL_ENABLED;
1940 break;
1941
1942 default:
4feca39b
LP		 1943 dev_err(isp->dev, "%s: invalid interface type %u\n",
1944 __func__, subdevs->interface);
448de7e7
SA		 1945 ret = -EINVAL;
1946 goto done;
1947 }
1948
aab84f55
SA		 1949 for (i = 0; i < sensor->entity.num_pads; i++) {
1950 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1951 break;
1952 }
1953 if (i == sensor->entity.num_pads) {
1954 dev_err(isp->dev,
1955 "%s: no source pad in external entity\n",
1956 __func__);
448de7e7
SA		 1957 ret = -EINVAL;
1958 goto done;
1959 }
1960
aab84f55 1961 ret = media_entity_create_link(&sensor->entity, i, input, pad,
448de7e7
SA		 1962 flags);
1963 if (ret < 0)
1964 goto done;
1965 }
1966
1967 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1968
1969done:
1970 if (ret < 0)
1971 isp_unregister_entities(isp);
1972
1973 return ret;
1974}
1975
1976static void isp_cleanup_modules(struct isp_device *isp)
1977{
1978 omap3isp_h3a_aewb_cleanup(isp);
1979 omap3isp_h3a_af_cleanup(isp);
1980 omap3isp_hist_cleanup(isp);
1981 omap3isp_resizer_cleanup(isp);
1982 omap3isp_preview_cleanup(isp);
1983 omap3isp_ccdc_cleanup(isp);
1984 omap3isp_ccp2_cleanup(isp);
1985 omap3isp_csi2_cleanup(isp);
1986}
1987
1988static int isp_initialize_modules(struct isp_device *isp)
1989{
1990 int ret;
1991
1992 ret = omap3isp_csiphy_init(isp);
1993 if (ret < 0) {
1994 dev_err(isp->dev, "CSI PHY initialization failed\n");
1995 goto error_csiphy;
1996 }
1997
1998 ret = omap3isp_csi2_init(isp);
1999 if (ret < 0) {
2000 dev_err(isp->dev, "CSI2 initialization failed\n");
2001 goto error_csi2;
2002 }
2003
2004 ret = omap3isp_ccp2_init(isp);
2005 if (ret < 0) {
2006 dev_err(isp->dev, "CCP2 initialization failed\n");
2007 goto error_ccp2;
2008 }
2009
2010 ret = omap3isp_ccdc_init(isp);
2011 if (ret < 0) {
2012 dev_err(isp->dev, "CCDC initialization failed\n");
2013 goto error_ccdc;
2014 }
2015
2016 ret = omap3isp_preview_init(isp);
2017 if (ret < 0) {
2018 dev_err(isp->dev, "Preview initialization failed\n");
2019 goto error_preview;
2020 }
2021
2022 ret = omap3isp_resizer_init(isp);
2023 if (ret < 0) {
2024 dev_err(isp->dev, "Resizer initialization failed\n");
2025 goto error_resizer;
2026 }
2027
2028 ret = omap3isp_hist_init(isp);
2029 if (ret < 0) {
2030 dev_err(isp->dev, "Histogram initialization failed\n");
2031 goto error_hist;
2032 }
2033
2034 ret = omap3isp_h3a_aewb_init(isp);
2035 if (ret < 0) {
2036 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2037 goto error_h3a_aewb;
2038 }
2039
2040 ret = omap3isp_h3a_af_init(isp);
2041 if (ret < 0) {
2042 dev_err(isp->dev, "H3A AF initialization failed\n");
2043 goto error_h3a_af;
2044 }
2045
2046 /* Connect the submodules. */
2047 ret = media_entity_create_link(
2048 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2049 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2050 if (ret < 0)
2051 goto error_link;
2052
2053 ret = media_entity_create_link(
2054 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2055 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2056 if (ret < 0)
2057 goto error_link;
2058
2059 ret = media_entity_create_link(
2060 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2061 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2062 if (ret < 0)
2063 goto error_link;
2064
2065 ret = media_entity_create_link(
2066 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2067 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2068 if (ret < 0)
2069 goto error_link;
2070
2071 ret = media_entity_create_link(
2072 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2073 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2074 if (ret < 0)
2075 goto error_link;
2076
2077 ret = media_entity_create_link(
2078 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2079 &isp->isp_aewb.subdev.entity, 0,
2080 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2081 if (ret < 0)
2082 goto error_link;
2083
2084 ret = media_entity_create_link(
2085 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2086 &isp->isp_af.subdev.entity, 0,
2087 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2088 if (ret < 0)
2089 goto error_link;
2090
2091 ret = media_entity_create_link(
2092 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2093 &isp->isp_hist.subdev.entity, 0,
2094 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2095 if (ret < 0)
2096 goto error_link;
2097
2098 return 0;
2099
2100error_link:
2101 omap3isp_h3a_af_cleanup(isp);
2102error_h3a_af:
2103 omap3isp_h3a_aewb_cleanup(isp);
2104error_h3a_aewb:
2105 omap3isp_hist_cleanup(isp);
2106error_hist:
2107 omap3isp_resizer_cleanup(isp);
2108error_resizer:
2109 omap3isp_preview_cleanup(isp);
2110error_preview:
2111 omap3isp_ccdc_cleanup(isp);
2112error_ccdc:
2113 omap3isp_ccp2_cleanup(isp);
2114error_ccp2:
2115 omap3isp_csi2_cleanup(isp);
2116error_csi2:
2117error_csiphy:
2118 return ret;
2119}
2120
2a0a5472
LP		 2121static void isp_detach_iommu(struct isp_device *isp)
2122{
2123 arm_iommu_release_mapping(isp->mapping);
2124 isp->mapping = NULL;
2125 iommu_group_remove_device(isp->dev);
2126}
2127
2128static int isp_attach_iommu(struct isp_device *isp)
2129{
2130 struct dma_iommu_mapping *mapping;
2131 struct iommu_group *group;
2132 int ret;
2133
2134 /* Create a device group and add the device to it. */
2135 group = iommu_group_alloc();
2136 if (IS_ERR(group)) {
2137 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2138 return PTR_ERR(group);
2139 }
2140
2141 ret = iommu_group_add_device(group, isp->dev);
2142 iommu_group_put(group);
2143
2144 if (ret < 0) {
2145 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2146 return ret;
2147 }
2148
2149 /*
2150 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2151 * VAs. This will allocate a corresponding IOMMU domain.
2152 */
2153 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2154 if (IS_ERR(mapping)) {
2155 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2156 ret = PTR_ERR(mapping);
2157 goto error;
2158 }
2159
2160 isp->mapping = mapping;
2161
2162 /* Attach the ARM VA mapping to the device. */
2163 ret = arm_iommu_attach_device(isp->dev, mapping);
2164 if (ret < 0) {
2165 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2166 goto error;
2167 }
2168
2169 return 0;
2170
2171error:
2172 isp_detach_iommu(isp);
2173 return ret;
2174}
2175
448de7e7
SA		 2176/*
2177 * isp_remove - Remove ISP platform device
2178 * @pdev: Pointer to ISP platform device
2179 *
2180 * Always returns 0.
2181 */
4c62e976 2182static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2183{
2184 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7
SA		 2185
2186 isp_unregister_entities(isp);
2187 isp_cleanup_modules(isp);
9b28ee3c 2188 isp_xclk_cleanup(isp);
448de7e7 2189
96d62ae2 2190 __omap3isp_get(isp, false);
2a0a5472
LP		 2191 isp_detach_iommu(isp);
2192 __omap3isp_put(isp, false);
448de7e7 2193
448de7e7
SA		 2194 return 0;
2195}
2196
2197static int isp_map_mem_resource(struct platform_device *pdev,
2198 struct isp_device *isp,
2199 enum isp_mem_resources res)
2200{
2201 struct resource *mem;
2202
2203 /* request the mem region for the camera registers */
2204
2205 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
448de7e7
SA		 2206
2207 /* map the region */
fd8308b4
LP		 2208 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2209 if (IS_ERR(isp->mmio_base[res]))
2210 return PTR_ERR(isp->mmio_base[res]);
2211
2212 isp->mmio_base_phys[res] = mem->start;
448de7e7
SA		 2213
2214 return 0;
2215}
2216
2217/*
2218 * isp_probe - Probe ISP platform device
2219 * @pdev: Pointer to ISP platform device
2220 *
2221 * Returns 0 if successful,
2222 * -ENOMEM if no memory available,
2223 * -ENODEV if no platform device resources found
2224 * or no space for remapping registers,
2225 * -EINVAL if couldn't install ISR,
2226 * or clk_get return error value.
2227 */
4c62e976 2228static int isp_probe(struct platform_device *pdev)
448de7e7
SA		 2229{
2230 struct isp_platform_data *pdata = pdev->dev.platform_data;
2231 struct isp_device *isp;
2232 int ret;
2233 int i, m;
2234
2235 if (pdata == NULL)
2236 return -EINVAL;
2237
cf2b4cf6 2238 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2239 if (!isp) {
2240 dev_err(&pdev->dev, "could not allocate memory\n");
2241 return -ENOMEM;
2242 }
2243
2244 isp->autoidle = autoidle;
448de7e7
SA		 2245
2246 mutex_init(&isp->isp_mutex);
2247 spin_lock_init(&isp->stat_lock);
2248
2249 isp->dev = &pdev->dev;
2250 isp->pdata = pdata;
2251 isp->ref_count = 0;
2252
224ddca0
RK		 2253 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2254 if (ret)
2255 return ret;
448de7e7
SA		 2256
2257 platform_set_drvdata(pdev, isp);
2258
2259 /* Regulators */
cf2b4cf6
LP		 2260 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2261 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
448de7e7 2262
d8658bca
LP		 2263 /* Clocks
2264 *
2265 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2266 * manually to read the revision before calling __omap3isp_get().
2267 */
448de7e7
SA		 2268 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2269 if (ret < 0)
2270 goto error;
2271
2272 ret = isp_get_clocks(isp);
2273 if (ret < 0)
2274 goto error;
2275
d8658bca
LP		 2276 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2277 if (ret < 0)
2278 goto error;
2279
2280 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2281 dev_info(isp->dev, "Revision %d.%d found\n",
2282 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2283
2284 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2285
0bd0dbee
PST		 2286 if (__omap3isp_get(isp, false) == NULL) {
2287 ret = -ENODEV;
448de7e7 2288 goto error;
0bd0dbee 2289 }
448de7e7
SA		 2290
2291 ret = isp_reset(isp);
2292 if (ret < 0)
2293 goto error_isp;
2294
9b28ee3c
LP		 2295 ret = isp_xclk_init(isp);
2296 if (ret < 0)
2297 goto error_isp;
2298
448de7e7 2299 /* Memory resources */
448de7e7
SA		 2300 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2301 if (isp->revision == isp_res_maps[m].isp_rev)
2302 break;
2303
2304 if (m == ARRAY_SIZE(isp_res_maps)) {
2305 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2306 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2307 ret = -ENODEV;
2308 goto error_isp;
2309 }
2310
2311 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2312 if (isp_res_maps[m].map & 1 << i) {
2313 ret = isp_map_mem_resource(pdev, isp, i);
2314 if (ret)
2315 goto error_isp;
2316 }
2317 }
2318
2a0a5472
LP		 2319 /* IOMMU */
2320 ret = isp_attach_iommu(isp);
2321 if (ret < 0) {
2322 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC		 2323 goto error_isp;
2324 }
2325
448de7e7
SA		 2326 /* Interrupt */
2327 isp->irq_num = platform_get_irq(pdev, 0);
2328 if (isp->irq_num <= 0) {
2329 dev_err(isp->dev, "No IRQ resource\n");
2330 ret = -ENODEV;
2a0a5472 2331 goto error_iommu;
448de7e7
SA		 2332 }
2333
cf2b4cf6
LP		 2334 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2335 "OMAP3 ISP", isp)) {
448de7e7
SA		 2336 dev_err(isp->dev, "Unable to request IRQ\n");
2337 ret = -EINVAL;
2a0a5472 2338 goto error_iommu;
448de7e7
SA		 2339 }
2340
2341 /* Entities */
2342 ret = isp_initialize_modules(isp);
2343 if (ret < 0)
2a0a5472 2344 goto error_iommu;
448de7e7
SA		 2345
2346 ret = isp_register_entities(isp);
2347 if (ret < 0)
2348 goto error_modules;
2349
96d62ae2 2350 isp_core_init(isp, 1);
448de7e7
SA		 2351 omap3isp_put(isp);
2352
2353 return 0;
2354
2355error_modules:
2356 isp_cleanup_modules(isp);
2a0a5472
LP		 2357error_iommu:
2358 isp_detach_iommu(isp);
448de7e7 2359error_isp:
9b28ee3c 2360 isp_xclk_cleanup(isp);
2a0a5472 2361 __omap3isp_put(isp, false);
448de7e7 2362error:
ed33ac8e 2363 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2364
2365 return ret;
2366}
2367
2368static const struct dev_pm_ops omap3isp_pm_ops = {
2369 .prepare = isp_pm_prepare,
2370 .suspend = isp_pm_suspend,
2371 .resume = isp_pm_resume,
2372 .complete = isp_pm_complete,
2373};
2374
2375static struct platform_device_id omap3isp_id_table[] = {
2376 { "omap3isp", 0 },
2377 { },
2378};
2379MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2380
2381static struct platform_driver omap3isp_driver = {
2382 .probe = isp_probe,
4c62e976 2383 .remove = isp_remove,
448de7e7
SA		 2384 .id_table = omap3isp_id_table,
2385 .driver = {
448de7e7
SA		 2386 .name = "omap3isp",
2387 .pm = &omap3isp_pm_ops,
2388 },
2389};
2390
1d6629b1 2391module_platform_driver(omap3isp_driver);
448de7e7
SA		 2392
2393MODULE_AUTHOR("Nokia Corporation");
2394MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2395MODULE_LICENSE("GPL");
64dc3c1a 2396MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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