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[media] omap3isp: ccdc: Simplify the ccdc_isr_buffer() function
[deliverable/linux.git] / drivers / media / platform / omap3isp / ispccdc.c
CommitLineData
de1135d4
LP		 1/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
de1135d4
LP		 15 */
16
17#include <linux/module.h>
18#include <linux/uaccess.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/sched.h>
e74d83aa 24#include <linux/slab.h>
de1135d4
LP		 25#include <media/v4l2-event.h>
26
27#include "isp.h"
28#include "ispreg.h"
29#include "ispccdc.h"
30
a64909b8
LP		 31#define CCDC_MIN_WIDTH 32
32#define CCDC_MIN_HEIGHT 32
33
de1135d4
LP		 34static struct v4l2_mbus_framefmt *
35__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
36 unsigned int pad, enum v4l2_subdev_format_whence which);
37
38static const unsigned int ccdc_fmts[] = {
39 V4L2_MBUS_FMT_Y8_1X8,
5782f97b
MJ		 40 V4L2_MBUS_FMT_Y10_1X10,
41 V4L2_MBUS_FMT_Y12_1X12,
42 V4L2_MBUS_FMT_SGRBG8_1X8,
43 V4L2_MBUS_FMT_SRGGB8_1X8,
44 V4L2_MBUS_FMT_SBGGR8_1X8,
45 V4L2_MBUS_FMT_SGBRG8_1X8,
de1135d4
LP		 46 V4L2_MBUS_FMT_SGRBG10_1X10,
47 V4L2_MBUS_FMT_SRGGB10_1X10,
48 V4L2_MBUS_FMT_SBGGR10_1X10,
49 V4L2_MBUS_FMT_SGBRG10_1X10,
50 V4L2_MBUS_FMT_SGRBG12_1X12,
51 V4L2_MBUS_FMT_SRGGB12_1X12,
52 V4L2_MBUS_FMT_SBGGR12_1X12,
53 V4L2_MBUS_FMT_SGBRG12_1X12,
c51364ca
LP		 54 V4L2_MBUS_FMT_YUYV8_2X8,
55 V4L2_MBUS_FMT_UYVY8_2X8,
de1135d4
LP		 56};
57
58/*
59 * ccdc_print_status - Print current CCDC Module register values.
60 * @ccdc: Pointer to ISP CCDC device.
61 *
62 * Also prints other debug information stored in the CCDC module.
63 */
64#define CCDC_PRINT_REGISTER(isp, name)\
65 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
66 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
67
68static void ccdc_print_status(struct isp_ccdc_device *ccdc)
69{
70 struct isp_device *isp = to_isp_device(ccdc);
71
72 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
73
74 CCDC_PRINT_REGISTER(isp, PCR);
75 CCDC_PRINT_REGISTER(isp, SYN_MODE);
76 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
77 CCDC_PRINT_REGISTER(isp, PIX_LINES);
78 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
79 CCDC_PRINT_REGISTER(isp, VERT_START);
80 CCDC_PRINT_REGISTER(isp, VERT_LINES);
81 CCDC_PRINT_REGISTER(isp, CULLING);
82 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
83 CCDC_PRINT_REGISTER(isp, SDOFST);
84 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
85 CCDC_PRINT_REGISTER(isp, CLAMP);
86 CCDC_PRINT_REGISTER(isp, DCSUB);
87 CCDC_PRINT_REGISTER(isp, COLPTN);
88 CCDC_PRINT_REGISTER(isp, BLKCMP);
89 CCDC_PRINT_REGISTER(isp, FPC);
90 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
91 CCDC_PRINT_REGISTER(isp, VDINT);
92 CCDC_PRINT_REGISTER(isp, ALAW);
93 CCDC_PRINT_REGISTER(isp, REC656IF);
94 CCDC_PRINT_REGISTER(isp, CFG);
95 CCDC_PRINT_REGISTER(isp, FMTCFG);
96 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
97 CCDC_PRINT_REGISTER(isp, FMT_VERT);
98 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
99 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
100 CCDC_PRINT_REGISTER(isp, PRGODD0);
101 CCDC_PRINT_REGISTER(isp, PRGODD1);
102 CCDC_PRINT_REGISTER(isp, VP_OUT);
103 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
104 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
105 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
106 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
107
108 dev_dbg(isp->dev, "--------------------------------------------\n");
109}
110
111/*
112 * omap3isp_ccdc_busy - Get busy state of the CCDC.
113 * @ccdc: Pointer to ISP CCDC device.
114 */
115int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
116{
117 struct isp_device *isp = to_isp_device(ccdc);
118
119 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
120 ISPCCDC_PCR_BUSY;
121}
122
123/* -----------------------------------------------------------------------------
124 * Lens Shading Compensation
125 */
126
127/*
128 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
129 * @ccdc: Pointer to ISP CCDC device.
130 * @lsc_cfg: the LSC configuration to check.
131 *
132 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
133 */
134static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
135 struct omap3isp_ccdc_lsc_config *lsc_cfg)
136{
137 struct isp_device *isp = to_isp_device(ccdc);
138 struct v4l2_mbus_framefmt *format;
139 unsigned int paxel_width, paxel_height;
140 unsigned int paxel_shift_x, paxel_shift_y;
141 unsigned int min_width, min_height, min_size;
142 unsigned int input_width, input_height;
143
144 paxel_shift_x = lsc_cfg->gain_mode_m;
145 paxel_shift_y = lsc_cfg->gain_mode_n;
146
147 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
148 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
149 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
150 return -EINVAL;
151 }
152
153 if (lsc_cfg->offset & 3) {
154 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
155 "4\n");
156 return -EINVAL;
157 }
158
159 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
160 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
161 return -EINVAL;
162 }
163
164 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
165 V4L2_SUBDEV_FORMAT_ACTIVE);
166 input_width = format->width;
167 input_height = format->height;
168
169 /* Calculate minimum bytesize for validation */
170 paxel_width = 1 << paxel_shift_x;
171 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
172 >> paxel_shift_x) + 1;
173
174 paxel_height = 1 << paxel_shift_y;
175 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
176 >> paxel_shift_y) + 1;
177
178 min_size = 4 * min_width * min_height;
179 if (min_size > lsc_cfg->size) {
180 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
181 return -EINVAL;
182 }
183 if (lsc_cfg->offset < (min_width * 4)) {
184 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
185 return -EINVAL;
186 }
187 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
188 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
189 return -EINVAL;
190 }
191 return 0;
192}
193
194/*
195 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
196 * @ccdc: Pointer to ISP CCDC device.
197 */
d33186d0
LP		 198static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
199 dma_addr_t addr)
de1135d4
LP		 200{
201 isp_reg_writel(to_isp_device(ccdc), addr,
202 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
203}
204
205/*
206 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
207 * @ccdc: Pointer to ISP CCDC device.
208 */
209static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
210 struct omap3isp_ccdc_lsc_config *cfg)
211{
212 struct isp_device *isp = to_isp_device(ccdc);
213 int reg;
214
215 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
216 ISPCCDC_LSC_TABLE_OFFSET);
217
218 reg = 0;
219 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
220 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
221 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
222 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
223
224 reg = 0;
225 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
226 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
227 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
228 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
229 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
230 ISPCCDC_LSC_INITIAL);
231}
232
233static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
234{
235 struct isp_device *isp = to_isp_device(ccdc);
236 unsigned int wait;
237
238 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
239 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
240
241 /* timeout 1 ms */
242 for (wait = 0; wait < 1000; wait++) {
243 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
244 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
245 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
246 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
247 return 0;
248 }
249
250 rmb();
251 udelay(1);
252 }
253
254 return -ETIMEDOUT;
255}
256
257/*
258 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
259 * @ccdc: Pointer to ISP CCDC device.
260 * @enable: 0 Disables LSC, 1 Enables LSC.
261 */
262static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
263{
264 struct isp_device *isp = to_isp_device(ccdc);
265 const struct v4l2_mbus_framefmt *format =
266 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
267 V4L2_SUBDEV_FORMAT_ACTIVE);
268
269 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
270 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
271 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
272 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
273 return -EINVAL;
274
275 if (enable)
276 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
277
278 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
279 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
280
281 if (enable) {
282 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
283 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
284 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
285 ccdc->lsc.state = LSC_STATE_STOPPED;
25aeb418 286 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
de1135d4
LP		 287 return -ETIMEDOUT;
288 }
289 ccdc->lsc.state = LSC_STATE_RUNNING;
290 } else {
291 ccdc->lsc.state = LSC_STATE_STOPPING;
292 }
293
294 return 0;
295}
296
297static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
298{
299 struct isp_device *isp = to_isp_device(ccdc);
300
301 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
302 ISPCCDC_LSC_BUSY;
303}
304
305/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
306 * @ccdc: Pointer to ISP CCDC device
307 * @req: New configuration request
308 *
309 * context: in_interrupt()
310 */
311static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
312 struct ispccdc_lsc_config_req *req)
313{
314 if (!req->enable)
315 return -EINVAL;
316
317 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
318 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
319 return -EINVAL;
320 }
321
322 if (ccdc_lsc_busy(ccdc))
323 return -EBUSY;
324
325 ccdc_lsc_setup_regs(ccdc, &req->config);
d33186d0 326 ccdc_lsc_program_table(ccdc, req->table.dma);
de1135d4
LP		 327 return 0;
328}
329
330/*
331 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
332 * @ccdc: Pointer to ISP CCDC device.
333 *
334 * Disables LSC, and defers enablement to shadow registers update time.
335 */
336static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
337{
338 struct isp_device *isp = to_isp_device(ccdc);
339 /*
340 * From OMAP3 TRM: When this event is pending, the module
341 * goes into transparent mode (output =input). Normal
342 * operation can be resumed at the start of the next frame
343 * after:
344 * 1) Clearing this event
345 * 2) Disabling the LSC module
346 * 3) Enabling it
347 */
348 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
349 ISPCCDC_LSC_ENABLE);
350 ccdc->lsc.state = LSC_STATE_STOPPED;
351}
352
353static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
354 struct ispccdc_lsc_config_req *req)
355{
356 struct isp_device *isp = to_isp_device(ccdc);
357
358 if (req == NULL)
359 return;
360
d33186d0
LP		 361 if (req->table.addr) {
362 sg_free_table(&req->table.sgt);
363 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
364 req->table.dma);
365 }
366
de1135d4
LP		 367 kfree(req);
368}
369
370static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
371 struct list_head *queue)
372{
373 struct ispccdc_lsc_config_req *req, *n;
374 unsigned long flags;
375
376 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
377 list_for_each_entry_safe(req, n, queue, list) {
378 list_del(&req->list);
379 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
380 ccdc_lsc_free_request(ccdc, req);
381 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
382 }
383 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
384}
385
386static void ccdc_lsc_free_table_work(struct work_struct *work)
387{
388 struct isp_ccdc_device *ccdc;
389 struct ispccdc_lsc *lsc;
390
391 lsc = container_of(work, struct ispccdc_lsc, table_work);
392 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
393
394 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
395}
396
397/*
398 * ccdc_lsc_config - Configure the LSC module from a userspace request
399 *
400 * Store the request LSC configuration in the LSC engine request pointer. The
401 * configuration will be applied to the hardware when the CCDC will be enabled,
402 * or at the next LSC interrupt if the CCDC is already running.
403 */
404static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
405 struct omap3isp_ccdc_update_config *config)
406{
407 struct isp_device *isp = to_isp_device(ccdc);
408 struct ispccdc_lsc_config_req *req;
409 unsigned long flags;
de1135d4
LP		 410 u16 update;
411 int ret;
412
413 update = config->update &
414 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
415 if (!update)
416 return 0;
417
418 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
419 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
420 "need to be supplied\n", __func__);
421 return -EINVAL;
422 }
423
424 req = kzalloc(sizeof(*req), GFP_KERNEL);
425 if (req == NULL)
426 return -ENOMEM;
427
428 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
429 if (copy_from_user(&req->config, config->lsc_cfg,
430 sizeof(req->config))) {
431 ret = -EFAULT;
432 goto done;
433 }
434
435 req->enable = 1;
436
d33186d0
LP		 437 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
438 &req->table.dma,
439 GFP_KERNEL);
440 if (req->table.addr == NULL) {
de1135d4
LP		 441 ret = -ENOMEM;
442 goto done;
443 }
444
d33186d0
LP		 445 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
446 req->table.addr, req->table.dma,
447 req->config.size);
448 if (ret < 0)
de1135d4 449 goto done;
de1135d4 450
d33186d0
LP		 451 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
452 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4 453
d33186d0
LP		 454 if (copy_from_user(req->table.addr, config->lsc,
455 req->config.size)) {
de1135d4
LP		 456 ret = -EFAULT;
457 goto done;
458 }
459
d33186d0
LP		 460 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
461 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4
LP		 462 }
463
464 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
465 if (ccdc->lsc.request) {
466 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
467 schedule_work(&ccdc->lsc.table_work);
468 }
469 ccdc->lsc.request = req;
470 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
471
472 ret = 0;
473
474done:
475 if (ret < 0)
476 ccdc_lsc_free_request(ccdc, req);
477
478 return ret;
479}
480
481static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
482{
483 unsigned long flags;
484
485 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
486 if (ccdc->lsc.active) {
487 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
488 return 1;
489 }
490 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
491 return 0;
492}
493
494static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
495{
496 struct ispccdc_lsc *lsc = &ccdc->lsc;
497
498 if (lsc->state != LSC_STATE_STOPPED)
499 return -EINVAL;
500
501 if (lsc->active) {
502 list_add_tail(&lsc->active->list, &lsc->free_queue);
503 lsc->active = NULL;
504 }
505
506 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
507 omap3isp_sbl_disable(to_isp_device(ccdc),
508 OMAP3_ISP_SBL_CCDC_LSC_READ);
509 list_add_tail(&lsc->request->list, &lsc->free_queue);
510 lsc->request = NULL;
511 goto done;
512 }
513
514 lsc->active = lsc->request;
515 lsc->request = NULL;
516 __ccdc_lsc_enable(ccdc, 1);
517
518done:
519 if (!list_empty(&lsc->free_queue))
520 schedule_work(&lsc->table_work);
521
522 return 0;
523}
524
525/* -----------------------------------------------------------------------------
526 * Parameters configuration
527 */
528
529/*
530 * ccdc_configure_clamp - Configure optical-black or digital clamping
531 * @ccdc: Pointer to ISP CCDC device.
532 *
533 * The CCDC performs either optical-black or digital clamp. Configure and enable
534 * the selected clamp method.
535 */
536static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
537{
538 struct isp_device *isp = to_isp_device(ccdc);
539 u32 clamp;
540
541 if (ccdc->obclamp) {
542 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
543 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
544 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
545 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
546 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
547 } else {
548 isp_reg_writel(isp, ccdc->clamp.dcsubval,
549 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
550 }
551
552 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
553 ISPCCDC_CLAMP_CLAMPEN,
554 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
555}
556
557/*
558 * ccdc_configure_fpc - Configure Faulty Pixel Correction
559 * @ccdc: Pointer to ISP CCDC device.
560 */
561static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
562{
563 struct isp_device *isp = to_isp_device(ccdc);
564
565 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
566
567 if (!ccdc->fpc_en)
568 return;
569
c60e153d 570 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
de1135d4
LP		 571 ISPCCDC_FPC_ADDR);
572 /* The FPNUM field must be set before enabling FPC. */
573 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
574 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
575 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
576 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
577}
578
579/*
580 * ccdc_configure_black_comp - Configure Black Level Compensation.
581 * @ccdc: Pointer to ISP CCDC device.
582 */
583static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
584{
585 struct isp_device *isp = to_isp_device(ccdc);
586 u32 blcomp;
587
588 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
589 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
590 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
591 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
592
593 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
594}
595
596/*
597 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
598 * @ccdc: Pointer to ISP CCDC device.
599 */
600static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
601{
602 struct isp_device *isp = to_isp_device(ccdc);
603
604 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
605 ISPCCDC_SYN_MODE_LPF,
606 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
607}
608
609/*
610 * ccdc_configure_alaw - Configure A-law compression.
611 * @ccdc: Pointer to ISP CCDC device.
612 */
613static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
614{
615 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 616 const struct isp_format_info *info;
de1135d4
LP		 617 u32 alaw = 0;
618
73ea57eb
LP		 619 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
620
621 switch (info->width) {
de1135d4
LP		 622 case 8:
623 return;
624
625 case 10:
626 alaw = ISPCCDC_ALAW_GWDI_9_0;
627 break;
628 case 11:
629 alaw = ISPCCDC_ALAW_GWDI_10_1;
630 break;
631 case 12:
632 alaw = ISPCCDC_ALAW_GWDI_11_2;
633 break;
634 case 13:
635 alaw = ISPCCDC_ALAW_GWDI_12_3;
636 break;
637 }
638
639 if (ccdc->alaw)
640 alaw |= ISPCCDC_ALAW_CCDTBL;
641
642 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
643}
644
645/*
646 * ccdc_config_imgattr - Configure sensor image specific attributes.
647 * @ccdc: Pointer to ISP CCDC device.
648 * @colptn: Color pattern of the sensor.
649 */
650static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
651{
652 struct isp_device *isp = to_isp_device(ccdc);
653
654 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
655}
656
657/*
658 * ccdc_config - Set CCDC configuration from userspace
659 * @ccdc: Pointer to ISP CCDC device.
872aba51 660 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
de1135d4
LP		 661 *
662 * Returns 0 if successful, -EINVAL if the pointer to the configuration
663 * structure is null, or the copy_from_user function fails to copy user space
664 * memory to kernel space memory.
665 */
666static int ccdc_config(struct isp_ccdc_device *ccdc,
667 struct omap3isp_ccdc_update_config *ccdc_struct)
668{
669 struct isp_device *isp = to_isp_device(ccdc);
670 unsigned long flags;
671
672 spin_lock_irqsave(&ccdc->lock, flags);
673 ccdc->shadow_update = 1;
674 spin_unlock_irqrestore(&ccdc->lock, flags);
675
676 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
677 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
678 ccdc->update |= OMAP3ISP_CCDC_ALAW;
679 }
680
681 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
682 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
683 ccdc->update |= OMAP3ISP_CCDC_LPF;
684 }
685
686 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
687 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
688 sizeof(ccdc->clamp))) {
689 ccdc->shadow_update = 0;
690 return -EFAULT;
691 }
692
693 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
695 }
696
697 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
698 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
699 sizeof(ccdc->blcomp))) {
700 ccdc->shadow_update = 0;
701 return -EFAULT;
702 }
703
704 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
705 }
706
707 ccdc->shadow_update = 0;
708
709 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
c60e153d
LP		 710 struct omap3isp_ccdc_fpc fpc;
711 struct ispccdc_fpc fpc_old = { .addr = NULL, };
712 struct ispccdc_fpc fpc_new;
de1135d4
LP		 713 u32 size;
714
715 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
716 return -EBUSY;
717
718 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
719
720 if (ccdc->fpc_en) {
c60e153d 721 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
de1135d4
LP		 722 return -EFAULT;
723
c60e153d
LP		 724 size = fpc.fpnum * 4;
725
de1135d4 726 /*
c60e153d
LP		 727 * The table address must be 64-bytes aligned, which is
728 * guaranteed by dma_alloc_coherent().
de1135d4 729 */
c60e153d
LP		 730 fpc_new.fpnum = fpc.fpnum;
731 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
732 &fpc_new.dma,
733 GFP_KERNEL);
734 if (fpc_new.addr == NULL)
de1135d4
LP		 735 return -ENOMEM;
736
c60e153d
LP		 737 if (copy_from_user(fpc_new.addr,
738 (__force void __user *)fpc.fpcaddr,
739 size)) {
740 dma_free_coherent(isp->dev, size, fpc_new.addr,
741 fpc_new.dma);
de1135d4
LP		 742 return -EFAULT;
743 }
744
c60e153d
LP		 745 fpc_old = ccdc->fpc;
746 ccdc->fpc = fpc_new;
de1135d4
LP		 747 }
748
749 ccdc_configure_fpc(ccdc);
c60e153d
LP		 750
751 if (fpc_old.addr != NULL)
752 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
753 fpc_old.addr, fpc_old.dma);
de1135d4
LP		 754 }
755
756 return ccdc_lsc_config(ccdc, ccdc_struct);
757}
758
759static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
760{
761 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
762 ccdc_configure_alaw(ccdc);
763 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
764 }
765
766 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
767 ccdc_configure_lpf(ccdc);
768 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
769 }
770
771 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
772 ccdc_configure_clamp(ccdc);
773 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
774 }
775
776 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
777 ccdc_configure_black_comp(ccdc);
778 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
779 }
780}
781
782/*
783 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
872aba51 784 * @isp: Pointer to ISP device
de1135d4
LP		 785 */
786void omap3isp_ccdc_restore_context(struct isp_device *isp)
787{
788 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
789
790 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
791
792 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
793 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
794 ccdc_apply_controls(ccdc);
795 ccdc_configure_fpc(ccdc);
796}
797
798/* -----------------------------------------------------------------------------
799 * Format- and pipeline-related configuration helpers
800 */
801
802/*
803 * ccdc_config_vp - Configure the Video Port.
804 * @ccdc: Pointer to ISP CCDC device.
805 */
806static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
807{
808 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
809 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 810 const struct isp_format_info *info;
de1135d4
LP		 811 unsigned long l3_ick = pipe->l3_ick;
812 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
813 unsigned int div = 0;
814 u32 fmtcfg_vp;
815
816 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
817 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
818
73ea57eb
LP		 819 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
820
821 switch (info->width) {
de1135d4
LP		 822 case 8:
823 case 10:
824 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
825 break;
826 case 11:
827 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
828 break;
829 case 12:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
831 break;
832 case 13:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
834 break;
13eaaa7f 835 }
de1135d4
LP		 836
837 if (pipe->input)
838 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
c6c01f97
SA		 839 else if (pipe->external_rate)
840 div = l3_ick / pipe->external_rate;
de1135d4
LP		 841
842 div = clamp(div, 2U, max_div);
843 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
844
845 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
846}
847
848/*
849 * ccdc_enable_vp - Enable Video Port.
850 * @ccdc: Pointer to ISP CCDC device.
851 * @enable: 0 Disables VP, 1 Enables VP
852 *
853 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
854 */
855static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
856{
857 struct isp_device *isp = to_isp_device(ccdc);
858
859 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
860 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
861}
862
863/*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
866 * @offset: Address offset to start a new line. Must be twice the
867 * Output width and aligned on 32 byte boundary
868 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
869 * output.
870 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
871 *
872 * - Configures the output line offset when stored in memory
873 * - Sets the odd/even line pattern to store the output
874 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
875 * - Configures the number of even and odd line fields in case of rearranging
876 * the lines.
877 */
878static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
879 u32 offset, u8 oddeven, u8 numlines)
880{
881 struct isp_device *isp = to_isp_device(ccdc);
882
883 isp_reg_writel(isp, offset & 0xffff,
884 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
885
886 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
887 ISPCCDC_SDOFST_FINV);
888
889 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
890 ISPCCDC_SDOFST_FOFST_4L);
891
892 switch (oddeven) {
893 case EVENEVEN:
894 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
895 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
896 break;
897 case ODDEVEN:
898 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
899 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
900 break;
901 case EVENODD:
902 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
903 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
904 break;
905 case ODDODD:
906 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
907 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
908 break;
909 default:
910 break;
911 }
912}
913
914/*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
921static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922{
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926}
927
928/*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
935void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937{
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954}
955
956/*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
73ea57eb
LP		 959 * @pdata: Parallel interface platform data (may be NULL)
960 * @data_size: Data size
de1135d4
LP		 961 */
962static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
73ea57eb
LP		 963 struct isp_parallel_platform_data *pdata,
964 unsigned int data_size)
de1135d4
LP		 965{
966 struct isp_device *isp = to_isp_device(ccdc);
c51364ca 967 const struct v4l2_mbus_framefmt *format;
cf7a3d91 968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
de1135d4 969
c51364ca
LP		 970 format = &ccdc->formats[CCDC_PAD_SINK];
971
972 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
973 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
974 /* The bridge is enabled for YUV8 formats. Configure the input
975 * mode accordingly.
976 */
977 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
978 }
979
73ea57eb 980 switch (data_size) {
de1135d4
LP		 981 case 8:
982 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
983 break;
984 case 10:
985 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
986 break;
987 case 11:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
989 break;
990 case 12:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
992 break;
13eaaa7f 993 }
de1135d4 994
73ea57eb 995 if (pdata && pdata->data_pol)
de1135d4 996 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
de1135d4 997
73ea57eb 998 if (pdata && pdata->hs_pol)
de1135d4 999 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
de1135d4 1000
73ea57eb 1001 if (pdata && pdata->vs_pol)
de1135d4 1002 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
de1135d4
LP		 1003
1004 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
c51364ca
LP		 1005
1006 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1007 * hardware seems to ignore it in all other input modes.
1008 */
1009 if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1010 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1011 ISPCCDC_CFG_Y8POS);
1012 else
1013 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1014 ISPCCDC_CFG_Y8POS);
1015
1016 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1017 ISPCCDC_REC656IF_R656ON);
de1135d4
LP		 1018}
1019
1020/* CCDC formats descriptions */
1021static const u32 ccdc_sgrbg_pattern =
1022 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1023 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1024 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1025 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1026 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1027 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1028 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1029 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1030 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1031 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1032 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1033 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1034 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1035 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1036 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1037 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1038
1039static const u32 ccdc_srggb_pattern =
1040 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1041 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1042 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1043 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1044 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1045 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1046 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1047 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1048 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1049 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1050 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1051 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1052 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1053 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1054 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1055 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1056
1057static const u32 ccdc_sbggr_pattern =
1058 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1059 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1060 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1061 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1062 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1063 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1064 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1065 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1066 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1067 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1068 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1069 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1070 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1071 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1072 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1073 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1074
1075static const u32 ccdc_sgbrg_pattern =
1076 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1077 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1078 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1079 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1080 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1081 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1082 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1083 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1084 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1085 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1086 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1087 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1088 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1089 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1090 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1091 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1092
1093static void ccdc_configure(struct isp_ccdc_device *ccdc)
1094{
1095 struct isp_device *isp = to_isp_device(ccdc);
1096 struct isp_parallel_platform_data *pdata = NULL;
1097 struct v4l2_subdev *sensor;
1098 struct v4l2_mbus_framefmt *format;
a64909b8 1099 const struct v4l2_rect *crop;
c09af044
MJ		 1100 const struct isp_format_info *fmt_info;
1101 struct v4l2_subdev_format fmt_src;
1102 unsigned int depth_out;
1103 unsigned int depth_in = 0;
de1135d4
LP		 1104 struct media_pad *pad;
1105 unsigned long flags;
c51364ca 1106 unsigned int bridge;
c09af044 1107 unsigned int shift;
de1135d4
LP		 1108 u32 syn_mode;
1109 u32 ccdc_pattern;
1110
1bddf1b3 1111 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
c09af044
MJ		 1112 sensor = media_entity_to_v4l2_subdev(pad->entity);
1113 if (ccdc->input == CCDC_INPUT_PARALLEL)
de1135d4
LP		 1114 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1115 ->bus.parallel;
c09af044 1116
2e8f0172
LP		 1117 /* CCDC_PAD_SINK */
1118 format = &ccdc->formats[CCDC_PAD_SINK];
1119
c51364ca
LP		 1120 /* Compute the lane shifter shift value and enable the bridge when the
1121 * input format is YUV.
1122 */
c09af044
MJ		 1123 fmt_src.pad = pad->index;
1124 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1125 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1126 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1697e49a 1127 depth_in = fmt_info->width;
de1135d4
LP		 1128 }
1129
2e8f0172 1130 fmt_info = omap3isp_video_format_info(format->code);
1697e49a 1131 depth_out = fmt_info->width;
c09af044 1132 shift = depth_in - depth_out;
de1135d4 1133
c51364ca
LP		 1134 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1135 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1136 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1137 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1138 else
1139 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
de1135d4 1140
c51364ca
LP		 1141 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1142
1143 ccdc_config_sync_if(ccdc, pdata, depth_out);
de1135d4
LP		 1144
1145 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1146
1147 /* Use the raw, unprocessed data when writing to memory. The H3A and
1148 * histogram modules are still fed with lens shading corrected data.
1149 */
1150 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1151
1152 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1153 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1154 else
1155 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1156
1157 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1158 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1159 else
1160 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1161
de1135d4
LP		 1162 /* Mosaic filter */
1163 switch (format->code) {
1164 case V4L2_MBUS_FMT_SRGGB10_1X10:
1165 case V4L2_MBUS_FMT_SRGGB12_1X12:
1166 ccdc_pattern = ccdc_srggb_pattern;
1167 break;
1168 case V4L2_MBUS_FMT_SBGGR10_1X10:
1169 case V4L2_MBUS_FMT_SBGGR12_1X12:
1170 ccdc_pattern = ccdc_sbggr_pattern;
1171 break;
1172 case V4L2_MBUS_FMT_SGBRG10_1X10:
1173 case V4L2_MBUS_FMT_SGBRG12_1X12:
1174 ccdc_pattern = ccdc_sgbrg_pattern;
1175 break;
1176 default:
1177 /* Use GRBG */
1178 ccdc_pattern = ccdc_sgrbg_pattern;
1179 break;
1180 }
1181 ccdc_config_imgattr(ccdc, ccdc_pattern);
1182
1183 /* Generate VD0 on the last line of the image and VD1 on the
1184 * 2/3 height line.
1185 */
1186 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1187 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1188 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1189
1190 /* CCDC_PAD_SOURCE_OF */
c51364ca 1191 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
a64909b8 1192 crop = &ccdc->crop;
de1135d4 1193
a64909b8
LP		 1194 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1195 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
de1135d4 1196 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
a64909b8 1197 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
de1135d4 1198 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
a64909b8 1199 isp_reg_writel(isp, (crop->height - 1)
de1135d4
LP		 1200 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1201 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1202
1203 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1204
c51364ca
LP		 1205 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1206 * YUYV.
1207 */
1208 if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1209 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1210 ISPCCDC_CFG_BSWD);
1211 else
1212 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1213 ISPCCDC_CFG_BSWD);
1214
1215 /* Use PACK8 mode for 1byte per pixel formats. */
1216 if (omap3isp_video_format_info(format->code)->width <= 8)
1217 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1218 else
1219 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1220
1221 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1222
de1135d4
LP		 1223 /* CCDC_PAD_SOURCE_VP */
1224 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1225
1226 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1227 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1228 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1229 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1230 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1231 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1232
1233 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1234 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1235 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1236
c51364ca 1237 /* Lens shading correction. */
de1135d4
LP		 1238 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1239 if (ccdc->lsc.request == NULL)
1240 goto unlock;
1241
1242 WARN_ON(ccdc->lsc.active);
1243
1244 /* Get last good LSC configuration. If it is not supported for
1245 * the current active resolution discard it.
1246 */
1247 if (ccdc->lsc.active == NULL &&
1248 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1249 ccdc->lsc.active = ccdc->lsc.request;
1250 } else {
1251 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1252 schedule_work(&ccdc->lsc.table_work);
1253 }
1254
1255 ccdc->lsc.request = NULL;
1256
1257unlock:
1258 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1259
1260 ccdc_apply_controls(ccdc);
1261}
1262
1263static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1264{
1265 struct isp_device *isp = to_isp_device(ccdc);
1266
1267 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1268 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1269}
1270
1271static int ccdc_disable(struct isp_ccdc_device *ccdc)
1272{
1273 unsigned long flags;
1274 int ret = 0;
1275
1276 spin_lock_irqsave(&ccdc->lock, flags);
1277 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1278 ccdc->stopping = CCDC_STOP_REQUEST;
1279 spin_unlock_irqrestore(&ccdc->lock, flags);
1280
1281 ret = wait_event_timeout(ccdc->wait,
1282 ccdc->stopping == CCDC_STOP_FINISHED,
1283 msecs_to_jiffies(2000));
1284 if (ret == 0) {
1285 ret = -ETIMEDOUT;
1286 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1287 }
1288
1289 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1290
1291 mutex_lock(&ccdc->ioctl_lock);
1292 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1293 ccdc->lsc.request = ccdc->lsc.active;
1294 ccdc->lsc.active = NULL;
1295 cancel_work_sync(&ccdc->lsc.table_work);
1296 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1297 mutex_unlock(&ccdc->ioctl_lock);
1298
1299 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1300
1301 return ret > 0 ? 0 : ret;
1302}
1303
1304static void ccdc_enable(struct isp_ccdc_device *ccdc)
1305{
1306 if (ccdc_lsc_is_configured(ccdc))
1307 __ccdc_lsc_enable(ccdc, 1);
1308 __ccdc_enable(ccdc, 1);
1309}
1310
1311/* -----------------------------------------------------------------------------
1312 * Interrupt handling
1313 */
1314
1315/*
1316 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1317 * @ccdc: Pointer to ISP CCDC device.
1318 *
1319 * Returns zero if the CCDC is idle and the image has been written to
1320 * memory, too.
1321 */
1322static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1323{
1324 struct isp_device *isp = to_isp_device(ccdc);
1325
1326 return omap3isp_ccdc_busy(ccdc)
1327 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1328 ISPSBL_CCDC_WR_0_DATA_READY)
1329 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1330 ISPSBL_CCDC_WR_0_DATA_READY)
1331 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1332 ISPSBL_CCDC_WR_0_DATA_READY)
1333 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1334 ISPSBL_CCDC_WR_0_DATA_READY);
1335}
1336
1337/*
1338 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1339 * @ccdc: Pointer to ISP CCDC device.
1340 * @max_wait: Max retry count in us for wait for idle/busy transition.
1341 */
1342static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1343 unsigned int max_wait)
1344{
1345 unsigned int wait = 0;
1346
1347 if (max_wait == 0)
1348 max_wait = 10000; /* 10 ms */
1349
1350 for (wait = 0; wait <= max_wait; wait++) {
1351 if (!ccdc_sbl_busy(ccdc))
1352 return 0;
1353
1354 rmb();
1355 udelay(1);
1356 }
1357
1358 return -EBUSY;
1359}
1360
1361/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1362 * @ccdc: Pointer to ISP CCDC device.
1363 * @event: Pointing which event trigger handler
1364 *
2d4e9d1d 1365 * Return 1 when the event and stopping request combination is satisfied,
de1135d4
LP		 1366 * zero otherwise.
1367 */
1368static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1369{
1370 int rval = 0;
1371
1372 switch ((ccdc->stopping & 3) | event) {
1373 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1374 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1375 __ccdc_lsc_enable(ccdc, 0);
1376 __ccdc_enable(ccdc, 0);
1377 ccdc->stopping = CCDC_STOP_EXECUTED;
1378 return 1;
1379
1380 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1381 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1382 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1383 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1384 rval = 1;
1385 break;
1386
1387 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1388 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1389 rval = 1;
1390 break;
1391
1392 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1393 return 1;
1394 }
1395
1396 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1397 wake_up(&ccdc->wait);
1398 rval = 1;
1399 }
1400
1401 return rval;
1402}
1403
1404static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1405{
bd0f2e6d 1406 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
63ae37ea 1407 struct video_device *vdev = ccdc->subdev.devnode;
de1135d4
LP		 1408 struct v4l2_event event;
1409
b43883d6
LP		 1410 /* Frame number propagation */
1411 atomic_inc(&pipe->frame_number);
1412
de1135d4 1413 memset(&event, 0, sizeof(event));
69d232ae
SA		 1414 event.type = V4L2_EVENT_FRAME_SYNC;
1415 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
de1135d4
LP		 1416
1417 v4l2_event_queue(vdev, &event);
1418}
1419
1420/*
1421 * ccdc_lsc_isr - Handle LSC events
1422 * @ccdc: Pointer to ISP CCDC device.
1423 * @events: LSC events
1424 */
1425static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1426{
1427 unsigned long flags;
1428
1429 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
875e2e3e
LP		 1430 struct isp_pipeline *pipe =
1431 to_isp_pipeline(&ccdc->subdev.entity);
1432
de1135d4 1433 ccdc_lsc_error_handler(ccdc);
875e2e3e 1434 pipe->error = true;
de1135d4
LP		 1435 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1436 }
1437
1438 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1439 return;
1440
1441 /* LSC_DONE interrupt occur, there are two cases
1442 * 1. stopping for reconfiguration
1443 * 2. stopping because of STREAM OFF command
1444 */
1445 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1446
1447 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1448 ccdc->lsc.state = LSC_STATE_STOPPED;
1449
1450 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1451 goto done;
1452
1453 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1454 goto done;
1455
1456 /* LSC is in STOPPING state, change to the new state */
1457 ccdc->lsc.state = LSC_STATE_STOPPED;
1458
1459 /* This is an exception. Start of frame and LSC_DONE interrupt
1460 * have been received on the same time. Skip this event and wait
1461 * for better times.
1462 */
1463 if (events & IRQ0STATUS_HS_VS_IRQ)
1464 goto done;
1465
1466 /* The LSC engine is stopped at this point. Enable it if there's a
1467 * pending request.
1468 */
1469 if (ccdc->lsc.request == NULL)
1470 goto done;
1471
1472 ccdc_lsc_enable(ccdc);
1473
1474done:
1475 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1476}
1477
1478static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1479{
1480 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1481 struct isp_device *isp = to_isp_device(ccdc);
1482 struct isp_buffer *buffer;
de1135d4
LP		 1483
1484 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1485 * doesn't explicitly state if that's supposed to happen or not, so it
1486 * can be considered as a hardware bug or as a feature, but we have to
1487 * deal with it anyway). Disabling the CCDC when no buffer is available
1488 * would thus not be enough, we need to handle the situation explicitly.
1489 */
1490 if (list_empty(&ccdc->video_out.dmaqueue))
0a7b1a01 1491 return 0;
de1135d4
LP		 1492
1493 /* We're in continuous mode, and memory writes were disabled due to a
1494 * buffer underrun. Reenable them now that we have a buffer. The buffer
1495 * address has been set in ccdc_video_queue.
1496 */
1497 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
de1135d4 1498 ccdc->underrun = 0;
0a7b1a01 1499 return 1;
de1135d4
LP		 1500 }
1501
1502 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1503 dev_info(isp->dev, "CCDC won't become idle!\n");
9554b7db
LP		 1504 isp->crashed |= 1U << ccdc->subdev.entity.id;
1505 omap3isp_pipeline_cancel_stream(pipe);
0a7b1a01 1506 return 0;
de1135d4
LP		 1507 }
1508
875e2e3e 1509 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
0a7b1a01 1510 if (buffer != NULL)
21d8582d 1511 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4
LP		 1512
1513 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1514
1515 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1516 isp_pipeline_ready(pipe))
1517 omap3isp_pipeline_set_stream(pipe,
1518 ISP_PIPELINE_STREAM_SINGLESHOT);
1519
0a7b1a01 1520 return buffer != NULL;
de1135d4
LP		 1521}
1522
1523/*
1524 * ccdc_vd0_isr - Handle VD0 event
1525 * @ccdc: Pointer to ISP CCDC device.
1526 *
1527 * Executes LSC deferred enablement before next frame starts.
1528 */
1529static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1530{
1531 unsigned long flags;
1532 int restart = 0;
1533
1534 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1535 restart = ccdc_isr_buffer(ccdc);
1536
1537 spin_lock_irqsave(&ccdc->lock, flags);
1538 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1539 spin_unlock_irqrestore(&ccdc->lock, flags);
1540 return;
1541 }
1542
1543 if (!ccdc->shadow_update)
1544 ccdc_apply_controls(ccdc);
1545 spin_unlock_irqrestore(&ccdc->lock, flags);
1546
1547 if (restart)
1548 ccdc_enable(ccdc);
1549}
1550
1551/*
1552 * ccdc_vd1_isr - Handle VD1 event
1553 * @ccdc: Pointer to ISP CCDC device.
1554 */
1555static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1556{
1557 unsigned long flags;
1558
1559 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1560
1561 /*
1562 * Depending on the CCDC pipeline state, CCDC stopping should be
1563 * handled differently. In SINGLESHOT we emulate an internal CCDC
1564 * stopping because the CCDC hw works only in continuous mode.
1565 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1566 * data to memory the CCDC and LSC are stopped immediately but
1567 * without change the CCDC stopping state machine. The CCDC
1568 * stopping state machine should be used only when user request
1569 * for stopping is received (SINGLESHOT is an exeption).
1570 */
1571 switch (ccdc->state) {
1572 case ISP_PIPELINE_STREAM_SINGLESHOT:
1573 ccdc->stopping = CCDC_STOP_REQUEST;
1574 break;
1575
1576 case ISP_PIPELINE_STREAM_CONTINUOUS:
1577 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1578 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1579 __ccdc_lsc_enable(ccdc, 0);
1580 __ccdc_enable(ccdc, 0);
1581 }
1582 break;
1583
1584 case ISP_PIPELINE_STREAM_STOPPED:
1585 break;
1586 }
1587
1588 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1589 goto done;
1590
1591 if (ccdc->lsc.request == NULL)
1592 goto done;
1593
1594 /*
1595 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1596 * do the appropriate changes in registers
1597 */
1598 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1599 __ccdc_lsc_enable(ccdc, 0);
1600 ccdc->lsc.state = LSC_STATE_RECONFIG;
1601 goto done;
1602 }
1603
1604 /* LSC has been in STOPPED state, enable it */
1605 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1606 ccdc_lsc_enable(ccdc);
1607
1608done:
1609 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1610}
1611
1612/*
1613 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1614 * @ccdc: Pointer to ISP CCDC device.
1615 * @events: CCDC events
1616 */
1617int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1618{
1619 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1620 return 0;
1621
1622 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1623 ccdc_vd1_isr(ccdc);
1624
1625 ccdc_lsc_isr(ccdc, events);
1626
1627 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1628 ccdc_vd0_isr(ccdc);
1629
1630 if (events & IRQ0STATUS_HS_VS_IRQ)
1631 ccdc_hs_vs_isr(ccdc);
1632
1633 return 0;
1634}
1635
1636/* -----------------------------------------------------------------------------
1637 * ISP video operations
1638 */
1639
1640static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1641{
1642 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1643
1644 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1645 return -ENODEV;
1646
21d8582d 1647 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4 1648
2d4e9d1d 1649 /* We now have a buffer queued on the output, restart the pipeline
de1135d4
LP		 1650 * on the next CCDC interrupt if running in continuous mode (or when
1651 * starting the stream).
1652 */
1653 ccdc->underrun = 1;
1654
1655 return 0;
1656}
1657
1658static const struct isp_video_operations ccdc_video_ops = {
1659 .queue = ccdc_video_queue,
1660};
1661
1662/* -----------------------------------------------------------------------------
1663 * V4L2 subdev operations
1664 */
1665
1666/*
1667 * ccdc_ioctl - CCDC module private ioctl's
1668 * @sd: ISP CCDC V4L2 subdevice
1669 * @cmd: ioctl command
1670 * @arg: ioctl argument
1671 *
1672 * Return 0 on success or a negative error code otherwise.
1673 */
1674static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1675{
1676 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1677 int ret;
1678
1679 switch (cmd) {
1680 case VIDIOC_OMAP3ISP_CCDC_CFG:
1681 mutex_lock(&ccdc->ioctl_lock);
1682 ret = ccdc_config(ccdc, arg);
1683 mutex_unlock(&ccdc->ioctl_lock);
1684 break;
1685
1686 default:
1687 return -ENOIOCTLCMD;
1688 }
1689
1690 return ret;
1691}
1692
1693static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1694 struct v4l2_event_subscription *sub)
de1135d4 1695{
69d232ae
SA		 1696 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1697 return -EINVAL;
1698
1699 /* line number is zero at frame start */
1700 if (sub->id != 0)
de1135d4
LP		 1701 return -EINVAL;
1702
c53c2549 1703 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
de1135d4
LP		 1704}
1705
1706static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1707 struct v4l2_event_subscription *sub)
de1135d4
LP		 1708{
1709 return v4l2_event_unsubscribe(fh, sub);
1710}
1711
1712/*
1713 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1714 * @sd: ISP CCDC V4L2 subdevice
1715 * @enable: Enable/disable stream
1716 *
1717 * When writing to memory, the CCDC hardware can't be enabled without a memory
1718 * buffer to write to. As the s_stream operation is called in response to a
1719 * STREAMON call without any buffer queued yet, just update the enabled field
1720 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1721 *
1722 * When not writing to memory enable the CCDC immediately.
1723 */
1724static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1725{
1726 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1727 struct isp_device *isp = to_isp_device(ccdc);
1728 int ret = 0;
1729
1730 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1731 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1732 return 0;
1733
1734 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1735 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1736 ISPCCDC_CFG_VDLC);
1737
1738 ccdc_configure(ccdc);
1739
1740 /* TODO: Don't configure the video port if all of its output
1741 * links are inactive.
1742 */
1743 ccdc_config_vp(ccdc);
1744 ccdc_enable_vp(ccdc, 1);
de1135d4
LP		 1745 ccdc_print_status(ccdc);
1746 }
1747
1748 switch (enable) {
1749 case ISP_PIPELINE_STREAM_CONTINUOUS:
1750 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1751 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1752
1753 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1754 ccdc_enable(ccdc);
1755
1756 ccdc->underrun = 0;
1757 break;
1758
1759 case ISP_PIPELINE_STREAM_SINGLESHOT:
1760 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1761 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1762 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1763
1764 ccdc_enable(ccdc);
1765 break;
1766
1767 case ISP_PIPELINE_STREAM_STOPPED:
1768 ret = ccdc_disable(ccdc);
1769 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1770 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1771 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1772 ccdc->underrun = 0;
1773 break;
1774 }
1775
1776 ccdc->state = enable;
1777 return ret;
1778}
1779
1780static struct v4l2_mbus_framefmt *
1781__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1782 unsigned int pad, enum v4l2_subdev_format_whence which)
1783{
1784 if (which == V4L2_SUBDEV_FORMAT_TRY)
1785 return v4l2_subdev_get_try_format(fh, pad);
1786 else
1787 return &ccdc->formats[pad];
1788}
1789
a64909b8
LP		 1790static struct v4l2_rect *
1791__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1792 enum v4l2_subdev_format_whence which)
1793{
1794 if (which == V4L2_SUBDEV_FORMAT_TRY)
1795 return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1796 else
1797 return &ccdc->crop;
1798}
1799
de1135d4
LP		 1800/*
1801 * ccdc_try_format - Try video format on a pad
1802 * @ccdc: ISP CCDC device
1803 * @fh : V4L2 subdev file handle
1804 * @pad: Pad number
1805 * @fmt: Format
1806 */
1807static void
1808ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1809 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1810 enum v4l2_subdev_format_whence which)
1811{
de1135d4 1812 const struct isp_format_info *info;
c51364ca 1813 enum v4l2_mbus_pixelcode pixelcode;
de1135d4
LP		 1814 unsigned int width = fmt->width;
1815 unsigned int height = fmt->height;
a64909b8 1816 struct v4l2_rect *crop;
de1135d4
LP		 1817 unsigned int i;
1818
1819 switch (pad) {
1820 case CCDC_PAD_SINK:
de1135d4
LP		 1821 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1822 if (fmt->code == ccdc_fmts[i])
1823 break;
1824 }
1825
1826 /* If not found, use SGRBG10 as default */
1827 if (i >= ARRAY_SIZE(ccdc_fmts))
1828 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1829
1830 /* Clamp the input size. */
1831 fmt->width = clamp_t(u32, width, 32, 4096);
1832 fmt->height = clamp_t(u32, height, 32, 4096);
1833 break;
1834
1835 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1836 pixelcode = fmt->code;
1837 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1838
1839 /* YUV formats are converted from 2X8 to 1X16 by the bridge and
1840 * can be byte-swapped.
1841 */
1842 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1843 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1844 /* Use the user requested format if YUV. */
1845 if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1846 pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1847 pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1848 pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1849 fmt->code = pixelcode;
1850
1851 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1852 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1853 else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1854 fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1855 }
de1135d4 1856
a64909b8
LP		 1857 /* Hardcode the output size to the crop rectangle size. */
1858 crop = __ccdc_get_crop(ccdc, fh, which);
1859 fmt->width = crop->width;
1860 fmt->height = crop->height;
de1135d4
LP		 1861 break;
1862
1863 case CCDC_PAD_SOURCE_VP:
c51364ca 1864 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
de1135d4
LP		 1865
1866 /* The video port interface truncates the data to 10 bits. */
1867 info = omap3isp_video_format_info(fmt->code);
1868 fmt->code = info->truncated;
1869
c51364ca
LP		 1870 /* YUV formats are not supported by the video port. */
1871 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1872 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1873 fmt->code = 0;
1874
de1135d4
LP		 1875 /* The number of lines that can be clocked out from the video
1876 * port output must be at least one line less than the number
1877 * of input lines.
1878 */
1879 fmt->width = clamp_t(u32, width, 32, fmt->width);
1880 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1881 break;
1882 }
1883
1884 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1885 * stored on 2 bytes.
1886 */
1887 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1888 fmt->field = V4L2_FIELD_NONE;
1889}
1890
a64909b8
LP		 1891/*
1892 * ccdc_try_crop - Validate a crop rectangle
1893 * @ccdc: ISP CCDC device
1894 * @sink: format on the sink pad
1895 * @crop: crop rectangle to be validated
1896 */
1897static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1898 const struct v4l2_mbus_framefmt *sink,
1899 struct v4l2_rect *crop)
1900{
1901 const struct isp_format_info *info;
1902 unsigned int max_width;
1903
1904 /* For Bayer formats, restrict left/top and width/height to even values
1905 * to keep the Bayer pattern.
1906 */
1907 info = omap3isp_video_format_info(sink->code);
1908 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1909 crop->left &= ~1;
1910 crop->top &= ~1;
1911 }
1912
1913 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1914 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1915
1916 /* The data formatter truncates the number of horizontal output pixels
1917 * to a multiple of 16. To avoid clipping data, allow callers to request
1918 * an output size bigger than the input size up to the nearest multiple
1919 * of 16.
1920 */
1921 max_width = (sink->width - crop->left + 15) & ~15;
1922 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1923 & ~15;
1924 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1925 sink->height - crop->top);
1926
1927 /* Odd width/height values don't make sense for Bayer formats. */
1928 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1929 crop->width &= ~1;
1930 crop->height &= ~1;
1931 }
1932}
1933
de1135d4
LP		 1934/*
1935 * ccdc_enum_mbus_code - Handle pixel format enumeration
1936 * @sd : pointer to v4l2 subdev structure
1937 * @fh : V4L2 subdev file handle
1938 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1939 * return -EINVAL or zero on success
1940 */
1941static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1942 struct v4l2_subdev_fh *fh,
1943 struct v4l2_subdev_mbus_code_enum *code)
1944{
1945 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1946 struct v4l2_mbus_framefmt *format;
1947
1948 switch (code->pad) {
1949 case CCDC_PAD_SINK:
1950 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1951 return -EINVAL;
1952
1953 code->code = ccdc_fmts[code->index];
1954 break;
1955
1956 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1957 format = __ccdc_get_format(ccdc, fh, code->pad,
1958 V4L2_SUBDEV_FORMAT_TRY);
1959
1960 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1961 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1962 /* In YUV mode the CCDC can swap bytes. */
1963 if (code->index == 0)
1964 code->code = V4L2_MBUS_FMT_YUYV8_1X16;
1965 else if (code->index == 1)
1966 code->code = V4L2_MBUS_FMT_UYVY8_1X16;
1967 else
1968 return -EINVAL;
1969 } else {
1970 /* In raw mode, no configurable format confversion is
1971 * available.
1972 */
1973 if (code->index == 0)
1974 code->code = format->code;
1975 else
1976 return -EINVAL;
1977 }
1978 break;
1979
de1135d4 1980 case CCDC_PAD_SOURCE_VP:
c51364ca
LP		 1981 /* The CCDC supports no configurable format conversion
1982 * compatible with the video port. Enumerate a single output
1983 * format code.
1984 */
de1135d4
LP		 1985 if (code->index != 0)
1986 return -EINVAL;
1987
c51364ca 1988 format = __ccdc_get_format(ccdc, fh, code->pad,
de1135d4
LP		 1989 V4L2_SUBDEV_FORMAT_TRY);
1990
c51364ca
LP		 1991 /* A pixel code equal to 0 means that the video port doesn't
1992 * support the input format. Don't enumerate any pixel code.
1993 */
1994 if (format->code == 0)
1995 return -EINVAL;
1996
de1135d4
LP		 1997 code->code = format->code;
1998 break;
1999
2000 default:
2001 return -EINVAL;
2002 }
2003
2004 return 0;
2005}
2006
2007static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2008 struct v4l2_subdev_fh *fh,
2009 struct v4l2_subdev_frame_size_enum *fse)
2010{
2011 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2012 struct v4l2_mbus_framefmt format;
2013
2014 if (fse->index != 0)
2015 return -EINVAL;
2016
2017 format.code = fse->code;
2018 format.width = 1;
2019 format.height = 1;
2020 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2021 fse->min_width = format.width;
2022 fse->min_height = format.height;
2023
2024 if (format.code != fse->code)
2025 return -EINVAL;
2026
2027 format.code = fse->code;
2028 format.width = -1;
2029 format.height = -1;
2030 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2031 fse->max_width = format.width;
2032 fse->max_height = format.height;
2033
2034 return 0;
2035}
2036
a64909b8
LP		 2037/*
2038 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2039 * @sd: ISP CCDC V4L2 subdevice
2040 * @fh: V4L2 subdev file handle
2041 * @sel: Selection rectangle
2042 *
2043 * The only supported rectangles are the crop rectangles on the output formatter
2044 * source pad.
2045 *
2046 * Return 0 on success or a negative error code otherwise.
2047 */
2048static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2049 struct v4l2_subdev_selection *sel)
2050{
2051 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2052 struct v4l2_mbus_framefmt *format;
2053
2054 if (sel->pad != CCDC_PAD_SOURCE_OF)
2055 return -EINVAL;
2056
2057 switch (sel->target) {
5689b288 2058 case V4L2_SEL_TGT_CROP_BOUNDS:
a64909b8
LP		 2059 sel->r.left = 0;
2060 sel->r.top = 0;
2061 sel->r.width = INT_MAX;
2062 sel->r.height = INT_MAX;
2063
2064 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2065 ccdc_try_crop(ccdc, format, &sel->r);
2066 break;
2067
5689b288 2068 case V4L2_SEL_TGT_CROP:
a64909b8
LP		 2069 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2070 break;
2071
2072 default:
2073 return -EINVAL;
2074 }
2075
2076 return 0;
2077}
2078
2079/*
2080 * ccdc_set_selection - Set a selection rectangle on a pad
2081 * @sd: ISP CCDC V4L2 subdevice
2082 * @fh: V4L2 subdev file handle
2083 * @sel: Selection rectangle
2084 *
2085 * The only supported rectangle is the actual crop rectangle on the output
2086 * formatter source pad.
2087 *
2088 * Return 0 on success or a negative error code otherwise.
2089 */
2090static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2091 struct v4l2_subdev_selection *sel)
2092{
2093 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2094 struct v4l2_mbus_framefmt *format;
2095
5689b288 2096 if (sel->target != V4L2_SEL_TGT_CROP ||
a64909b8
LP		 2097 sel->pad != CCDC_PAD_SOURCE_OF)
2098 return -EINVAL;
2099
2100 /* The crop rectangle can't be changed while streaming. */
2101 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2102 return -EBUSY;
2103
2104 /* Modifying the crop rectangle always changes the format on the source
2105 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2106 * rectangle.
2107 */
563df3d0 2108 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
a64909b8
LP		 2109 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2110 return 0;
2111 }
2112
2113 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2114 ccdc_try_crop(ccdc, format, &sel->r);
2115 *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2116
2117 /* Update the source format. */
2118 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2119 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2120
2121 return 0;
2122}
2123
de1135d4
LP		 2124/*
2125 * ccdc_get_format - Retrieve the video format on a pad
2126 * @sd : ISP CCDC V4L2 subdevice
2127 * @fh : V4L2 subdev file handle
2128 * @fmt: Format
2129 *
2130 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2131 * to the format type.
2132 */
2133static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2134 struct v4l2_subdev_format *fmt)
2135{
2136 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2137 struct v4l2_mbus_framefmt *format;
2138
2139 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2140 if (format == NULL)
2141 return -EINVAL;
2142
2143 fmt->format = *format;
2144 return 0;
2145}
2146
2147/*
2148 * ccdc_set_format - Set the video format on a pad
2149 * @sd : ISP CCDC V4L2 subdevice
2150 * @fh : V4L2 subdev file handle
2151 * @fmt: Format
2152 *
2153 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2154 * to the format type.
2155 */
2156static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2157 struct v4l2_subdev_format *fmt)
2158{
2159 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2160 struct v4l2_mbus_framefmt *format;
a64909b8 2161 struct v4l2_rect *crop;
de1135d4
LP		 2162
2163 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2164 if (format == NULL)
2165 return -EINVAL;
2166
2167 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2168 *format = fmt->format;
2169
2170 /* Propagate the format from sink to source */
2171 if (fmt->pad == CCDC_PAD_SINK) {
a64909b8
LP		 2172 /* Reset the crop rectangle. */
2173 crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2174 crop->left = 0;
2175 crop->top = 0;
2176 crop->width = fmt->format.width;
2177 crop->height = fmt->format.height;
2178
2179 ccdc_try_crop(ccdc, &fmt->format, crop);
2180
2181 /* Update the source formats. */
de1135d4
LP		 2182 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2183 fmt->which);
2184 *format = fmt->format;
2185 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2186 fmt->which);
2187
2188 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2189 fmt->which);
2190 *format = fmt->format;
2191 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2192 fmt->which);
2193 }
2194
2195 return 0;
2196}
2197
a6d7a62d
SA		 2198/*
2199 * Decide whether desired output pixel code can be obtained with
2200 * the lane shifter by shifting the input pixel code.
2201 * @in: input pixelcode to shifter
2202 * @out: output pixelcode from shifter
2203 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2204 *
2205 * return true if the combination is possible
2206 * return false otherwise
2207 */
2208static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2209 enum v4l2_mbus_pixelcode out,
2210 unsigned int additional_shift)
2211{
2212 const struct isp_format_info *in_info, *out_info;
2213
2214 if (in == out)
2215 return true;
2216
2217 in_info = omap3isp_video_format_info(in);
2218 out_info = omap3isp_video_format_info(out);
2219
2220 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2221 return false;
2222
2223 if (in_info->flavor != out_info->flavor)
2224 return false;
2225
1697e49a 2226 return in_info->width - out_info->width + additional_shift <= 6;
a6d7a62d
SA		 2227}
2228
2229static int ccdc_link_validate(struct v4l2_subdev *sd,
2230 struct media_link *link,
2231 struct v4l2_subdev_format *source_fmt,
2232 struct v4l2_subdev_format *sink_fmt)
2233{
2234 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2235 unsigned long parallel_shift;
2236
2237 /* Check if the two ends match */
2238 if (source_fmt->format.width != sink_fmt->format.width ||
2239 source_fmt->format.height != sink_fmt->format.height)
2240 return -EPIPE;
2241
2242 /* We've got a parallel sensor here. */
2243 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2244 struct isp_parallel_platform_data *pdata =
2245 &((struct isp_v4l2_subdevs_group *)
2246 media_entity_to_v4l2_subdev(link->source->entity)
2247 ->host_priv)->bus.parallel;
2248 parallel_shift = pdata->data_lane_shift * 2;
2249 } else {
2250 parallel_shift = 0;
2251 }
2252
2253 /* Lane shifter may be used to drop bits on CCDC sink pad */
2254 if (!ccdc_is_shiftable(source_fmt->format.code,
2255 sink_fmt->format.code, parallel_shift))
2256 return -EPIPE;
2257
2258 return 0;
2259}
2260
de1135d4
LP		 2261/*
2262 * ccdc_init_formats - Initialize formats on all pads
2263 * @sd: ISP CCDC V4L2 subdevice
2264 * @fh: V4L2 subdev file handle
2265 *
2266 * Initialize all pad formats with default values. If fh is not NULL, try
2267 * formats are initialized on the file handle. Otherwise active formats are
2268 * initialized on the device.
2269 */
2270static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2271{
2272 struct v4l2_subdev_format format;
2273
2274 memset(&format, 0, sizeof(format));
2275 format.pad = CCDC_PAD_SINK;
2276 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2277 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2278 format.format.width = 4096;
2279 format.format.height = 4096;
2280 ccdc_set_format(sd, fh, &format);
2281
2282 return 0;
2283}
2284
2285/* V4L2 subdev core operations */
2286static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2287 .ioctl = ccdc_ioctl,
2288 .subscribe_event = ccdc_subscribe_event,
2289 .unsubscribe_event = ccdc_unsubscribe_event,
2290};
2291
2292/* V4L2 subdev video operations */
2293static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2294 .s_stream = ccdc_set_stream,
2295};
2296
2297/* V4L2 subdev pad operations */
2298static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2299 .enum_mbus_code = ccdc_enum_mbus_code,
2300 .enum_frame_size = ccdc_enum_frame_size,
2301 .get_fmt = ccdc_get_format,
2302 .set_fmt = ccdc_set_format,
a64909b8
LP		 2303 .get_selection = ccdc_get_selection,
2304 .set_selection = ccdc_set_selection,
a6d7a62d 2305 .link_validate = ccdc_link_validate,
de1135d4
LP		 2306};
2307
2308/* V4L2 subdev operations */
2309static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2310 .core = &ccdc_v4l2_core_ops,
2311 .video = &ccdc_v4l2_video_ops,
2312 .pad = &ccdc_v4l2_pad_ops,
2313};
2314
2315/* V4L2 subdev internal operations */
2316static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2317 .open = ccdc_init_formats,
2318};
2319
2320/* -----------------------------------------------------------------------------
2321 * Media entity operations
2322 */
2323
2324/*
2325 * ccdc_link_setup - Setup CCDC connections
2326 * @entity: CCDC media entity
2327 * @local: Pad at the local end of the link
2328 * @remote: Pad at the remote end of the link
2329 * @flags: Link flags
2330 *
2331 * return -EINVAL or zero on success
2332 */
2333static int ccdc_link_setup(struct media_entity *entity,
2334 const struct media_pad *local,
2335 const struct media_pad *remote, u32 flags)
2336{
2337 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2338 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2339 struct isp_device *isp = to_isp_device(ccdc);
2340
2341 switch (local->index | media_entity_type(remote->entity)) {
2342 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2343 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2344 * CSI2c.
2345 */
2346 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2347 ccdc->input = CCDC_INPUT_NONE;
2348 break;
2349 }
2350
2351 if (ccdc->input != CCDC_INPUT_NONE)
2352 return -EBUSY;
2353
2354 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2355 ccdc->input = CCDC_INPUT_CCP2B;
2356 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2357 ccdc->input = CCDC_INPUT_CSI2A;
2358 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2359 ccdc->input = CCDC_INPUT_CSI2C;
2360 else
2361 ccdc->input = CCDC_INPUT_PARALLEL;
2362
2363 break;
2364
2365 /*
2366 * The ISP core doesn't support pipelines with multiple video outputs.
2367 * Revisit this when it will be implemented, and return -EBUSY for now.
2368 */
2369
2370 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2371 /* Write to preview engine, histogram and H3A. When none of
2372 * those links are active, the video port can be disabled.
2373 */
2374 if (flags & MEDIA_LNK_FL_ENABLED) {
2375 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2376 return -EBUSY;
2377 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2378 } else {
2379 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2380 }
2381 break;
2382
2383 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2384 /* Write to memory */
2385 if (flags & MEDIA_LNK_FL_ENABLED) {
2386 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2387 return -EBUSY;
2388 ccdc->output |= CCDC_OUTPUT_MEMORY;
2389 } else {
2390 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2391 }
2392 break;
2393
2394 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2395 /* Write to resizer */
2396 if (flags & MEDIA_LNK_FL_ENABLED) {
2397 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2398 return -EBUSY;
2399 ccdc->output |= CCDC_OUTPUT_RESIZER;
2400 } else {
2401 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2402 }
2403 break;
2404
2405 default:
2406 return -EINVAL;
2407 }
2408
2409 return 0;
2410}
2411
2412/* media operations */
2413static const struct media_entity_operations ccdc_media_ops = {
2414 .link_setup = ccdc_link_setup,
a6d7a62d 2415 .link_validate = v4l2_subdev_link_validate,
de1135d4
LP		 2416};
2417
39099d09
LP		 2418void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2419{
2420 v4l2_device_unregister_subdev(&ccdc->subdev);
2421 omap3isp_video_unregister(&ccdc->video_out);
2422}
2423
2424int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2425 struct v4l2_device *vdev)
2426{
2427 int ret;
2428
2429 /* Register the subdev and video node. */
2430 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2431 if (ret < 0)
2432 goto error;
2433
2434 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2435 if (ret < 0)
2436 goto error;
2437
2438 return 0;
2439
2440error:
2441 omap3isp_ccdc_unregister_entities(ccdc);
2442 return ret;
2443}
2444
2445/* -----------------------------------------------------------------------------
2446 * ISP CCDC initialisation and cleanup
2447 */
2448
de1135d4
LP		 2449/*
2450 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2451 * @ccdc: ISP CCDC module
2452 *
2453 * Return 0 on success and a negative error code on failure.
2454 */
2455static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2456{
2457 struct v4l2_subdev *sd = &ccdc->subdev;
2458 struct media_pad *pads = ccdc->pads;
2459 struct media_entity *me = &sd->entity;
2460 int ret;
2461
2462 ccdc->input = CCDC_INPUT_NONE;
2463
2464 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2465 sd->internal_ops = &ccdc_v4l2_internal_ops;
2466 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2467 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2468 v4l2_set_subdevdata(sd, ccdc);
2469 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
de1135d4 2470
8dad936a
SA		 2471 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2472 | MEDIA_PAD_FL_MUST_CONNECT;
de1135d4
LP		 2473 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2474 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2475
2476 me->ops = &ccdc_media_ops;
2477 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2478 if (ret < 0)
2479 return ret;
2480
2481 ccdc_init_formats(sd, NULL);
2482
2483 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2484 ccdc->video_out.ops = &ccdc_video_ops;
2485 ccdc->video_out.isp = to_isp_device(ccdc);
2486 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2487 ccdc->video_out.bpl_alignment = 32;
2488
2489 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2490 if (ret < 0)
9b6390bd 2491 goto error_video;
de1135d4
LP		 2492
2493 /* Connect the CCDC subdev to the video node. */
2494 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2495 &ccdc->video_out.video.entity, 0, 0);
2496 if (ret < 0)
9b6390bd 2497 goto error_link;
de1135d4
LP		 2498
2499 return 0;
9b6390bd
LP		 2500
2501error_link:
2502 omap3isp_video_cleanup(&ccdc->video_out);
2503error_video:
2504 media_entity_cleanup(me);
2505 return ret;
de1135d4
LP		 2506}
2507
de1135d4
LP		 2508/*
2509 * omap3isp_ccdc_init - CCDC module initialization.
872aba51 2510 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2511 *
2512 * TODO: Get the initialisation values from platform data.
2513 *
2514 * Return 0 on success or a negative error code otherwise.
2515 */
2516int omap3isp_ccdc_init(struct isp_device *isp)
2517{
2518 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
9b6390bd 2519 int ret;
de1135d4
LP		 2520
2521 spin_lock_init(&ccdc->lock);
2522 init_waitqueue_head(&ccdc->wait);
2523 mutex_init(&ccdc->ioctl_lock);
2524
2525 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2526
2527 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2528 ccdc->lsc.state = LSC_STATE_STOPPED;
2529 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2530 spin_lock_init(&ccdc->lsc.req_lock);
2531
de1135d4
LP		 2532 ccdc->clamp.oblen = 0;
2533 ccdc->clamp.dcsubval = 0;
2534
de1135d4
LP		 2535 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2536 ccdc_apply_controls(ccdc);
2537
9b6390bd
LP		 2538 ret = ccdc_init_entities(ccdc);
2539 if (ret < 0) {
2540 mutex_destroy(&ccdc->ioctl_lock);
2541 return ret;
2542 }
2543
2544 return 0;
de1135d4
LP		 2545}
2546
2547/*
2548 * omap3isp_ccdc_cleanup - CCDC module cleanup.
872aba51 2549 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2550 */
2551void omap3isp_ccdc_cleanup(struct isp_device *isp)
2552{
2553 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2554
63b4ca23
LP		 2555 omap3isp_video_cleanup(&ccdc->video_out);
2556 media_entity_cleanup(&ccdc->subdev.entity);
2557
de1135d4
LP		 2558 /* Free LSC requests. As the CCDC is stopped there's no active request,
2559 * so only the pending request and the free queue need to be handled.
2560 */
2561 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2562 cancel_work_sync(&ccdc->lsc.table_work);
2563 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2564
c60e153d
LP		 2565 if (ccdc->fpc.addr != NULL)
2566 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2567 ccdc->fpc.dma);
ed33ac8e
LP		 2568
2569 mutex_destroy(&ccdc->ioctl_lock);
de1135d4 2570}
Linux kernel - Deliverables
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