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[media] omap3isp: video: Fix warning caused by bad vidioc_s_crop prototype
[deliverable/linux.git] / drivers / media / platform / omap3isp / ispccdc.c
CommitLineData
de1135d4
LP		 1/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/uaccess.h>
29#include <linux/delay.h>
30#include <linux/device.h>
31#include <linux/dma-mapping.h>
32#include <linux/mm.h>
33#include <linux/sched.h>
e74d83aa 34#include <linux/slab.h>
de1135d4
LP		 35#include <media/v4l2-event.h>
36
37#include "isp.h"
38#include "ispreg.h"
39#include "ispccdc.h"
40
a64909b8
LP		 41#define CCDC_MIN_WIDTH 32
42#define CCDC_MIN_HEIGHT 32
43
de1135d4
LP		 44static struct v4l2_mbus_framefmt *
45__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
46 unsigned int pad, enum v4l2_subdev_format_whence which);
47
48static const unsigned int ccdc_fmts[] = {
49 V4L2_MBUS_FMT_Y8_1X8,
5782f97b
MJ		 50 V4L2_MBUS_FMT_Y10_1X10,
51 V4L2_MBUS_FMT_Y12_1X12,
52 V4L2_MBUS_FMT_SGRBG8_1X8,
53 V4L2_MBUS_FMT_SRGGB8_1X8,
54 V4L2_MBUS_FMT_SBGGR8_1X8,
55 V4L2_MBUS_FMT_SGBRG8_1X8,
de1135d4
LP		 56 V4L2_MBUS_FMT_SGRBG10_1X10,
57 V4L2_MBUS_FMT_SRGGB10_1X10,
58 V4L2_MBUS_FMT_SBGGR10_1X10,
59 V4L2_MBUS_FMT_SGBRG10_1X10,
60 V4L2_MBUS_FMT_SGRBG12_1X12,
61 V4L2_MBUS_FMT_SRGGB12_1X12,
62 V4L2_MBUS_FMT_SBGGR12_1X12,
63 V4L2_MBUS_FMT_SGBRG12_1X12,
c51364ca
LP		 64 V4L2_MBUS_FMT_YUYV8_2X8,
65 V4L2_MBUS_FMT_UYVY8_2X8,
de1135d4
LP		 66};
67
68/*
69 * ccdc_print_status - Print current CCDC Module register values.
70 * @ccdc: Pointer to ISP CCDC device.
71 *
72 * Also prints other debug information stored in the CCDC module.
73 */
74#define CCDC_PRINT_REGISTER(isp, name)\
75 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
76 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
77
78static void ccdc_print_status(struct isp_ccdc_device *ccdc)
79{
80 struct isp_device *isp = to_isp_device(ccdc);
81
82 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
83
84 CCDC_PRINT_REGISTER(isp, PCR);
85 CCDC_PRINT_REGISTER(isp, SYN_MODE);
86 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
87 CCDC_PRINT_REGISTER(isp, PIX_LINES);
88 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
89 CCDC_PRINT_REGISTER(isp, VERT_START);
90 CCDC_PRINT_REGISTER(isp, VERT_LINES);
91 CCDC_PRINT_REGISTER(isp, CULLING);
92 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
93 CCDC_PRINT_REGISTER(isp, SDOFST);
94 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
95 CCDC_PRINT_REGISTER(isp, CLAMP);
96 CCDC_PRINT_REGISTER(isp, DCSUB);
97 CCDC_PRINT_REGISTER(isp, COLPTN);
98 CCDC_PRINT_REGISTER(isp, BLKCMP);
99 CCDC_PRINT_REGISTER(isp, FPC);
100 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
101 CCDC_PRINT_REGISTER(isp, VDINT);
102 CCDC_PRINT_REGISTER(isp, ALAW);
103 CCDC_PRINT_REGISTER(isp, REC656IF);
104 CCDC_PRINT_REGISTER(isp, CFG);
105 CCDC_PRINT_REGISTER(isp, FMTCFG);
106 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
107 CCDC_PRINT_REGISTER(isp, FMT_VERT);
108 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
109 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
110 CCDC_PRINT_REGISTER(isp, PRGODD0);
111 CCDC_PRINT_REGISTER(isp, PRGODD1);
112 CCDC_PRINT_REGISTER(isp, VP_OUT);
113 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
114 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
115 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
116 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
117
118 dev_dbg(isp->dev, "--------------------------------------------\n");
119}
120
121/*
122 * omap3isp_ccdc_busy - Get busy state of the CCDC.
123 * @ccdc: Pointer to ISP CCDC device.
124 */
125int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
126{
127 struct isp_device *isp = to_isp_device(ccdc);
128
129 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
130 ISPCCDC_PCR_BUSY;
131}
132
133/* -----------------------------------------------------------------------------
134 * Lens Shading Compensation
135 */
136
137/*
138 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
139 * @ccdc: Pointer to ISP CCDC device.
140 * @lsc_cfg: the LSC configuration to check.
141 *
142 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
143 */
144static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
145 struct omap3isp_ccdc_lsc_config *lsc_cfg)
146{
147 struct isp_device *isp = to_isp_device(ccdc);
148 struct v4l2_mbus_framefmt *format;
149 unsigned int paxel_width, paxel_height;
150 unsigned int paxel_shift_x, paxel_shift_y;
151 unsigned int min_width, min_height, min_size;
152 unsigned int input_width, input_height;
153
154 paxel_shift_x = lsc_cfg->gain_mode_m;
155 paxel_shift_y = lsc_cfg->gain_mode_n;
156
157 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
158 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
159 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
160 return -EINVAL;
161 }
162
163 if (lsc_cfg->offset & 3) {
164 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
165 "4\n");
166 return -EINVAL;
167 }
168
169 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
170 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
171 return -EINVAL;
172 }
173
174 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
175 V4L2_SUBDEV_FORMAT_ACTIVE);
176 input_width = format->width;
177 input_height = format->height;
178
179 /* Calculate minimum bytesize for validation */
180 paxel_width = 1 << paxel_shift_x;
181 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
182 >> paxel_shift_x) + 1;
183
184 paxel_height = 1 << paxel_shift_y;
185 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
186 >> paxel_shift_y) + 1;
187
188 min_size = 4 * min_width * min_height;
189 if (min_size > lsc_cfg->size) {
190 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
191 return -EINVAL;
192 }
193 if (lsc_cfg->offset < (min_width * 4)) {
194 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
195 return -EINVAL;
196 }
197 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
198 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
199 return -EINVAL;
200 }
201 return 0;
202}
203
204/*
205 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
206 * @ccdc: Pointer to ISP CCDC device.
207 */
208static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
209{
210 isp_reg_writel(to_isp_device(ccdc), addr,
211 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
212}
213
214/*
215 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
216 * @ccdc: Pointer to ISP CCDC device.
217 */
218static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
219 struct omap3isp_ccdc_lsc_config *cfg)
220{
221 struct isp_device *isp = to_isp_device(ccdc);
222 int reg;
223
224 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
225 ISPCCDC_LSC_TABLE_OFFSET);
226
227 reg = 0;
228 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
229 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
230 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
231 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
232
233 reg = 0;
234 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
235 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
236 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
237 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
238 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
239 ISPCCDC_LSC_INITIAL);
240}
241
242static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
243{
244 struct isp_device *isp = to_isp_device(ccdc);
245 unsigned int wait;
246
247 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
248 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
249
250 /* timeout 1 ms */
251 for (wait = 0; wait < 1000; wait++) {
252 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
253 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
254 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
255 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
256 return 0;
257 }
258
259 rmb();
260 udelay(1);
261 }
262
263 return -ETIMEDOUT;
264}
265
266/*
267 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
268 * @ccdc: Pointer to ISP CCDC device.
269 * @enable: 0 Disables LSC, 1 Enables LSC.
270 */
271static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
272{
273 struct isp_device *isp = to_isp_device(ccdc);
274 const struct v4l2_mbus_framefmt *format =
275 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
276 V4L2_SUBDEV_FORMAT_ACTIVE);
277
278 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
279 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
280 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
281 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
282 return -EINVAL;
283
284 if (enable)
285 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
286
287 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
288 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
289
290 if (enable) {
291 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
292 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
293 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
294 ccdc->lsc.state = LSC_STATE_STOPPED;
295 dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
296 return -ETIMEDOUT;
297 }
298 ccdc->lsc.state = LSC_STATE_RUNNING;
299 } else {
300 ccdc->lsc.state = LSC_STATE_STOPPING;
301 }
302
303 return 0;
304}
305
306static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
307{
308 struct isp_device *isp = to_isp_device(ccdc);
309
310 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
311 ISPCCDC_LSC_BUSY;
312}
313
314/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
315 * @ccdc: Pointer to ISP CCDC device
316 * @req: New configuration request
317 *
318 * context: in_interrupt()
319 */
320static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
321 struct ispccdc_lsc_config_req *req)
322{
323 if (!req->enable)
324 return -EINVAL;
325
326 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
327 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
328 return -EINVAL;
329 }
330
331 if (ccdc_lsc_busy(ccdc))
332 return -EBUSY;
333
334 ccdc_lsc_setup_regs(ccdc, &req->config);
335 ccdc_lsc_program_table(ccdc, req->table);
336 return 0;
337}
338
339/*
340 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
341 * @ccdc: Pointer to ISP CCDC device.
342 *
343 * Disables LSC, and defers enablement to shadow registers update time.
344 */
345static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
346{
347 struct isp_device *isp = to_isp_device(ccdc);
348 /*
349 * From OMAP3 TRM: When this event is pending, the module
350 * goes into transparent mode (output =input). Normal
351 * operation can be resumed at the start of the next frame
352 * after:
353 * 1) Clearing this event
354 * 2) Disabling the LSC module
355 * 3) Enabling it
356 */
357 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
358 ISPCCDC_LSC_ENABLE);
359 ccdc->lsc.state = LSC_STATE_STOPPED;
360}
361
362static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
363 struct ispccdc_lsc_config_req *req)
364{
365 struct isp_device *isp = to_isp_device(ccdc);
366
367 if (req == NULL)
368 return;
369
370 if (req->iovm)
371 dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
372 req->iovm->sgt->nents, DMA_TO_DEVICE);
373 if (req->table)
fabdbca8 374 omap_iommu_vfree(isp->domain, isp->dev, req->table);
de1135d4
LP		 375 kfree(req);
376}
377
378static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
379 struct list_head *queue)
380{
381 struct ispccdc_lsc_config_req *req, *n;
382 unsigned long flags;
383
384 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
385 list_for_each_entry_safe(req, n, queue, list) {
386 list_del(&req->list);
387 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
388 ccdc_lsc_free_request(ccdc, req);
389 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
390 }
391 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
392}
393
394static void ccdc_lsc_free_table_work(struct work_struct *work)
395{
396 struct isp_ccdc_device *ccdc;
397 struct ispccdc_lsc *lsc;
398
399 lsc = container_of(work, struct ispccdc_lsc, table_work);
400 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
401
402 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
403}
404
405/*
406 * ccdc_lsc_config - Configure the LSC module from a userspace request
407 *
408 * Store the request LSC configuration in the LSC engine request pointer. The
409 * configuration will be applied to the hardware when the CCDC will be enabled,
410 * or at the next LSC interrupt if the CCDC is already running.
411 */
412static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
413 struct omap3isp_ccdc_update_config *config)
414{
415 struct isp_device *isp = to_isp_device(ccdc);
416 struct ispccdc_lsc_config_req *req;
417 unsigned long flags;
418 void *table;
419 u16 update;
420 int ret;
421
422 update = config->update &
423 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
424 if (!update)
425 return 0;
426
427 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
428 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
429 "need to be supplied\n", __func__);
430 return -EINVAL;
431 }
432
433 req = kzalloc(sizeof(*req), GFP_KERNEL);
434 if (req == NULL)
435 return -ENOMEM;
436
437 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
438 if (copy_from_user(&req->config, config->lsc_cfg,
439 sizeof(req->config))) {
440 ret = -EFAULT;
441 goto done;
442 }
443
444 req->enable = 1;
445
fabdbca8 446 req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
f626b52d 447 req->config.size, IOMMU_FLAG);
de1135d4
LP		 448 if (IS_ERR_VALUE(req->table)) {
449 req->table = 0;
450 ret = -ENOMEM;
451 goto done;
452 }
453
fabdbca8 454 req->iovm = omap_find_iovm_area(isp->dev, req->table);
de1135d4
LP		 455 if (req->iovm == NULL) {
456 ret = -ENOMEM;
457 goto done;
458 }
459
460 if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
461 req->iovm->sgt->nents, DMA_TO_DEVICE)) {
462 ret = -ENOMEM;
463 req->iovm = NULL;
464 goto done;
465 }
466
467 dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
468 req->iovm->sgt->nents, DMA_TO_DEVICE);
469
fabdbca8 470 table = omap_da_to_va(isp->dev, req->table);
de1135d4
LP		 471 if (copy_from_user(table, config->lsc, req->config.size)) {
472 ret = -EFAULT;
473 goto done;
474 }
475
476 dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
477 req->iovm->sgt->nents, DMA_TO_DEVICE);
478 }
479
480 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
481 if (ccdc->lsc.request) {
482 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
483 schedule_work(&ccdc->lsc.table_work);
484 }
485 ccdc->lsc.request = req;
486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
487
488 ret = 0;
489
490done:
491 if (ret < 0)
492 ccdc_lsc_free_request(ccdc, req);
493
494 return ret;
495}
496
497static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
498{
499 unsigned long flags;
500
501 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
502 if (ccdc->lsc.active) {
503 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
504 return 1;
505 }
506 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
507 return 0;
508}
509
510static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
511{
512 struct ispccdc_lsc *lsc = &ccdc->lsc;
513
514 if (lsc->state != LSC_STATE_STOPPED)
515 return -EINVAL;
516
517 if (lsc->active) {
518 list_add_tail(&lsc->active->list, &lsc->free_queue);
519 lsc->active = NULL;
520 }
521
522 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
523 omap3isp_sbl_disable(to_isp_device(ccdc),
524 OMAP3_ISP_SBL_CCDC_LSC_READ);
525 list_add_tail(&lsc->request->list, &lsc->free_queue);
526 lsc->request = NULL;
527 goto done;
528 }
529
530 lsc->active = lsc->request;
531 lsc->request = NULL;
532 __ccdc_lsc_enable(ccdc, 1);
533
534done:
535 if (!list_empty(&lsc->free_queue))
536 schedule_work(&lsc->table_work);
537
538 return 0;
539}
540
541/* -----------------------------------------------------------------------------
542 * Parameters configuration
543 */
544
545/*
546 * ccdc_configure_clamp - Configure optical-black or digital clamping
547 * @ccdc: Pointer to ISP CCDC device.
548 *
549 * The CCDC performs either optical-black or digital clamp. Configure and enable
550 * the selected clamp method.
551 */
552static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
553{
554 struct isp_device *isp = to_isp_device(ccdc);
555 u32 clamp;
556
557 if (ccdc->obclamp) {
558 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
559 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
560 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
561 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
562 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
563 } else {
564 isp_reg_writel(isp, ccdc->clamp.dcsubval,
565 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
566 }
567
568 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
569 ISPCCDC_CLAMP_CLAMPEN,
570 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
571}
572
573/*
574 * ccdc_configure_fpc - Configure Faulty Pixel Correction
575 * @ccdc: Pointer to ISP CCDC device.
576 */
577static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
578{
579 struct isp_device *isp = to_isp_device(ccdc);
580
581 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
582
583 if (!ccdc->fpc_en)
584 return;
585
586 isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
587 ISPCCDC_FPC_ADDR);
588 /* The FPNUM field must be set before enabling FPC. */
589 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
590 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
591 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
592 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
593}
594
595/*
596 * ccdc_configure_black_comp - Configure Black Level Compensation.
597 * @ccdc: Pointer to ISP CCDC device.
598 */
599static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
600{
601 struct isp_device *isp = to_isp_device(ccdc);
602 u32 blcomp;
603
604 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
605 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
606 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
607 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
608
609 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
610}
611
612/*
613 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
614 * @ccdc: Pointer to ISP CCDC device.
615 */
616static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
617{
618 struct isp_device *isp = to_isp_device(ccdc);
619
620 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
621 ISPCCDC_SYN_MODE_LPF,
622 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
623}
624
625/*
626 * ccdc_configure_alaw - Configure A-law compression.
627 * @ccdc: Pointer to ISP CCDC device.
628 */
629static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
630{
631 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 632 const struct isp_format_info *info;
de1135d4
LP		 633 u32 alaw = 0;
634
73ea57eb
LP		 635 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
636
637 switch (info->width) {
de1135d4
LP		 638 case 8:
639 return;
640
641 case 10:
642 alaw = ISPCCDC_ALAW_GWDI_9_0;
643 break;
644 case 11:
645 alaw = ISPCCDC_ALAW_GWDI_10_1;
646 break;
647 case 12:
648 alaw = ISPCCDC_ALAW_GWDI_11_2;
649 break;
650 case 13:
651 alaw = ISPCCDC_ALAW_GWDI_12_3;
652 break;
653 }
654
655 if (ccdc->alaw)
656 alaw |= ISPCCDC_ALAW_CCDTBL;
657
658 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
659}
660
661/*
662 * ccdc_config_imgattr - Configure sensor image specific attributes.
663 * @ccdc: Pointer to ISP CCDC device.
664 * @colptn: Color pattern of the sensor.
665 */
666static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
667{
668 struct isp_device *isp = to_isp_device(ccdc);
669
670 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
671}
672
673/*
674 * ccdc_config - Set CCDC configuration from userspace
675 * @ccdc: Pointer to ISP CCDC device.
676 * @userspace_add: Structure containing CCDC configuration sent from userspace.
677 *
678 * Returns 0 if successful, -EINVAL if the pointer to the configuration
679 * structure is null, or the copy_from_user function fails to copy user space
680 * memory to kernel space memory.
681 */
682static int ccdc_config(struct isp_ccdc_device *ccdc,
683 struct omap3isp_ccdc_update_config *ccdc_struct)
684{
685 struct isp_device *isp = to_isp_device(ccdc);
686 unsigned long flags;
687
688 spin_lock_irqsave(&ccdc->lock, flags);
689 ccdc->shadow_update = 1;
690 spin_unlock_irqrestore(&ccdc->lock, flags);
691
692 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
693 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_ALAW;
695 }
696
697 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
698 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
699 ccdc->update |= OMAP3ISP_CCDC_LPF;
700 }
701
702 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
703 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
704 sizeof(ccdc->clamp))) {
705 ccdc->shadow_update = 0;
706 return -EFAULT;
707 }
708
709 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
710 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
711 }
712
713 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
714 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
715 sizeof(ccdc->blcomp))) {
716 ccdc->shadow_update = 0;
717 return -EFAULT;
718 }
719
720 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
721 }
722
723 ccdc->shadow_update = 0;
724
725 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
726 u32 table_old = 0;
727 u32 table_new;
728 u32 size;
729
730 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
731 return -EBUSY;
732
733 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
734
735 if (ccdc->fpc_en) {
736 if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
737 sizeof(ccdc->fpc)))
738 return -EFAULT;
739
740 /*
741 * table_new must be 64-bytes aligned, but it's
6c32df43 742 * already done by omap_iommu_vmalloc().
de1135d4
LP		 743 */
744 size = ccdc->fpc.fpnum * 4;
fabdbca8 745 table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
6c32df43 746 0, size, IOMMU_FLAG);
de1135d4
LP		 747 if (IS_ERR_VALUE(table_new))
748 return -ENOMEM;
749
fabdbca8 750 if (copy_from_user(omap_da_to_va(isp->dev, table_new),
de1135d4
LP		 751 (__force void __user *)
752 ccdc->fpc.fpcaddr, size)) {
fabdbca8 753 omap_iommu_vfree(isp->domain, isp->dev,
6c32df43 754 table_new);
de1135d4
LP		 755 return -EFAULT;
756 }
757
758 table_old = ccdc->fpc.fpcaddr;
759 ccdc->fpc.fpcaddr = table_new;
760 }
761
762 ccdc_configure_fpc(ccdc);
763 if (table_old != 0)
fabdbca8 764 omap_iommu_vfree(isp->domain, isp->dev, table_old);
de1135d4
LP		 765 }
766
767 return ccdc_lsc_config(ccdc, ccdc_struct);
768}
769
770static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
771{
772 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
773 ccdc_configure_alaw(ccdc);
774 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
775 }
776
777 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
778 ccdc_configure_lpf(ccdc);
779 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
780 }
781
782 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
783 ccdc_configure_clamp(ccdc);
784 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
785 }
786
787 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
788 ccdc_configure_black_comp(ccdc);
789 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
790 }
791}
792
793/*
794 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
795 * @dev: Pointer to ISP device
796 */
797void omap3isp_ccdc_restore_context(struct isp_device *isp)
798{
799 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
800
801 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
802
803 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
804 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
805 ccdc_apply_controls(ccdc);
806 ccdc_configure_fpc(ccdc);
807}
808
809/* -----------------------------------------------------------------------------
810 * Format- and pipeline-related configuration helpers
811 */
812
813/*
814 * ccdc_config_vp - Configure the Video Port.
815 * @ccdc: Pointer to ISP CCDC device.
816 */
817static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
818{
819 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
820 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 821 const struct isp_format_info *info;
de1135d4
LP		 822 unsigned long l3_ick = pipe->l3_ick;
823 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
824 unsigned int div = 0;
825 u32 fmtcfg_vp;
826
827 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
828 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
829
73ea57eb
LP		 830 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
831
832 switch (info->width) {
de1135d4
LP		 833 case 8:
834 case 10:
835 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
836 break;
837 case 11:
838 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
839 break;
840 case 12:
841 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
842 break;
843 case 13:
844 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
845 break;
13eaaa7f 846 }
de1135d4
LP		 847
848 if (pipe->input)
849 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
c6c01f97
SA		 850 else if (pipe->external_rate)
851 div = l3_ick / pipe->external_rate;
de1135d4
LP		 852
853 div = clamp(div, 2U, max_div);
854 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
855
856 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
857}
858
859/*
860 * ccdc_enable_vp - Enable Video Port.
861 * @ccdc: Pointer to ISP CCDC device.
862 * @enable: 0 Disables VP, 1 Enables VP
863 *
864 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
865 */
866static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
867{
868 struct isp_device *isp = to_isp_device(ccdc);
869
870 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
871 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
872}
873
874/*
875 * ccdc_config_outlineoffset - Configure memory saving output line offset
876 * @ccdc: Pointer to ISP CCDC device.
877 * @offset: Address offset to start a new line. Must be twice the
878 * Output width and aligned on 32 byte boundary
879 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
880 * output.
881 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
882 *
883 * - Configures the output line offset when stored in memory
884 * - Sets the odd/even line pattern to store the output
885 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
886 * - Configures the number of even and odd line fields in case of rearranging
887 * the lines.
888 */
889static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
890 u32 offset, u8 oddeven, u8 numlines)
891{
892 struct isp_device *isp = to_isp_device(ccdc);
893
894 isp_reg_writel(isp, offset & 0xffff,
895 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
896
897 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
898 ISPCCDC_SDOFST_FINV);
899
900 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
901 ISPCCDC_SDOFST_FOFST_4L);
902
903 switch (oddeven) {
904 case EVENEVEN:
905 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
906 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
907 break;
908 case ODDEVEN:
909 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
910 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
911 break;
912 case EVENODD:
913 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
914 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
915 break;
916 case ODDODD:
917 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
918 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
919 break;
920 default:
921 break;
922 }
923}
924
925/*
926 * ccdc_set_outaddr - Set memory address to save output image
927 * @ccdc: Pointer to ISP CCDC device.
928 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
929 *
930 * Sets the memory address where the output will be saved.
931 */
932static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
933{
934 struct isp_device *isp = to_isp_device(ccdc);
935
936 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
937}
938
939/*
940 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
941 * @ccdc: Pointer to ISP CCDC device.
942 * @max_rate: Maximum calculated data rate.
943 *
944 * Returns in *max_rate less value between calculated and passed
945 */
946void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
947 unsigned int *max_rate)
948{
949 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
950 unsigned int rate;
951
952 if (pipe == NULL)
953 return;
954
955 /*
956 * TRM says that for parallel sensors the maximum data rate
957 * should be 90% form L3/2 clock, otherwise just L3/2.
958 */
959 if (ccdc->input == CCDC_INPUT_PARALLEL)
960 rate = pipe->l3_ick / 2 * 9 / 10;
961 else
962 rate = pipe->l3_ick / 2;
963
964 *max_rate = min(*max_rate, rate);
965}
966
967/*
968 * ccdc_config_sync_if - Set CCDC sync interface configuration
969 * @ccdc: Pointer to ISP CCDC device.
73ea57eb
LP		 970 * @pdata: Parallel interface platform data (may be NULL)
971 * @data_size: Data size
de1135d4
LP		 972 */
973static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
73ea57eb
LP		 974 struct isp_parallel_platform_data *pdata,
975 unsigned int data_size)
de1135d4
LP		 976{
977 struct isp_device *isp = to_isp_device(ccdc);
c51364ca 978 const struct v4l2_mbus_framefmt *format;
cf7a3d91 979 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
de1135d4 980
c51364ca
LP		 981 format = &ccdc->formats[CCDC_PAD_SINK];
982
983 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
984 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
985 /* The bridge is enabled for YUV8 formats. Configure the input
986 * mode accordingly.
987 */
988 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
989 }
990
73ea57eb 991 switch (data_size) {
de1135d4
LP		 992 case 8:
993 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
994 break;
995 case 10:
996 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
997 break;
998 case 11:
999 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
1000 break;
1001 case 12:
1002 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
1003 break;
13eaaa7f 1004 }
de1135d4 1005
73ea57eb 1006 if (pdata && pdata->data_pol)
de1135d4 1007 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
de1135d4 1008
73ea57eb 1009 if (pdata && pdata->hs_pol)
de1135d4 1010 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
de1135d4 1011
73ea57eb 1012 if (pdata && pdata->vs_pol)
de1135d4 1013 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
de1135d4
LP		 1014
1015 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
c51364ca
LP		 1016
1017 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1018 * hardware seems to ignore it in all other input modes.
1019 */
1020 if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1021 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1022 ISPCCDC_CFG_Y8POS);
1023 else
1024 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1025 ISPCCDC_CFG_Y8POS);
1026
1027 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1028 ISPCCDC_REC656IF_R656ON);
de1135d4
LP		 1029}
1030
1031/* CCDC formats descriptions */
1032static const u32 ccdc_sgrbg_pattern =
1033 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1034 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1035 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1036 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1037 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1038 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1039 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1040 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1041 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1042 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1043 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1044 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1045 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1046 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1047 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1048 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1049
1050static const u32 ccdc_srggb_pattern =
1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1054 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1058 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1059 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1060 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1061 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1062 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1063 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1064 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1065 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1066 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1067
1068static const u32 ccdc_sbggr_pattern =
1069 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1070 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1071 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1073 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1074 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1075 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1076 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1077 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1078 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1079 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1080 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1081 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1082 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1083 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1084 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1085
1086static const u32 ccdc_sgbrg_pattern =
1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1090 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1094 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1095 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1096 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1097 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1098 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1099 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1100 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1101 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1102 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1103
1104static void ccdc_configure(struct isp_ccdc_device *ccdc)
1105{
1106 struct isp_device *isp = to_isp_device(ccdc);
1107 struct isp_parallel_platform_data *pdata = NULL;
1108 struct v4l2_subdev *sensor;
1109 struct v4l2_mbus_framefmt *format;
a64909b8 1110 const struct v4l2_rect *crop;
c09af044
MJ		 1111 const struct isp_format_info *fmt_info;
1112 struct v4l2_subdev_format fmt_src;
1113 unsigned int depth_out;
1114 unsigned int depth_in = 0;
de1135d4
LP		 1115 struct media_pad *pad;
1116 unsigned long flags;
c51364ca 1117 unsigned int bridge;
c09af044 1118 unsigned int shift;
de1135d4
LP		 1119 u32 syn_mode;
1120 u32 ccdc_pattern;
1121
c09af044
MJ		 1122 pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
1123 sensor = media_entity_to_v4l2_subdev(pad->entity);
1124 if (ccdc->input == CCDC_INPUT_PARALLEL)
de1135d4
LP		 1125 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1126 ->bus.parallel;
c09af044 1127
c51364ca
LP		 1128 /* Compute the lane shifter shift value and enable the bridge when the
1129 * input format is YUV.
1130 */
c09af044
MJ		 1131 fmt_src.pad = pad->index;
1132 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1133 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1134 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1697e49a 1135 depth_in = fmt_info->width;
de1135d4
LP		 1136 }
1137
c09af044
MJ		 1138 fmt_info = omap3isp_video_format_info
1139 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1697e49a 1140 depth_out = fmt_info->width;
c09af044 1141 shift = depth_in - depth_out;
de1135d4 1142
c51364ca
LP		 1143 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1144 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1145 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1146 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1147 else
1148 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
de1135d4 1149
c51364ca
LP		 1150 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1151
1152 ccdc_config_sync_if(ccdc, pdata, depth_out);
de1135d4
LP		 1153
1154 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1155
1156 /* Use the raw, unprocessed data when writing to memory. The H3A and
1157 * histogram modules are still fed with lens shading corrected data.
1158 */
1159 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1160
1161 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1162 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1163 else
1164 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1165
1166 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1167 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1168 else
1169 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1170
c51364ca
LP		 1171 /* CCDC_PAD_SINK */
1172 format = &ccdc->formats[CCDC_PAD_SINK];
de1135d4
LP		 1173
1174 /* Mosaic filter */
1175 switch (format->code) {
1176 case V4L2_MBUS_FMT_SRGGB10_1X10:
1177 case V4L2_MBUS_FMT_SRGGB12_1X12:
1178 ccdc_pattern = ccdc_srggb_pattern;
1179 break;
1180 case V4L2_MBUS_FMT_SBGGR10_1X10:
1181 case V4L2_MBUS_FMT_SBGGR12_1X12:
1182 ccdc_pattern = ccdc_sbggr_pattern;
1183 break;
1184 case V4L2_MBUS_FMT_SGBRG10_1X10:
1185 case V4L2_MBUS_FMT_SGBRG12_1X12:
1186 ccdc_pattern = ccdc_sgbrg_pattern;
1187 break;
1188 default:
1189 /* Use GRBG */
1190 ccdc_pattern = ccdc_sgrbg_pattern;
1191 break;
1192 }
1193 ccdc_config_imgattr(ccdc, ccdc_pattern);
1194
1195 /* Generate VD0 on the last line of the image and VD1 on the
1196 * 2/3 height line.
1197 */
1198 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1199 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1200 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1201
1202 /* CCDC_PAD_SOURCE_OF */
c51364ca 1203 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
a64909b8 1204 crop = &ccdc->crop;
de1135d4 1205
a64909b8
LP		 1206 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1207 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
de1135d4 1208 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
a64909b8 1209 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
de1135d4 1210 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
a64909b8 1211 isp_reg_writel(isp, (crop->height - 1)
de1135d4
LP		 1212 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1213 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1214
1215 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1216
c51364ca
LP		 1217 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1218 * YUYV.
1219 */
1220 if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1221 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1222 ISPCCDC_CFG_BSWD);
1223 else
1224 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1225 ISPCCDC_CFG_BSWD);
1226
1227 /* Use PACK8 mode for 1byte per pixel formats. */
1228 if (omap3isp_video_format_info(format->code)->width <= 8)
1229 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1230 else
1231 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1232
1233 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1234
de1135d4
LP		 1235 /* CCDC_PAD_SOURCE_VP */
1236 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1237
1238 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1239 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1240 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1241 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1242 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1243 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1244
1245 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1246 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1248
c51364ca 1249 /* Lens shading correction. */
de1135d4
LP		 1250 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1251 if (ccdc->lsc.request == NULL)
1252 goto unlock;
1253
1254 WARN_ON(ccdc->lsc.active);
1255
1256 /* Get last good LSC configuration. If it is not supported for
1257 * the current active resolution discard it.
1258 */
1259 if (ccdc->lsc.active == NULL &&
1260 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1261 ccdc->lsc.active = ccdc->lsc.request;
1262 } else {
1263 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1264 schedule_work(&ccdc->lsc.table_work);
1265 }
1266
1267 ccdc->lsc.request = NULL;
1268
1269unlock:
1270 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1271
1272 ccdc_apply_controls(ccdc);
1273}
1274
1275static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1276{
1277 struct isp_device *isp = to_isp_device(ccdc);
1278
1279 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1280 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1281}
1282
1283static int ccdc_disable(struct isp_ccdc_device *ccdc)
1284{
1285 unsigned long flags;
1286 int ret = 0;
1287
1288 spin_lock_irqsave(&ccdc->lock, flags);
1289 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1290 ccdc->stopping = CCDC_STOP_REQUEST;
1291 spin_unlock_irqrestore(&ccdc->lock, flags);
1292
1293 ret = wait_event_timeout(ccdc->wait,
1294 ccdc->stopping == CCDC_STOP_FINISHED,
1295 msecs_to_jiffies(2000));
1296 if (ret == 0) {
1297 ret = -ETIMEDOUT;
1298 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1299 }
1300
1301 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1302
1303 mutex_lock(&ccdc->ioctl_lock);
1304 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1305 ccdc->lsc.request = ccdc->lsc.active;
1306 ccdc->lsc.active = NULL;
1307 cancel_work_sync(&ccdc->lsc.table_work);
1308 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1309 mutex_unlock(&ccdc->ioctl_lock);
1310
1311 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1312
1313 return ret > 0 ? 0 : ret;
1314}
1315
1316static void ccdc_enable(struct isp_ccdc_device *ccdc)
1317{
1318 if (ccdc_lsc_is_configured(ccdc))
1319 __ccdc_lsc_enable(ccdc, 1);
1320 __ccdc_enable(ccdc, 1);
1321}
1322
1323/* -----------------------------------------------------------------------------
1324 * Interrupt handling
1325 */
1326
1327/*
1328 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1329 * @ccdc: Pointer to ISP CCDC device.
1330 *
1331 * Returns zero if the CCDC is idle and the image has been written to
1332 * memory, too.
1333 */
1334static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1335{
1336 struct isp_device *isp = to_isp_device(ccdc);
1337
1338 return omap3isp_ccdc_busy(ccdc)
1339 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1340 ISPSBL_CCDC_WR_0_DATA_READY)
1341 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1342 ISPSBL_CCDC_WR_0_DATA_READY)
1343 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1344 ISPSBL_CCDC_WR_0_DATA_READY)
1345 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1346 ISPSBL_CCDC_WR_0_DATA_READY);
1347}
1348
1349/*
1350 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1351 * @ccdc: Pointer to ISP CCDC device.
1352 * @max_wait: Max retry count in us for wait for idle/busy transition.
1353 */
1354static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1355 unsigned int max_wait)
1356{
1357 unsigned int wait = 0;
1358
1359 if (max_wait == 0)
1360 max_wait = 10000; /* 10 ms */
1361
1362 for (wait = 0; wait <= max_wait; wait++) {
1363 if (!ccdc_sbl_busy(ccdc))
1364 return 0;
1365
1366 rmb();
1367 udelay(1);
1368 }
1369
1370 return -EBUSY;
1371}
1372
1373/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1374 * @ccdc: Pointer to ISP CCDC device.
1375 * @event: Pointing which event trigger handler
1376 *
2d4e9d1d 1377 * Return 1 when the event and stopping request combination is satisfied,
de1135d4
LP		 1378 * zero otherwise.
1379 */
1380static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1381{
1382 int rval = 0;
1383
1384 switch ((ccdc->stopping & 3) | event) {
1385 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1386 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1387 __ccdc_lsc_enable(ccdc, 0);
1388 __ccdc_enable(ccdc, 0);
1389 ccdc->stopping = CCDC_STOP_EXECUTED;
1390 return 1;
1391
1392 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1393 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1394 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1395 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1396 rval = 1;
1397 break;
1398
1399 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1400 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1401 rval = 1;
1402 break;
1403
1404 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1405 return 1;
1406 }
1407
1408 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1409 wake_up(&ccdc->wait);
1410 rval = 1;
1411 }
1412
1413 return rval;
1414}
1415
1416static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1417{
bd0f2e6d 1418 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
63ae37ea 1419 struct video_device *vdev = ccdc->subdev.devnode;
de1135d4
LP		 1420 struct v4l2_event event;
1421
b43883d6
LP		 1422 /* Frame number propagation */
1423 atomic_inc(&pipe->frame_number);
1424
de1135d4 1425 memset(&event, 0, sizeof(event));
69d232ae
SA		 1426 event.type = V4L2_EVENT_FRAME_SYNC;
1427 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
de1135d4
LP		 1428
1429 v4l2_event_queue(vdev, &event);
1430}
1431
1432/*
1433 * ccdc_lsc_isr - Handle LSC events
1434 * @ccdc: Pointer to ISP CCDC device.
1435 * @events: LSC events
1436 */
1437static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1438{
1439 unsigned long flags;
1440
1441 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
875e2e3e
LP		 1442 struct isp_pipeline *pipe =
1443 to_isp_pipeline(&ccdc->subdev.entity);
1444
de1135d4 1445 ccdc_lsc_error_handler(ccdc);
875e2e3e 1446 pipe->error = true;
de1135d4
LP		 1447 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1448 }
1449
1450 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1451 return;
1452
1453 /* LSC_DONE interrupt occur, there are two cases
1454 * 1. stopping for reconfiguration
1455 * 2. stopping because of STREAM OFF command
1456 */
1457 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1458
1459 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1460 ccdc->lsc.state = LSC_STATE_STOPPED;
1461
1462 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1463 goto done;
1464
1465 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1466 goto done;
1467
1468 /* LSC is in STOPPING state, change to the new state */
1469 ccdc->lsc.state = LSC_STATE_STOPPED;
1470
1471 /* This is an exception. Start of frame and LSC_DONE interrupt
1472 * have been received on the same time. Skip this event and wait
1473 * for better times.
1474 */
1475 if (events & IRQ0STATUS_HS_VS_IRQ)
1476 goto done;
1477
1478 /* The LSC engine is stopped at this point. Enable it if there's a
1479 * pending request.
1480 */
1481 if (ccdc->lsc.request == NULL)
1482 goto done;
1483
1484 ccdc_lsc_enable(ccdc);
1485
1486done:
1487 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1488}
1489
1490static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1491{
1492 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1493 struct isp_device *isp = to_isp_device(ccdc);
1494 struct isp_buffer *buffer;
1495 int restart = 0;
1496
1497 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1498 * doesn't explicitly state if that's supposed to happen or not, so it
1499 * can be considered as a hardware bug or as a feature, but we have to
1500 * deal with it anyway). Disabling the CCDC when no buffer is available
1501 * would thus not be enough, we need to handle the situation explicitly.
1502 */
1503 if (list_empty(&ccdc->video_out.dmaqueue))
1504 goto done;
1505
1506 /* We're in continuous mode, and memory writes were disabled due to a
1507 * buffer underrun. Reenable them now that we have a buffer. The buffer
1508 * address has been set in ccdc_video_queue.
1509 */
1510 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1511 restart = 1;
1512 ccdc->underrun = 0;
1513 goto done;
1514 }
1515
1516 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1517 dev_info(isp->dev, "CCDC won't become idle!\n");
1518 goto done;
1519 }
1520
875e2e3e 1521 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
de1135d4
LP		 1522 if (buffer != NULL) {
1523 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1524 restart = 1;
1525 }
1526
1527 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1528
1529 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1530 isp_pipeline_ready(pipe))
1531 omap3isp_pipeline_set_stream(pipe,
1532 ISP_PIPELINE_STREAM_SINGLESHOT);
1533
1534done:
de1135d4
LP		 1535 return restart;
1536}
1537
1538/*
1539 * ccdc_vd0_isr - Handle VD0 event
1540 * @ccdc: Pointer to ISP CCDC device.
1541 *
1542 * Executes LSC deferred enablement before next frame starts.
1543 */
1544static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1545{
1546 unsigned long flags;
1547 int restart = 0;
1548
1549 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1550 restart = ccdc_isr_buffer(ccdc);
1551
1552 spin_lock_irqsave(&ccdc->lock, flags);
1553 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1554 spin_unlock_irqrestore(&ccdc->lock, flags);
1555 return;
1556 }
1557
1558 if (!ccdc->shadow_update)
1559 ccdc_apply_controls(ccdc);
1560 spin_unlock_irqrestore(&ccdc->lock, flags);
1561
1562 if (restart)
1563 ccdc_enable(ccdc);
1564}
1565
1566/*
1567 * ccdc_vd1_isr - Handle VD1 event
1568 * @ccdc: Pointer to ISP CCDC device.
1569 */
1570static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1571{
1572 unsigned long flags;
1573
1574 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1575
1576 /*
1577 * Depending on the CCDC pipeline state, CCDC stopping should be
1578 * handled differently. In SINGLESHOT we emulate an internal CCDC
1579 * stopping because the CCDC hw works only in continuous mode.
1580 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1581 * data to memory the CCDC and LSC are stopped immediately but
1582 * without change the CCDC stopping state machine. The CCDC
1583 * stopping state machine should be used only when user request
1584 * for stopping is received (SINGLESHOT is an exeption).
1585 */
1586 switch (ccdc->state) {
1587 case ISP_PIPELINE_STREAM_SINGLESHOT:
1588 ccdc->stopping = CCDC_STOP_REQUEST;
1589 break;
1590
1591 case ISP_PIPELINE_STREAM_CONTINUOUS:
1592 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1593 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1594 __ccdc_lsc_enable(ccdc, 0);
1595 __ccdc_enable(ccdc, 0);
1596 }
1597 break;
1598
1599 case ISP_PIPELINE_STREAM_STOPPED:
1600 break;
1601 }
1602
1603 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1604 goto done;
1605
1606 if (ccdc->lsc.request == NULL)
1607 goto done;
1608
1609 /*
1610 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1611 * do the appropriate changes in registers
1612 */
1613 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1614 __ccdc_lsc_enable(ccdc, 0);
1615 ccdc->lsc.state = LSC_STATE_RECONFIG;
1616 goto done;
1617 }
1618
1619 /* LSC has been in STOPPED state, enable it */
1620 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1621 ccdc_lsc_enable(ccdc);
1622
1623done:
1624 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1625}
1626
1627/*
1628 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1629 * @ccdc: Pointer to ISP CCDC device.
1630 * @events: CCDC events
1631 */
1632int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1633{
1634 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1635 return 0;
1636
1637 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1638 ccdc_vd1_isr(ccdc);
1639
1640 ccdc_lsc_isr(ccdc, events);
1641
1642 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1643 ccdc_vd0_isr(ccdc);
1644
1645 if (events & IRQ0STATUS_HS_VS_IRQ)
1646 ccdc_hs_vs_isr(ccdc);
1647
1648 return 0;
1649}
1650
1651/* -----------------------------------------------------------------------------
1652 * ISP video operations
1653 */
1654
1655static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1656{
1657 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1658
1659 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1660 return -ENODEV;
1661
1662 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1663
2d4e9d1d 1664 /* We now have a buffer queued on the output, restart the pipeline
de1135d4
LP		 1665 * on the next CCDC interrupt if running in continuous mode (or when
1666 * starting the stream).
1667 */
1668 ccdc->underrun = 1;
1669
1670 return 0;
1671}
1672
1673static const struct isp_video_operations ccdc_video_ops = {
1674 .queue = ccdc_video_queue,
1675};
1676
1677/* -----------------------------------------------------------------------------
1678 * V4L2 subdev operations
1679 */
1680
1681/*
1682 * ccdc_ioctl - CCDC module private ioctl's
1683 * @sd: ISP CCDC V4L2 subdevice
1684 * @cmd: ioctl command
1685 * @arg: ioctl argument
1686 *
1687 * Return 0 on success or a negative error code otherwise.
1688 */
1689static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1690{
1691 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1692 int ret;
1693
1694 switch (cmd) {
1695 case VIDIOC_OMAP3ISP_CCDC_CFG:
1696 mutex_lock(&ccdc->ioctl_lock);
1697 ret = ccdc_config(ccdc, arg);
1698 mutex_unlock(&ccdc->ioctl_lock);
1699 break;
1700
1701 default:
1702 return -ENOIOCTLCMD;
1703 }
1704
1705 return ret;
1706}
1707
1708static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
85f5fe39 1709 const struct v4l2_event_subscription *sub)
de1135d4 1710{
69d232ae
SA		 1711 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1712 return -EINVAL;
1713
1714 /* line number is zero at frame start */
1715 if (sub->id != 0)
de1135d4
LP		 1716 return -EINVAL;
1717
c53c2549 1718 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
de1135d4
LP		 1719}
1720
1721static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
85f5fe39 1722 const struct v4l2_event_subscription *sub)
de1135d4
LP		 1723{
1724 return v4l2_event_unsubscribe(fh, sub);
1725}
1726
1727/*
1728 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1729 * @sd: ISP CCDC V4L2 subdevice
1730 * @enable: Enable/disable stream
1731 *
1732 * When writing to memory, the CCDC hardware can't be enabled without a memory
1733 * buffer to write to. As the s_stream operation is called in response to a
1734 * STREAMON call without any buffer queued yet, just update the enabled field
1735 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1736 *
1737 * When not writing to memory enable the CCDC immediately.
1738 */
1739static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1740{
1741 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1742 struct isp_device *isp = to_isp_device(ccdc);
1743 int ret = 0;
1744
1745 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1746 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1747 return 0;
1748
1749 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1750 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1751 ISPCCDC_CFG_VDLC);
1752
1753 ccdc_configure(ccdc);
1754
1755 /* TODO: Don't configure the video port if all of its output
1756 * links are inactive.
1757 */
1758 ccdc_config_vp(ccdc);
1759 ccdc_enable_vp(ccdc, 1);
de1135d4
LP		 1760 ccdc_print_status(ccdc);
1761 }
1762
1763 switch (enable) {
1764 case ISP_PIPELINE_STREAM_CONTINUOUS:
1765 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1766 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1767
1768 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1769 ccdc_enable(ccdc);
1770
1771 ccdc->underrun = 0;
1772 break;
1773
1774 case ISP_PIPELINE_STREAM_SINGLESHOT:
1775 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1776 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1777 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1778
1779 ccdc_enable(ccdc);
1780 break;
1781
1782 case ISP_PIPELINE_STREAM_STOPPED:
1783 ret = ccdc_disable(ccdc);
1784 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1785 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1786 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1787 ccdc->underrun = 0;
1788 break;
1789 }
1790
1791 ccdc->state = enable;
1792 return ret;
1793}
1794
1795static struct v4l2_mbus_framefmt *
1796__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1797 unsigned int pad, enum v4l2_subdev_format_whence which)
1798{
1799 if (which == V4L2_SUBDEV_FORMAT_TRY)
1800 return v4l2_subdev_get_try_format(fh, pad);
1801 else
1802 return &ccdc->formats[pad];
1803}
1804
a64909b8
LP		 1805static struct v4l2_rect *
1806__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1807 enum v4l2_subdev_format_whence which)
1808{
1809 if (which == V4L2_SUBDEV_FORMAT_TRY)
1810 return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1811 else
1812 return &ccdc->crop;
1813}
1814
de1135d4
LP		 1815/*
1816 * ccdc_try_format - Try video format on a pad
1817 * @ccdc: ISP CCDC device
1818 * @fh : V4L2 subdev file handle
1819 * @pad: Pad number
1820 * @fmt: Format
1821 */
1822static void
1823ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1824 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1825 enum v4l2_subdev_format_whence which)
1826{
de1135d4 1827 const struct isp_format_info *info;
c51364ca 1828 enum v4l2_mbus_pixelcode pixelcode;
de1135d4
LP		 1829 unsigned int width = fmt->width;
1830 unsigned int height = fmt->height;
a64909b8 1831 struct v4l2_rect *crop;
de1135d4
LP		 1832 unsigned int i;
1833
1834 switch (pad) {
1835 case CCDC_PAD_SINK:
de1135d4
LP		 1836 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1837 if (fmt->code == ccdc_fmts[i])
1838 break;
1839 }
1840
1841 /* If not found, use SGRBG10 as default */
1842 if (i >= ARRAY_SIZE(ccdc_fmts))
1843 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1844
1845 /* Clamp the input size. */
1846 fmt->width = clamp_t(u32, width, 32, 4096);
1847 fmt->height = clamp_t(u32, height, 32, 4096);
1848 break;
1849
1850 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1851 pixelcode = fmt->code;
1852 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1853
1854 /* YUV formats are converted from 2X8 to 1X16 by the bridge and
1855 * can be byte-swapped.
1856 */
1857 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1858 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1859 /* Use the user requested format if YUV. */
1860 if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1861 pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1862 pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1863 pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1864 fmt->code = pixelcode;
1865
1866 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1867 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1868 else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1869 fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1870 }
de1135d4 1871
a64909b8
LP		 1872 /* Hardcode the output size to the crop rectangle size. */
1873 crop = __ccdc_get_crop(ccdc, fh, which);
1874 fmt->width = crop->width;
1875 fmt->height = crop->height;
de1135d4
LP		 1876 break;
1877
1878 case CCDC_PAD_SOURCE_VP:
c51364ca 1879 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
de1135d4
LP		 1880
1881 /* The video port interface truncates the data to 10 bits. */
1882 info = omap3isp_video_format_info(fmt->code);
1883 fmt->code = info->truncated;
1884
c51364ca
LP		 1885 /* YUV formats are not supported by the video port. */
1886 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1887 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1888 fmt->code = 0;
1889
de1135d4
LP		 1890 /* The number of lines that can be clocked out from the video
1891 * port output must be at least one line less than the number
1892 * of input lines.
1893 */
1894 fmt->width = clamp_t(u32, width, 32, fmt->width);
1895 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1896 break;
1897 }
1898
1899 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1900 * stored on 2 bytes.
1901 */
1902 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1903 fmt->field = V4L2_FIELD_NONE;
1904}
1905
a64909b8
LP		 1906/*
1907 * ccdc_try_crop - Validate a crop rectangle
1908 * @ccdc: ISP CCDC device
1909 * @sink: format on the sink pad
1910 * @crop: crop rectangle to be validated
1911 */
1912static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1913 const struct v4l2_mbus_framefmt *sink,
1914 struct v4l2_rect *crop)
1915{
1916 const struct isp_format_info *info;
1917 unsigned int max_width;
1918
1919 /* For Bayer formats, restrict left/top and width/height to even values
1920 * to keep the Bayer pattern.
1921 */
1922 info = omap3isp_video_format_info(sink->code);
1923 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1924 crop->left &= ~1;
1925 crop->top &= ~1;
1926 }
1927
1928 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1929 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1930
1931 /* The data formatter truncates the number of horizontal output pixels
1932 * to a multiple of 16. To avoid clipping data, allow callers to request
1933 * an output size bigger than the input size up to the nearest multiple
1934 * of 16.
1935 */
1936 max_width = (sink->width - crop->left + 15) & ~15;
1937 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1938 & ~15;
1939 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1940 sink->height - crop->top);
1941
1942 /* Odd width/height values don't make sense for Bayer formats. */
1943 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1944 crop->width &= ~1;
1945 crop->height &= ~1;
1946 }
1947}
1948
de1135d4
LP		 1949/*
1950 * ccdc_enum_mbus_code - Handle pixel format enumeration
1951 * @sd : pointer to v4l2 subdev structure
1952 * @fh : V4L2 subdev file handle
1953 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1954 * return -EINVAL or zero on success
1955 */
1956static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1957 struct v4l2_subdev_fh *fh,
1958 struct v4l2_subdev_mbus_code_enum *code)
1959{
1960 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1961 struct v4l2_mbus_framefmt *format;
1962
1963 switch (code->pad) {
1964 case CCDC_PAD_SINK:
1965 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1966 return -EINVAL;
1967
1968 code->code = ccdc_fmts[code->index];
1969 break;
1970
1971 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1972 format = __ccdc_get_format(ccdc, fh, code->pad,
1973 V4L2_SUBDEV_FORMAT_TRY);
1974
1975 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1976 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1977 /* In YUV mode the CCDC can swap bytes. */
1978 if (code->index == 0)
1979 code->code = V4L2_MBUS_FMT_YUYV8_1X16;
1980 else if (code->index == 1)
1981 code->code = V4L2_MBUS_FMT_UYVY8_1X16;
1982 else
1983 return -EINVAL;
1984 } else {
1985 /* In raw mode, no configurable format confversion is
1986 * available.
1987 */
1988 if (code->index == 0)
1989 code->code = format->code;
1990 else
1991 return -EINVAL;
1992 }
1993 break;
1994
de1135d4 1995 case CCDC_PAD_SOURCE_VP:
c51364ca
LP		 1996 /* The CCDC supports no configurable format conversion
1997 * compatible with the video port. Enumerate a single output
1998 * format code.
1999 */
de1135d4
LP		 2000 if (code->index != 0)
2001 return -EINVAL;
2002
c51364ca 2003 format = __ccdc_get_format(ccdc, fh, code->pad,
de1135d4
LP		 2004 V4L2_SUBDEV_FORMAT_TRY);
2005
c51364ca
LP		 2006 /* A pixel code equal to 0 means that the video port doesn't
2007 * support the input format. Don't enumerate any pixel code.
2008 */
2009 if (format->code == 0)
2010 return -EINVAL;
2011
de1135d4
LP		 2012 code->code = format->code;
2013 break;
2014
2015 default:
2016 return -EINVAL;
2017 }
2018
2019 return 0;
2020}
2021
2022static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2023 struct v4l2_subdev_fh *fh,
2024 struct v4l2_subdev_frame_size_enum *fse)
2025{
2026 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2027 struct v4l2_mbus_framefmt format;
2028
2029 if (fse->index != 0)
2030 return -EINVAL;
2031
2032 format.code = fse->code;
2033 format.width = 1;
2034 format.height = 1;
2035 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2036 fse->min_width = format.width;
2037 fse->min_height = format.height;
2038
2039 if (format.code != fse->code)
2040 return -EINVAL;
2041
2042 format.code = fse->code;
2043 format.width = -1;
2044 format.height = -1;
2045 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2046 fse->max_width = format.width;
2047 fse->max_height = format.height;
2048
2049 return 0;
2050}
2051
a64909b8
LP		 2052/*
2053 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2054 * @sd: ISP CCDC V4L2 subdevice
2055 * @fh: V4L2 subdev file handle
2056 * @sel: Selection rectangle
2057 *
2058 * The only supported rectangles are the crop rectangles on the output formatter
2059 * source pad.
2060 *
2061 * Return 0 on success or a negative error code otherwise.
2062 */
2063static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2064 struct v4l2_subdev_selection *sel)
2065{
2066 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2067 struct v4l2_mbus_framefmt *format;
2068
2069 if (sel->pad != CCDC_PAD_SOURCE_OF)
2070 return -EINVAL;
2071
2072 switch (sel->target) {
5689b288 2073 case V4L2_SEL_TGT_CROP_BOUNDS:
a64909b8
LP		 2074 sel->r.left = 0;
2075 sel->r.top = 0;
2076 sel->r.width = INT_MAX;
2077 sel->r.height = INT_MAX;
2078
2079 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2080 ccdc_try_crop(ccdc, format, &sel->r);
2081 break;
2082
5689b288 2083 case V4L2_SEL_TGT_CROP:
a64909b8
LP		 2084 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2085 break;
2086
2087 default:
2088 return -EINVAL;
2089 }
2090
2091 return 0;
2092}
2093
2094/*
2095 * ccdc_set_selection - Set a selection rectangle on a pad
2096 * @sd: ISP CCDC V4L2 subdevice
2097 * @fh: V4L2 subdev file handle
2098 * @sel: Selection rectangle
2099 *
2100 * The only supported rectangle is the actual crop rectangle on the output
2101 * formatter source pad.
2102 *
2103 * Return 0 on success or a negative error code otherwise.
2104 */
2105static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2106 struct v4l2_subdev_selection *sel)
2107{
2108 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2109 struct v4l2_mbus_framefmt *format;
2110
5689b288 2111 if (sel->target != V4L2_SEL_TGT_CROP ||
a64909b8
LP		 2112 sel->pad != CCDC_PAD_SOURCE_OF)
2113 return -EINVAL;
2114
2115 /* The crop rectangle can't be changed while streaming. */
2116 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2117 return -EBUSY;
2118
2119 /* Modifying the crop rectangle always changes the format on the source
2120 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2121 * rectangle.
2122 */
563df3d0 2123 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
a64909b8
LP		 2124 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2125 return 0;
2126 }
2127
2128 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2129 ccdc_try_crop(ccdc, format, &sel->r);
2130 *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2131
2132 /* Update the source format. */
2133 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2134 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2135
2136 return 0;
2137}
2138
de1135d4
LP		 2139/*
2140 * ccdc_get_format - Retrieve the video format on a pad
2141 * @sd : ISP CCDC V4L2 subdevice
2142 * @fh : V4L2 subdev file handle
2143 * @fmt: Format
2144 *
2145 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2146 * to the format type.
2147 */
2148static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2149 struct v4l2_subdev_format *fmt)
2150{
2151 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2152 struct v4l2_mbus_framefmt *format;
2153
2154 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2155 if (format == NULL)
2156 return -EINVAL;
2157
2158 fmt->format = *format;
2159 return 0;
2160}
2161
2162/*
2163 * ccdc_set_format - Set the video format on a pad
2164 * @sd : ISP CCDC V4L2 subdevice
2165 * @fh : V4L2 subdev file handle
2166 * @fmt: Format
2167 *
2168 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2169 * to the format type.
2170 */
2171static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2172 struct v4l2_subdev_format *fmt)
2173{
2174 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2175 struct v4l2_mbus_framefmt *format;
a64909b8 2176 struct v4l2_rect *crop;
de1135d4
LP		 2177
2178 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2179 if (format == NULL)
2180 return -EINVAL;
2181
2182 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2183 *format = fmt->format;
2184
2185 /* Propagate the format from sink to source */
2186 if (fmt->pad == CCDC_PAD_SINK) {
a64909b8
LP		 2187 /* Reset the crop rectangle. */
2188 crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2189 crop->left = 0;
2190 crop->top = 0;
2191 crop->width = fmt->format.width;
2192 crop->height = fmt->format.height;
2193
2194 ccdc_try_crop(ccdc, &fmt->format, crop);
2195
2196 /* Update the source formats. */
de1135d4
LP		 2197 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2198 fmt->which);
2199 *format = fmt->format;
2200 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2201 fmt->which);
2202
2203 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2204 fmt->which);
2205 *format = fmt->format;
2206 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2207 fmt->which);
2208 }
2209
2210 return 0;
2211}
2212
a6d7a62d
SA		 2213/*
2214 * Decide whether desired output pixel code can be obtained with
2215 * the lane shifter by shifting the input pixel code.
2216 * @in: input pixelcode to shifter
2217 * @out: output pixelcode from shifter
2218 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2219 *
2220 * return true if the combination is possible
2221 * return false otherwise
2222 */
2223static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2224 enum v4l2_mbus_pixelcode out,
2225 unsigned int additional_shift)
2226{
2227 const struct isp_format_info *in_info, *out_info;
2228
2229 if (in == out)
2230 return true;
2231
2232 in_info = omap3isp_video_format_info(in);
2233 out_info = omap3isp_video_format_info(out);
2234
2235 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2236 return false;
2237
2238 if (in_info->flavor != out_info->flavor)
2239 return false;
2240
1697e49a 2241 return in_info->width - out_info->width + additional_shift <= 6;
a6d7a62d
SA		 2242}
2243
2244static int ccdc_link_validate(struct v4l2_subdev *sd,
2245 struct media_link *link,
2246 struct v4l2_subdev_format *source_fmt,
2247 struct v4l2_subdev_format *sink_fmt)
2248{
2249 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2250 unsigned long parallel_shift;
2251
2252 /* Check if the two ends match */
2253 if (source_fmt->format.width != sink_fmt->format.width ||
2254 source_fmt->format.height != sink_fmt->format.height)
2255 return -EPIPE;
2256
2257 /* We've got a parallel sensor here. */
2258 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2259 struct isp_parallel_platform_data *pdata =
2260 &((struct isp_v4l2_subdevs_group *)
2261 media_entity_to_v4l2_subdev(link->source->entity)
2262 ->host_priv)->bus.parallel;
2263 parallel_shift = pdata->data_lane_shift * 2;
2264 } else {
2265 parallel_shift = 0;
2266 }
2267
2268 /* Lane shifter may be used to drop bits on CCDC sink pad */
2269 if (!ccdc_is_shiftable(source_fmt->format.code,
2270 sink_fmt->format.code, parallel_shift))
2271 return -EPIPE;
2272
2273 return 0;
2274}
2275
de1135d4
LP		 2276/*
2277 * ccdc_init_formats - Initialize formats on all pads
2278 * @sd: ISP CCDC V4L2 subdevice
2279 * @fh: V4L2 subdev file handle
2280 *
2281 * Initialize all pad formats with default values. If fh is not NULL, try
2282 * formats are initialized on the file handle. Otherwise active formats are
2283 * initialized on the device.
2284 */
2285static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2286{
2287 struct v4l2_subdev_format format;
2288
2289 memset(&format, 0, sizeof(format));
2290 format.pad = CCDC_PAD_SINK;
2291 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2292 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2293 format.format.width = 4096;
2294 format.format.height = 4096;
2295 ccdc_set_format(sd, fh, &format);
2296
2297 return 0;
2298}
2299
2300/* V4L2 subdev core operations */
2301static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2302 .ioctl = ccdc_ioctl,
2303 .subscribe_event = ccdc_subscribe_event,
2304 .unsubscribe_event = ccdc_unsubscribe_event,
2305};
2306
2307/* V4L2 subdev video operations */
2308static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2309 .s_stream = ccdc_set_stream,
2310};
2311
2312/* V4L2 subdev pad operations */
2313static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2314 .enum_mbus_code = ccdc_enum_mbus_code,
2315 .enum_frame_size = ccdc_enum_frame_size,
2316 .get_fmt = ccdc_get_format,
2317 .set_fmt = ccdc_set_format,
a64909b8
LP		 2318 .get_selection = ccdc_get_selection,
2319 .set_selection = ccdc_set_selection,
a6d7a62d 2320 .link_validate = ccdc_link_validate,
de1135d4
LP		 2321};
2322
2323/* V4L2 subdev operations */
2324static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2325 .core = &ccdc_v4l2_core_ops,
2326 .video = &ccdc_v4l2_video_ops,
2327 .pad = &ccdc_v4l2_pad_ops,
2328};
2329
2330/* V4L2 subdev internal operations */
2331static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2332 .open = ccdc_init_formats,
2333};
2334
2335/* -----------------------------------------------------------------------------
2336 * Media entity operations
2337 */
2338
2339/*
2340 * ccdc_link_setup - Setup CCDC connections
2341 * @entity: CCDC media entity
2342 * @local: Pad at the local end of the link
2343 * @remote: Pad at the remote end of the link
2344 * @flags: Link flags
2345 *
2346 * return -EINVAL or zero on success
2347 */
2348static int ccdc_link_setup(struct media_entity *entity,
2349 const struct media_pad *local,
2350 const struct media_pad *remote, u32 flags)
2351{
2352 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2353 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2354 struct isp_device *isp = to_isp_device(ccdc);
2355
2356 switch (local->index | media_entity_type(remote->entity)) {
2357 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2358 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2359 * CSI2c.
2360 */
2361 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2362 ccdc->input = CCDC_INPUT_NONE;
2363 break;
2364 }
2365
2366 if (ccdc->input != CCDC_INPUT_NONE)
2367 return -EBUSY;
2368
2369 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2370 ccdc->input = CCDC_INPUT_CCP2B;
2371 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2372 ccdc->input = CCDC_INPUT_CSI2A;
2373 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2374 ccdc->input = CCDC_INPUT_CSI2C;
2375 else
2376 ccdc->input = CCDC_INPUT_PARALLEL;
2377
2378 break;
2379
2380 /*
2381 * The ISP core doesn't support pipelines with multiple video outputs.
2382 * Revisit this when it will be implemented, and return -EBUSY for now.
2383 */
2384
2385 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2386 /* Write to preview engine, histogram and H3A. When none of
2387 * those links are active, the video port can be disabled.
2388 */
2389 if (flags & MEDIA_LNK_FL_ENABLED) {
2390 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2391 return -EBUSY;
2392 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2393 } else {
2394 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2395 }
2396 break;
2397
2398 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2399 /* Write to memory */
2400 if (flags & MEDIA_LNK_FL_ENABLED) {
2401 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2402 return -EBUSY;
2403 ccdc->output |= CCDC_OUTPUT_MEMORY;
2404 } else {
2405 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2406 }
2407 break;
2408
2409 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2410 /* Write to resizer */
2411 if (flags & MEDIA_LNK_FL_ENABLED) {
2412 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2413 return -EBUSY;
2414 ccdc->output |= CCDC_OUTPUT_RESIZER;
2415 } else {
2416 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2417 }
2418 break;
2419
2420 default:
2421 return -EINVAL;
2422 }
2423
2424 return 0;
2425}
2426
2427/* media operations */
2428static const struct media_entity_operations ccdc_media_ops = {
2429 .link_setup = ccdc_link_setup,
a6d7a62d 2430 .link_validate = v4l2_subdev_link_validate,
de1135d4
LP		 2431};
2432
39099d09
LP		 2433void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2434{
2435 v4l2_device_unregister_subdev(&ccdc->subdev);
2436 omap3isp_video_unregister(&ccdc->video_out);
2437}
2438
2439int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2440 struct v4l2_device *vdev)
2441{
2442 int ret;
2443
2444 /* Register the subdev and video node. */
2445 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2446 if (ret < 0)
2447 goto error;
2448
2449 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2450 if (ret < 0)
2451 goto error;
2452
2453 return 0;
2454
2455error:
2456 omap3isp_ccdc_unregister_entities(ccdc);
2457 return ret;
2458}
2459
2460/* -----------------------------------------------------------------------------
2461 * ISP CCDC initialisation and cleanup
2462 */
2463
de1135d4
LP		 2464/*
2465 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2466 * @ccdc: ISP CCDC module
2467 *
2468 * Return 0 on success and a negative error code on failure.
2469 */
2470static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2471{
2472 struct v4l2_subdev *sd = &ccdc->subdev;
2473 struct media_pad *pads = ccdc->pads;
2474 struct media_entity *me = &sd->entity;
2475 int ret;
2476
2477 ccdc->input = CCDC_INPUT_NONE;
2478
2479 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2480 sd->internal_ops = &ccdc_v4l2_internal_ops;
2481 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2482 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2483 v4l2_set_subdevdata(sd, ccdc);
2484 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
de1135d4
LP		 2485
2486 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2487 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2488 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2489
2490 me->ops = &ccdc_media_ops;
2491 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2492 if (ret < 0)
2493 return ret;
2494
2495 ccdc_init_formats(sd, NULL);
2496
2497 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2498 ccdc->video_out.ops = &ccdc_video_ops;
2499 ccdc->video_out.isp = to_isp_device(ccdc);
2500 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2501 ccdc->video_out.bpl_alignment = 32;
2502
2503 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2504 if (ret < 0)
9b6390bd 2505 goto error_video;
de1135d4
LP		 2506
2507 /* Connect the CCDC subdev to the video node. */
2508 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2509 &ccdc->video_out.video.entity, 0, 0);
2510 if (ret < 0)
9b6390bd 2511 goto error_link;
de1135d4
LP		 2512
2513 return 0;
9b6390bd
LP		 2514
2515error_link:
2516 omap3isp_video_cleanup(&ccdc->video_out);
2517error_video:
2518 media_entity_cleanup(me);
2519 return ret;
de1135d4
LP		 2520}
2521
de1135d4
LP		 2522/*
2523 * omap3isp_ccdc_init - CCDC module initialization.
2524 * @dev: Device pointer specific to the OMAP3 ISP.
2525 *
2526 * TODO: Get the initialisation values from platform data.
2527 *
2528 * Return 0 on success or a negative error code otherwise.
2529 */
2530int omap3isp_ccdc_init(struct isp_device *isp)
2531{
2532 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
9b6390bd 2533 int ret;
de1135d4
LP		 2534
2535 spin_lock_init(&ccdc->lock);
2536 init_waitqueue_head(&ccdc->wait);
2537 mutex_init(&ccdc->ioctl_lock);
2538
2539 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2540
2541 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2542 ccdc->lsc.state = LSC_STATE_STOPPED;
2543 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2544 spin_lock_init(&ccdc->lsc.req_lock);
2545
de1135d4
LP		 2546 ccdc->clamp.oblen = 0;
2547 ccdc->clamp.dcsubval = 0;
2548
de1135d4
LP		 2549 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2550 ccdc_apply_controls(ccdc);
2551
9b6390bd
LP		 2552 ret = ccdc_init_entities(ccdc);
2553 if (ret < 0) {
2554 mutex_destroy(&ccdc->ioctl_lock);
2555 return ret;
2556 }
2557
2558 return 0;
de1135d4
LP		 2559}
2560
2561/*
2562 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2563 * @dev: Device pointer specific to the OMAP3 ISP.
2564 */
2565void omap3isp_ccdc_cleanup(struct isp_device *isp)
2566{
2567 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2568
63b4ca23
LP		 2569 omap3isp_video_cleanup(&ccdc->video_out);
2570 media_entity_cleanup(&ccdc->subdev.entity);
2571
de1135d4
LP		 2572 /* Free LSC requests. As the CCDC is stopped there's no active request,
2573 * so only the pending request and the free queue need to be handled.
2574 */
2575 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2576 cancel_work_sync(&ccdc->lsc.table_work);
2577 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2578
2579 if (ccdc->fpc.fpcaddr != 0)
fabdbca8 2580 omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
ed33ac8e
LP		 2581
2582 mutex_destroy(&ccdc->ioctl_lock);
de1135d4 2583}
Linux kernel - Deliverables
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