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[media] omap3isp: ccdc: Add basic support for interlaced video
[deliverable/linux.git] / drivers / media / platform / omap3isp / ispccdc.c
CommitLineData
de1135d4
LP		 1/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
de1135d4
LP		 15 */
16
17#include <linux/module.h>
18#include <linux/uaccess.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/sched.h>
e74d83aa 24#include <linux/slab.h>
de1135d4
LP		 25#include <media/v4l2-event.h>
26
27#include "isp.h"
28#include "ispreg.h"
29#include "ispccdc.h"
30
a64909b8
LP		 31#define CCDC_MIN_WIDTH 32
32#define CCDC_MIN_HEIGHT 32
33
de1135d4
LP		 34static struct v4l2_mbus_framefmt *
35__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
36 unsigned int pad, enum v4l2_subdev_format_whence which);
37
38static const unsigned int ccdc_fmts[] = {
39 V4L2_MBUS_FMT_Y8_1X8,
5782f97b
MJ		 40 V4L2_MBUS_FMT_Y10_1X10,
41 V4L2_MBUS_FMT_Y12_1X12,
42 V4L2_MBUS_FMT_SGRBG8_1X8,
43 V4L2_MBUS_FMT_SRGGB8_1X8,
44 V4L2_MBUS_FMT_SBGGR8_1X8,
45 V4L2_MBUS_FMT_SGBRG8_1X8,
de1135d4
LP		 46 V4L2_MBUS_FMT_SGRBG10_1X10,
47 V4L2_MBUS_FMT_SRGGB10_1X10,
48 V4L2_MBUS_FMT_SBGGR10_1X10,
49 V4L2_MBUS_FMT_SGBRG10_1X10,
50 V4L2_MBUS_FMT_SGRBG12_1X12,
51 V4L2_MBUS_FMT_SRGGB12_1X12,
52 V4L2_MBUS_FMT_SBGGR12_1X12,
53 V4L2_MBUS_FMT_SGBRG12_1X12,
c51364ca
LP		 54 V4L2_MBUS_FMT_YUYV8_2X8,
55 V4L2_MBUS_FMT_UYVY8_2X8,
de1135d4
LP		 56};
57
58/*
59 * ccdc_print_status - Print current CCDC Module register values.
60 * @ccdc: Pointer to ISP CCDC device.
61 *
62 * Also prints other debug information stored in the CCDC module.
63 */
64#define CCDC_PRINT_REGISTER(isp, name)\
65 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
66 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
67
68static void ccdc_print_status(struct isp_ccdc_device *ccdc)
69{
70 struct isp_device *isp = to_isp_device(ccdc);
71
72 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
73
74 CCDC_PRINT_REGISTER(isp, PCR);
75 CCDC_PRINT_REGISTER(isp, SYN_MODE);
76 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
77 CCDC_PRINT_REGISTER(isp, PIX_LINES);
78 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
79 CCDC_PRINT_REGISTER(isp, VERT_START);
80 CCDC_PRINT_REGISTER(isp, VERT_LINES);
81 CCDC_PRINT_REGISTER(isp, CULLING);
82 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
83 CCDC_PRINT_REGISTER(isp, SDOFST);
84 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
85 CCDC_PRINT_REGISTER(isp, CLAMP);
86 CCDC_PRINT_REGISTER(isp, DCSUB);
87 CCDC_PRINT_REGISTER(isp, COLPTN);
88 CCDC_PRINT_REGISTER(isp, BLKCMP);
89 CCDC_PRINT_REGISTER(isp, FPC);
90 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
91 CCDC_PRINT_REGISTER(isp, VDINT);
92 CCDC_PRINT_REGISTER(isp, ALAW);
93 CCDC_PRINT_REGISTER(isp, REC656IF);
94 CCDC_PRINT_REGISTER(isp, CFG);
95 CCDC_PRINT_REGISTER(isp, FMTCFG);
96 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
97 CCDC_PRINT_REGISTER(isp, FMT_VERT);
98 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
99 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
100 CCDC_PRINT_REGISTER(isp, PRGODD0);
101 CCDC_PRINT_REGISTER(isp, PRGODD1);
102 CCDC_PRINT_REGISTER(isp, VP_OUT);
103 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
104 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
105 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
106 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
107
108 dev_dbg(isp->dev, "--------------------------------------------\n");
109}
110
111/*
112 * omap3isp_ccdc_busy - Get busy state of the CCDC.
113 * @ccdc: Pointer to ISP CCDC device.
114 */
115int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
116{
117 struct isp_device *isp = to_isp_device(ccdc);
118
119 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
120 ISPCCDC_PCR_BUSY;
121}
122
123/* -----------------------------------------------------------------------------
124 * Lens Shading Compensation
125 */
126
127/*
128 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
129 * @ccdc: Pointer to ISP CCDC device.
130 * @lsc_cfg: the LSC configuration to check.
131 *
132 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
133 */
134static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
135 struct omap3isp_ccdc_lsc_config *lsc_cfg)
136{
137 struct isp_device *isp = to_isp_device(ccdc);
138 struct v4l2_mbus_framefmt *format;
139 unsigned int paxel_width, paxel_height;
140 unsigned int paxel_shift_x, paxel_shift_y;
141 unsigned int min_width, min_height, min_size;
142 unsigned int input_width, input_height;
143
144 paxel_shift_x = lsc_cfg->gain_mode_m;
145 paxel_shift_y = lsc_cfg->gain_mode_n;
146
147 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
148 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
149 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
150 return -EINVAL;
151 }
152
153 if (lsc_cfg->offset & 3) {
154 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
155 "4\n");
156 return -EINVAL;
157 }
158
159 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
160 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
161 return -EINVAL;
162 }
163
164 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
165 V4L2_SUBDEV_FORMAT_ACTIVE);
166 input_width = format->width;
167 input_height = format->height;
168
169 /* Calculate minimum bytesize for validation */
170 paxel_width = 1 << paxel_shift_x;
171 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
172 >> paxel_shift_x) + 1;
173
174 paxel_height = 1 << paxel_shift_y;
175 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
176 >> paxel_shift_y) + 1;
177
178 min_size = 4 * min_width * min_height;
179 if (min_size > lsc_cfg->size) {
180 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
181 return -EINVAL;
182 }
183 if (lsc_cfg->offset < (min_width * 4)) {
184 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
185 return -EINVAL;
186 }
187 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
188 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
189 return -EINVAL;
190 }
191 return 0;
192}
193
194/*
195 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
196 * @ccdc: Pointer to ISP CCDC device.
197 */
d33186d0
LP		 198static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
199 dma_addr_t addr)
de1135d4
LP		 200{
201 isp_reg_writel(to_isp_device(ccdc), addr,
202 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
203}
204
205/*
206 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
207 * @ccdc: Pointer to ISP CCDC device.
208 */
209static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
210 struct omap3isp_ccdc_lsc_config *cfg)
211{
212 struct isp_device *isp = to_isp_device(ccdc);
213 int reg;
214
215 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
216 ISPCCDC_LSC_TABLE_OFFSET);
217
218 reg = 0;
219 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
220 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
221 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
222 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
223
224 reg = 0;
225 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
226 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
227 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
228 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
229 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
230 ISPCCDC_LSC_INITIAL);
231}
232
233static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
234{
235 struct isp_device *isp = to_isp_device(ccdc);
236 unsigned int wait;
237
238 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
239 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
240
241 /* timeout 1 ms */
242 for (wait = 0; wait < 1000; wait++) {
243 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
244 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
245 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
246 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
247 return 0;
248 }
249
250 rmb();
251 udelay(1);
252 }
253
254 return -ETIMEDOUT;
255}
256
257/*
258 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
259 * @ccdc: Pointer to ISP CCDC device.
260 * @enable: 0 Disables LSC, 1 Enables LSC.
261 */
262static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
263{
264 struct isp_device *isp = to_isp_device(ccdc);
265 const struct v4l2_mbus_framefmt *format =
266 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
267 V4L2_SUBDEV_FORMAT_ACTIVE);
268
269 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
270 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
271 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
272 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
273 return -EINVAL;
274
275 if (enable)
276 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
277
278 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
279 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
280
281 if (enable) {
282 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
283 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
284 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
285 ccdc->lsc.state = LSC_STATE_STOPPED;
25aeb418 286 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
de1135d4
LP		 287 return -ETIMEDOUT;
288 }
289 ccdc->lsc.state = LSC_STATE_RUNNING;
290 } else {
291 ccdc->lsc.state = LSC_STATE_STOPPING;
292 }
293
294 return 0;
295}
296
297static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
298{
299 struct isp_device *isp = to_isp_device(ccdc);
300
301 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
302 ISPCCDC_LSC_BUSY;
303}
304
305/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
306 * @ccdc: Pointer to ISP CCDC device
307 * @req: New configuration request
308 *
309 * context: in_interrupt()
310 */
311static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
312 struct ispccdc_lsc_config_req *req)
313{
314 if (!req->enable)
315 return -EINVAL;
316
317 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
318 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
319 return -EINVAL;
320 }
321
322 if (ccdc_lsc_busy(ccdc))
323 return -EBUSY;
324
325 ccdc_lsc_setup_regs(ccdc, &req->config);
d33186d0 326 ccdc_lsc_program_table(ccdc, req->table.dma);
de1135d4
LP		 327 return 0;
328}
329
330/*
331 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
332 * @ccdc: Pointer to ISP CCDC device.
333 *
334 * Disables LSC, and defers enablement to shadow registers update time.
335 */
336static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
337{
338 struct isp_device *isp = to_isp_device(ccdc);
339 /*
340 * From OMAP3 TRM: When this event is pending, the module
341 * goes into transparent mode (output =input). Normal
342 * operation can be resumed at the start of the next frame
343 * after:
344 * 1) Clearing this event
345 * 2) Disabling the LSC module
346 * 3) Enabling it
347 */
348 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
349 ISPCCDC_LSC_ENABLE);
350 ccdc->lsc.state = LSC_STATE_STOPPED;
351}
352
353static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
354 struct ispccdc_lsc_config_req *req)
355{
356 struct isp_device *isp = to_isp_device(ccdc);
357
358 if (req == NULL)
359 return;
360
d33186d0
LP		 361 if (req->table.addr) {
362 sg_free_table(&req->table.sgt);
363 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
364 req->table.dma);
365 }
366
de1135d4
LP		 367 kfree(req);
368}
369
370static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
371 struct list_head *queue)
372{
373 struct ispccdc_lsc_config_req *req, *n;
374 unsigned long flags;
375
376 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
377 list_for_each_entry_safe(req, n, queue, list) {
378 list_del(&req->list);
379 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
380 ccdc_lsc_free_request(ccdc, req);
381 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
382 }
383 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
384}
385
386static void ccdc_lsc_free_table_work(struct work_struct *work)
387{
388 struct isp_ccdc_device *ccdc;
389 struct ispccdc_lsc *lsc;
390
391 lsc = container_of(work, struct ispccdc_lsc, table_work);
392 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
393
394 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
395}
396
397/*
398 * ccdc_lsc_config - Configure the LSC module from a userspace request
399 *
400 * Store the request LSC configuration in the LSC engine request pointer. The
401 * configuration will be applied to the hardware when the CCDC will be enabled,
402 * or at the next LSC interrupt if the CCDC is already running.
403 */
404static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
405 struct omap3isp_ccdc_update_config *config)
406{
407 struct isp_device *isp = to_isp_device(ccdc);
408 struct ispccdc_lsc_config_req *req;
409 unsigned long flags;
de1135d4
LP		 410 u16 update;
411 int ret;
412
413 update = config->update &
414 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
415 if (!update)
416 return 0;
417
418 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
419 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
420 "need to be supplied\n", __func__);
421 return -EINVAL;
422 }
423
424 req = kzalloc(sizeof(*req), GFP_KERNEL);
425 if (req == NULL)
426 return -ENOMEM;
427
428 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
429 if (copy_from_user(&req->config, config->lsc_cfg,
430 sizeof(req->config))) {
431 ret = -EFAULT;
432 goto done;
433 }
434
435 req->enable = 1;
436
d33186d0
LP		 437 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
438 &req->table.dma,
439 GFP_KERNEL);
440 if (req->table.addr == NULL) {
de1135d4
LP		 441 ret = -ENOMEM;
442 goto done;
443 }
444
d33186d0
LP		 445 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
446 req->table.addr, req->table.dma,
447 req->config.size);
448 if (ret < 0)
de1135d4 449 goto done;
de1135d4 450
d33186d0
LP		 451 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
452 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4 453
d33186d0
LP		 454 if (copy_from_user(req->table.addr, config->lsc,
455 req->config.size)) {
de1135d4
LP		 456 ret = -EFAULT;
457 goto done;
458 }
459
d33186d0
LP		 460 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
461 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4
LP		 462 }
463
464 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
465 if (ccdc->lsc.request) {
466 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
467 schedule_work(&ccdc->lsc.table_work);
468 }
469 ccdc->lsc.request = req;
470 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
471
472 ret = 0;
473
474done:
475 if (ret < 0)
476 ccdc_lsc_free_request(ccdc, req);
477
478 return ret;
479}
480
481static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
482{
483 unsigned long flags;
484
485 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
486 if (ccdc->lsc.active) {
487 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
488 return 1;
489 }
490 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
491 return 0;
492}
493
494static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
495{
496 struct ispccdc_lsc *lsc = &ccdc->lsc;
497
498 if (lsc->state != LSC_STATE_STOPPED)
499 return -EINVAL;
500
501 if (lsc->active) {
502 list_add_tail(&lsc->active->list, &lsc->free_queue);
503 lsc->active = NULL;
504 }
505
506 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
507 omap3isp_sbl_disable(to_isp_device(ccdc),
508 OMAP3_ISP_SBL_CCDC_LSC_READ);
509 list_add_tail(&lsc->request->list, &lsc->free_queue);
510 lsc->request = NULL;
511 goto done;
512 }
513
514 lsc->active = lsc->request;
515 lsc->request = NULL;
516 __ccdc_lsc_enable(ccdc, 1);
517
518done:
519 if (!list_empty(&lsc->free_queue))
520 schedule_work(&lsc->table_work);
521
522 return 0;
523}
524
525/* -----------------------------------------------------------------------------
526 * Parameters configuration
527 */
528
529/*
530 * ccdc_configure_clamp - Configure optical-black or digital clamping
531 * @ccdc: Pointer to ISP CCDC device.
532 *
533 * The CCDC performs either optical-black or digital clamp. Configure and enable
534 * the selected clamp method.
535 */
536static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
537{
538 struct isp_device *isp = to_isp_device(ccdc);
539 u32 clamp;
540
541 if (ccdc->obclamp) {
542 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
543 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
544 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
545 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
546 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
547 } else {
548 isp_reg_writel(isp, ccdc->clamp.dcsubval,
549 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
550 }
551
552 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
553 ISPCCDC_CLAMP_CLAMPEN,
554 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
555}
556
557/*
558 * ccdc_configure_fpc - Configure Faulty Pixel Correction
559 * @ccdc: Pointer to ISP CCDC device.
560 */
561static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
562{
563 struct isp_device *isp = to_isp_device(ccdc);
564
565 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
566
567 if (!ccdc->fpc_en)
568 return;
569
c60e153d 570 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
de1135d4
LP		 571 ISPCCDC_FPC_ADDR);
572 /* The FPNUM field must be set before enabling FPC. */
573 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
574 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
575 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
576 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
577}
578
579/*
580 * ccdc_configure_black_comp - Configure Black Level Compensation.
581 * @ccdc: Pointer to ISP CCDC device.
582 */
583static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
584{
585 struct isp_device *isp = to_isp_device(ccdc);
586 u32 blcomp;
587
588 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
589 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
590 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
591 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
592
593 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
594}
595
596/*
597 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
598 * @ccdc: Pointer to ISP CCDC device.
599 */
600static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
601{
602 struct isp_device *isp = to_isp_device(ccdc);
603
604 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
605 ISPCCDC_SYN_MODE_LPF,
606 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
607}
608
609/*
610 * ccdc_configure_alaw - Configure A-law compression.
611 * @ccdc: Pointer to ISP CCDC device.
612 */
613static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
614{
615 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 616 const struct isp_format_info *info;
de1135d4
LP		 617 u32 alaw = 0;
618
73ea57eb
LP		 619 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
620
621 switch (info->width) {
de1135d4
LP		 622 case 8:
623 return;
624
625 case 10:
626 alaw = ISPCCDC_ALAW_GWDI_9_0;
627 break;
628 case 11:
629 alaw = ISPCCDC_ALAW_GWDI_10_1;
630 break;
631 case 12:
632 alaw = ISPCCDC_ALAW_GWDI_11_2;
633 break;
634 case 13:
635 alaw = ISPCCDC_ALAW_GWDI_12_3;
636 break;
637 }
638
639 if (ccdc->alaw)
640 alaw |= ISPCCDC_ALAW_CCDTBL;
641
642 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
643}
644
645/*
646 * ccdc_config_imgattr - Configure sensor image specific attributes.
647 * @ccdc: Pointer to ISP CCDC device.
648 * @colptn: Color pattern of the sensor.
649 */
650static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
651{
652 struct isp_device *isp = to_isp_device(ccdc);
653
654 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
655}
656
657/*
658 * ccdc_config - Set CCDC configuration from userspace
659 * @ccdc: Pointer to ISP CCDC device.
872aba51 660 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
de1135d4
LP		 661 *
662 * Returns 0 if successful, -EINVAL if the pointer to the configuration
663 * structure is null, or the copy_from_user function fails to copy user space
664 * memory to kernel space memory.
665 */
666static int ccdc_config(struct isp_ccdc_device *ccdc,
667 struct omap3isp_ccdc_update_config *ccdc_struct)
668{
669 struct isp_device *isp = to_isp_device(ccdc);
670 unsigned long flags;
671
672 spin_lock_irqsave(&ccdc->lock, flags);
673 ccdc->shadow_update = 1;
674 spin_unlock_irqrestore(&ccdc->lock, flags);
675
676 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
677 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
678 ccdc->update |= OMAP3ISP_CCDC_ALAW;
679 }
680
681 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
682 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
683 ccdc->update |= OMAP3ISP_CCDC_LPF;
684 }
685
686 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
687 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
688 sizeof(ccdc->clamp))) {
689 ccdc->shadow_update = 0;
690 return -EFAULT;
691 }
692
693 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
695 }
696
697 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
698 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
699 sizeof(ccdc->blcomp))) {
700 ccdc->shadow_update = 0;
701 return -EFAULT;
702 }
703
704 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
705 }
706
707 ccdc->shadow_update = 0;
708
709 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
c60e153d
LP		 710 struct omap3isp_ccdc_fpc fpc;
711 struct ispccdc_fpc fpc_old = { .addr = NULL, };
712 struct ispccdc_fpc fpc_new;
de1135d4
LP		 713 u32 size;
714
715 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
716 return -EBUSY;
717
718 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
719
720 if (ccdc->fpc_en) {
c60e153d 721 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
de1135d4
LP		 722 return -EFAULT;
723
c60e153d
LP		 724 size = fpc.fpnum * 4;
725
de1135d4 726 /*
c60e153d
LP		 727 * The table address must be 64-bytes aligned, which is
728 * guaranteed by dma_alloc_coherent().
de1135d4 729 */
c60e153d
LP		 730 fpc_new.fpnum = fpc.fpnum;
731 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
732 &fpc_new.dma,
733 GFP_KERNEL);
734 if (fpc_new.addr == NULL)
de1135d4
LP		 735 return -ENOMEM;
736
c60e153d
LP		 737 if (copy_from_user(fpc_new.addr,
738 (__force void __user *)fpc.fpcaddr,
739 size)) {
740 dma_free_coherent(isp->dev, size, fpc_new.addr,
741 fpc_new.dma);
de1135d4
LP		 742 return -EFAULT;
743 }
744
c60e153d
LP		 745 fpc_old = ccdc->fpc;
746 ccdc->fpc = fpc_new;
de1135d4
LP		 747 }
748
749 ccdc_configure_fpc(ccdc);
c60e153d
LP		 750
751 if (fpc_old.addr != NULL)
752 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
753 fpc_old.addr, fpc_old.dma);
de1135d4
LP		 754 }
755
756 return ccdc_lsc_config(ccdc, ccdc_struct);
757}
758
759static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
760{
761 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
762 ccdc_configure_alaw(ccdc);
763 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
764 }
765
766 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
767 ccdc_configure_lpf(ccdc);
768 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
769 }
770
771 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
772 ccdc_configure_clamp(ccdc);
773 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
774 }
775
776 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
777 ccdc_configure_black_comp(ccdc);
778 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
779 }
780}
781
782/*
783 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
872aba51 784 * @isp: Pointer to ISP device
de1135d4
LP		 785 */
786void omap3isp_ccdc_restore_context(struct isp_device *isp)
787{
788 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
789
790 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
791
792 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
793 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
794 ccdc_apply_controls(ccdc);
795 ccdc_configure_fpc(ccdc);
796}
797
798/* -----------------------------------------------------------------------------
799 * Format- and pipeline-related configuration helpers
800 */
801
802/*
803 * ccdc_config_vp - Configure the Video Port.
804 * @ccdc: Pointer to ISP CCDC device.
805 */
806static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
807{
808 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
809 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 810 const struct isp_format_info *info;
de1135d4
LP		 811 unsigned long l3_ick = pipe->l3_ick;
812 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
813 unsigned int div = 0;
814 u32 fmtcfg_vp;
815
816 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
817 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
818
73ea57eb
LP		 819 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
820
821 switch (info->width) {
de1135d4
LP		 822 case 8:
823 case 10:
824 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
825 break;
826 case 11:
827 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
828 break;
829 case 12:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
831 break;
832 case 13:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
834 break;
13eaaa7f 835 }
de1135d4
LP		 836
837 if (pipe->input)
838 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
c6c01f97
SA		 839 else if (pipe->external_rate)
840 div = l3_ick / pipe->external_rate;
de1135d4
LP		 841
842 div = clamp(div, 2U, max_div);
843 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
844
845 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
846}
847
848/*
849 * ccdc_enable_vp - Enable Video Port.
850 * @ccdc: Pointer to ISP CCDC device.
851 * @enable: 0 Disables VP, 1 Enables VP
852 *
853 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
854 */
855static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
856{
857 struct isp_device *isp = to_isp_device(ccdc);
858
859 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
860 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
861}
862
863/*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
866 * @offset: Address offset to start a new line. Must be twice the
867 * Output width and aligned on 32 byte boundary
868 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
869 * output.
870 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
871 *
872 * - Configures the output line offset when stored in memory
873 * - Sets the odd/even line pattern to store the output
874 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
875 * - Configures the number of even and odd line fields in case of rearranging
876 * the lines.
877 */
878static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
879 u32 offset, u8 oddeven, u8 numlines)
880{
881 struct isp_device *isp = to_isp_device(ccdc);
882
883 isp_reg_writel(isp, offset & 0xffff,
884 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
885
886 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
887 ISPCCDC_SDOFST_FINV);
888
889 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
890 ISPCCDC_SDOFST_FOFST_4L);
891
892 switch (oddeven) {
893 case EVENEVEN:
894 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
895 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
896 break;
897 case ODDEVEN:
898 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
899 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
900 break;
901 case EVENODD:
902 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
903 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
904 break;
905 case ODDODD:
906 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
907 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
908 break;
909 default:
910 break;
911 }
912}
913
914/*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
921static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922{
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926}
927
928/*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
935void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937{
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954}
955
956/*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
73ea57eb
LP		 959 * @pdata: Parallel interface platform data (may be NULL)
960 * @data_size: Data size
de1135d4
LP		 961 */
962static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
73ea57eb
LP		 963 struct isp_parallel_platform_data *pdata,
964 unsigned int data_size)
de1135d4
LP		 965{
966 struct isp_device *isp = to_isp_device(ccdc);
c51364ca 967 const struct v4l2_mbus_framefmt *format;
cf7a3d91 968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
de1135d4 969
c51364ca
LP		 970 format = &ccdc->formats[CCDC_PAD_SINK];
971
972 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
973 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
974 /* The bridge is enabled for YUV8 formats. Configure the input
975 * mode accordingly.
976 */
977 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
978 }
979
73ea57eb 980 switch (data_size) {
de1135d4
LP		 981 case 8:
982 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
983 break;
984 case 10:
985 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
986 break;
987 case 11:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
989 break;
990 case 12:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
992 break;
13eaaa7f 993 }
de1135d4 994
73ea57eb 995 if (pdata && pdata->data_pol)
de1135d4 996 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
de1135d4 997
73ea57eb 998 if (pdata && pdata->hs_pol)
de1135d4 999 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
de1135d4 1000
73ea57eb 1001 if (pdata && pdata->vs_pol)
de1135d4 1002 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
de1135d4 1003
9a36d8ed
LP		 1004 if (pdata && pdata->fld_pol)
1005 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1006
de1135d4 1007 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
c51364ca
LP		 1008
1009 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1010 * hardware seems to ignore it in all other input modes.
1011 */
1012 if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1013 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1014 ISPCCDC_CFG_Y8POS);
1015 else
1016 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1017 ISPCCDC_CFG_Y8POS);
1018
1019 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1020 ISPCCDC_REC656IF_R656ON);
de1135d4
LP		 1021}
1022
1023/* CCDC formats descriptions */
1024static const u32 ccdc_sgrbg_pattern =
1025 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1026 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1027 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1028 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1029 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1030 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1031 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1032 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1033 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1034 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1035 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1036 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1037 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1038 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1039 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1040 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1041
1042static const u32 ccdc_srggb_pattern =
1043 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1046 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1047 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1050 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1054 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1058 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1059
1060static const u32 ccdc_sbggr_pattern =
1061 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1062 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1063 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1064 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1065 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1066 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1067 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1068 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1069 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1070 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1071 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1073 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1074 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1075 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1076 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1077
1078static const u32 ccdc_sgbrg_pattern =
1079 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1082 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1083 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1086 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1090 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1094 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1095
1096static void ccdc_configure(struct isp_ccdc_device *ccdc)
1097{
1098 struct isp_device *isp = to_isp_device(ccdc);
1099 struct isp_parallel_platform_data *pdata = NULL;
1100 struct v4l2_subdev *sensor;
1101 struct v4l2_mbus_framefmt *format;
a64909b8 1102 const struct v4l2_rect *crop;
c09af044
MJ		 1103 const struct isp_format_info *fmt_info;
1104 struct v4l2_subdev_format fmt_src;
1105 unsigned int depth_out;
1106 unsigned int depth_in = 0;
de1135d4
LP		 1107 struct media_pad *pad;
1108 unsigned long flags;
c51364ca 1109 unsigned int bridge;
c09af044 1110 unsigned int shift;
de1135d4
LP		 1111 u32 syn_mode;
1112 u32 ccdc_pattern;
1113
1bddf1b3 1114 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
c09af044
MJ		 1115 sensor = media_entity_to_v4l2_subdev(pad->entity);
1116 if (ccdc->input == CCDC_INPUT_PARALLEL)
de1135d4
LP		 1117 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1118 ->bus.parallel;
c09af044 1119
2e8f0172
LP		 1120 /* CCDC_PAD_SINK */
1121 format = &ccdc->formats[CCDC_PAD_SINK];
1122
c51364ca
LP		 1123 /* Compute the lane shifter shift value and enable the bridge when the
1124 * input format is YUV.
1125 */
c09af044
MJ		 1126 fmt_src.pad = pad->index;
1127 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1128 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1129 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1697e49a 1130 depth_in = fmt_info->width;
de1135d4
LP		 1131 }
1132
2e8f0172 1133 fmt_info = omap3isp_video_format_info(format->code);
1697e49a 1134 depth_out = fmt_info->width;
c09af044 1135 shift = depth_in - depth_out;
de1135d4 1136
c51364ca
LP		 1137 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1138 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1139 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1140 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1141 else
1142 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
de1135d4 1143
c51364ca
LP		 1144 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1145
9a36d8ed 1146 /* Configure the sync interface. */
c51364ca 1147 ccdc_config_sync_if(ccdc, pdata, depth_out);
de1135d4
LP		 1148
1149 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1150
1151 /* Use the raw, unprocessed data when writing to memory. The H3A and
1152 * histogram modules are still fed with lens shading corrected data.
1153 */
1154 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1155
1156 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1157 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1158 else
1159 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1160
1161 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1162 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1163 else
1164 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1165
de1135d4
LP		 1166 /* Mosaic filter */
1167 switch (format->code) {
1168 case V4L2_MBUS_FMT_SRGGB10_1X10:
1169 case V4L2_MBUS_FMT_SRGGB12_1X12:
1170 ccdc_pattern = ccdc_srggb_pattern;
1171 break;
1172 case V4L2_MBUS_FMT_SBGGR10_1X10:
1173 case V4L2_MBUS_FMT_SBGGR12_1X12:
1174 ccdc_pattern = ccdc_sbggr_pattern;
1175 break;
1176 case V4L2_MBUS_FMT_SGBRG10_1X10:
1177 case V4L2_MBUS_FMT_SGBRG12_1X12:
1178 ccdc_pattern = ccdc_sgbrg_pattern;
1179 break;
1180 default:
1181 /* Use GRBG */
1182 ccdc_pattern = ccdc_sgrbg_pattern;
1183 break;
1184 }
1185 ccdc_config_imgattr(ccdc, ccdc_pattern);
1186
1187 /* Generate VD0 on the last line of the image and VD1 on the
1188 * 2/3 height line.
1189 */
1190 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1191 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1192 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1193
1194 /* CCDC_PAD_SOURCE_OF */
c51364ca 1195 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
a64909b8 1196 crop = &ccdc->crop;
de1135d4 1197
a64909b8
LP		 1198 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1199 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
de1135d4 1200 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
a64909b8 1201 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
de1135d4 1202 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
a64909b8 1203 isp_reg_writel(isp, (crop->height - 1)
de1135d4
LP		 1204 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1205 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1206
1207 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1208
c51364ca
LP		 1209 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1210 * YUYV.
1211 */
1212 if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1213 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1214 ISPCCDC_CFG_BSWD);
1215 else
1216 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1217 ISPCCDC_CFG_BSWD);
1218
1219 /* Use PACK8 mode for 1byte per pixel formats. */
1220 if (omap3isp_video_format_info(format->code)->width <= 8)
1221 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1222 else
1223 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1224
1225 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1226
de1135d4
LP		 1227 /* CCDC_PAD_SOURCE_VP */
1228 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1229
1230 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1231 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1232 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1233 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1234 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1235 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1236
1237 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1238 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1239 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1240
c51364ca 1241 /* Lens shading correction. */
de1135d4
LP		 1242 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1243 if (ccdc->lsc.request == NULL)
1244 goto unlock;
1245
1246 WARN_ON(ccdc->lsc.active);
1247
1248 /* Get last good LSC configuration. If it is not supported for
1249 * the current active resolution discard it.
1250 */
1251 if (ccdc->lsc.active == NULL &&
1252 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1253 ccdc->lsc.active = ccdc->lsc.request;
1254 } else {
1255 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1256 schedule_work(&ccdc->lsc.table_work);
1257 }
1258
1259 ccdc->lsc.request = NULL;
1260
1261unlock:
1262 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1263
1264 ccdc_apply_controls(ccdc);
1265}
1266
1267static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1268{
1269 struct isp_device *isp = to_isp_device(ccdc);
1270
1271 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1272 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1273}
1274
1275static int ccdc_disable(struct isp_ccdc_device *ccdc)
1276{
1277 unsigned long flags;
1278 int ret = 0;
1279
1280 spin_lock_irqsave(&ccdc->lock, flags);
1281 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1282 ccdc->stopping = CCDC_STOP_REQUEST;
1283 spin_unlock_irqrestore(&ccdc->lock, flags);
1284
1285 ret = wait_event_timeout(ccdc->wait,
1286 ccdc->stopping == CCDC_STOP_FINISHED,
1287 msecs_to_jiffies(2000));
1288 if (ret == 0) {
1289 ret = -ETIMEDOUT;
1290 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1291 }
1292
1293 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1294
1295 mutex_lock(&ccdc->ioctl_lock);
1296 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1297 ccdc->lsc.request = ccdc->lsc.active;
1298 ccdc->lsc.active = NULL;
1299 cancel_work_sync(&ccdc->lsc.table_work);
1300 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1301 mutex_unlock(&ccdc->ioctl_lock);
1302
1303 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1304
1305 return ret > 0 ? 0 : ret;
1306}
1307
1308static void ccdc_enable(struct isp_ccdc_device *ccdc)
1309{
1310 if (ccdc_lsc_is_configured(ccdc))
1311 __ccdc_lsc_enable(ccdc, 1);
1312 __ccdc_enable(ccdc, 1);
1313}
1314
1315/* -----------------------------------------------------------------------------
1316 * Interrupt handling
1317 */
1318
1319/*
1320 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1321 * @ccdc: Pointer to ISP CCDC device.
1322 *
1323 * Returns zero if the CCDC is idle and the image has been written to
1324 * memory, too.
1325 */
1326static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1327{
1328 struct isp_device *isp = to_isp_device(ccdc);
1329
1330 return omap3isp_ccdc_busy(ccdc)
1331 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1332 ISPSBL_CCDC_WR_0_DATA_READY)
1333 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1334 ISPSBL_CCDC_WR_0_DATA_READY)
1335 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1336 ISPSBL_CCDC_WR_0_DATA_READY)
1337 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1338 ISPSBL_CCDC_WR_0_DATA_READY);
1339}
1340
1341/*
1342 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1343 * @ccdc: Pointer to ISP CCDC device.
1344 * @max_wait: Max retry count in us for wait for idle/busy transition.
1345 */
1346static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1347 unsigned int max_wait)
1348{
1349 unsigned int wait = 0;
1350
1351 if (max_wait == 0)
1352 max_wait = 10000; /* 10 ms */
1353
1354 for (wait = 0; wait <= max_wait; wait++) {
1355 if (!ccdc_sbl_busy(ccdc))
1356 return 0;
1357
1358 rmb();
1359 udelay(1);
1360 }
1361
1362 return -EBUSY;
1363}
1364
1365/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1366 * @ccdc: Pointer to ISP CCDC device.
1367 * @event: Pointing which event trigger handler
1368 *
2d4e9d1d 1369 * Return 1 when the event and stopping request combination is satisfied,
de1135d4
LP		 1370 * zero otherwise.
1371 */
1372static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1373{
1374 int rval = 0;
1375
1376 switch ((ccdc->stopping & 3) | event) {
1377 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1378 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1379 __ccdc_lsc_enable(ccdc, 0);
1380 __ccdc_enable(ccdc, 0);
1381 ccdc->stopping = CCDC_STOP_EXECUTED;
1382 return 1;
1383
1384 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1385 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1386 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1387 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1388 rval = 1;
1389 break;
1390
1391 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1392 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1393 rval = 1;
1394 break;
1395
1396 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1397 return 1;
1398 }
1399
1400 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1401 wake_up(&ccdc->wait);
1402 rval = 1;
1403 }
1404
1405 return rval;
1406}
1407
1408static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1409{
bd0f2e6d 1410 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
63ae37ea 1411 struct video_device *vdev = ccdc->subdev.devnode;
de1135d4
LP		 1412 struct v4l2_event event;
1413
b43883d6
LP		 1414 /* Frame number propagation */
1415 atomic_inc(&pipe->frame_number);
1416
de1135d4 1417 memset(&event, 0, sizeof(event));
69d232ae
SA		 1418 event.type = V4L2_EVENT_FRAME_SYNC;
1419 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
de1135d4
LP		 1420
1421 v4l2_event_queue(vdev, &event);
1422}
1423
1424/*
1425 * ccdc_lsc_isr - Handle LSC events
1426 * @ccdc: Pointer to ISP CCDC device.
1427 * @events: LSC events
1428 */
1429static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1430{
1431 unsigned long flags;
1432
1433 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
875e2e3e
LP		 1434 struct isp_pipeline *pipe =
1435 to_isp_pipeline(&ccdc->subdev.entity);
1436
de1135d4 1437 ccdc_lsc_error_handler(ccdc);
875e2e3e 1438 pipe->error = true;
de1135d4
LP		 1439 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1440 }
1441
1442 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1443 return;
1444
1445 /* LSC_DONE interrupt occur, there are two cases
1446 * 1. stopping for reconfiguration
1447 * 2. stopping because of STREAM OFF command
1448 */
1449 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1450
1451 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1452 ccdc->lsc.state = LSC_STATE_STOPPED;
1453
1454 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1455 goto done;
1456
1457 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1458 goto done;
1459
1460 /* LSC is in STOPPING state, change to the new state */
1461 ccdc->lsc.state = LSC_STATE_STOPPED;
1462
1463 /* This is an exception. Start of frame and LSC_DONE interrupt
1464 * have been received on the same time. Skip this event and wait
1465 * for better times.
1466 */
1467 if (events & IRQ0STATUS_HS_VS_IRQ)
1468 goto done;
1469
1470 /* The LSC engine is stopped at this point. Enable it if there's a
1471 * pending request.
1472 */
1473 if (ccdc->lsc.request == NULL)
1474 goto done;
1475
1476 ccdc_lsc_enable(ccdc);
1477
1478done:
1479 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1480}
1481
1482static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1483{
1484 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1485 struct isp_device *isp = to_isp_device(ccdc);
1486 struct isp_buffer *buffer;
de1135d4
LP		 1487
1488 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1489 * doesn't explicitly state if that's supposed to happen or not, so it
1490 * can be considered as a hardware bug or as a feature, but we have to
1491 * deal with it anyway). Disabling the CCDC when no buffer is available
1492 * would thus not be enough, we need to handle the situation explicitly.
1493 */
1494 if (list_empty(&ccdc->video_out.dmaqueue))
0a7b1a01 1495 return 0;
de1135d4
LP		 1496
1497 /* We're in continuous mode, and memory writes were disabled due to a
1498 * buffer underrun. Reenable them now that we have a buffer. The buffer
1499 * address has been set in ccdc_video_queue.
1500 */
1501 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
de1135d4 1502 ccdc->underrun = 0;
0a7b1a01 1503 return 1;
de1135d4
LP		 1504 }
1505
9a36d8ed
LP		 1506 /* When capturing fields in alternate order read the current field
1507 * identifier and store it in the pipeline.
1508 */
1509 if (ccdc->formats[CCDC_PAD_SOURCE_OF].field == V4L2_FIELD_ALTERNATE) {
1510 u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
1511 ISPCCDC_SYN_MODE);
1512
1513 pipe->field = syn_mode & ISPCCDC_SYN_MODE_FLDSTAT
1514 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1515 }
1516
de1135d4
LP		 1517 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1518 dev_info(isp->dev, "CCDC won't become idle!\n");
9554b7db
LP		 1519 isp->crashed |= 1U << ccdc->subdev.entity.id;
1520 omap3isp_pipeline_cancel_stream(pipe);
0a7b1a01 1521 return 0;
de1135d4
LP		 1522 }
1523
875e2e3e 1524 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
0a7b1a01 1525 if (buffer != NULL)
21d8582d 1526 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4
LP		 1527
1528 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1529
1530 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1531 isp_pipeline_ready(pipe))
1532 omap3isp_pipeline_set_stream(pipe,
1533 ISP_PIPELINE_STREAM_SINGLESHOT);
1534
0a7b1a01 1535 return buffer != NULL;
de1135d4
LP		 1536}
1537
1538/*
1539 * ccdc_vd0_isr - Handle VD0 event
1540 * @ccdc: Pointer to ISP CCDC device.
1541 *
1542 * Executes LSC deferred enablement before next frame starts.
1543 */
1544static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1545{
1546 unsigned long flags;
1547 int restart = 0;
1548
1549 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1550 restart = ccdc_isr_buffer(ccdc);
1551
1552 spin_lock_irqsave(&ccdc->lock, flags);
1553 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1554 spin_unlock_irqrestore(&ccdc->lock, flags);
1555 return;
1556 }
1557
1558 if (!ccdc->shadow_update)
1559 ccdc_apply_controls(ccdc);
1560 spin_unlock_irqrestore(&ccdc->lock, flags);
1561
1562 if (restart)
1563 ccdc_enable(ccdc);
1564}
1565
1566/*
1567 * ccdc_vd1_isr - Handle VD1 event
1568 * @ccdc: Pointer to ISP CCDC device.
1569 */
1570static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1571{
1572 unsigned long flags;
1573
1574 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1575
1576 /*
1577 * Depending on the CCDC pipeline state, CCDC stopping should be
1578 * handled differently. In SINGLESHOT we emulate an internal CCDC
1579 * stopping because the CCDC hw works only in continuous mode.
1580 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1581 * data to memory the CCDC and LSC are stopped immediately but
1582 * without change the CCDC stopping state machine. The CCDC
1583 * stopping state machine should be used only when user request
1584 * for stopping is received (SINGLESHOT is an exeption).
1585 */
1586 switch (ccdc->state) {
1587 case ISP_PIPELINE_STREAM_SINGLESHOT:
1588 ccdc->stopping = CCDC_STOP_REQUEST;
1589 break;
1590
1591 case ISP_PIPELINE_STREAM_CONTINUOUS:
1592 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1593 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1594 __ccdc_lsc_enable(ccdc, 0);
1595 __ccdc_enable(ccdc, 0);
1596 }
1597 break;
1598
1599 case ISP_PIPELINE_STREAM_STOPPED:
1600 break;
1601 }
1602
1603 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1604 goto done;
1605
1606 if (ccdc->lsc.request == NULL)
1607 goto done;
1608
1609 /*
1610 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1611 * do the appropriate changes in registers
1612 */
1613 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1614 __ccdc_lsc_enable(ccdc, 0);
1615 ccdc->lsc.state = LSC_STATE_RECONFIG;
1616 goto done;
1617 }
1618
1619 /* LSC has been in STOPPED state, enable it */
1620 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1621 ccdc_lsc_enable(ccdc);
1622
1623done:
1624 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1625}
1626
1627/*
1628 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1629 * @ccdc: Pointer to ISP CCDC device.
1630 * @events: CCDC events
1631 */
1632int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1633{
1634 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1635 return 0;
1636
1637 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1638 ccdc_vd1_isr(ccdc);
1639
1640 ccdc_lsc_isr(ccdc, events);
1641
1642 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1643 ccdc_vd0_isr(ccdc);
1644
1645 if (events & IRQ0STATUS_HS_VS_IRQ)
1646 ccdc_hs_vs_isr(ccdc);
1647
1648 return 0;
1649}
1650
1651/* -----------------------------------------------------------------------------
1652 * ISP video operations
1653 */
1654
1655static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1656{
1657 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1658
1659 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1660 return -ENODEV;
1661
21d8582d 1662 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4 1663
2d4e9d1d 1664 /* We now have a buffer queued on the output, restart the pipeline
de1135d4
LP		 1665 * on the next CCDC interrupt if running in continuous mode (or when
1666 * starting the stream).
1667 */
1668 ccdc->underrun = 1;
1669
1670 return 0;
1671}
1672
1673static const struct isp_video_operations ccdc_video_ops = {
1674 .queue = ccdc_video_queue,
1675};
1676
1677/* -----------------------------------------------------------------------------
1678 * V4L2 subdev operations
1679 */
1680
1681/*
1682 * ccdc_ioctl - CCDC module private ioctl's
1683 * @sd: ISP CCDC V4L2 subdevice
1684 * @cmd: ioctl command
1685 * @arg: ioctl argument
1686 *
1687 * Return 0 on success or a negative error code otherwise.
1688 */
1689static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1690{
1691 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1692 int ret;
1693
1694 switch (cmd) {
1695 case VIDIOC_OMAP3ISP_CCDC_CFG:
1696 mutex_lock(&ccdc->ioctl_lock);
1697 ret = ccdc_config(ccdc, arg);
1698 mutex_unlock(&ccdc->ioctl_lock);
1699 break;
1700
1701 default:
1702 return -ENOIOCTLCMD;
1703 }
1704
1705 return ret;
1706}
1707
1708static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1709 struct v4l2_event_subscription *sub)
de1135d4 1710{
69d232ae
SA		 1711 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1712 return -EINVAL;
1713
1714 /* line number is zero at frame start */
1715 if (sub->id != 0)
de1135d4
LP		 1716 return -EINVAL;
1717
c53c2549 1718 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
de1135d4
LP		 1719}
1720
1721static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1722 struct v4l2_event_subscription *sub)
de1135d4
LP		 1723{
1724 return v4l2_event_unsubscribe(fh, sub);
1725}
1726
1727/*
1728 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1729 * @sd: ISP CCDC V4L2 subdevice
1730 * @enable: Enable/disable stream
1731 *
1732 * When writing to memory, the CCDC hardware can't be enabled without a memory
1733 * buffer to write to. As the s_stream operation is called in response to a
1734 * STREAMON call without any buffer queued yet, just update the enabled field
1735 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1736 *
1737 * When not writing to memory enable the CCDC immediately.
1738 */
1739static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1740{
1741 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1742 struct isp_device *isp = to_isp_device(ccdc);
1743 int ret = 0;
1744
1745 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1746 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1747 return 0;
1748
1749 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1750 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1751 ISPCCDC_CFG_VDLC);
1752
1753 ccdc_configure(ccdc);
1754
1755 /* TODO: Don't configure the video port if all of its output
1756 * links are inactive.
1757 */
1758 ccdc_config_vp(ccdc);
1759 ccdc_enable_vp(ccdc, 1);
de1135d4
LP		 1760 ccdc_print_status(ccdc);
1761 }
1762
1763 switch (enable) {
1764 case ISP_PIPELINE_STREAM_CONTINUOUS:
1765 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1766 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1767
1768 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1769 ccdc_enable(ccdc);
1770
1771 ccdc->underrun = 0;
1772 break;
1773
1774 case ISP_PIPELINE_STREAM_SINGLESHOT:
1775 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1776 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1777 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1778
1779 ccdc_enable(ccdc);
1780 break;
1781
1782 case ISP_PIPELINE_STREAM_STOPPED:
1783 ret = ccdc_disable(ccdc);
1784 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1785 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1786 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1787 ccdc->underrun = 0;
1788 break;
1789 }
1790
1791 ccdc->state = enable;
1792 return ret;
1793}
1794
1795static struct v4l2_mbus_framefmt *
1796__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1797 unsigned int pad, enum v4l2_subdev_format_whence which)
1798{
1799 if (which == V4L2_SUBDEV_FORMAT_TRY)
1800 return v4l2_subdev_get_try_format(fh, pad);
1801 else
1802 return &ccdc->formats[pad];
1803}
1804
a64909b8
LP		 1805static struct v4l2_rect *
1806__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1807 enum v4l2_subdev_format_whence which)
1808{
1809 if (which == V4L2_SUBDEV_FORMAT_TRY)
1810 return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1811 else
1812 return &ccdc->crop;
1813}
1814
de1135d4
LP		 1815/*
1816 * ccdc_try_format - Try video format on a pad
1817 * @ccdc: ISP CCDC device
1818 * @fh : V4L2 subdev file handle
1819 * @pad: Pad number
1820 * @fmt: Format
1821 */
1822static void
1823ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1824 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1825 enum v4l2_subdev_format_whence which)
1826{
de1135d4 1827 const struct isp_format_info *info;
c51364ca 1828 enum v4l2_mbus_pixelcode pixelcode;
de1135d4
LP		 1829 unsigned int width = fmt->width;
1830 unsigned int height = fmt->height;
a64909b8 1831 struct v4l2_rect *crop;
de1135d4
LP		 1832 unsigned int i;
1833
1834 switch (pad) {
1835 case CCDC_PAD_SINK:
de1135d4
LP		 1836 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1837 if (fmt->code == ccdc_fmts[i])
1838 break;
1839 }
1840
1841 /* If not found, use SGRBG10 as default */
1842 if (i >= ARRAY_SIZE(ccdc_fmts))
1843 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1844
1845 /* Clamp the input size. */
1846 fmt->width = clamp_t(u32, width, 32, 4096);
1847 fmt->height = clamp_t(u32, height, 32, 4096);
9a36d8ed
LP		 1848
1849 /* Default to progressive field order. */
1850 if (fmt->field == V4L2_FIELD_ANY)
1851 fmt->field = V4L2_FIELD_NONE;
1852
de1135d4
LP		 1853 break;
1854
1855 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1856 pixelcode = fmt->code;
1857 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1858
1859 /* YUV formats are converted from 2X8 to 1X16 by the bridge and
1860 * can be byte-swapped.
1861 */
1862 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1863 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1864 /* Use the user requested format if YUV. */
1865 if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1866 pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1867 pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1868 pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1869 fmt->code = pixelcode;
1870
1871 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1872 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1873 else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1874 fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1875 }
de1135d4 1876
a64909b8
LP		 1877 /* Hardcode the output size to the crop rectangle size. */
1878 crop = __ccdc_get_crop(ccdc, fh, which);
1879 fmt->width = crop->width;
1880 fmt->height = crop->height;
de1135d4
LP		 1881 break;
1882
1883 case CCDC_PAD_SOURCE_VP:
c51364ca 1884 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
de1135d4
LP		 1885
1886 /* The video port interface truncates the data to 10 bits. */
1887 info = omap3isp_video_format_info(fmt->code);
1888 fmt->code = info->truncated;
1889
c51364ca
LP		 1890 /* YUV formats are not supported by the video port. */
1891 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1892 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1893 fmt->code = 0;
1894
de1135d4
LP		 1895 /* The number of lines that can be clocked out from the video
1896 * port output must be at least one line less than the number
1897 * of input lines.
1898 */
1899 fmt->width = clamp_t(u32, width, 32, fmt->width);
1900 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1901 break;
1902 }
1903
1904 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1905 * stored on 2 bytes.
1906 */
1907 fmt->colorspace = V4L2_COLORSPACE_SRGB;
de1135d4
LP		 1908}
1909
a64909b8
LP		 1910/*
1911 * ccdc_try_crop - Validate a crop rectangle
1912 * @ccdc: ISP CCDC device
1913 * @sink: format on the sink pad
1914 * @crop: crop rectangle to be validated
1915 */
1916static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1917 const struct v4l2_mbus_framefmt *sink,
1918 struct v4l2_rect *crop)
1919{
1920 const struct isp_format_info *info;
1921 unsigned int max_width;
1922
1923 /* For Bayer formats, restrict left/top and width/height to even values
1924 * to keep the Bayer pattern.
1925 */
1926 info = omap3isp_video_format_info(sink->code);
1927 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1928 crop->left &= ~1;
1929 crop->top &= ~1;
1930 }
1931
1932 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1933 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1934
1935 /* The data formatter truncates the number of horizontal output pixels
1936 * to a multiple of 16. To avoid clipping data, allow callers to request
1937 * an output size bigger than the input size up to the nearest multiple
1938 * of 16.
1939 */
1940 max_width = (sink->width - crop->left + 15) & ~15;
1941 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1942 & ~15;
1943 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1944 sink->height - crop->top);
1945
1946 /* Odd width/height values don't make sense for Bayer formats. */
1947 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1948 crop->width &= ~1;
1949 crop->height &= ~1;
1950 }
1951}
1952
de1135d4
LP		 1953/*
1954 * ccdc_enum_mbus_code - Handle pixel format enumeration
1955 * @sd : pointer to v4l2 subdev structure
1956 * @fh : V4L2 subdev file handle
1957 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1958 * return -EINVAL or zero on success
1959 */
1960static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1961 struct v4l2_subdev_fh *fh,
1962 struct v4l2_subdev_mbus_code_enum *code)
1963{
1964 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1965 struct v4l2_mbus_framefmt *format;
1966
1967 switch (code->pad) {
1968 case CCDC_PAD_SINK:
1969 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1970 return -EINVAL;
1971
1972 code->code = ccdc_fmts[code->index];
1973 break;
1974
1975 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1976 format = __ccdc_get_format(ccdc, fh, code->pad,
1977 V4L2_SUBDEV_FORMAT_TRY);
1978
1979 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1980 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1981 /* In YUV mode the CCDC can swap bytes. */
1982 if (code->index == 0)
1983 code->code = V4L2_MBUS_FMT_YUYV8_1X16;
1984 else if (code->index == 1)
1985 code->code = V4L2_MBUS_FMT_UYVY8_1X16;
1986 else
1987 return -EINVAL;
1988 } else {
1989 /* In raw mode, no configurable format confversion is
1990 * available.
1991 */
1992 if (code->index == 0)
1993 code->code = format->code;
1994 else
1995 return -EINVAL;
1996 }
1997 break;
1998
de1135d4 1999 case CCDC_PAD_SOURCE_VP:
c51364ca
LP		 2000 /* The CCDC supports no configurable format conversion
2001 * compatible with the video port. Enumerate a single output
2002 * format code.
2003 */
de1135d4
LP		 2004 if (code->index != 0)
2005 return -EINVAL;
2006
c51364ca 2007 format = __ccdc_get_format(ccdc, fh, code->pad,
de1135d4
LP		 2008 V4L2_SUBDEV_FORMAT_TRY);
2009
c51364ca
LP		 2010 /* A pixel code equal to 0 means that the video port doesn't
2011 * support the input format. Don't enumerate any pixel code.
2012 */
2013 if (format->code == 0)
2014 return -EINVAL;
2015
de1135d4
LP		 2016 code->code = format->code;
2017 break;
2018
2019 default:
2020 return -EINVAL;
2021 }
2022
2023 return 0;
2024}
2025
2026static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2027 struct v4l2_subdev_fh *fh,
2028 struct v4l2_subdev_frame_size_enum *fse)
2029{
2030 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2031 struct v4l2_mbus_framefmt format;
2032
2033 if (fse->index != 0)
2034 return -EINVAL;
2035
2036 format.code = fse->code;
2037 format.width = 1;
2038 format.height = 1;
2039 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2040 fse->min_width = format.width;
2041 fse->min_height = format.height;
2042
2043 if (format.code != fse->code)
2044 return -EINVAL;
2045
2046 format.code = fse->code;
2047 format.width = -1;
2048 format.height = -1;
2049 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2050 fse->max_width = format.width;
2051 fse->max_height = format.height;
2052
2053 return 0;
2054}
2055
a64909b8
LP		 2056/*
2057 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2058 * @sd: ISP CCDC V4L2 subdevice
2059 * @fh: V4L2 subdev file handle
2060 * @sel: Selection rectangle
2061 *
2062 * The only supported rectangles are the crop rectangles on the output formatter
2063 * source pad.
2064 *
2065 * Return 0 on success or a negative error code otherwise.
2066 */
2067static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2068 struct v4l2_subdev_selection *sel)
2069{
2070 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2071 struct v4l2_mbus_framefmt *format;
2072
2073 if (sel->pad != CCDC_PAD_SOURCE_OF)
2074 return -EINVAL;
2075
2076 switch (sel->target) {
5689b288 2077 case V4L2_SEL_TGT_CROP_BOUNDS:
a64909b8
LP		 2078 sel->r.left = 0;
2079 sel->r.top = 0;
2080 sel->r.width = INT_MAX;
2081 sel->r.height = INT_MAX;
2082
2083 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2084 ccdc_try_crop(ccdc, format, &sel->r);
2085 break;
2086
5689b288 2087 case V4L2_SEL_TGT_CROP:
a64909b8
LP		 2088 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2089 break;
2090
2091 default:
2092 return -EINVAL;
2093 }
2094
2095 return 0;
2096}
2097
2098/*
2099 * ccdc_set_selection - Set a selection rectangle on a pad
2100 * @sd: ISP CCDC V4L2 subdevice
2101 * @fh: V4L2 subdev file handle
2102 * @sel: Selection rectangle
2103 *
2104 * The only supported rectangle is the actual crop rectangle on the output
2105 * formatter source pad.
2106 *
2107 * Return 0 on success or a negative error code otherwise.
2108 */
2109static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2110 struct v4l2_subdev_selection *sel)
2111{
2112 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2113 struct v4l2_mbus_framefmt *format;
2114
5689b288 2115 if (sel->target != V4L2_SEL_TGT_CROP ||
a64909b8
LP		 2116 sel->pad != CCDC_PAD_SOURCE_OF)
2117 return -EINVAL;
2118
2119 /* The crop rectangle can't be changed while streaming. */
2120 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2121 return -EBUSY;
2122
2123 /* Modifying the crop rectangle always changes the format on the source
2124 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2125 * rectangle.
2126 */
563df3d0 2127 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
a64909b8
LP		 2128 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2129 return 0;
2130 }
2131
2132 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2133 ccdc_try_crop(ccdc, format, &sel->r);
2134 *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2135
2136 /* Update the source format. */
2137 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2138 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2139
2140 return 0;
2141}
2142
de1135d4
LP		 2143/*
2144 * ccdc_get_format - Retrieve the video format on a pad
2145 * @sd : ISP CCDC V4L2 subdevice
2146 * @fh : V4L2 subdev file handle
2147 * @fmt: Format
2148 *
2149 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2150 * to the format type.
2151 */
2152static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2153 struct v4l2_subdev_format *fmt)
2154{
2155 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2156 struct v4l2_mbus_framefmt *format;
2157
2158 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2159 if (format == NULL)
2160 return -EINVAL;
2161
2162 fmt->format = *format;
2163 return 0;
2164}
2165
2166/*
2167 * ccdc_set_format - Set the video format on a pad
2168 * @sd : ISP CCDC V4L2 subdevice
2169 * @fh : V4L2 subdev file handle
2170 * @fmt: Format
2171 *
2172 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2173 * to the format type.
2174 */
2175static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2176 struct v4l2_subdev_format *fmt)
2177{
2178 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2179 struct v4l2_mbus_framefmt *format;
a64909b8 2180 struct v4l2_rect *crop;
de1135d4
LP		 2181
2182 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2183 if (format == NULL)
2184 return -EINVAL;
2185
2186 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2187 *format = fmt->format;
2188
2189 /* Propagate the format from sink to source */
2190 if (fmt->pad == CCDC_PAD_SINK) {
a64909b8
LP		 2191 /* Reset the crop rectangle. */
2192 crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2193 crop->left = 0;
2194 crop->top = 0;
2195 crop->width = fmt->format.width;
2196 crop->height = fmt->format.height;
2197
2198 ccdc_try_crop(ccdc, &fmt->format, crop);
2199
2200 /* Update the source formats. */
de1135d4
LP		 2201 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2202 fmt->which);
2203 *format = fmt->format;
2204 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2205 fmt->which);
2206
2207 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2208 fmt->which);
2209 *format = fmt->format;
2210 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2211 fmt->which);
2212 }
2213
2214 return 0;
2215}
2216
a6d7a62d
SA		 2217/*
2218 * Decide whether desired output pixel code can be obtained with
2219 * the lane shifter by shifting the input pixel code.
2220 * @in: input pixelcode to shifter
2221 * @out: output pixelcode from shifter
2222 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2223 *
2224 * return true if the combination is possible
2225 * return false otherwise
2226 */
2227static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2228 enum v4l2_mbus_pixelcode out,
2229 unsigned int additional_shift)
2230{
2231 const struct isp_format_info *in_info, *out_info;
2232
2233 if (in == out)
2234 return true;
2235
2236 in_info = omap3isp_video_format_info(in);
2237 out_info = omap3isp_video_format_info(out);
2238
2239 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2240 return false;
2241
2242 if (in_info->flavor != out_info->flavor)
2243 return false;
2244
1697e49a 2245 return in_info->width - out_info->width + additional_shift <= 6;
a6d7a62d
SA		 2246}
2247
2248static int ccdc_link_validate(struct v4l2_subdev *sd,
2249 struct media_link *link,
2250 struct v4l2_subdev_format *source_fmt,
2251 struct v4l2_subdev_format *sink_fmt)
2252{
2253 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2254 unsigned long parallel_shift;
2255
2256 /* Check if the two ends match */
2257 if (source_fmt->format.width != sink_fmt->format.width ||
2258 source_fmt->format.height != sink_fmt->format.height)
2259 return -EPIPE;
2260
2261 /* We've got a parallel sensor here. */
2262 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2263 struct isp_parallel_platform_data *pdata =
2264 &((struct isp_v4l2_subdevs_group *)
2265 media_entity_to_v4l2_subdev(link->source->entity)
2266 ->host_priv)->bus.parallel;
2267 parallel_shift = pdata->data_lane_shift * 2;
2268 } else {
2269 parallel_shift = 0;
2270 }
2271
2272 /* Lane shifter may be used to drop bits on CCDC sink pad */
2273 if (!ccdc_is_shiftable(source_fmt->format.code,
2274 sink_fmt->format.code, parallel_shift))
2275 return -EPIPE;
2276
2277 return 0;
2278}
2279
de1135d4
LP		 2280/*
2281 * ccdc_init_formats - Initialize formats on all pads
2282 * @sd: ISP CCDC V4L2 subdevice
2283 * @fh: V4L2 subdev file handle
2284 *
2285 * Initialize all pad formats with default values. If fh is not NULL, try
2286 * formats are initialized on the file handle. Otherwise active formats are
2287 * initialized on the device.
2288 */
2289static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2290{
2291 struct v4l2_subdev_format format;
2292
2293 memset(&format, 0, sizeof(format));
2294 format.pad = CCDC_PAD_SINK;
2295 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2296 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2297 format.format.width = 4096;
2298 format.format.height = 4096;
2299 ccdc_set_format(sd, fh, &format);
2300
2301 return 0;
2302}
2303
2304/* V4L2 subdev core operations */
2305static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2306 .ioctl = ccdc_ioctl,
2307 .subscribe_event = ccdc_subscribe_event,
2308 .unsubscribe_event = ccdc_unsubscribe_event,
2309};
2310
2311/* V4L2 subdev video operations */
2312static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2313 .s_stream = ccdc_set_stream,
2314};
2315
2316/* V4L2 subdev pad operations */
2317static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2318 .enum_mbus_code = ccdc_enum_mbus_code,
2319 .enum_frame_size = ccdc_enum_frame_size,
2320 .get_fmt = ccdc_get_format,
2321 .set_fmt = ccdc_set_format,
a64909b8
LP		 2322 .get_selection = ccdc_get_selection,
2323 .set_selection = ccdc_set_selection,
a6d7a62d 2324 .link_validate = ccdc_link_validate,
de1135d4
LP		 2325};
2326
2327/* V4L2 subdev operations */
2328static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2329 .core = &ccdc_v4l2_core_ops,
2330 .video = &ccdc_v4l2_video_ops,
2331 .pad = &ccdc_v4l2_pad_ops,
2332};
2333
2334/* V4L2 subdev internal operations */
2335static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2336 .open = ccdc_init_formats,
2337};
2338
2339/* -----------------------------------------------------------------------------
2340 * Media entity operations
2341 */
2342
2343/*
2344 * ccdc_link_setup - Setup CCDC connections
2345 * @entity: CCDC media entity
2346 * @local: Pad at the local end of the link
2347 * @remote: Pad at the remote end of the link
2348 * @flags: Link flags
2349 *
2350 * return -EINVAL or zero on success
2351 */
2352static int ccdc_link_setup(struct media_entity *entity,
2353 const struct media_pad *local,
2354 const struct media_pad *remote, u32 flags)
2355{
2356 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2357 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2358 struct isp_device *isp = to_isp_device(ccdc);
2359
2360 switch (local->index | media_entity_type(remote->entity)) {
2361 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2362 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2363 * CSI2c.
2364 */
2365 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2366 ccdc->input = CCDC_INPUT_NONE;
2367 break;
2368 }
2369
2370 if (ccdc->input != CCDC_INPUT_NONE)
2371 return -EBUSY;
2372
2373 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2374 ccdc->input = CCDC_INPUT_CCP2B;
2375 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2376 ccdc->input = CCDC_INPUT_CSI2A;
2377 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2378 ccdc->input = CCDC_INPUT_CSI2C;
2379 else
2380 ccdc->input = CCDC_INPUT_PARALLEL;
2381
2382 break;
2383
2384 /*
2385 * The ISP core doesn't support pipelines with multiple video outputs.
2386 * Revisit this when it will be implemented, and return -EBUSY for now.
2387 */
2388
2389 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2390 /* Write to preview engine, histogram and H3A. When none of
2391 * those links are active, the video port can be disabled.
2392 */
2393 if (flags & MEDIA_LNK_FL_ENABLED) {
2394 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2395 return -EBUSY;
2396 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2397 } else {
2398 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2399 }
2400 break;
2401
2402 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2403 /* Write to memory */
2404 if (flags & MEDIA_LNK_FL_ENABLED) {
2405 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2406 return -EBUSY;
2407 ccdc->output |= CCDC_OUTPUT_MEMORY;
2408 } else {
2409 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2410 }
2411 break;
2412
2413 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2414 /* Write to resizer */
2415 if (flags & MEDIA_LNK_FL_ENABLED) {
2416 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2417 return -EBUSY;
2418 ccdc->output |= CCDC_OUTPUT_RESIZER;
2419 } else {
2420 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2421 }
2422 break;
2423
2424 default:
2425 return -EINVAL;
2426 }
2427
2428 return 0;
2429}
2430
2431/* media operations */
2432static const struct media_entity_operations ccdc_media_ops = {
2433 .link_setup = ccdc_link_setup,
a6d7a62d 2434 .link_validate = v4l2_subdev_link_validate,
de1135d4
LP		 2435};
2436
39099d09
LP		 2437void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2438{
2439 v4l2_device_unregister_subdev(&ccdc->subdev);
2440 omap3isp_video_unregister(&ccdc->video_out);
2441}
2442
2443int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2444 struct v4l2_device *vdev)
2445{
2446 int ret;
2447
2448 /* Register the subdev and video node. */
2449 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2450 if (ret < 0)
2451 goto error;
2452
2453 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2454 if (ret < 0)
2455 goto error;
2456
2457 return 0;
2458
2459error:
2460 omap3isp_ccdc_unregister_entities(ccdc);
2461 return ret;
2462}
2463
2464/* -----------------------------------------------------------------------------
2465 * ISP CCDC initialisation and cleanup
2466 */
2467
de1135d4
LP		 2468/*
2469 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2470 * @ccdc: ISP CCDC module
2471 *
2472 * Return 0 on success and a negative error code on failure.
2473 */
2474static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2475{
2476 struct v4l2_subdev *sd = &ccdc->subdev;
2477 struct media_pad *pads = ccdc->pads;
2478 struct media_entity *me = &sd->entity;
2479 int ret;
2480
2481 ccdc->input = CCDC_INPUT_NONE;
2482
2483 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2484 sd->internal_ops = &ccdc_v4l2_internal_ops;
2485 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2486 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2487 v4l2_set_subdevdata(sd, ccdc);
2488 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
de1135d4 2489
8dad936a
SA		 2490 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2491 | MEDIA_PAD_FL_MUST_CONNECT;
de1135d4
LP		 2492 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2493 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2494
2495 me->ops = &ccdc_media_ops;
2496 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2497 if (ret < 0)
2498 return ret;
2499
2500 ccdc_init_formats(sd, NULL);
2501
2502 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2503 ccdc->video_out.ops = &ccdc_video_ops;
2504 ccdc->video_out.isp = to_isp_device(ccdc);
2505 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2506 ccdc->video_out.bpl_alignment = 32;
2507
2508 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2509 if (ret < 0)
9b6390bd 2510 goto error_video;
de1135d4
LP		 2511
2512 /* Connect the CCDC subdev to the video node. */
2513 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2514 &ccdc->video_out.video.entity, 0, 0);
2515 if (ret < 0)
9b6390bd 2516 goto error_link;
de1135d4
LP		 2517
2518 return 0;
9b6390bd
LP		 2519
2520error_link:
2521 omap3isp_video_cleanup(&ccdc->video_out);
2522error_video:
2523 media_entity_cleanup(me);
2524 return ret;
de1135d4
LP		 2525}
2526
de1135d4
LP		 2527/*
2528 * omap3isp_ccdc_init - CCDC module initialization.
872aba51 2529 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2530 *
2531 * TODO: Get the initialisation values from platform data.
2532 *
2533 * Return 0 on success or a negative error code otherwise.
2534 */
2535int omap3isp_ccdc_init(struct isp_device *isp)
2536{
2537 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
9b6390bd 2538 int ret;
de1135d4
LP		 2539
2540 spin_lock_init(&ccdc->lock);
2541 init_waitqueue_head(&ccdc->wait);
2542 mutex_init(&ccdc->ioctl_lock);
2543
2544 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2545
2546 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2547 ccdc->lsc.state = LSC_STATE_STOPPED;
2548 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2549 spin_lock_init(&ccdc->lsc.req_lock);
2550
de1135d4
LP		 2551 ccdc->clamp.oblen = 0;
2552 ccdc->clamp.dcsubval = 0;
2553
de1135d4
LP		 2554 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2555 ccdc_apply_controls(ccdc);
2556
9b6390bd
LP		 2557 ret = ccdc_init_entities(ccdc);
2558 if (ret < 0) {
2559 mutex_destroy(&ccdc->ioctl_lock);
2560 return ret;
2561 }
2562
2563 return 0;
de1135d4
LP		 2564}
2565
2566/*
2567 * omap3isp_ccdc_cleanup - CCDC module cleanup.
872aba51 2568 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2569 */
2570void omap3isp_ccdc_cleanup(struct isp_device *isp)
2571{
2572 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2573
63b4ca23
LP		 2574 omap3isp_video_cleanup(&ccdc->video_out);
2575 media_entity_cleanup(&ccdc->subdev.entity);
2576
de1135d4
LP		 2577 /* Free LSC requests. As the CCDC is stopped there's no active request,
2578 * so only the pending request and the free queue need to be handled.
2579 */
2580 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2581 cancel_work_sync(&ccdc->lsc.table_work);
2582 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2583
c60e153d
LP		 2584 if (ccdc->fpc.addr != NULL)
2585 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2586 ccdc->fpc.dma);
ed33ac8e
LP		 2587
2588 mutex_destroy(&ccdc->ioctl_lock);
de1135d4 2589}
Linux kernel - Deliverables
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