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[media] omap3isp: ccdc: Support the interlaced field orders at the CCDC output
[deliverable/linux.git] / drivers / media / platform / omap3isp / ispccdc.c
CommitLineData
de1135d4
LP		 1/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
de1135d4
LP		 15 */
16
17#include <linux/module.h>
18#include <linux/uaccess.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/sched.h>
e74d83aa 24#include <linux/slab.h>
de1135d4
LP		 25#include <media/v4l2-event.h>
26
27#include "isp.h"
28#include "ispreg.h"
29#include "ispccdc.h"
30
a64909b8
LP		 31#define CCDC_MIN_WIDTH 32
32#define CCDC_MIN_HEIGHT 32
33
de1135d4
LP		 34static struct v4l2_mbus_framefmt *
35__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
36 unsigned int pad, enum v4l2_subdev_format_whence which);
37
38static const unsigned int ccdc_fmts[] = {
39 V4L2_MBUS_FMT_Y8_1X8,
5782f97b
MJ		 40 V4L2_MBUS_FMT_Y10_1X10,
41 V4L2_MBUS_FMT_Y12_1X12,
42 V4L2_MBUS_FMT_SGRBG8_1X8,
43 V4L2_MBUS_FMT_SRGGB8_1X8,
44 V4L2_MBUS_FMT_SBGGR8_1X8,
45 V4L2_MBUS_FMT_SGBRG8_1X8,
de1135d4
LP		 46 V4L2_MBUS_FMT_SGRBG10_1X10,
47 V4L2_MBUS_FMT_SRGGB10_1X10,
48 V4L2_MBUS_FMT_SBGGR10_1X10,
49 V4L2_MBUS_FMT_SGBRG10_1X10,
50 V4L2_MBUS_FMT_SGRBG12_1X12,
51 V4L2_MBUS_FMT_SRGGB12_1X12,
52 V4L2_MBUS_FMT_SBGGR12_1X12,
53 V4L2_MBUS_FMT_SGBRG12_1X12,
c51364ca
LP		 54 V4L2_MBUS_FMT_YUYV8_2X8,
55 V4L2_MBUS_FMT_UYVY8_2X8,
de1135d4
LP		 56};
57
58/*
59 * ccdc_print_status - Print current CCDC Module register values.
60 * @ccdc: Pointer to ISP CCDC device.
61 *
62 * Also prints other debug information stored in the CCDC module.
63 */
64#define CCDC_PRINT_REGISTER(isp, name)\
65 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
66 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
67
68static void ccdc_print_status(struct isp_ccdc_device *ccdc)
69{
70 struct isp_device *isp = to_isp_device(ccdc);
71
72 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
73
74 CCDC_PRINT_REGISTER(isp, PCR);
75 CCDC_PRINT_REGISTER(isp, SYN_MODE);
76 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
77 CCDC_PRINT_REGISTER(isp, PIX_LINES);
78 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
79 CCDC_PRINT_REGISTER(isp, VERT_START);
80 CCDC_PRINT_REGISTER(isp, VERT_LINES);
81 CCDC_PRINT_REGISTER(isp, CULLING);
82 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
83 CCDC_PRINT_REGISTER(isp, SDOFST);
84 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
85 CCDC_PRINT_REGISTER(isp, CLAMP);
86 CCDC_PRINT_REGISTER(isp, DCSUB);
87 CCDC_PRINT_REGISTER(isp, COLPTN);
88 CCDC_PRINT_REGISTER(isp, BLKCMP);
89 CCDC_PRINT_REGISTER(isp, FPC);
90 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
91 CCDC_PRINT_REGISTER(isp, VDINT);
92 CCDC_PRINT_REGISTER(isp, ALAW);
93 CCDC_PRINT_REGISTER(isp, REC656IF);
94 CCDC_PRINT_REGISTER(isp, CFG);
95 CCDC_PRINT_REGISTER(isp, FMTCFG);
96 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
97 CCDC_PRINT_REGISTER(isp, FMT_VERT);
98 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
99 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
100 CCDC_PRINT_REGISTER(isp, PRGODD0);
101 CCDC_PRINT_REGISTER(isp, PRGODD1);
102 CCDC_PRINT_REGISTER(isp, VP_OUT);
103 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
104 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
105 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
106 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
107
108 dev_dbg(isp->dev, "--------------------------------------------\n");
109}
110
111/*
112 * omap3isp_ccdc_busy - Get busy state of the CCDC.
113 * @ccdc: Pointer to ISP CCDC device.
114 */
115int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
116{
117 struct isp_device *isp = to_isp_device(ccdc);
118
119 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
120 ISPCCDC_PCR_BUSY;
121}
122
123/* -----------------------------------------------------------------------------
124 * Lens Shading Compensation
125 */
126
127/*
128 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
129 * @ccdc: Pointer to ISP CCDC device.
130 * @lsc_cfg: the LSC configuration to check.
131 *
132 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
133 */
134static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
135 struct omap3isp_ccdc_lsc_config *lsc_cfg)
136{
137 struct isp_device *isp = to_isp_device(ccdc);
138 struct v4l2_mbus_framefmt *format;
139 unsigned int paxel_width, paxel_height;
140 unsigned int paxel_shift_x, paxel_shift_y;
141 unsigned int min_width, min_height, min_size;
142 unsigned int input_width, input_height;
143
144 paxel_shift_x = lsc_cfg->gain_mode_m;
145 paxel_shift_y = lsc_cfg->gain_mode_n;
146
147 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
148 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
149 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
150 return -EINVAL;
151 }
152
153 if (lsc_cfg->offset & 3) {
154 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
155 "4\n");
156 return -EINVAL;
157 }
158
159 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
160 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
161 return -EINVAL;
162 }
163
164 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
165 V4L2_SUBDEV_FORMAT_ACTIVE);
166 input_width = format->width;
167 input_height = format->height;
168
169 /* Calculate minimum bytesize for validation */
170 paxel_width = 1 << paxel_shift_x;
171 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
172 >> paxel_shift_x) + 1;
173
174 paxel_height = 1 << paxel_shift_y;
175 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
176 >> paxel_shift_y) + 1;
177
178 min_size = 4 * min_width * min_height;
179 if (min_size > lsc_cfg->size) {
180 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
181 return -EINVAL;
182 }
183 if (lsc_cfg->offset < (min_width * 4)) {
184 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
185 return -EINVAL;
186 }
187 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
188 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
189 return -EINVAL;
190 }
191 return 0;
192}
193
194/*
195 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
196 * @ccdc: Pointer to ISP CCDC device.
197 */
d33186d0
LP		 198static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
199 dma_addr_t addr)
de1135d4
LP		 200{
201 isp_reg_writel(to_isp_device(ccdc), addr,
202 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
203}
204
205/*
206 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
207 * @ccdc: Pointer to ISP CCDC device.
208 */
209static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
210 struct omap3isp_ccdc_lsc_config *cfg)
211{
212 struct isp_device *isp = to_isp_device(ccdc);
213 int reg;
214
215 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
216 ISPCCDC_LSC_TABLE_OFFSET);
217
218 reg = 0;
219 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
220 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
221 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
222 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
223
224 reg = 0;
225 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
226 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
227 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
228 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
229 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
230 ISPCCDC_LSC_INITIAL);
231}
232
233static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
234{
235 struct isp_device *isp = to_isp_device(ccdc);
236 unsigned int wait;
237
238 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
239 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
240
241 /* timeout 1 ms */
242 for (wait = 0; wait < 1000; wait++) {
243 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
244 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
245 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
246 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
247 return 0;
248 }
249
250 rmb();
251 udelay(1);
252 }
253
254 return -ETIMEDOUT;
255}
256
257/*
258 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
259 * @ccdc: Pointer to ISP CCDC device.
260 * @enable: 0 Disables LSC, 1 Enables LSC.
261 */
262static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
263{
264 struct isp_device *isp = to_isp_device(ccdc);
265 const struct v4l2_mbus_framefmt *format =
266 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
267 V4L2_SUBDEV_FORMAT_ACTIVE);
268
269 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
270 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
271 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
272 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
273 return -EINVAL;
274
275 if (enable)
276 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
277
278 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
279 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
280
281 if (enable) {
282 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
283 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
284 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
285 ccdc->lsc.state = LSC_STATE_STOPPED;
25aeb418 286 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
de1135d4
LP		 287 return -ETIMEDOUT;
288 }
289 ccdc->lsc.state = LSC_STATE_RUNNING;
290 } else {
291 ccdc->lsc.state = LSC_STATE_STOPPING;
292 }
293
294 return 0;
295}
296
297static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
298{
299 struct isp_device *isp = to_isp_device(ccdc);
300
301 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
302 ISPCCDC_LSC_BUSY;
303}
304
305/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
306 * @ccdc: Pointer to ISP CCDC device
307 * @req: New configuration request
308 *
309 * context: in_interrupt()
310 */
311static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
312 struct ispccdc_lsc_config_req *req)
313{
314 if (!req->enable)
315 return -EINVAL;
316
317 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
318 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
319 return -EINVAL;
320 }
321
322 if (ccdc_lsc_busy(ccdc))
323 return -EBUSY;
324
325 ccdc_lsc_setup_regs(ccdc, &req->config);
d33186d0 326 ccdc_lsc_program_table(ccdc, req->table.dma);
de1135d4
LP		 327 return 0;
328}
329
330/*
331 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
332 * @ccdc: Pointer to ISP CCDC device.
333 *
334 * Disables LSC, and defers enablement to shadow registers update time.
335 */
336static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
337{
338 struct isp_device *isp = to_isp_device(ccdc);
339 /*
340 * From OMAP3 TRM: When this event is pending, the module
341 * goes into transparent mode (output =input). Normal
342 * operation can be resumed at the start of the next frame
343 * after:
344 * 1) Clearing this event
345 * 2) Disabling the LSC module
346 * 3) Enabling it
347 */
348 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
349 ISPCCDC_LSC_ENABLE);
350 ccdc->lsc.state = LSC_STATE_STOPPED;
351}
352
353static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
354 struct ispccdc_lsc_config_req *req)
355{
356 struct isp_device *isp = to_isp_device(ccdc);
357
358 if (req == NULL)
359 return;
360
d33186d0
LP		 361 if (req->table.addr) {
362 sg_free_table(&req->table.sgt);
363 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
364 req->table.dma);
365 }
366
de1135d4
LP		 367 kfree(req);
368}
369
370static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
371 struct list_head *queue)
372{
373 struct ispccdc_lsc_config_req *req, *n;
374 unsigned long flags;
375
376 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
377 list_for_each_entry_safe(req, n, queue, list) {
378 list_del(&req->list);
379 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
380 ccdc_lsc_free_request(ccdc, req);
381 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
382 }
383 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
384}
385
386static void ccdc_lsc_free_table_work(struct work_struct *work)
387{
388 struct isp_ccdc_device *ccdc;
389 struct ispccdc_lsc *lsc;
390
391 lsc = container_of(work, struct ispccdc_lsc, table_work);
392 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
393
394 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
395}
396
397/*
398 * ccdc_lsc_config - Configure the LSC module from a userspace request
399 *
400 * Store the request LSC configuration in the LSC engine request pointer. The
401 * configuration will be applied to the hardware when the CCDC will be enabled,
402 * or at the next LSC interrupt if the CCDC is already running.
403 */
404static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
405 struct omap3isp_ccdc_update_config *config)
406{
407 struct isp_device *isp = to_isp_device(ccdc);
408 struct ispccdc_lsc_config_req *req;
409 unsigned long flags;
de1135d4
LP		 410 u16 update;
411 int ret;
412
413 update = config->update &
414 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
415 if (!update)
416 return 0;
417
418 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
419 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
420 "need to be supplied\n", __func__);
421 return -EINVAL;
422 }
423
424 req = kzalloc(sizeof(*req), GFP_KERNEL);
425 if (req == NULL)
426 return -ENOMEM;
427
428 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
429 if (copy_from_user(&req->config, config->lsc_cfg,
430 sizeof(req->config))) {
431 ret = -EFAULT;
432 goto done;
433 }
434
435 req->enable = 1;
436
d33186d0
LP		 437 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
438 &req->table.dma,
439 GFP_KERNEL);
440 if (req->table.addr == NULL) {
de1135d4
LP		 441 ret = -ENOMEM;
442 goto done;
443 }
444
d33186d0
LP		 445 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
446 req->table.addr, req->table.dma,
447 req->config.size);
448 if (ret < 0)
de1135d4 449 goto done;
de1135d4 450
d33186d0
LP		 451 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
452 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4 453
d33186d0
LP		 454 if (copy_from_user(req->table.addr, config->lsc,
455 req->config.size)) {
de1135d4
LP		 456 ret = -EFAULT;
457 goto done;
458 }
459
d33186d0
LP		 460 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
461 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4
LP		 462 }
463
464 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
465 if (ccdc->lsc.request) {
466 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
467 schedule_work(&ccdc->lsc.table_work);
468 }
469 ccdc->lsc.request = req;
470 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
471
472 ret = 0;
473
474done:
475 if (ret < 0)
476 ccdc_lsc_free_request(ccdc, req);
477
478 return ret;
479}
480
481static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
482{
483 unsigned long flags;
484
485 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
486 if (ccdc->lsc.active) {
487 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
488 return 1;
489 }
490 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
491 return 0;
492}
493
494static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
495{
496 struct ispccdc_lsc *lsc = &ccdc->lsc;
497
498 if (lsc->state != LSC_STATE_STOPPED)
499 return -EINVAL;
500
501 if (lsc->active) {
502 list_add_tail(&lsc->active->list, &lsc->free_queue);
503 lsc->active = NULL;
504 }
505
506 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
507 omap3isp_sbl_disable(to_isp_device(ccdc),
508 OMAP3_ISP_SBL_CCDC_LSC_READ);
509 list_add_tail(&lsc->request->list, &lsc->free_queue);
510 lsc->request = NULL;
511 goto done;
512 }
513
514 lsc->active = lsc->request;
515 lsc->request = NULL;
516 __ccdc_lsc_enable(ccdc, 1);
517
518done:
519 if (!list_empty(&lsc->free_queue))
520 schedule_work(&lsc->table_work);
521
522 return 0;
523}
524
525/* -----------------------------------------------------------------------------
526 * Parameters configuration
527 */
528
529/*
530 * ccdc_configure_clamp - Configure optical-black or digital clamping
531 * @ccdc: Pointer to ISP CCDC device.
532 *
533 * The CCDC performs either optical-black or digital clamp. Configure and enable
534 * the selected clamp method.
535 */
536static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
537{
538 struct isp_device *isp = to_isp_device(ccdc);
539 u32 clamp;
540
541 if (ccdc->obclamp) {
542 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
543 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
544 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
545 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
546 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
547 } else {
548 isp_reg_writel(isp, ccdc->clamp.dcsubval,
549 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
550 }
551
552 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
553 ISPCCDC_CLAMP_CLAMPEN,
554 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
555}
556
557/*
558 * ccdc_configure_fpc - Configure Faulty Pixel Correction
559 * @ccdc: Pointer to ISP CCDC device.
560 */
561static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
562{
563 struct isp_device *isp = to_isp_device(ccdc);
564
565 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
566
567 if (!ccdc->fpc_en)
568 return;
569
c60e153d 570 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
de1135d4
LP		 571 ISPCCDC_FPC_ADDR);
572 /* The FPNUM field must be set before enabling FPC. */
573 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
574 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
575 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
576 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
577}
578
579/*
580 * ccdc_configure_black_comp - Configure Black Level Compensation.
581 * @ccdc: Pointer to ISP CCDC device.
582 */
583static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
584{
585 struct isp_device *isp = to_isp_device(ccdc);
586 u32 blcomp;
587
588 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
589 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
590 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
591 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
592
593 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
594}
595
596/*
597 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
598 * @ccdc: Pointer to ISP CCDC device.
599 */
600static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
601{
602 struct isp_device *isp = to_isp_device(ccdc);
603
604 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
605 ISPCCDC_SYN_MODE_LPF,
606 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
607}
608
609/*
610 * ccdc_configure_alaw - Configure A-law compression.
611 * @ccdc: Pointer to ISP CCDC device.
612 */
613static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
614{
615 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 616 const struct isp_format_info *info;
de1135d4
LP		 617 u32 alaw = 0;
618
73ea57eb
LP		 619 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
620
621 switch (info->width) {
de1135d4
LP		 622 case 8:
623 return;
624
625 case 10:
626 alaw = ISPCCDC_ALAW_GWDI_9_0;
627 break;
628 case 11:
629 alaw = ISPCCDC_ALAW_GWDI_10_1;
630 break;
631 case 12:
632 alaw = ISPCCDC_ALAW_GWDI_11_2;
633 break;
634 case 13:
635 alaw = ISPCCDC_ALAW_GWDI_12_3;
636 break;
637 }
638
639 if (ccdc->alaw)
640 alaw |= ISPCCDC_ALAW_CCDTBL;
641
642 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
643}
644
645/*
646 * ccdc_config_imgattr - Configure sensor image specific attributes.
647 * @ccdc: Pointer to ISP CCDC device.
648 * @colptn: Color pattern of the sensor.
649 */
650static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
651{
652 struct isp_device *isp = to_isp_device(ccdc);
653
654 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
655}
656
657/*
658 * ccdc_config - Set CCDC configuration from userspace
659 * @ccdc: Pointer to ISP CCDC device.
872aba51 660 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
de1135d4
LP		 661 *
662 * Returns 0 if successful, -EINVAL if the pointer to the configuration
663 * structure is null, or the copy_from_user function fails to copy user space
664 * memory to kernel space memory.
665 */
666static int ccdc_config(struct isp_ccdc_device *ccdc,
667 struct omap3isp_ccdc_update_config *ccdc_struct)
668{
669 struct isp_device *isp = to_isp_device(ccdc);
670 unsigned long flags;
671
672 spin_lock_irqsave(&ccdc->lock, flags);
673 ccdc->shadow_update = 1;
674 spin_unlock_irqrestore(&ccdc->lock, flags);
675
676 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
677 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
678 ccdc->update |= OMAP3ISP_CCDC_ALAW;
679 }
680
681 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
682 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
683 ccdc->update |= OMAP3ISP_CCDC_LPF;
684 }
685
686 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
687 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
688 sizeof(ccdc->clamp))) {
689 ccdc->shadow_update = 0;
690 return -EFAULT;
691 }
692
693 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
695 }
696
697 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
698 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
699 sizeof(ccdc->blcomp))) {
700 ccdc->shadow_update = 0;
701 return -EFAULT;
702 }
703
704 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
705 }
706
707 ccdc->shadow_update = 0;
708
709 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
c60e153d
LP		 710 struct omap3isp_ccdc_fpc fpc;
711 struct ispccdc_fpc fpc_old = { .addr = NULL, };
712 struct ispccdc_fpc fpc_new;
de1135d4
LP		 713 u32 size;
714
715 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
716 return -EBUSY;
717
718 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
719
720 if (ccdc->fpc_en) {
c60e153d 721 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
de1135d4
LP		 722 return -EFAULT;
723
c60e153d
LP		 724 size = fpc.fpnum * 4;
725
de1135d4 726 /*
c60e153d
LP		 727 * The table address must be 64-bytes aligned, which is
728 * guaranteed by dma_alloc_coherent().
de1135d4 729 */
c60e153d
LP		 730 fpc_new.fpnum = fpc.fpnum;
731 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
732 &fpc_new.dma,
733 GFP_KERNEL);
734 if (fpc_new.addr == NULL)
de1135d4
LP		 735 return -ENOMEM;
736
c60e153d
LP		 737 if (copy_from_user(fpc_new.addr,
738 (__force void __user *)fpc.fpcaddr,
739 size)) {
740 dma_free_coherent(isp->dev, size, fpc_new.addr,
741 fpc_new.dma);
de1135d4
LP		 742 return -EFAULT;
743 }
744
c60e153d
LP		 745 fpc_old = ccdc->fpc;
746 ccdc->fpc = fpc_new;
de1135d4
LP		 747 }
748
749 ccdc_configure_fpc(ccdc);
c60e153d
LP		 750
751 if (fpc_old.addr != NULL)
752 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
753 fpc_old.addr, fpc_old.dma);
de1135d4
LP		 754 }
755
756 return ccdc_lsc_config(ccdc, ccdc_struct);
757}
758
759static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
760{
761 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
762 ccdc_configure_alaw(ccdc);
763 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
764 }
765
766 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
767 ccdc_configure_lpf(ccdc);
768 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
769 }
770
771 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
772 ccdc_configure_clamp(ccdc);
773 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
774 }
775
776 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
777 ccdc_configure_black_comp(ccdc);
778 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
779 }
780}
781
782/*
783 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
872aba51 784 * @isp: Pointer to ISP device
de1135d4
LP		 785 */
786void omap3isp_ccdc_restore_context(struct isp_device *isp)
787{
788 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
789
790 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
791
792 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
793 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
794 ccdc_apply_controls(ccdc);
795 ccdc_configure_fpc(ccdc);
796}
797
798/* -----------------------------------------------------------------------------
799 * Format- and pipeline-related configuration helpers
800 */
801
802/*
803 * ccdc_config_vp - Configure the Video Port.
804 * @ccdc: Pointer to ISP CCDC device.
805 */
806static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
807{
808 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
809 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 810 const struct isp_format_info *info;
de1135d4
LP		 811 unsigned long l3_ick = pipe->l3_ick;
812 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
813 unsigned int div = 0;
814 u32 fmtcfg_vp;
815
816 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
817 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
818
73ea57eb
LP		 819 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
820
821 switch (info->width) {
de1135d4
LP		 822 case 8:
823 case 10:
824 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
825 break;
826 case 11:
827 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
828 break;
829 case 12:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
831 break;
832 case 13:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
834 break;
13eaaa7f 835 }
de1135d4
LP		 836
837 if (pipe->input)
838 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
c6c01f97
SA		 839 else if (pipe->external_rate)
840 div = l3_ick / pipe->external_rate;
de1135d4
LP		 841
842 div = clamp(div, 2U, max_div);
843 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
844
845 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
846}
847
848/*
849 * ccdc_enable_vp - Enable Video Port.
850 * @ccdc: Pointer to ISP CCDC device.
851 * @enable: 0 Disables VP, 1 Enables VP
852 *
853 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
854 */
855static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
856{
857 struct isp_device *isp = to_isp_device(ccdc);
858
859 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
860 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
861}
862
863/*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
bcb4e0ef
LP		 866 * @bpl: Number of bytes per line when stored in memory.
867 * @field: Field order when storing interlaced formats in memory.
de1135d4 868 *
bcb4e0ef
LP		 869 * Configure the offsets for the line output control:
870 *
871 * - The horizontal line offset is defined as the number of bytes between the
872 * start of two consecutive lines in memory. Set it to the given bytes per
873 * line value.
874 *
875 * - The field offset value is defined as the number of lines to offset the
876 * start of the field identified by FID = 1. Set it to one.
877 *
878 * - The line offset values are defined as the number of lines (as defined by
879 * the horizontal line offset) between the start of two consecutive lines for
880 * all combinations of odd/even lines in odd/even fields. When interleaving
881 * fields set them all to two lines, and to one line otherwise.
de1135d4
LP		 882 */
883static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
bcb4e0ef
LP		 884 unsigned int bpl,
885 enum v4l2_field field)
de1135d4
LP		 886{
887 struct isp_device *isp = to_isp_device(ccdc);
bcb4e0ef 888 u32 sdofst = 0;
de1135d4 889
bcb4e0ef
LP		 890 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
891 ISPCCDC_HSIZE_OFF);
de1135d4 892
bcb4e0ef
LP		 893 switch (field) {
894 case V4L2_FIELD_INTERLACED_TB:
895 case V4L2_FIELD_INTERLACED_BT:
896 /* When interleaving fields in memory offset field one by one
897 * line and set the line offset to two lines.
898 */
899 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
900 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
901 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
902 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
de1135d4 903 break;
bcb4e0ef 904
de1135d4 905 default:
bcb4e0ef 906 /* In all other cases set the line offsets to one line. */
de1135d4
LP		 907 break;
908 }
bcb4e0ef
LP		 909
910 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
de1135d4
LP		 911}
912
913/*
914 * ccdc_set_outaddr - Set memory address to save output image
915 * @ccdc: Pointer to ISP CCDC device.
916 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
917 *
918 * Sets the memory address where the output will be saved.
919 */
920static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
921{
922 struct isp_device *isp = to_isp_device(ccdc);
923
924 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
925}
926
927/*
928 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
929 * @ccdc: Pointer to ISP CCDC device.
930 * @max_rate: Maximum calculated data rate.
931 *
932 * Returns in *max_rate less value between calculated and passed
933 */
934void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
935 unsigned int *max_rate)
936{
937 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
938 unsigned int rate;
939
940 if (pipe == NULL)
941 return;
942
943 /*
944 * TRM says that for parallel sensors the maximum data rate
945 * should be 90% form L3/2 clock, otherwise just L3/2.
946 */
947 if (ccdc->input == CCDC_INPUT_PARALLEL)
948 rate = pipe->l3_ick / 2 * 9 / 10;
949 else
950 rate = pipe->l3_ick / 2;
951
952 *max_rate = min(*max_rate, rate);
953}
954
955/*
956 * ccdc_config_sync_if - Set CCDC sync interface configuration
957 * @ccdc: Pointer to ISP CCDC device.
73ea57eb
LP		 958 * @pdata: Parallel interface platform data (may be NULL)
959 * @data_size: Data size
de1135d4
LP		 960 */
961static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
73ea57eb
LP		 962 struct isp_parallel_platform_data *pdata,
963 unsigned int data_size)
de1135d4
LP		 964{
965 struct isp_device *isp = to_isp_device(ccdc);
c51364ca 966 const struct v4l2_mbus_framefmt *format;
cf7a3d91 967 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
de1135d4 968
c51364ca
LP		 969 format = &ccdc->formats[CCDC_PAD_SINK];
970
971 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
972 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
973 /* The bridge is enabled for YUV8 formats. Configure the input
974 * mode accordingly.
975 */
976 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
977 }
978
73ea57eb 979 switch (data_size) {
de1135d4
LP		 980 case 8:
981 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
982 break;
983 case 10:
984 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
985 break;
986 case 11:
987 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
988 break;
989 case 12:
990 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
991 break;
13eaaa7f 992 }
de1135d4 993
73ea57eb 994 if (pdata && pdata->data_pol)
de1135d4 995 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
de1135d4 996
73ea57eb 997 if (pdata && pdata->hs_pol)
de1135d4 998 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
de1135d4 999
73ea57eb 1000 if (pdata && pdata->vs_pol)
de1135d4 1001 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
de1135d4 1002
9a36d8ed
LP		 1003 if (pdata && pdata->fld_pol)
1004 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1005
de1135d4 1006 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
c51364ca
LP		 1007
1008 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1009 * hardware seems to ignore it in all other input modes.
1010 */
1011 if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1012 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1013 ISPCCDC_CFG_Y8POS);
1014 else
1015 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1016 ISPCCDC_CFG_Y8POS);
1017
1018 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1019 ISPCCDC_REC656IF_R656ON);
de1135d4
LP		 1020}
1021
1022/* CCDC formats descriptions */
1023static const u32 ccdc_sgrbg_pattern =
1024 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1025 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1026 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1027 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1028 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1029 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1030 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1031 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1032 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1033 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1034 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1035 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1036 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1037 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1038 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1039 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1040
1041static const u32 ccdc_srggb_pattern =
1042 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1043 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1044 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1045 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1046 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1047 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1048 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1049 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1050 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1051 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1052 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1053 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1054 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1055 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1056 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1057 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1058
1059static const u32 ccdc_sbggr_pattern =
1060 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1061 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1062 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1063 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1064 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1065 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1066 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1067 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1068 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1069 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1070 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1071 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1072 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1073 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1074 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1075 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1076
1077static const u32 ccdc_sgbrg_pattern =
1078 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1079 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1080 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1081 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1082 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1083 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1084 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1085 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1086 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1087 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1088 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1089 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1090 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1091 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1092 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1093 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1094
1095static void ccdc_configure(struct isp_ccdc_device *ccdc)
1096{
1097 struct isp_device *isp = to_isp_device(ccdc);
1098 struct isp_parallel_platform_data *pdata = NULL;
1099 struct v4l2_subdev *sensor;
1100 struct v4l2_mbus_framefmt *format;
a64909b8 1101 const struct v4l2_rect *crop;
c09af044
MJ		 1102 const struct isp_format_info *fmt_info;
1103 struct v4l2_subdev_format fmt_src;
1104 unsigned int depth_out;
1105 unsigned int depth_in = 0;
de1135d4
LP		 1106 struct media_pad *pad;
1107 unsigned long flags;
c51364ca 1108 unsigned int bridge;
c09af044 1109 unsigned int shift;
de1135d4
LP		 1110 u32 syn_mode;
1111 u32 ccdc_pattern;
1112
1bddf1b3 1113 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
c09af044
MJ		 1114 sensor = media_entity_to_v4l2_subdev(pad->entity);
1115 if (ccdc->input == CCDC_INPUT_PARALLEL)
de1135d4
LP		 1116 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1117 ->bus.parallel;
c09af044 1118
2e8f0172
LP		 1119 /* CCDC_PAD_SINK */
1120 format = &ccdc->formats[CCDC_PAD_SINK];
1121
c51364ca
LP		 1122 /* Compute the lane shifter shift value and enable the bridge when the
1123 * input format is YUV.
1124 */
c09af044
MJ		 1125 fmt_src.pad = pad->index;
1126 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1127 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1128 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1697e49a 1129 depth_in = fmt_info->width;
de1135d4
LP		 1130 }
1131
2e8f0172 1132 fmt_info = omap3isp_video_format_info(format->code);
1697e49a 1133 depth_out = fmt_info->width;
c09af044 1134 shift = depth_in - depth_out;
de1135d4 1135
c51364ca
LP		 1136 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1137 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1138 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1139 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1140 else
1141 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
de1135d4 1142
c51364ca
LP		 1143 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1144
9a36d8ed 1145 /* Configure the sync interface. */
c51364ca 1146 ccdc_config_sync_if(ccdc, pdata, depth_out);
de1135d4
LP		 1147
1148 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1149
1150 /* Use the raw, unprocessed data when writing to memory. The H3A and
1151 * histogram modules are still fed with lens shading corrected data.
1152 */
1153 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1154
1155 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1156 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1157 else
1158 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1159
1160 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1161 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1162 else
1163 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1164
de1135d4
LP		 1165 /* Mosaic filter */
1166 switch (format->code) {
1167 case V4L2_MBUS_FMT_SRGGB10_1X10:
1168 case V4L2_MBUS_FMT_SRGGB12_1X12:
1169 ccdc_pattern = ccdc_srggb_pattern;
1170 break;
1171 case V4L2_MBUS_FMT_SBGGR10_1X10:
1172 case V4L2_MBUS_FMT_SBGGR12_1X12:
1173 ccdc_pattern = ccdc_sbggr_pattern;
1174 break;
1175 case V4L2_MBUS_FMT_SGBRG10_1X10:
1176 case V4L2_MBUS_FMT_SGBRG12_1X12:
1177 ccdc_pattern = ccdc_sgbrg_pattern;
1178 break;
1179 default:
1180 /* Use GRBG */
1181 ccdc_pattern = ccdc_sgrbg_pattern;
1182 break;
1183 }
1184 ccdc_config_imgattr(ccdc, ccdc_pattern);
1185
1186 /* Generate VD0 on the last line of the image and VD1 on the
1187 * 2/3 height line.
1188 */
1189 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1190 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1191 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1192
1193 /* CCDC_PAD_SOURCE_OF */
c51364ca 1194 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
a64909b8 1195 crop = &ccdc->crop;
de1135d4 1196
a64909b8
LP		 1197 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1198 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
de1135d4 1199 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
a64909b8 1200 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
de1135d4 1201 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
a64909b8 1202 isp_reg_writel(isp, (crop->height - 1)
de1135d4
LP		 1203 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1204 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1205
bcb4e0ef
LP		 1206 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1207 format->field);
1208
1209 /* When interleaving fields enable processing of the field input signal.
1210 * This will cause the line output control module to apply the field
1211 * offset to field 1.
1212 */
1213 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1214 (format->field == V4L2_FIELD_INTERLACED_TB ||
1215 format->field == V4L2_FIELD_INTERLACED_BT))
1216 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
de1135d4 1217
c51364ca
LP		 1218 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1219 * YUYV.
1220 */
1221 if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1222 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1223 ISPCCDC_CFG_BSWD);
1224 else
1225 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1226 ISPCCDC_CFG_BSWD);
1227
1228 /* Use PACK8 mode for 1byte per pixel formats. */
1229 if (omap3isp_video_format_info(format->code)->width <= 8)
1230 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1231 else
1232 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1233
1234 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1235
de1135d4
LP		 1236 /* CCDC_PAD_SOURCE_VP */
1237 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1238
1239 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1240 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1241 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1242 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1243 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1244 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1245
1246 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1247 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1248 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1249
c51364ca 1250 /* Lens shading correction. */
de1135d4
LP		 1251 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1252 if (ccdc->lsc.request == NULL)
1253 goto unlock;
1254
1255 WARN_ON(ccdc->lsc.active);
1256
1257 /* Get last good LSC configuration. If it is not supported for
1258 * the current active resolution discard it.
1259 */
1260 if (ccdc->lsc.active == NULL &&
1261 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1262 ccdc->lsc.active = ccdc->lsc.request;
1263 } else {
1264 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1265 schedule_work(&ccdc->lsc.table_work);
1266 }
1267
1268 ccdc->lsc.request = NULL;
1269
1270unlock:
1271 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1272
1273 ccdc_apply_controls(ccdc);
1274}
1275
1276static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1277{
1278 struct isp_device *isp = to_isp_device(ccdc);
1279
1280 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1281 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1282}
1283
1284static int ccdc_disable(struct isp_ccdc_device *ccdc)
1285{
1286 unsigned long flags;
1287 int ret = 0;
1288
1289 spin_lock_irqsave(&ccdc->lock, flags);
1290 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1291 ccdc->stopping = CCDC_STOP_REQUEST;
1292 spin_unlock_irqrestore(&ccdc->lock, flags);
1293
1294 ret = wait_event_timeout(ccdc->wait,
1295 ccdc->stopping == CCDC_STOP_FINISHED,
1296 msecs_to_jiffies(2000));
1297 if (ret == 0) {
1298 ret = -ETIMEDOUT;
1299 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1300 }
1301
1302 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1303
1304 mutex_lock(&ccdc->ioctl_lock);
1305 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1306 ccdc->lsc.request = ccdc->lsc.active;
1307 ccdc->lsc.active = NULL;
1308 cancel_work_sync(&ccdc->lsc.table_work);
1309 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1310 mutex_unlock(&ccdc->ioctl_lock);
1311
1312 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1313
1314 return ret > 0 ? 0 : ret;
1315}
1316
1317static void ccdc_enable(struct isp_ccdc_device *ccdc)
1318{
1319 if (ccdc_lsc_is_configured(ccdc))
1320 __ccdc_lsc_enable(ccdc, 1);
1321 __ccdc_enable(ccdc, 1);
1322}
1323
1324/* -----------------------------------------------------------------------------
1325 * Interrupt handling
1326 */
1327
1328/*
1329 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1330 * @ccdc: Pointer to ISP CCDC device.
1331 *
1332 * Returns zero if the CCDC is idle and the image has been written to
1333 * memory, too.
1334 */
1335static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1336{
1337 struct isp_device *isp = to_isp_device(ccdc);
1338
1339 return omap3isp_ccdc_busy(ccdc)
1340 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1341 ISPSBL_CCDC_WR_0_DATA_READY)
1342 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1343 ISPSBL_CCDC_WR_0_DATA_READY)
1344 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1345 ISPSBL_CCDC_WR_0_DATA_READY)
1346 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1347 ISPSBL_CCDC_WR_0_DATA_READY);
1348}
1349
1350/*
1351 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1352 * @ccdc: Pointer to ISP CCDC device.
1353 * @max_wait: Max retry count in us for wait for idle/busy transition.
1354 */
1355static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1356 unsigned int max_wait)
1357{
1358 unsigned int wait = 0;
1359
1360 if (max_wait == 0)
1361 max_wait = 10000; /* 10 ms */
1362
1363 for (wait = 0; wait <= max_wait; wait++) {
1364 if (!ccdc_sbl_busy(ccdc))
1365 return 0;
1366
1367 rmb();
1368 udelay(1);
1369 }
1370
1371 return -EBUSY;
1372}
1373
1374/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1375 * @ccdc: Pointer to ISP CCDC device.
1376 * @event: Pointing which event trigger handler
1377 *
2d4e9d1d 1378 * Return 1 when the event and stopping request combination is satisfied,
de1135d4
LP		 1379 * zero otherwise.
1380 */
1381static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1382{
1383 int rval = 0;
1384
1385 switch ((ccdc->stopping & 3) | event) {
1386 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1387 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1388 __ccdc_lsc_enable(ccdc, 0);
1389 __ccdc_enable(ccdc, 0);
1390 ccdc->stopping = CCDC_STOP_EXECUTED;
1391 return 1;
1392
1393 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1394 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1395 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1396 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1397 rval = 1;
1398 break;
1399
1400 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1401 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1402 rval = 1;
1403 break;
1404
1405 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1406 return 1;
1407 }
1408
1409 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1410 wake_up(&ccdc->wait);
1411 rval = 1;
1412 }
1413
1414 return rval;
1415}
1416
1417static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1418{
bd0f2e6d 1419 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
63ae37ea 1420 struct video_device *vdev = ccdc->subdev.devnode;
de1135d4
LP		 1421 struct v4l2_event event;
1422
b43883d6
LP		 1423 /* Frame number propagation */
1424 atomic_inc(&pipe->frame_number);
1425
de1135d4 1426 memset(&event, 0, sizeof(event));
69d232ae
SA		 1427 event.type = V4L2_EVENT_FRAME_SYNC;
1428 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
de1135d4
LP		 1429
1430 v4l2_event_queue(vdev, &event);
1431}
1432
1433/*
1434 * ccdc_lsc_isr - Handle LSC events
1435 * @ccdc: Pointer to ISP CCDC device.
1436 * @events: LSC events
1437 */
1438static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1439{
1440 unsigned long flags;
1441
1442 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
875e2e3e
LP		 1443 struct isp_pipeline *pipe =
1444 to_isp_pipeline(&ccdc->subdev.entity);
1445
de1135d4 1446 ccdc_lsc_error_handler(ccdc);
875e2e3e 1447 pipe->error = true;
de1135d4
LP		 1448 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1449 }
1450
1451 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1452 return;
1453
1454 /* LSC_DONE interrupt occur, there are two cases
1455 * 1. stopping for reconfiguration
1456 * 2. stopping because of STREAM OFF command
1457 */
1458 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1459
1460 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1461 ccdc->lsc.state = LSC_STATE_STOPPED;
1462
1463 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1464 goto done;
1465
1466 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1467 goto done;
1468
1469 /* LSC is in STOPPING state, change to the new state */
1470 ccdc->lsc.state = LSC_STATE_STOPPED;
1471
1472 /* This is an exception. Start of frame and LSC_DONE interrupt
1473 * have been received on the same time. Skip this event and wait
1474 * for better times.
1475 */
1476 if (events & IRQ0STATUS_HS_VS_IRQ)
1477 goto done;
1478
1479 /* The LSC engine is stopped at this point. Enable it if there's a
1480 * pending request.
1481 */
1482 if (ccdc->lsc.request == NULL)
1483 goto done;
1484
1485 ccdc_lsc_enable(ccdc);
1486
1487done:
1488 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1489}
1490
1491static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1492{
1493 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1494 struct isp_device *isp = to_isp_device(ccdc);
1495 struct isp_buffer *buffer;
bcb4e0ef 1496 enum v4l2_field field;
de1135d4
LP		 1497
1498 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1499 * doesn't explicitly state if that's supposed to happen or not, so it
1500 * can be considered as a hardware bug or as a feature, but we have to
1501 * deal with it anyway). Disabling the CCDC when no buffer is available
1502 * would thus not be enough, we need to handle the situation explicitly.
1503 */
1504 if (list_empty(&ccdc->video_out.dmaqueue))
0a7b1a01 1505 return 0;
de1135d4
LP		 1506
1507 /* We're in continuous mode, and memory writes were disabled due to a
1508 * buffer underrun. Reenable them now that we have a buffer. The buffer
1509 * address has been set in ccdc_video_queue.
1510 */
1511 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
de1135d4 1512 ccdc->underrun = 0;
0a7b1a01 1513 return 1;
de1135d4
LP		 1514 }
1515
bcb4e0ef
LP		 1516 /* Read the current field identifier. */
1517 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1518 & ISPCCDC_SYN_MODE_FLDSTAT
1519 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
9a36d8ed 1520
bcb4e0ef 1521 /* Wait for the CCDC to become idle. */
de1135d4
LP		 1522 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1523 dev_info(isp->dev, "CCDC won't become idle!\n");
9554b7db
LP		 1524 isp->crashed |= 1U << ccdc->subdev.entity.id;
1525 omap3isp_pipeline_cancel_stream(pipe);
0a7b1a01 1526 return 0;
de1135d4
LP		 1527 }
1528
bcb4e0ef
LP		 1529 switch (ccdc->formats[CCDC_PAD_SOURCE_OF].field) {
1530 case V4L2_FIELD_ALTERNATE:
1531 /* When capturing fields in alternate order store the current
1532 * field identifier in the pipeline.
1533 */
1534 pipe->field = field;
1535 break;
1536
1537 case V4L2_FIELD_INTERLACED_TB:
1538 /* When interleaving fields only complete the buffer after
1539 * capturing the second field.
1540 */
1541 if (field == V4L2_FIELD_TOP)
1542 return 1;
1543 break;
1544
1545 case V4L2_FIELD_INTERLACED_BT:
1546 if (field == V4L2_FIELD_BOTTOM)
1547 return 1;
1548 break;
1549 }
1550
875e2e3e 1551 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
0a7b1a01 1552 if (buffer != NULL)
21d8582d 1553 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4
LP		 1554
1555 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1556
1557 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1558 isp_pipeline_ready(pipe))
1559 omap3isp_pipeline_set_stream(pipe,
1560 ISP_PIPELINE_STREAM_SINGLESHOT);
1561
0a7b1a01 1562 return buffer != NULL;
de1135d4
LP		 1563}
1564
1565/*
1566 * ccdc_vd0_isr - Handle VD0 event
1567 * @ccdc: Pointer to ISP CCDC device.
1568 *
1569 * Executes LSC deferred enablement before next frame starts.
1570 */
1571static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1572{
1573 unsigned long flags;
1574 int restart = 0;
1575
1576 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1577 restart = ccdc_isr_buffer(ccdc);
1578
1579 spin_lock_irqsave(&ccdc->lock, flags);
1580 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1581 spin_unlock_irqrestore(&ccdc->lock, flags);
1582 return;
1583 }
1584
1585 if (!ccdc->shadow_update)
1586 ccdc_apply_controls(ccdc);
1587 spin_unlock_irqrestore(&ccdc->lock, flags);
1588
1589 if (restart)
1590 ccdc_enable(ccdc);
1591}
1592
1593/*
1594 * ccdc_vd1_isr - Handle VD1 event
1595 * @ccdc: Pointer to ISP CCDC device.
1596 */
1597static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1598{
1599 unsigned long flags;
1600
1601 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1602
1603 /*
1604 * Depending on the CCDC pipeline state, CCDC stopping should be
1605 * handled differently. In SINGLESHOT we emulate an internal CCDC
1606 * stopping because the CCDC hw works only in continuous mode.
1607 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1608 * data to memory the CCDC and LSC are stopped immediately but
1609 * without change the CCDC stopping state machine. The CCDC
1610 * stopping state machine should be used only when user request
1611 * for stopping is received (SINGLESHOT is an exeption).
1612 */
1613 switch (ccdc->state) {
1614 case ISP_PIPELINE_STREAM_SINGLESHOT:
1615 ccdc->stopping = CCDC_STOP_REQUEST;
1616 break;
1617
1618 case ISP_PIPELINE_STREAM_CONTINUOUS:
1619 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1620 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1621 __ccdc_lsc_enable(ccdc, 0);
1622 __ccdc_enable(ccdc, 0);
1623 }
1624 break;
1625
1626 case ISP_PIPELINE_STREAM_STOPPED:
1627 break;
1628 }
1629
1630 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1631 goto done;
1632
1633 if (ccdc->lsc.request == NULL)
1634 goto done;
1635
1636 /*
1637 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1638 * do the appropriate changes in registers
1639 */
1640 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1641 __ccdc_lsc_enable(ccdc, 0);
1642 ccdc->lsc.state = LSC_STATE_RECONFIG;
1643 goto done;
1644 }
1645
1646 /* LSC has been in STOPPED state, enable it */
1647 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1648 ccdc_lsc_enable(ccdc);
1649
1650done:
1651 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1652}
1653
1654/*
1655 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1656 * @ccdc: Pointer to ISP CCDC device.
1657 * @events: CCDC events
1658 */
1659int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1660{
1661 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1662 return 0;
1663
1664 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1665 ccdc_vd1_isr(ccdc);
1666
1667 ccdc_lsc_isr(ccdc, events);
1668
1669 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1670 ccdc_vd0_isr(ccdc);
1671
1672 if (events & IRQ0STATUS_HS_VS_IRQ)
1673 ccdc_hs_vs_isr(ccdc);
1674
1675 return 0;
1676}
1677
1678/* -----------------------------------------------------------------------------
1679 * ISP video operations
1680 */
1681
1682static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1683{
1684 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1685
1686 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1687 return -ENODEV;
1688
21d8582d 1689 ccdc_set_outaddr(ccdc, buffer->dma);
de1135d4 1690
2d4e9d1d 1691 /* We now have a buffer queued on the output, restart the pipeline
de1135d4
LP		 1692 * on the next CCDC interrupt if running in continuous mode (or when
1693 * starting the stream).
1694 */
1695 ccdc->underrun = 1;
1696
1697 return 0;
1698}
1699
1700static const struct isp_video_operations ccdc_video_ops = {
1701 .queue = ccdc_video_queue,
1702};
1703
1704/* -----------------------------------------------------------------------------
1705 * V4L2 subdev operations
1706 */
1707
1708/*
1709 * ccdc_ioctl - CCDC module private ioctl's
1710 * @sd: ISP CCDC V4L2 subdevice
1711 * @cmd: ioctl command
1712 * @arg: ioctl argument
1713 *
1714 * Return 0 on success or a negative error code otherwise.
1715 */
1716static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1717{
1718 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1719 int ret;
1720
1721 switch (cmd) {
1722 case VIDIOC_OMAP3ISP_CCDC_CFG:
1723 mutex_lock(&ccdc->ioctl_lock);
1724 ret = ccdc_config(ccdc, arg);
1725 mutex_unlock(&ccdc->ioctl_lock);
1726 break;
1727
1728 default:
1729 return -ENOIOCTLCMD;
1730 }
1731
1732 return ret;
1733}
1734
1735static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1736 struct v4l2_event_subscription *sub)
de1135d4 1737{
69d232ae
SA		 1738 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1739 return -EINVAL;
1740
1741 /* line number is zero at frame start */
1742 if (sub->id != 0)
de1135d4
LP		 1743 return -EINVAL;
1744
c53c2549 1745 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
de1135d4
LP		 1746}
1747
1748static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1749 struct v4l2_event_subscription *sub)
de1135d4
LP		 1750{
1751 return v4l2_event_unsubscribe(fh, sub);
1752}
1753
1754/*
1755 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1756 * @sd: ISP CCDC V4L2 subdevice
1757 * @enable: Enable/disable stream
1758 *
1759 * When writing to memory, the CCDC hardware can't be enabled without a memory
1760 * buffer to write to. As the s_stream operation is called in response to a
1761 * STREAMON call without any buffer queued yet, just update the enabled field
1762 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1763 *
1764 * When not writing to memory enable the CCDC immediately.
1765 */
1766static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1767{
1768 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1769 struct isp_device *isp = to_isp_device(ccdc);
1770 int ret = 0;
1771
1772 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1773 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1774 return 0;
1775
1776 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1777 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1778 ISPCCDC_CFG_VDLC);
1779
1780 ccdc_configure(ccdc);
1781
1782 /* TODO: Don't configure the video port if all of its output
1783 * links are inactive.
1784 */
1785 ccdc_config_vp(ccdc);
1786 ccdc_enable_vp(ccdc, 1);
de1135d4
LP		 1787 ccdc_print_status(ccdc);
1788 }
1789
1790 switch (enable) {
1791 case ISP_PIPELINE_STREAM_CONTINUOUS:
1792 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1793 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1794
1795 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1796 ccdc_enable(ccdc);
1797
1798 ccdc->underrun = 0;
1799 break;
1800
1801 case ISP_PIPELINE_STREAM_SINGLESHOT:
1802 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1803 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1804 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1805
1806 ccdc_enable(ccdc);
1807 break;
1808
1809 case ISP_PIPELINE_STREAM_STOPPED:
1810 ret = ccdc_disable(ccdc);
1811 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1812 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1813 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1814 ccdc->underrun = 0;
1815 break;
1816 }
1817
1818 ccdc->state = enable;
1819 return ret;
1820}
1821
1822static struct v4l2_mbus_framefmt *
1823__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1824 unsigned int pad, enum v4l2_subdev_format_whence which)
1825{
1826 if (which == V4L2_SUBDEV_FORMAT_TRY)
1827 return v4l2_subdev_get_try_format(fh, pad);
1828 else
1829 return &ccdc->formats[pad];
1830}
1831
a64909b8
LP		 1832static struct v4l2_rect *
1833__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1834 enum v4l2_subdev_format_whence which)
1835{
1836 if (which == V4L2_SUBDEV_FORMAT_TRY)
1837 return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1838 else
1839 return &ccdc->crop;
1840}
1841
de1135d4
LP		 1842/*
1843 * ccdc_try_format - Try video format on a pad
1844 * @ccdc: ISP CCDC device
1845 * @fh : V4L2 subdev file handle
1846 * @pad: Pad number
1847 * @fmt: Format
1848 */
1849static void
1850ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1851 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1852 enum v4l2_subdev_format_whence which)
1853{
de1135d4 1854 const struct isp_format_info *info;
c51364ca 1855 enum v4l2_mbus_pixelcode pixelcode;
de1135d4
LP		 1856 unsigned int width = fmt->width;
1857 unsigned int height = fmt->height;
a64909b8 1858 struct v4l2_rect *crop;
bcb4e0ef 1859 enum v4l2_field field;
de1135d4
LP		 1860 unsigned int i;
1861
1862 switch (pad) {
1863 case CCDC_PAD_SINK:
de1135d4
LP		 1864 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1865 if (fmt->code == ccdc_fmts[i])
1866 break;
1867 }
1868
1869 /* If not found, use SGRBG10 as default */
1870 if (i >= ARRAY_SIZE(ccdc_fmts))
1871 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1872
1873 /* Clamp the input size. */
1874 fmt->width = clamp_t(u32, width, 32, 4096);
1875 fmt->height = clamp_t(u32, height, 32, 4096);
9a36d8ed
LP		 1876
1877 /* Default to progressive field order. */
1878 if (fmt->field == V4L2_FIELD_ANY)
1879 fmt->field = V4L2_FIELD_NONE;
1880
de1135d4
LP		 1881 break;
1882
1883 case CCDC_PAD_SOURCE_OF:
c51364ca 1884 pixelcode = fmt->code;
bcb4e0ef 1885 field = fmt->field;
c51364ca
LP		 1886 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1887
1888 /* YUV formats are converted from 2X8 to 1X16 by the bridge and
1889 * can be byte-swapped.
1890 */
1891 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1892 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1893 /* Use the user requested format if YUV. */
1894 if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1895 pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1896 pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1897 pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1898 fmt->code = pixelcode;
1899
1900 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1901 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1902 else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1903 fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1904 }
de1135d4 1905
a64909b8
LP		 1906 /* Hardcode the output size to the crop rectangle size. */
1907 crop = __ccdc_get_crop(ccdc, fh, which);
1908 fmt->width = crop->width;
1909 fmt->height = crop->height;
bcb4e0ef
LP		 1910
1911 /* When input format is interlaced with alternating fields the
1912 * CCDC can interleave the fields.
1913 */
1914 if (fmt->field == V4L2_FIELD_ALTERNATE &&
1915 (field == V4L2_FIELD_INTERLACED_TB ||
1916 field == V4L2_FIELD_INTERLACED_BT)) {
1917 fmt->field = field;
1918 fmt->height *= 2;
1919 }
1920
de1135d4
LP		 1921 break;
1922
1923 case CCDC_PAD_SOURCE_VP:
c51364ca 1924 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
de1135d4
LP		 1925
1926 /* The video port interface truncates the data to 10 bits. */
1927 info = omap3isp_video_format_info(fmt->code);
1928 fmt->code = info->truncated;
1929
c51364ca
LP		 1930 /* YUV formats are not supported by the video port. */
1931 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1932 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1933 fmt->code = 0;
1934
de1135d4
LP		 1935 /* The number of lines that can be clocked out from the video
1936 * port output must be at least one line less than the number
1937 * of input lines.
1938 */
1939 fmt->width = clamp_t(u32, width, 32, fmt->width);
1940 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1941 break;
1942 }
1943
1944 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1945 * stored on 2 bytes.
1946 */
1947 fmt->colorspace = V4L2_COLORSPACE_SRGB;
de1135d4
LP		 1948}
1949
a64909b8
LP		 1950/*
1951 * ccdc_try_crop - Validate a crop rectangle
1952 * @ccdc: ISP CCDC device
1953 * @sink: format on the sink pad
1954 * @crop: crop rectangle to be validated
1955 */
1956static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1957 const struct v4l2_mbus_framefmt *sink,
1958 struct v4l2_rect *crop)
1959{
1960 const struct isp_format_info *info;
1961 unsigned int max_width;
1962
1963 /* For Bayer formats, restrict left/top and width/height to even values
1964 * to keep the Bayer pattern.
1965 */
1966 info = omap3isp_video_format_info(sink->code);
1967 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1968 crop->left &= ~1;
1969 crop->top &= ~1;
1970 }
1971
1972 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1973 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1974
1975 /* The data formatter truncates the number of horizontal output pixels
1976 * to a multiple of 16. To avoid clipping data, allow callers to request
1977 * an output size bigger than the input size up to the nearest multiple
1978 * of 16.
1979 */
1980 max_width = (sink->width - crop->left + 15) & ~15;
1981 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1982 & ~15;
1983 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1984 sink->height - crop->top);
1985
1986 /* Odd width/height values don't make sense for Bayer formats. */
1987 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1988 crop->width &= ~1;
1989 crop->height &= ~1;
1990 }
1991}
1992
de1135d4
LP		 1993/*
1994 * ccdc_enum_mbus_code - Handle pixel format enumeration
1995 * @sd : pointer to v4l2 subdev structure
1996 * @fh : V4L2 subdev file handle
1997 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1998 * return -EINVAL or zero on success
1999 */
2000static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2001 struct v4l2_subdev_fh *fh,
2002 struct v4l2_subdev_mbus_code_enum *code)
2003{
2004 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2005 struct v4l2_mbus_framefmt *format;
2006
2007 switch (code->pad) {
2008 case CCDC_PAD_SINK:
2009 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2010 return -EINVAL;
2011
2012 code->code = ccdc_fmts[code->index];
2013 break;
2014
2015 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 2016 format = __ccdc_get_format(ccdc, fh, code->pad,
2017 V4L2_SUBDEV_FORMAT_TRY);
2018
2019 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
2020 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
2021 /* In YUV mode the CCDC can swap bytes. */
2022 if (code->index == 0)
2023 code->code = V4L2_MBUS_FMT_YUYV8_1X16;
2024 else if (code->index == 1)
2025 code->code = V4L2_MBUS_FMT_UYVY8_1X16;
2026 else
2027 return -EINVAL;
2028 } else {
2029 /* In raw mode, no configurable format confversion is
2030 * available.
2031 */
2032 if (code->index == 0)
2033 code->code = format->code;
2034 else
2035 return -EINVAL;
2036 }
2037 break;
2038
de1135d4 2039 case CCDC_PAD_SOURCE_VP:
c51364ca
LP		 2040 /* The CCDC supports no configurable format conversion
2041 * compatible with the video port. Enumerate a single output
2042 * format code.
2043 */
de1135d4
LP		 2044 if (code->index != 0)
2045 return -EINVAL;
2046
c51364ca 2047 format = __ccdc_get_format(ccdc, fh, code->pad,
de1135d4
LP		 2048 V4L2_SUBDEV_FORMAT_TRY);
2049
c51364ca
LP		 2050 /* A pixel code equal to 0 means that the video port doesn't
2051 * support the input format. Don't enumerate any pixel code.
2052 */
2053 if (format->code == 0)
2054 return -EINVAL;
2055
de1135d4
LP		 2056 code->code = format->code;
2057 break;
2058
2059 default:
2060 return -EINVAL;
2061 }
2062
2063 return 0;
2064}
2065
2066static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2067 struct v4l2_subdev_fh *fh,
2068 struct v4l2_subdev_frame_size_enum *fse)
2069{
2070 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2071 struct v4l2_mbus_framefmt format;
2072
2073 if (fse->index != 0)
2074 return -EINVAL;
2075
2076 format.code = fse->code;
2077 format.width = 1;
2078 format.height = 1;
2079 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2080 fse->min_width = format.width;
2081 fse->min_height = format.height;
2082
2083 if (format.code != fse->code)
2084 return -EINVAL;
2085
2086 format.code = fse->code;
2087 format.width = -1;
2088 format.height = -1;
2089 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2090 fse->max_width = format.width;
2091 fse->max_height = format.height;
2092
2093 return 0;
2094}
2095
a64909b8
LP		 2096/*
2097 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2098 * @sd: ISP CCDC V4L2 subdevice
2099 * @fh: V4L2 subdev file handle
2100 * @sel: Selection rectangle
2101 *
2102 * The only supported rectangles are the crop rectangles on the output formatter
2103 * source pad.
2104 *
2105 * Return 0 on success or a negative error code otherwise.
2106 */
2107static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2108 struct v4l2_subdev_selection *sel)
2109{
2110 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2111 struct v4l2_mbus_framefmt *format;
2112
2113 if (sel->pad != CCDC_PAD_SOURCE_OF)
2114 return -EINVAL;
2115
2116 switch (sel->target) {
5689b288 2117 case V4L2_SEL_TGT_CROP_BOUNDS:
a64909b8
LP		 2118 sel->r.left = 0;
2119 sel->r.top = 0;
2120 sel->r.width = INT_MAX;
2121 sel->r.height = INT_MAX;
2122
2123 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2124 ccdc_try_crop(ccdc, format, &sel->r);
2125 break;
2126
5689b288 2127 case V4L2_SEL_TGT_CROP:
a64909b8
LP		 2128 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2129 break;
2130
2131 default:
2132 return -EINVAL;
2133 }
2134
2135 return 0;
2136}
2137
2138/*
2139 * ccdc_set_selection - Set a selection rectangle on a pad
2140 * @sd: ISP CCDC V4L2 subdevice
2141 * @fh: V4L2 subdev file handle
2142 * @sel: Selection rectangle
2143 *
2144 * The only supported rectangle is the actual crop rectangle on the output
2145 * formatter source pad.
2146 *
2147 * Return 0 on success or a negative error code otherwise.
2148 */
2149static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2150 struct v4l2_subdev_selection *sel)
2151{
2152 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2153 struct v4l2_mbus_framefmt *format;
2154
5689b288 2155 if (sel->target != V4L2_SEL_TGT_CROP ||
a64909b8
LP		 2156 sel->pad != CCDC_PAD_SOURCE_OF)
2157 return -EINVAL;
2158
2159 /* The crop rectangle can't be changed while streaming. */
2160 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2161 return -EBUSY;
2162
2163 /* Modifying the crop rectangle always changes the format on the source
2164 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2165 * rectangle.
2166 */
563df3d0 2167 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
a64909b8
LP		 2168 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2169 return 0;
2170 }
2171
2172 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2173 ccdc_try_crop(ccdc, format, &sel->r);
2174 *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2175
2176 /* Update the source format. */
2177 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2178 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2179
2180 return 0;
2181}
2182
de1135d4
LP		 2183/*
2184 * ccdc_get_format - Retrieve the video format on a pad
2185 * @sd : ISP CCDC V4L2 subdevice
2186 * @fh : V4L2 subdev file handle
2187 * @fmt: Format
2188 *
2189 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2190 * to the format type.
2191 */
2192static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2193 struct v4l2_subdev_format *fmt)
2194{
2195 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2196 struct v4l2_mbus_framefmt *format;
2197
2198 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2199 if (format == NULL)
2200 return -EINVAL;
2201
2202 fmt->format = *format;
2203 return 0;
2204}
2205
2206/*
2207 * ccdc_set_format - Set the video format on a pad
2208 * @sd : ISP CCDC V4L2 subdevice
2209 * @fh : V4L2 subdev file handle
2210 * @fmt: Format
2211 *
2212 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2213 * to the format type.
2214 */
2215static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2216 struct v4l2_subdev_format *fmt)
2217{
2218 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2219 struct v4l2_mbus_framefmt *format;
a64909b8 2220 struct v4l2_rect *crop;
de1135d4
LP		 2221
2222 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2223 if (format == NULL)
2224 return -EINVAL;
2225
2226 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2227 *format = fmt->format;
2228
2229 /* Propagate the format from sink to source */
2230 if (fmt->pad == CCDC_PAD_SINK) {
a64909b8
LP		 2231 /* Reset the crop rectangle. */
2232 crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2233 crop->left = 0;
2234 crop->top = 0;
2235 crop->width = fmt->format.width;
2236 crop->height = fmt->format.height;
2237
2238 ccdc_try_crop(ccdc, &fmt->format, crop);
2239
2240 /* Update the source formats. */
de1135d4
LP		 2241 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2242 fmt->which);
2243 *format = fmt->format;
2244 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2245 fmt->which);
2246
2247 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2248 fmt->which);
2249 *format = fmt->format;
2250 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2251 fmt->which);
2252 }
2253
2254 return 0;
2255}
2256
a6d7a62d
SA		 2257/*
2258 * Decide whether desired output pixel code can be obtained with
2259 * the lane shifter by shifting the input pixel code.
2260 * @in: input pixelcode to shifter
2261 * @out: output pixelcode from shifter
2262 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2263 *
2264 * return true if the combination is possible
2265 * return false otherwise
2266 */
2267static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2268 enum v4l2_mbus_pixelcode out,
2269 unsigned int additional_shift)
2270{
2271 const struct isp_format_info *in_info, *out_info;
2272
2273 if (in == out)
2274 return true;
2275
2276 in_info = omap3isp_video_format_info(in);
2277 out_info = omap3isp_video_format_info(out);
2278
2279 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2280 return false;
2281
2282 if (in_info->flavor != out_info->flavor)
2283 return false;
2284
1697e49a 2285 return in_info->width - out_info->width + additional_shift <= 6;
a6d7a62d
SA		 2286}
2287
2288static int ccdc_link_validate(struct v4l2_subdev *sd,
2289 struct media_link *link,
2290 struct v4l2_subdev_format *source_fmt,
2291 struct v4l2_subdev_format *sink_fmt)
2292{
2293 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2294 unsigned long parallel_shift;
2295
2296 /* Check if the two ends match */
2297 if (source_fmt->format.width != sink_fmt->format.width ||
2298 source_fmt->format.height != sink_fmt->format.height)
2299 return -EPIPE;
2300
2301 /* We've got a parallel sensor here. */
2302 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2303 struct isp_parallel_platform_data *pdata =
2304 &((struct isp_v4l2_subdevs_group *)
2305 media_entity_to_v4l2_subdev(link->source->entity)
2306 ->host_priv)->bus.parallel;
2307 parallel_shift = pdata->data_lane_shift * 2;
2308 } else {
2309 parallel_shift = 0;
2310 }
2311
2312 /* Lane shifter may be used to drop bits on CCDC sink pad */
2313 if (!ccdc_is_shiftable(source_fmt->format.code,
2314 sink_fmt->format.code, parallel_shift))
2315 return -EPIPE;
2316
2317 return 0;
2318}
2319
de1135d4
LP		 2320/*
2321 * ccdc_init_formats - Initialize formats on all pads
2322 * @sd: ISP CCDC V4L2 subdevice
2323 * @fh: V4L2 subdev file handle
2324 *
2325 * Initialize all pad formats with default values. If fh is not NULL, try
2326 * formats are initialized on the file handle. Otherwise active formats are
2327 * initialized on the device.
2328 */
2329static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2330{
2331 struct v4l2_subdev_format format;
2332
2333 memset(&format, 0, sizeof(format));
2334 format.pad = CCDC_PAD_SINK;
2335 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2336 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2337 format.format.width = 4096;
2338 format.format.height = 4096;
2339 ccdc_set_format(sd, fh, &format);
2340
2341 return 0;
2342}
2343
2344/* V4L2 subdev core operations */
2345static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2346 .ioctl = ccdc_ioctl,
2347 .subscribe_event = ccdc_subscribe_event,
2348 .unsubscribe_event = ccdc_unsubscribe_event,
2349};
2350
2351/* V4L2 subdev video operations */
2352static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2353 .s_stream = ccdc_set_stream,
2354};
2355
2356/* V4L2 subdev pad operations */
2357static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2358 .enum_mbus_code = ccdc_enum_mbus_code,
2359 .enum_frame_size = ccdc_enum_frame_size,
2360 .get_fmt = ccdc_get_format,
2361 .set_fmt = ccdc_set_format,
a64909b8
LP		 2362 .get_selection = ccdc_get_selection,
2363 .set_selection = ccdc_set_selection,
a6d7a62d 2364 .link_validate = ccdc_link_validate,
de1135d4
LP		 2365};
2366
2367/* V4L2 subdev operations */
2368static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2369 .core = &ccdc_v4l2_core_ops,
2370 .video = &ccdc_v4l2_video_ops,
2371 .pad = &ccdc_v4l2_pad_ops,
2372};
2373
2374/* V4L2 subdev internal operations */
2375static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2376 .open = ccdc_init_formats,
2377};
2378
2379/* -----------------------------------------------------------------------------
2380 * Media entity operations
2381 */
2382
2383/*
2384 * ccdc_link_setup - Setup CCDC connections
2385 * @entity: CCDC media entity
2386 * @local: Pad at the local end of the link
2387 * @remote: Pad at the remote end of the link
2388 * @flags: Link flags
2389 *
2390 * return -EINVAL or zero on success
2391 */
2392static int ccdc_link_setup(struct media_entity *entity,
2393 const struct media_pad *local,
2394 const struct media_pad *remote, u32 flags)
2395{
2396 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2397 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2398 struct isp_device *isp = to_isp_device(ccdc);
2399
2400 switch (local->index | media_entity_type(remote->entity)) {
2401 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2402 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2403 * CSI2c.
2404 */
2405 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2406 ccdc->input = CCDC_INPUT_NONE;
2407 break;
2408 }
2409
2410 if (ccdc->input != CCDC_INPUT_NONE)
2411 return -EBUSY;
2412
2413 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2414 ccdc->input = CCDC_INPUT_CCP2B;
2415 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2416 ccdc->input = CCDC_INPUT_CSI2A;
2417 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2418 ccdc->input = CCDC_INPUT_CSI2C;
2419 else
2420 ccdc->input = CCDC_INPUT_PARALLEL;
2421
2422 break;
2423
2424 /*
2425 * The ISP core doesn't support pipelines with multiple video outputs.
2426 * Revisit this when it will be implemented, and return -EBUSY for now.
2427 */
2428
2429 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2430 /* Write to preview engine, histogram and H3A. When none of
2431 * those links are active, the video port can be disabled.
2432 */
2433 if (flags & MEDIA_LNK_FL_ENABLED) {
2434 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2435 return -EBUSY;
2436 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2437 } else {
2438 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2439 }
2440 break;
2441
2442 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2443 /* Write to memory */
2444 if (flags & MEDIA_LNK_FL_ENABLED) {
2445 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2446 return -EBUSY;
2447 ccdc->output |= CCDC_OUTPUT_MEMORY;
2448 } else {
2449 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2450 }
2451 break;
2452
2453 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2454 /* Write to resizer */
2455 if (flags & MEDIA_LNK_FL_ENABLED) {
2456 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2457 return -EBUSY;
2458 ccdc->output |= CCDC_OUTPUT_RESIZER;
2459 } else {
2460 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2461 }
2462 break;
2463
2464 default:
2465 return -EINVAL;
2466 }
2467
2468 return 0;
2469}
2470
2471/* media operations */
2472static const struct media_entity_operations ccdc_media_ops = {
2473 .link_setup = ccdc_link_setup,
a6d7a62d 2474 .link_validate = v4l2_subdev_link_validate,
de1135d4
LP		 2475};
2476
39099d09
LP		 2477void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2478{
2479 v4l2_device_unregister_subdev(&ccdc->subdev);
2480 omap3isp_video_unregister(&ccdc->video_out);
2481}
2482
2483int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2484 struct v4l2_device *vdev)
2485{
2486 int ret;
2487
2488 /* Register the subdev and video node. */
2489 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2490 if (ret < 0)
2491 goto error;
2492
2493 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2494 if (ret < 0)
2495 goto error;
2496
2497 return 0;
2498
2499error:
2500 omap3isp_ccdc_unregister_entities(ccdc);
2501 return ret;
2502}
2503
2504/* -----------------------------------------------------------------------------
2505 * ISP CCDC initialisation and cleanup
2506 */
2507
de1135d4
LP		 2508/*
2509 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2510 * @ccdc: ISP CCDC module
2511 *
2512 * Return 0 on success and a negative error code on failure.
2513 */
2514static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2515{
2516 struct v4l2_subdev *sd = &ccdc->subdev;
2517 struct media_pad *pads = ccdc->pads;
2518 struct media_entity *me = &sd->entity;
2519 int ret;
2520
2521 ccdc->input = CCDC_INPUT_NONE;
2522
2523 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2524 sd->internal_ops = &ccdc_v4l2_internal_ops;
2525 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2526 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2527 v4l2_set_subdevdata(sd, ccdc);
2528 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
de1135d4 2529
8dad936a
SA		 2530 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2531 | MEDIA_PAD_FL_MUST_CONNECT;
de1135d4
LP		 2532 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2533 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2534
2535 me->ops = &ccdc_media_ops;
2536 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2537 if (ret < 0)
2538 return ret;
2539
2540 ccdc_init_formats(sd, NULL);
2541
2542 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2543 ccdc->video_out.ops = &ccdc_video_ops;
2544 ccdc->video_out.isp = to_isp_device(ccdc);
2545 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2546 ccdc->video_out.bpl_alignment = 32;
2547
2548 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2549 if (ret < 0)
9b6390bd 2550 goto error_video;
de1135d4
LP		 2551
2552 /* Connect the CCDC subdev to the video node. */
2553 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2554 &ccdc->video_out.video.entity, 0, 0);
2555 if (ret < 0)
9b6390bd 2556 goto error_link;
de1135d4
LP		 2557
2558 return 0;
9b6390bd
LP		 2559
2560error_link:
2561 omap3isp_video_cleanup(&ccdc->video_out);
2562error_video:
2563 media_entity_cleanup(me);
2564 return ret;
de1135d4
LP		 2565}
2566
de1135d4
LP		 2567/*
2568 * omap3isp_ccdc_init - CCDC module initialization.
872aba51 2569 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2570 *
2571 * TODO: Get the initialisation values from platform data.
2572 *
2573 * Return 0 on success or a negative error code otherwise.
2574 */
2575int omap3isp_ccdc_init(struct isp_device *isp)
2576{
2577 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
9b6390bd 2578 int ret;
de1135d4
LP		 2579
2580 spin_lock_init(&ccdc->lock);
2581 init_waitqueue_head(&ccdc->wait);
2582 mutex_init(&ccdc->ioctl_lock);
2583
2584 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2585
2586 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2587 ccdc->lsc.state = LSC_STATE_STOPPED;
2588 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2589 spin_lock_init(&ccdc->lsc.req_lock);
2590
de1135d4
LP		 2591 ccdc->clamp.oblen = 0;
2592 ccdc->clamp.dcsubval = 0;
2593
de1135d4
LP		 2594 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2595 ccdc_apply_controls(ccdc);
2596
9b6390bd
LP		 2597 ret = ccdc_init_entities(ccdc);
2598 if (ret < 0) {
2599 mutex_destroy(&ccdc->ioctl_lock);
2600 return ret;
2601 }
2602
2603 return 0;
de1135d4
LP		 2604}
2605
2606/*
2607 * omap3isp_ccdc_cleanup - CCDC module cleanup.
872aba51 2608 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2609 */
2610void omap3isp_ccdc_cleanup(struct isp_device *isp)
2611{
2612 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2613
63b4ca23
LP		 2614 omap3isp_video_cleanup(&ccdc->video_out);
2615 media_entity_cleanup(&ccdc->subdev.entity);
2616
de1135d4
LP		 2617 /* Free LSC requests. As the CCDC is stopped there's no active request,
2618 * so only the pending request and the free queue need to be handled.
2619 */
2620 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2621 cancel_work_sync(&ccdc->lsc.table_work);
2622 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2623
c60e153d
LP		 2624 if (ccdc->fpc.addr != NULL)
2625 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2626 ccdc->fpc.dma);
ed33ac8e
LP		 2627
2628 mutex_destroy(&ccdc->ioctl_lock);
de1135d4 2629}
Linux kernel - Deliverables
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