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[media] omap3isp: ccdc: Use the DMA API for LSC
[deliverable/linux.git] / drivers / media / platform / omap3isp / ispccdc.c
CommitLineData
de1135d4
LP		 1/*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/uaccess.h>
29#include <linux/delay.h>
30#include <linux/device.h>
31#include <linux/dma-mapping.h>
32#include <linux/mm.h>
c8d35c84 33#include <linux/omap-iommu.h>
de1135d4 34#include <linux/sched.h>
e74d83aa 35#include <linux/slab.h>
de1135d4
LP		 36#include <media/v4l2-event.h>
37
38#include "isp.h"
39#include "ispreg.h"
40#include "ispccdc.h"
41
a64909b8
LP		 42#define CCDC_MIN_WIDTH 32
43#define CCDC_MIN_HEIGHT 32
44
de1135d4
LP		 45static struct v4l2_mbus_framefmt *
46__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
47 unsigned int pad, enum v4l2_subdev_format_whence which);
48
49static const unsigned int ccdc_fmts[] = {
50 V4L2_MBUS_FMT_Y8_1X8,
5782f97b
MJ		 51 V4L2_MBUS_FMT_Y10_1X10,
52 V4L2_MBUS_FMT_Y12_1X12,
53 V4L2_MBUS_FMT_SGRBG8_1X8,
54 V4L2_MBUS_FMT_SRGGB8_1X8,
55 V4L2_MBUS_FMT_SBGGR8_1X8,
56 V4L2_MBUS_FMT_SGBRG8_1X8,
de1135d4
LP		 57 V4L2_MBUS_FMT_SGRBG10_1X10,
58 V4L2_MBUS_FMT_SRGGB10_1X10,
59 V4L2_MBUS_FMT_SBGGR10_1X10,
60 V4L2_MBUS_FMT_SGBRG10_1X10,
61 V4L2_MBUS_FMT_SGRBG12_1X12,
62 V4L2_MBUS_FMT_SRGGB12_1X12,
63 V4L2_MBUS_FMT_SBGGR12_1X12,
64 V4L2_MBUS_FMT_SGBRG12_1X12,
c51364ca
LP		 65 V4L2_MBUS_FMT_YUYV8_2X8,
66 V4L2_MBUS_FMT_UYVY8_2X8,
de1135d4
LP		 67};
68
69/*
70 * ccdc_print_status - Print current CCDC Module register values.
71 * @ccdc: Pointer to ISP CCDC device.
72 *
73 * Also prints other debug information stored in the CCDC module.
74 */
75#define CCDC_PRINT_REGISTER(isp, name)\
76 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
77 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
78
79static void ccdc_print_status(struct isp_ccdc_device *ccdc)
80{
81 struct isp_device *isp = to_isp_device(ccdc);
82
83 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
84
85 CCDC_PRINT_REGISTER(isp, PCR);
86 CCDC_PRINT_REGISTER(isp, SYN_MODE);
87 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
88 CCDC_PRINT_REGISTER(isp, PIX_LINES);
89 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
90 CCDC_PRINT_REGISTER(isp, VERT_START);
91 CCDC_PRINT_REGISTER(isp, VERT_LINES);
92 CCDC_PRINT_REGISTER(isp, CULLING);
93 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
94 CCDC_PRINT_REGISTER(isp, SDOFST);
95 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
96 CCDC_PRINT_REGISTER(isp, CLAMP);
97 CCDC_PRINT_REGISTER(isp, DCSUB);
98 CCDC_PRINT_REGISTER(isp, COLPTN);
99 CCDC_PRINT_REGISTER(isp, BLKCMP);
100 CCDC_PRINT_REGISTER(isp, FPC);
101 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
102 CCDC_PRINT_REGISTER(isp, VDINT);
103 CCDC_PRINT_REGISTER(isp, ALAW);
104 CCDC_PRINT_REGISTER(isp, REC656IF);
105 CCDC_PRINT_REGISTER(isp, CFG);
106 CCDC_PRINT_REGISTER(isp, FMTCFG);
107 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
108 CCDC_PRINT_REGISTER(isp, FMT_VERT);
109 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
110 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
111 CCDC_PRINT_REGISTER(isp, PRGODD0);
112 CCDC_PRINT_REGISTER(isp, PRGODD1);
113 CCDC_PRINT_REGISTER(isp, VP_OUT);
114 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
115 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
116 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
117 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
118
119 dev_dbg(isp->dev, "--------------------------------------------\n");
120}
121
122/*
123 * omap3isp_ccdc_busy - Get busy state of the CCDC.
124 * @ccdc: Pointer to ISP CCDC device.
125 */
126int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
127{
128 struct isp_device *isp = to_isp_device(ccdc);
129
130 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
131 ISPCCDC_PCR_BUSY;
132}
133
134/* -----------------------------------------------------------------------------
135 * Lens Shading Compensation
136 */
137
138/*
139 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
140 * @ccdc: Pointer to ISP CCDC device.
141 * @lsc_cfg: the LSC configuration to check.
142 *
143 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
144 */
145static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
146 struct omap3isp_ccdc_lsc_config *lsc_cfg)
147{
148 struct isp_device *isp = to_isp_device(ccdc);
149 struct v4l2_mbus_framefmt *format;
150 unsigned int paxel_width, paxel_height;
151 unsigned int paxel_shift_x, paxel_shift_y;
152 unsigned int min_width, min_height, min_size;
153 unsigned int input_width, input_height;
154
155 paxel_shift_x = lsc_cfg->gain_mode_m;
156 paxel_shift_y = lsc_cfg->gain_mode_n;
157
158 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
159 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
160 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
161 return -EINVAL;
162 }
163
164 if (lsc_cfg->offset & 3) {
165 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
166 "4\n");
167 return -EINVAL;
168 }
169
170 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
171 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
172 return -EINVAL;
173 }
174
175 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
176 V4L2_SUBDEV_FORMAT_ACTIVE);
177 input_width = format->width;
178 input_height = format->height;
179
180 /* Calculate minimum bytesize for validation */
181 paxel_width = 1 << paxel_shift_x;
182 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
183 >> paxel_shift_x) + 1;
184
185 paxel_height = 1 << paxel_shift_y;
186 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
187 >> paxel_shift_y) + 1;
188
189 min_size = 4 * min_width * min_height;
190 if (min_size > lsc_cfg->size) {
191 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
192 return -EINVAL;
193 }
194 if (lsc_cfg->offset < (min_width * 4)) {
195 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
196 return -EINVAL;
197 }
198 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
199 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
200 return -EINVAL;
201 }
202 return 0;
203}
204
205/*
206 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
207 * @ccdc: Pointer to ISP CCDC device.
208 */
d33186d0
LP		 209static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
210 dma_addr_t addr)
de1135d4
LP		 211{
212 isp_reg_writel(to_isp_device(ccdc), addr,
213 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
214}
215
216/*
217 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
218 * @ccdc: Pointer to ISP CCDC device.
219 */
220static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
221 struct omap3isp_ccdc_lsc_config *cfg)
222{
223 struct isp_device *isp = to_isp_device(ccdc);
224 int reg;
225
226 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
227 ISPCCDC_LSC_TABLE_OFFSET);
228
229 reg = 0;
230 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
231 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
232 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
233 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
234
235 reg = 0;
236 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
237 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
238 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
239 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
240 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
241 ISPCCDC_LSC_INITIAL);
242}
243
244static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
245{
246 struct isp_device *isp = to_isp_device(ccdc);
247 unsigned int wait;
248
249 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
250 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
251
252 /* timeout 1 ms */
253 for (wait = 0; wait < 1000; wait++) {
254 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
255 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
256 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
257 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
258 return 0;
259 }
260
261 rmb();
262 udelay(1);
263 }
264
265 return -ETIMEDOUT;
266}
267
268/*
269 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
270 * @ccdc: Pointer to ISP CCDC device.
271 * @enable: 0 Disables LSC, 1 Enables LSC.
272 */
273static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
274{
275 struct isp_device *isp = to_isp_device(ccdc);
276 const struct v4l2_mbus_framefmt *format =
277 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
278 V4L2_SUBDEV_FORMAT_ACTIVE);
279
280 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
281 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
282 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
283 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
284 return -EINVAL;
285
286 if (enable)
287 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
288
289 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
290 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
291
292 if (enable) {
293 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
294 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
295 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
296 ccdc->lsc.state = LSC_STATE_STOPPED;
25aeb418 297 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
de1135d4
LP		 298 return -ETIMEDOUT;
299 }
300 ccdc->lsc.state = LSC_STATE_RUNNING;
301 } else {
302 ccdc->lsc.state = LSC_STATE_STOPPING;
303 }
304
305 return 0;
306}
307
308static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
309{
310 struct isp_device *isp = to_isp_device(ccdc);
311
312 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
313 ISPCCDC_LSC_BUSY;
314}
315
316/* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
317 * @ccdc: Pointer to ISP CCDC device
318 * @req: New configuration request
319 *
320 * context: in_interrupt()
321 */
322static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
323 struct ispccdc_lsc_config_req *req)
324{
325 if (!req->enable)
326 return -EINVAL;
327
328 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
329 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
330 return -EINVAL;
331 }
332
333 if (ccdc_lsc_busy(ccdc))
334 return -EBUSY;
335
336 ccdc_lsc_setup_regs(ccdc, &req->config);
d33186d0 337 ccdc_lsc_program_table(ccdc, req->table.dma);
de1135d4
LP		 338 return 0;
339}
340
341/*
342 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
343 * @ccdc: Pointer to ISP CCDC device.
344 *
345 * Disables LSC, and defers enablement to shadow registers update time.
346 */
347static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
348{
349 struct isp_device *isp = to_isp_device(ccdc);
350 /*
351 * From OMAP3 TRM: When this event is pending, the module
352 * goes into transparent mode (output =input). Normal
353 * operation can be resumed at the start of the next frame
354 * after:
355 * 1) Clearing this event
356 * 2) Disabling the LSC module
357 * 3) Enabling it
358 */
359 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
360 ISPCCDC_LSC_ENABLE);
361 ccdc->lsc.state = LSC_STATE_STOPPED;
362}
363
364static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
365 struct ispccdc_lsc_config_req *req)
366{
367 struct isp_device *isp = to_isp_device(ccdc);
368
369 if (req == NULL)
370 return;
371
d33186d0
LP		 372 if (req->table.addr) {
373 sg_free_table(&req->table.sgt);
374 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
375 req->table.dma);
376 }
377
de1135d4
LP		 378 kfree(req);
379}
380
381static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
382 struct list_head *queue)
383{
384 struct ispccdc_lsc_config_req *req, *n;
385 unsigned long flags;
386
387 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
388 list_for_each_entry_safe(req, n, queue, list) {
389 list_del(&req->list);
390 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
391 ccdc_lsc_free_request(ccdc, req);
392 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
393 }
394 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
395}
396
397static void ccdc_lsc_free_table_work(struct work_struct *work)
398{
399 struct isp_ccdc_device *ccdc;
400 struct ispccdc_lsc *lsc;
401
402 lsc = container_of(work, struct ispccdc_lsc, table_work);
403 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
404
405 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
406}
407
408/*
409 * ccdc_lsc_config - Configure the LSC module from a userspace request
410 *
411 * Store the request LSC configuration in the LSC engine request pointer. The
412 * configuration will be applied to the hardware when the CCDC will be enabled,
413 * or at the next LSC interrupt if the CCDC is already running.
414 */
415static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
416 struct omap3isp_ccdc_update_config *config)
417{
418 struct isp_device *isp = to_isp_device(ccdc);
419 struct ispccdc_lsc_config_req *req;
420 unsigned long flags;
de1135d4
LP		 421 u16 update;
422 int ret;
423
424 update = config->update &
425 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
426 if (!update)
427 return 0;
428
429 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
430 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
431 "need to be supplied\n", __func__);
432 return -EINVAL;
433 }
434
435 req = kzalloc(sizeof(*req), GFP_KERNEL);
436 if (req == NULL)
437 return -ENOMEM;
438
439 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
440 if (copy_from_user(&req->config, config->lsc_cfg,
441 sizeof(req->config))) {
442 ret = -EFAULT;
443 goto done;
444 }
445
446 req->enable = 1;
447
d33186d0
LP		 448 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
449 &req->table.dma,
450 GFP_KERNEL);
451 if (req->table.addr == NULL) {
de1135d4
LP		 452 ret = -ENOMEM;
453 goto done;
454 }
455
d33186d0
LP		 456 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
457 req->table.addr, req->table.dma,
458 req->config.size);
459 if (ret < 0)
de1135d4 460 goto done;
de1135d4 461
d33186d0
LP		 462 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
463 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4 464
d33186d0
LP		 465 if (copy_from_user(req->table.addr, config->lsc,
466 req->config.size)) {
de1135d4
LP		 467 ret = -EFAULT;
468 goto done;
469 }
470
d33186d0
LP		 471 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
472 req->table.sgt.nents, DMA_TO_DEVICE);
de1135d4
LP		 473 }
474
475 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
476 if (ccdc->lsc.request) {
477 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
478 schedule_work(&ccdc->lsc.table_work);
479 }
480 ccdc->lsc.request = req;
481 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
482
483 ret = 0;
484
485done:
486 if (ret < 0)
487 ccdc_lsc_free_request(ccdc, req);
488
489 return ret;
490}
491
492static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
493{
494 unsigned long flags;
495
496 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
497 if (ccdc->lsc.active) {
498 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
499 return 1;
500 }
501 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
502 return 0;
503}
504
505static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
506{
507 struct ispccdc_lsc *lsc = &ccdc->lsc;
508
509 if (lsc->state != LSC_STATE_STOPPED)
510 return -EINVAL;
511
512 if (lsc->active) {
513 list_add_tail(&lsc->active->list, &lsc->free_queue);
514 lsc->active = NULL;
515 }
516
517 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
518 omap3isp_sbl_disable(to_isp_device(ccdc),
519 OMAP3_ISP_SBL_CCDC_LSC_READ);
520 list_add_tail(&lsc->request->list, &lsc->free_queue);
521 lsc->request = NULL;
522 goto done;
523 }
524
525 lsc->active = lsc->request;
526 lsc->request = NULL;
527 __ccdc_lsc_enable(ccdc, 1);
528
529done:
530 if (!list_empty(&lsc->free_queue))
531 schedule_work(&lsc->table_work);
532
533 return 0;
534}
535
536/* -----------------------------------------------------------------------------
537 * Parameters configuration
538 */
539
540/*
541 * ccdc_configure_clamp - Configure optical-black or digital clamping
542 * @ccdc: Pointer to ISP CCDC device.
543 *
544 * The CCDC performs either optical-black or digital clamp. Configure and enable
545 * the selected clamp method.
546 */
547static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
548{
549 struct isp_device *isp = to_isp_device(ccdc);
550 u32 clamp;
551
552 if (ccdc->obclamp) {
553 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
554 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
555 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
556 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
557 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
558 } else {
559 isp_reg_writel(isp, ccdc->clamp.dcsubval,
560 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
561 }
562
563 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
564 ISPCCDC_CLAMP_CLAMPEN,
565 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
566}
567
568/*
569 * ccdc_configure_fpc - Configure Faulty Pixel Correction
570 * @ccdc: Pointer to ISP CCDC device.
571 */
572static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
573{
574 struct isp_device *isp = to_isp_device(ccdc);
575
576 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
577
578 if (!ccdc->fpc_en)
579 return;
580
581 isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
582 ISPCCDC_FPC_ADDR);
583 /* The FPNUM field must be set before enabling FPC. */
584 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
585 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
586 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
587 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
588}
589
590/*
591 * ccdc_configure_black_comp - Configure Black Level Compensation.
592 * @ccdc: Pointer to ISP CCDC device.
593 */
594static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
595{
596 struct isp_device *isp = to_isp_device(ccdc);
597 u32 blcomp;
598
599 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
600 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
601 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
602 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
603
604 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
605}
606
607/*
608 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
609 * @ccdc: Pointer to ISP CCDC device.
610 */
611static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
612{
613 struct isp_device *isp = to_isp_device(ccdc);
614
615 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
616 ISPCCDC_SYN_MODE_LPF,
617 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
618}
619
620/*
621 * ccdc_configure_alaw - Configure A-law compression.
622 * @ccdc: Pointer to ISP CCDC device.
623 */
624static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
625{
626 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 627 const struct isp_format_info *info;
de1135d4
LP		 628 u32 alaw = 0;
629
73ea57eb
LP		 630 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
631
632 switch (info->width) {
de1135d4
LP		 633 case 8:
634 return;
635
636 case 10:
637 alaw = ISPCCDC_ALAW_GWDI_9_0;
638 break;
639 case 11:
640 alaw = ISPCCDC_ALAW_GWDI_10_1;
641 break;
642 case 12:
643 alaw = ISPCCDC_ALAW_GWDI_11_2;
644 break;
645 case 13:
646 alaw = ISPCCDC_ALAW_GWDI_12_3;
647 break;
648 }
649
650 if (ccdc->alaw)
651 alaw |= ISPCCDC_ALAW_CCDTBL;
652
653 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
654}
655
656/*
657 * ccdc_config_imgattr - Configure sensor image specific attributes.
658 * @ccdc: Pointer to ISP CCDC device.
659 * @colptn: Color pattern of the sensor.
660 */
661static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
662{
663 struct isp_device *isp = to_isp_device(ccdc);
664
665 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
666}
667
668/*
669 * ccdc_config - Set CCDC configuration from userspace
670 * @ccdc: Pointer to ISP CCDC device.
872aba51 671 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
de1135d4
LP		 672 *
673 * Returns 0 if successful, -EINVAL if the pointer to the configuration
674 * structure is null, or the copy_from_user function fails to copy user space
675 * memory to kernel space memory.
676 */
677static int ccdc_config(struct isp_ccdc_device *ccdc,
678 struct omap3isp_ccdc_update_config *ccdc_struct)
679{
680 struct isp_device *isp = to_isp_device(ccdc);
681 unsigned long flags;
682
683 spin_lock_irqsave(&ccdc->lock, flags);
684 ccdc->shadow_update = 1;
685 spin_unlock_irqrestore(&ccdc->lock, flags);
686
687 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
688 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
689 ccdc->update |= OMAP3ISP_CCDC_ALAW;
690 }
691
692 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
693 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
694 ccdc->update |= OMAP3ISP_CCDC_LPF;
695 }
696
697 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
698 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
699 sizeof(ccdc->clamp))) {
700 ccdc->shadow_update = 0;
701 return -EFAULT;
702 }
703
704 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
705 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
706 }
707
708 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
709 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
710 sizeof(ccdc->blcomp))) {
711 ccdc->shadow_update = 0;
712 return -EFAULT;
713 }
714
715 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
716 }
717
718 ccdc->shadow_update = 0;
719
720 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
721 u32 table_old = 0;
722 u32 table_new;
723 u32 size;
724
725 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
726 return -EBUSY;
727
728 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
729
730 if (ccdc->fpc_en) {
731 if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
732 sizeof(ccdc->fpc)))
733 return -EFAULT;
734
735 /*
736 * table_new must be 64-bytes aligned, but it's
6c32df43 737 * already done by omap_iommu_vmalloc().
de1135d4
LP		 738 */
739 size = ccdc->fpc.fpnum * 4;
fabdbca8 740 table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
6c32df43 741 0, size, IOMMU_FLAG);
de1135d4
LP		 742 if (IS_ERR_VALUE(table_new))
743 return -ENOMEM;
744
fabdbca8 745 if (copy_from_user(omap_da_to_va(isp->dev, table_new),
de1135d4
LP		 746 (__force void __user *)
747 ccdc->fpc.fpcaddr, size)) {
fabdbca8 748 omap_iommu_vfree(isp->domain, isp->dev,
6c32df43 749 table_new);
de1135d4
LP		 750 return -EFAULT;
751 }
752
753 table_old = ccdc->fpc.fpcaddr;
754 ccdc->fpc.fpcaddr = table_new;
755 }
756
757 ccdc_configure_fpc(ccdc);
758 if (table_old != 0)
fabdbca8 759 omap_iommu_vfree(isp->domain, isp->dev, table_old);
de1135d4
LP		 760 }
761
762 return ccdc_lsc_config(ccdc, ccdc_struct);
763}
764
765static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
766{
767 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
768 ccdc_configure_alaw(ccdc);
769 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
770 }
771
772 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
773 ccdc_configure_lpf(ccdc);
774 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
775 }
776
777 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
778 ccdc_configure_clamp(ccdc);
779 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
780 }
781
782 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
783 ccdc_configure_black_comp(ccdc);
784 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
785 }
786}
787
788/*
789 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
872aba51 790 * @isp: Pointer to ISP device
de1135d4
LP		 791 */
792void omap3isp_ccdc_restore_context(struct isp_device *isp)
793{
794 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
795
796 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
797
798 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
799 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
800 ccdc_apply_controls(ccdc);
801 ccdc_configure_fpc(ccdc);
802}
803
804/* -----------------------------------------------------------------------------
805 * Format- and pipeline-related configuration helpers
806 */
807
808/*
809 * ccdc_config_vp - Configure the Video Port.
810 * @ccdc: Pointer to ISP CCDC device.
811 */
812static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
813{
814 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
815 struct isp_device *isp = to_isp_device(ccdc);
73ea57eb 816 const struct isp_format_info *info;
de1135d4
LP		 817 unsigned long l3_ick = pipe->l3_ick;
818 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
819 unsigned int div = 0;
820 u32 fmtcfg_vp;
821
822 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
823 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
824
73ea57eb
LP		 825 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
826
827 switch (info->width) {
de1135d4
LP		 828 case 8:
829 case 10:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
831 break;
832 case 11:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
834 break;
835 case 12:
836 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
837 break;
838 case 13:
839 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
840 break;
13eaaa7f 841 }
de1135d4
LP		 842
843 if (pipe->input)
844 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
c6c01f97
SA		 845 else if (pipe->external_rate)
846 div = l3_ick / pipe->external_rate;
de1135d4
LP		 847
848 div = clamp(div, 2U, max_div);
849 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
850
851 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
852}
853
854/*
855 * ccdc_enable_vp - Enable Video Port.
856 * @ccdc: Pointer to ISP CCDC device.
857 * @enable: 0 Disables VP, 1 Enables VP
858 *
859 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
860 */
861static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
862{
863 struct isp_device *isp = to_isp_device(ccdc);
864
865 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
866 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
867}
868
869/*
870 * ccdc_config_outlineoffset - Configure memory saving output line offset
871 * @ccdc: Pointer to ISP CCDC device.
872 * @offset: Address offset to start a new line. Must be twice the
873 * Output width and aligned on 32 byte boundary
874 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
875 * output.
876 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
877 *
878 * - Configures the output line offset when stored in memory
879 * - Sets the odd/even line pattern to store the output
880 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
881 * - Configures the number of even and odd line fields in case of rearranging
882 * the lines.
883 */
884static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
885 u32 offset, u8 oddeven, u8 numlines)
886{
887 struct isp_device *isp = to_isp_device(ccdc);
888
889 isp_reg_writel(isp, offset & 0xffff,
890 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
891
892 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
893 ISPCCDC_SDOFST_FINV);
894
895 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
896 ISPCCDC_SDOFST_FOFST_4L);
897
898 switch (oddeven) {
899 case EVENEVEN:
900 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
901 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
902 break;
903 case ODDEVEN:
904 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
905 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
906 break;
907 case EVENODD:
908 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
909 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
910 break;
911 case ODDODD:
912 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
913 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
914 break;
915 default:
916 break;
917 }
918}
919
920/*
921 * ccdc_set_outaddr - Set memory address to save output image
922 * @ccdc: Pointer to ISP CCDC device.
923 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
924 *
925 * Sets the memory address where the output will be saved.
926 */
927static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
928{
929 struct isp_device *isp = to_isp_device(ccdc);
930
931 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
932}
933
934/*
935 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
936 * @ccdc: Pointer to ISP CCDC device.
937 * @max_rate: Maximum calculated data rate.
938 *
939 * Returns in *max_rate less value between calculated and passed
940 */
941void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
942 unsigned int *max_rate)
943{
944 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
945 unsigned int rate;
946
947 if (pipe == NULL)
948 return;
949
950 /*
951 * TRM says that for parallel sensors the maximum data rate
952 * should be 90% form L3/2 clock, otherwise just L3/2.
953 */
954 if (ccdc->input == CCDC_INPUT_PARALLEL)
955 rate = pipe->l3_ick / 2 * 9 / 10;
956 else
957 rate = pipe->l3_ick / 2;
958
959 *max_rate = min(*max_rate, rate);
960}
961
962/*
963 * ccdc_config_sync_if - Set CCDC sync interface configuration
964 * @ccdc: Pointer to ISP CCDC device.
73ea57eb
LP		 965 * @pdata: Parallel interface platform data (may be NULL)
966 * @data_size: Data size
de1135d4
LP		 967 */
968static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
73ea57eb
LP		 969 struct isp_parallel_platform_data *pdata,
970 unsigned int data_size)
de1135d4
LP		 971{
972 struct isp_device *isp = to_isp_device(ccdc);
c51364ca 973 const struct v4l2_mbus_framefmt *format;
cf7a3d91 974 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
de1135d4 975
c51364ca
LP		 976 format = &ccdc->formats[CCDC_PAD_SINK];
977
978 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
979 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
980 /* The bridge is enabled for YUV8 formats. Configure the input
981 * mode accordingly.
982 */
983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
984 }
985
73ea57eb 986 switch (data_size) {
de1135d4
LP		 987 case 8:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
989 break;
990 case 10:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
992 break;
993 case 11:
994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
995 break;
996 case 12:
997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
998 break;
13eaaa7f 999 }
de1135d4 1000
73ea57eb 1001 if (pdata && pdata->data_pol)
de1135d4 1002 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
de1135d4 1003
73ea57eb 1004 if (pdata && pdata->hs_pol)
de1135d4 1005 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
de1135d4 1006
73ea57eb 1007 if (pdata && pdata->vs_pol)
de1135d4 1008 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
de1135d4
LP		 1009
1010 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
c51364ca
LP		 1011
1012 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1013 * hardware seems to ignore it in all other input modes.
1014 */
1015 if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1016 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1017 ISPCCDC_CFG_Y8POS);
1018 else
1019 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1020 ISPCCDC_CFG_Y8POS);
1021
1022 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1023 ISPCCDC_REC656IF_R656ON);
de1135d4
LP		 1024}
1025
1026/* CCDC formats descriptions */
1027static const u32 ccdc_sgrbg_pattern =
1028 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1029 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1030 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1031 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1032 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1033 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1034 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1035 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1036 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1037 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1038 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1039 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1040 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1041 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1042 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1043 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1044
1045static const u32 ccdc_srggb_pattern =
1046 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1047 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1048 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1049 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1050 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1051 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1052 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1053 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1054 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1055 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1056 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1057 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1058 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1059 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1060 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1061 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1062
1063static const u32 ccdc_sbggr_pattern =
1064 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1065 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1066 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1067 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1068 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1069 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1070 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1071 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1072 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1073 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1074 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1075 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1076 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1077 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1078 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1079 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1080
1081static const u32 ccdc_sgbrg_pattern =
1082 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1083 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1084 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1085 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1086 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1087 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1088 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1089 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1090 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1091 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1092 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1093 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1094 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1095 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1096 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1097 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1098
1099static void ccdc_configure(struct isp_ccdc_device *ccdc)
1100{
1101 struct isp_device *isp = to_isp_device(ccdc);
1102 struct isp_parallel_platform_data *pdata = NULL;
1103 struct v4l2_subdev *sensor;
1104 struct v4l2_mbus_framefmt *format;
a64909b8 1105 const struct v4l2_rect *crop;
c09af044
MJ		 1106 const struct isp_format_info *fmt_info;
1107 struct v4l2_subdev_format fmt_src;
1108 unsigned int depth_out;
1109 unsigned int depth_in = 0;
de1135d4
LP		 1110 struct media_pad *pad;
1111 unsigned long flags;
c51364ca 1112 unsigned int bridge;
c09af044 1113 unsigned int shift;
de1135d4
LP		 1114 u32 syn_mode;
1115 u32 ccdc_pattern;
1116
1bddf1b3 1117 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
c09af044
MJ		 1118 sensor = media_entity_to_v4l2_subdev(pad->entity);
1119 if (ccdc->input == CCDC_INPUT_PARALLEL)
de1135d4
LP		 1120 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1121 ->bus.parallel;
c09af044 1122
c51364ca
LP		 1123 /* Compute the lane shifter shift value and enable the bridge when the
1124 * input format is YUV.
1125 */
c09af044
MJ		 1126 fmt_src.pad = pad->index;
1127 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1128 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1129 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1697e49a 1130 depth_in = fmt_info->width;
de1135d4
LP		 1131 }
1132
c09af044
MJ		 1133 fmt_info = omap3isp_video_format_info
1134 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1697e49a 1135 depth_out = fmt_info->width;
c09af044 1136 shift = depth_in - depth_out;
de1135d4 1137
c51364ca
LP		 1138 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1139 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1140 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1141 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1142 else
1143 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
de1135d4 1144
c51364ca
LP		 1145 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1146
1147 ccdc_config_sync_if(ccdc, pdata, depth_out);
de1135d4
LP		 1148
1149 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1150
1151 /* Use the raw, unprocessed data when writing to memory. The H3A and
1152 * histogram modules are still fed with lens shading corrected data.
1153 */
1154 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1155
1156 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1157 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1158 else
1159 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1160
1161 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1162 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1163 else
1164 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1165
c51364ca
LP		 1166 /* CCDC_PAD_SINK */
1167 format = &ccdc->formats[CCDC_PAD_SINK];
de1135d4
LP		 1168
1169 /* Mosaic filter */
1170 switch (format->code) {
1171 case V4L2_MBUS_FMT_SRGGB10_1X10:
1172 case V4L2_MBUS_FMT_SRGGB12_1X12:
1173 ccdc_pattern = ccdc_srggb_pattern;
1174 break;
1175 case V4L2_MBUS_FMT_SBGGR10_1X10:
1176 case V4L2_MBUS_FMT_SBGGR12_1X12:
1177 ccdc_pattern = ccdc_sbggr_pattern;
1178 break;
1179 case V4L2_MBUS_FMT_SGBRG10_1X10:
1180 case V4L2_MBUS_FMT_SGBRG12_1X12:
1181 ccdc_pattern = ccdc_sgbrg_pattern;
1182 break;
1183 default:
1184 /* Use GRBG */
1185 ccdc_pattern = ccdc_sgrbg_pattern;
1186 break;
1187 }
1188 ccdc_config_imgattr(ccdc, ccdc_pattern);
1189
1190 /* Generate VD0 on the last line of the image and VD1 on the
1191 * 2/3 height line.
1192 */
1193 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1194 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1195 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1196
1197 /* CCDC_PAD_SOURCE_OF */
c51364ca 1198 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
a64909b8 1199 crop = &ccdc->crop;
de1135d4 1200
a64909b8
LP		 1201 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1202 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
de1135d4 1203 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
a64909b8 1204 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
de1135d4 1205 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
a64909b8 1206 isp_reg_writel(isp, (crop->height - 1)
de1135d4
LP		 1207 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1208 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1209
1210 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1211
c51364ca
LP		 1212 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1213 * YUYV.
1214 */
1215 if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1216 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1217 ISPCCDC_CFG_BSWD);
1218 else
1219 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1220 ISPCCDC_CFG_BSWD);
1221
1222 /* Use PACK8 mode for 1byte per pixel formats. */
1223 if (omap3isp_video_format_info(format->code)->width <= 8)
1224 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1225 else
1226 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1227
1228 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1229
de1135d4
LP		 1230 /* CCDC_PAD_SOURCE_VP */
1231 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1232
1233 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1234 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1235 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1236 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1237 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1238 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1239
1240 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1241 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1242 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1243
c51364ca 1244 /* Lens shading correction. */
de1135d4
LP		 1245 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1246 if (ccdc->lsc.request == NULL)
1247 goto unlock;
1248
1249 WARN_ON(ccdc->lsc.active);
1250
1251 /* Get last good LSC configuration. If it is not supported for
1252 * the current active resolution discard it.
1253 */
1254 if (ccdc->lsc.active == NULL &&
1255 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1256 ccdc->lsc.active = ccdc->lsc.request;
1257 } else {
1258 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1259 schedule_work(&ccdc->lsc.table_work);
1260 }
1261
1262 ccdc->lsc.request = NULL;
1263
1264unlock:
1265 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1266
1267 ccdc_apply_controls(ccdc);
1268}
1269
1270static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1271{
1272 struct isp_device *isp = to_isp_device(ccdc);
1273
1274 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1275 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1276}
1277
1278static int ccdc_disable(struct isp_ccdc_device *ccdc)
1279{
1280 unsigned long flags;
1281 int ret = 0;
1282
1283 spin_lock_irqsave(&ccdc->lock, flags);
1284 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1285 ccdc->stopping = CCDC_STOP_REQUEST;
1286 spin_unlock_irqrestore(&ccdc->lock, flags);
1287
1288 ret = wait_event_timeout(ccdc->wait,
1289 ccdc->stopping == CCDC_STOP_FINISHED,
1290 msecs_to_jiffies(2000));
1291 if (ret == 0) {
1292 ret = -ETIMEDOUT;
1293 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1294 }
1295
1296 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1297
1298 mutex_lock(&ccdc->ioctl_lock);
1299 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1300 ccdc->lsc.request = ccdc->lsc.active;
1301 ccdc->lsc.active = NULL;
1302 cancel_work_sync(&ccdc->lsc.table_work);
1303 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1304 mutex_unlock(&ccdc->ioctl_lock);
1305
1306 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1307
1308 return ret > 0 ? 0 : ret;
1309}
1310
1311static void ccdc_enable(struct isp_ccdc_device *ccdc)
1312{
1313 if (ccdc_lsc_is_configured(ccdc))
1314 __ccdc_lsc_enable(ccdc, 1);
1315 __ccdc_enable(ccdc, 1);
1316}
1317
1318/* -----------------------------------------------------------------------------
1319 * Interrupt handling
1320 */
1321
1322/*
1323 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1324 * @ccdc: Pointer to ISP CCDC device.
1325 *
1326 * Returns zero if the CCDC is idle and the image has been written to
1327 * memory, too.
1328 */
1329static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1330{
1331 struct isp_device *isp = to_isp_device(ccdc);
1332
1333 return omap3isp_ccdc_busy(ccdc)
1334 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1335 ISPSBL_CCDC_WR_0_DATA_READY)
1336 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1337 ISPSBL_CCDC_WR_0_DATA_READY)
1338 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1339 ISPSBL_CCDC_WR_0_DATA_READY)
1340 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1341 ISPSBL_CCDC_WR_0_DATA_READY);
1342}
1343
1344/*
1345 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1346 * @ccdc: Pointer to ISP CCDC device.
1347 * @max_wait: Max retry count in us for wait for idle/busy transition.
1348 */
1349static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1350 unsigned int max_wait)
1351{
1352 unsigned int wait = 0;
1353
1354 if (max_wait == 0)
1355 max_wait = 10000; /* 10 ms */
1356
1357 for (wait = 0; wait <= max_wait; wait++) {
1358 if (!ccdc_sbl_busy(ccdc))
1359 return 0;
1360
1361 rmb();
1362 udelay(1);
1363 }
1364
1365 return -EBUSY;
1366}
1367
1368/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1369 * @ccdc: Pointer to ISP CCDC device.
1370 * @event: Pointing which event trigger handler
1371 *
2d4e9d1d 1372 * Return 1 when the event and stopping request combination is satisfied,
de1135d4
LP		 1373 * zero otherwise.
1374 */
1375static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1376{
1377 int rval = 0;
1378
1379 switch ((ccdc->stopping & 3) | event) {
1380 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1381 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1382 __ccdc_lsc_enable(ccdc, 0);
1383 __ccdc_enable(ccdc, 0);
1384 ccdc->stopping = CCDC_STOP_EXECUTED;
1385 return 1;
1386
1387 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1388 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1389 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1390 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1391 rval = 1;
1392 break;
1393
1394 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1395 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1396 rval = 1;
1397 break;
1398
1399 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1400 return 1;
1401 }
1402
1403 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1404 wake_up(&ccdc->wait);
1405 rval = 1;
1406 }
1407
1408 return rval;
1409}
1410
1411static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1412{
bd0f2e6d 1413 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
63ae37ea 1414 struct video_device *vdev = ccdc->subdev.devnode;
de1135d4
LP		 1415 struct v4l2_event event;
1416
b43883d6
LP		 1417 /* Frame number propagation */
1418 atomic_inc(&pipe->frame_number);
1419
de1135d4 1420 memset(&event, 0, sizeof(event));
69d232ae
SA		 1421 event.type = V4L2_EVENT_FRAME_SYNC;
1422 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
de1135d4
LP		 1423
1424 v4l2_event_queue(vdev, &event);
1425}
1426
1427/*
1428 * ccdc_lsc_isr - Handle LSC events
1429 * @ccdc: Pointer to ISP CCDC device.
1430 * @events: LSC events
1431 */
1432static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1433{
1434 unsigned long flags;
1435
1436 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
875e2e3e
LP		 1437 struct isp_pipeline *pipe =
1438 to_isp_pipeline(&ccdc->subdev.entity);
1439
de1135d4 1440 ccdc_lsc_error_handler(ccdc);
875e2e3e 1441 pipe->error = true;
de1135d4
LP		 1442 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1443 }
1444
1445 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1446 return;
1447
1448 /* LSC_DONE interrupt occur, there are two cases
1449 * 1. stopping for reconfiguration
1450 * 2. stopping because of STREAM OFF command
1451 */
1452 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1453
1454 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1455 ccdc->lsc.state = LSC_STATE_STOPPED;
1456
1457 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1458 goto done;
1459
1460 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1461 goto done;
1462
1463 /* LSC is in STOPPING state, change to the new state */
1464 ccdc->lsc.state = LSC_STATE_STOPPED;
1465
1466 /* This is an exception. Start of frame and LSC_DONE interrupt
1467 * have been received on the same time. Skip this event and wait
1468 * for better times.
1469 */
1470 if (events & IRQ0STATUS_HS_VS_IRQ)
1471 goto done;
1472
1473 /* The LSC engine is stopped at this point. Enable it if there's a
1474 * pending request.
1475 */
1476 if (ccdc->lsc.request == NULL)
1477 goto done;
1478
1479 ccdc_lsc_enable(ccdc);
1480
1481done:
1482 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1483}
1484
1485static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1486{
1487 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1488 struct isp_device *isp = to_isp_device(ccdc);
1489 struct isp_buffer *buffer;
1490 int restart = 0;
1491
1492 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1493 * doesn't explicitly state if that's supposed to happen or not, so it
1494 * can be considered as a hardware bug or as a feature, but we have to
1495 * deal with it anyway). Disabling the CCDC when no buffer is available
1496 * would thus not be enough, we need to handle the situation explicitly.
1497 */
1498 if (list_empty(&ccdc->video_out.dmaqueue))
1499 goto done;
1500
1501 /* We're in continuous mode, and memory writes were disabled due to a
1502 * buffer underrun. Reenable them now that we have a buffer. The buffer
1503 * address has been set in ccdc_video_queue.
1504 */
1505 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1506 restart = 1;
1507 ccdc->underrun = 0;
1508 goto done;
1509 }
1510
1511 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1512 dev_info(isp->dev, "CCDC won't become idle!\n");
9554b7db
LP		 1513 isp->crashed |= 1U << ccdc->subdev.entity.id;
1514 omap3isp_pipeline_cancel_stream(pipe);
de1135d4
LP		 1515 goto done;
1516 }
1517
875e2e3e 1518 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
de1135d4
LP		 1519 if (buffer != NULL) {
1520 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1521 restart = 1;
1522 }
1523
1524 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1525
1526 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1527 isp_pipeline_ready(pipe))
1528 omap3isp_pipeline_set_stream(pipe,
1529 ISP_PIPELINE_STREAM_SINGLESHOT);
1530
1531done:
de1135d4
LP		 1532 return restart;
1533}
1534
1535/*
1536 * ccdc_vd0_isr - Handle VD0 event
1537 * @ccdc: Pointer to ISP CCDC device.
1538 *
1539 * Executes LSC deferred enablement before next frame starts.
1540 */
1541static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1542{
1543 unsigned long flags;
1544 int restart = 0;
1545
1546 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1547 restart = ccdc_isr_buffer(ccdc);
1548
1549 spin_lock_irqsave(&ccdc->lock, flags);
1550 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1551 spin_unlock_irqrestore(&ccdc->lock, flags);
1552 return;
1553 }
1554
1555 if (!ccdc->shadow_update)
1556 ccdc_apply_controls(ccdc);
1557 spin_unlock_irqrestore(&ccdc->lock, flags);
1558
1559 if (restart)
1560 ccdc_enable(ccdc);
1561}
1562
1563/*
1564 * ccdc_vd1_isr - Handle VD1 event
1565 * @ccdc: Pointer to ISP CCDC device.
1566 */
1567static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1568{
1569 unsigned long flags;
1570
1571 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1572
1573 /*
1574 * Depending on the CCDC pipeline state, CCDC stopping should be
1575 * handled differently. In SINGLESHOT we emulate an internal CCDC
1576 * stopping because the CCDC hw works only in continuous mode.
1577 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1578 * data to memory the CCDC and LSC are stopped immediately but
1579 * without change the CCDC stopping state machine. The CCDC
1580 * stopping state machine should be used only when user request
1581 * for stopping is received (SINGLESHOT is an exeption).
1582 */
1583 switch (ccdc->state) {
1584 case ISP_PIPELINE_STREAM_SINGLESHOT:
1585 ccdc->stopping = CCDC_STOP_REQUEST;
1586 break;
1587
1588 case ISP_PIPELINE_STREAM_CONTINUOUS:
1589 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1590 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1591 __ccdc_lsc_enable(ccdc, 0);
1592 __ccdc_enable(ccdc, 0);
1593 }
1594 break;
1595
1596 case ISP_PIPELINE_STREAM_STOPPED:
1597 break;
1598 }
1599
1600 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1601 goto done;
1602
1603 if (ccdc->lsc.request == NULL)
1604 goto done;
1605
1606 /*
1607 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1608 * do the appropriate changes in registers
1609 */
1610 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1611 __ccdc_lsc_enable(ccdc, 0);
1612 ccdc->lsc.state = LSC_STATE_RECONFIG;
1613 goto done;
1614 }
1615
1616 /* LSC has been in STOPPED state, enable it */
1617 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1618 ccdc_lsc_enable(ccdc);
1619
1620done:
1621 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1622}
1623
1624/*
1625 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1626 * @ccdc: Pointer to ISP CCDC device.
1627 * @events: CCDC events
1628 */
1629int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1630{
1631 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1632 return 0;
1633
1634 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1635 ccdc_vd1_isr(ccdc);
1636
1637 ccdc_lsc_isr(ccdc, events);
1638
1639 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1640 ccdc_vd0_isr(ccdc);
1641
1642 if (events & IRQ0STATUS_HS_VS_IRQ)
1643 ccdc_hs_vs_isr(ccdc);
1644
1645 return 0;
1646}
1647
1648/* -----------------------------------------------------------------------------
1649 * ISP video operations
1650 */
1651
1652static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1653{
1654 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1655
1656 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1657 return -ENODEV;
1658
1659 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1660
2d4e9d1d 1661 /* We now have a buffer queued on the output, restart the pipeline
de1135d4
LP		 1662 * on the next CCDC interrupt if running in continuous mode (or when
1663 * starting the stream).
1664 */
1665 ccdc->underrun = 1;
1666
1667 return 0;
1668}
1669
1670static const struct isp_video_operations ccdc_video_ops = {
1671 .queue = ccdc_video_queue,
1672};
1673
1674/* -----------------------------------------------------------------------------
1675 * V4L2 subdev operations
1676 */
1677
1678/*
1679 * ccdc_ioctl - CCDC module private ioctl's
1680 * @sd: ISP CCDC V4L2 subdevice
1681 * @cmd: ioctl command
1682 * @arg: ioctl argument
1683 *
1684 * Return 0 on success or a negative error code otherwise.
1685 */
1686static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1687{
1688 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1689 int ret;
1690
1691 switch (cmd) {
1692 case VIDIOC_OMAP3ISP_CCDC_CFG:
1693 mutex_lock(&ccdc->ioctl_lock);
1694 ret = ccdc_config(ccdc, arg);
1695 mutex_unlock(&ccdc->ioctl_lock);
1696 break;
1697
1698 default:
1699 return -ENOIOCTLCMD;
1700 }
1701
1702 return ret;
1703}
1704
1705static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1706 struct v4l2_event_subscription *sub)
de1135d4 1707{
69d232ae
SA		 1708 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1709 return -EINVAL;
1710
1711 /* line number is zero at frame start */
1712 if (sub->id != 0)
de1135d4
LP		 1713 return -EINVAL;
1714
c53c2549 1715 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
de1135d4
LP		 1716}
1717
1718static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
55c85046 1719 struct v4l2_event_subscription *sub)
de1135d4
LP		 1720{
1721 return v4l2_event_unsubscribe(fh, sub);
1722}
1723
1724/*
1725 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1726 * @sd: ISP CCDC V4L2 subdevice
1727 * @enable: Enable/disable stream
1728 *
1729 * When writing to memory, the CCDC hardware can't be enabled without a memory
1730 * buffer to write to. As the s_stream operation is called in response to a
1731 * STREAMON call without any buffer queued yet, just update the enabled field
1732 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1733 *
1734 * When not writing to memory enable the CCDC immediately.
1735 */
1736static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1737{
1738 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1739 struct isp_device *isp = to_isp_device(ccdc);
1740 int ret = 0;
1741
1742 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1743 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1744 return 0;
1745
1746 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1747 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1748 ISPCCDC_CFG_VDLC);
1749
1750 ccdc_configure(ccdc);
1751
1752 /* TODO: Don't configure the video port if all of its output
1753 * links are inactive.
1754 */
1755 ccdc_config_vp(ccdc);
1756 ccdc_enable_vp(ccdc, 1);
de1135d4
LP		 1757 ccdc_print_status(ccdc);
1758 }
1759
1760 switch (enable) {
1761 case ISP_PIPELINE_STREAM_CONTINUOUS:
1762 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1763 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1764
1765 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1766 ccdc_enable(ccdc);
1767
1768 ccdc->underrun = 0;
1769 break;
1770
1771 case ISP_PIPELINE_STREAM_SINGLESHOT:
1772 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1773 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1774 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1775
1776 ccdc_enable(ccdc);
1777 break;
1778
1779 case ISP_PIPELINE_STREAM_STOPPED:
1780 ret = ccdc_disable(ccdc);
1781 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1782 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1783 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1784 ccdc->underrun = 0;
1785 break;
1786 }
1787
1788 ccdc->state = enable;
1789 return ret;
1790}
1791
1792static struct v4l2_mbus_framefmt *
1793__ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1794 unsigned int pad, enum v4l2_subdev_format_whence which)
1795{
1796 if (which == V4L2_SUBDEV_FORMAT_TRY)
1797 return v4l2_subdev_get_try_format(fh, pad);
1798 else
1799 return &ccdc->formats[pad];
1800}
1801
a64909b8
LP		 1802static struct v4l2_rect *
1803__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1804 enum v4l2_subdev_format_whence which)
1805{
1806 if (which == V4L2_SUBDEV_FORMAT_TRY)
1807 return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1808 else
1809 return &ccdc->crop;
1810}
1811
de1135d4
LP		 1812/*
1813 * ccdc_try_format - Try video format on a pad
1814 * @ccdc: ISP CCDC device
1815 * @fh : V4L2 subdev file handle
1816 * @pad: Pad number
1817 * @fmt: Format
1818 */
1819static void
1820ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1821 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1822 enum v4l2_subdev_format_whence which)
1823{
de1135d4 1824 const struct isp_format_info *info;
c51364ca 1825 enum v4l2_mbus_pixelcode pixelcode;
de1135d4
LP		 1826 unsigned int width = fmt->width;
1827 unsigned int height = fmt->height;
a64909b8 1828 struct v4l2_rect *crop;
de1135d4
LP		 1829 unsigned int i;
1830
1831 switch (pad) {
1832 case CCDC_PAD_SINK:
de1135d4
LP		 1833 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1834 if (fmt->code == ccdc_fmts[i])
1835 break;
1836 }
1837
1838 /* If not found, use SGRBG10 as default */
1839 if (i >= ARRAY_SIZE(ccdc_fmts))
1840 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1841
1842 /* Clamp the input size. */
1843 fmt->width = clamp_t(u32, width, 32, 4096);
1844 fmt->height = clamp_t(u32, height, 32, 4096);
1845 break;
1846
1847 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1848 pixelcode = fmt->code;
1849 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1850
1851 /* YUV formats are converted from 2X8 to 1X16 by the bridge and
1852 * can be byte-swapped.
1853 */
1854 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1855 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1856 /* Use the user requested format if YUV. */
1857 if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1858 pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1859 pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1860 pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1861 fmt->code = pixelcode;
1862
1863 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1864 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1865 else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1866 fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1867 }
de1135d4 1868
a64909b8
LP		 1869 /* Hardcode the output size to the crop rectangle size. */
1870 crop = __ccdc_get_crop(ccdc, fh, which);
1871 fmt->width = crop->width;
1872 fmt->height = crop->height;
de1135d4
LP		 1873 break;
1874
1875 case CCDC_PAD_SOURCE_VP:
c51364ca 1876 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
de1135d4
LP		 1877
1878 /* The video port interface truncates the data to 10 bits. */
1879 info = omap3isp_video_format_info(fmt->code);
1880 fmt->code = info->truncated;
1881
c51364ca
LP		 1882 /* YUV formats are not supported by the video port. */
1883 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1884 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1885 fmt->code = 0;
1886
de1135d4
LP		 1887 /* The number of lines that can be clocked out from the video
1888 * port output must be at least one line less than the number
1889 * of input lines.
1890 */
1891 fmt->width = clamp_t(u32, width, 32, fmt->width);
1892 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1893 break;
1894 }
1895
1896 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1897 * stored on 2 bytes.
1898 */
1899 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1900 fmt->field = V4L2_FIELD_NONE;
1901}
1902
a64909b8
LP		 1903/*
1904 * ccdc_try_crop - Validate a crop rectangle
1905 * @ccdc: ISP CCDC device
1906 * @sink: format on the sink pad
1907 * @crop: crop rectangle to be validated
1908 */
1909static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1910 const struct v4l2_mbus_framefmt *sink,
1911 struct v4l2_rect *crop)
1912{
1913 const struct isp_format_info *info;
1914 unsigned int max_width;
1915
1916 /* For Bayer formats, restrict left/top and width/height to even values
1917 * to keep the Bayer pattern.
1918 */
1919 info = omap3isp_video_format_info(sink->code);
1920 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1921 crop->left &= ~1;
1922 crop->top &= ~1;
1923 }
1924
1925 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1926 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1927
1928 /* The data formatter truncates the number of horizontal output pixels
1929 * to a multiple of 16. To avoid clipping data, allow callers to request
1930 * an output size bigger than the input size up to the nearest multiple
1931 * of 16.
1932 */
1933 max_width = (sink->width - crop->left + 15) & ~15;
1934 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1935 & ~15;
1936 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1937 sink->height - crop->top);
1938
1939 /* Odd width/height values don't make sense for Bayer formats. */
1940 if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1941 crop->width &= ~1;
1942 crop->height &= ~1;
1943 }
1944}
1945
de1135d4
LP		 1946/*
1947 * ccdc_enum_mbus_code - Handle pixel format enumeration
1948 * @sd : pointer to v4l2 subdev structure
1949 * @fh : V4L2 subdev file handle
1950 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1951 * return -EINVAL or zero on success
1952 */
1953static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1954 struct v4l2_subdev_fh *fh,
1955 struct v4l2_subdev_mbus_code_enum *code)
1956{
1957 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1958 struct v4l2_mbus_framefmt *format;
1959
1960 switch (code->pad) {
1961 case CCDC_PAD_SINK:
1962 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1963 return -EINVAL;
1964
1965 code->code = ccdc_fmts[code->index];
1966 break;
1967
1968 case CCDC_PAD_SOURCE_OF:
c51364ca
LP		 1969 format = __ccdc_get_format(ccdc, fh, code->pad,
1970 V4L2_SUBDEV_FORMAT_TRY);
1971
1972 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1973 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1974 /* In YUV mode the CCDC can swap bytes. */
1975 if (code->index == 0)
1976 code->code = V4L2_MBUS_FMT_YUYV8_1X16;
1977 else if (code->index == 1)
1978 code->code = V4L2_MBUS_FMT_UYVY8_1X16;
1979 else
1980 return -EINVAL;
1981 } else {
1982 /* In raw mode, no configurable format confversion is
1983 * available.
1984 */
1985 if (code->index == 0)
1986 code->code = format->code;
1987 else
1988 return -EINVAL;
1989 }
1990 break;
1991
de1135d4 1992 case CCDC_PAD_SOURCE_VP:
c51364ca
LP		 1993 /* The CCDC supports no configurable format conversion
1994 * compatible with the video port. Enumerate a single output
1995 * format code.
1996 */
de1135d4
LP		 1997 if (code->index != 0)
1998 return -EINVAL;
1999
c51364ca 2000 format = __ccdc_get_format(ccdc, fh, code->pad,
de1135d4
LP		 2001 V4L2_SUBDEV_FORMAT_TRY);
2002
c51364ca
LP		 2003 /* A pixel code equal to 0 means that the video port doesn't
2004 * support the input format. Don't enumerate any pixel code.
2005 */
2006 if (format->code == 0)
2007 return -EINVAL;
2008
de1135d4
LP		 2009 code->code = format->code;
2010 break;
2011
2012 default:
2013 return -EINVAL;
2014 }
2015
2016 return 0;
2017}
2018
2019static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2020 struct v4l2_subdev_fh *fh,
2021 struct v4l2_subdev_frame_size_enum *fse)
2022{
2023 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2024 struct v4l2_mbus_framefmt format;
2025
2026 if (fse->index != 0)
2027 return -EINVAL;
2028
2029 format.code = fse->code;
2030 format.width = 1;
2031 format.height = 1;
2032 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2033 fse->min_width = format.width;
2034 fse->min_height = format.height;
2035
2036 if (format.code != fse->code)
2037 return -EINVAL;
2038
2039 format.code = fse->code;
2040 format.width = -1;
2041 format.height = -1;
2042 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2043 fse->max_width = format.width;
2044 fse->max_height = format.height;
2045
2046 return 0;
2047}
2048
a64909b8
LP		 2049/*
2050 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2051 * @sd: ISP CCDC V4L2 subdevice
2052 * @fh: V4L2 subdev file handle
2053 * @sel: Selection rectangle
2054 *
2055 * The only supported rectangles are the crop rectangles on the output formatter
2056 * source pad.
2057 *
2058 * Return 0 on success or a negative error code otherwise.
2059 */
2060static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2061 struct v4l2_subdev_selection *sel)
2062{
2063 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2064 struct v4l2_mbus_framefmt *format;
2065
2066 if (sel->pad != CCDC_PAD_SOURCE_OF)
2067 return -EINVAL;
2068
2069 switch (sel->target) {
5689b288 2070 case V4L2_SEL_TGT_CROP_BOUNDS:
a64909b8
LP		 2071 sel->r.left = 0;
2072 sel->r.top = 0;
2073 sel->r.width = INT_MAX;
2074 sel->r.height = INT_MAX;
2075
2076 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2077 ccdc_try_crop(ccdc, format, &sel->r);
2078 break;
2079
5689b288 2080 case V4L2_SEL_TGT_CROP:
a64909b8
LP		 2081 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2082 break;
2083
2084 default:
2085 return -EINVAL;
2086 }
2087
2088 return 0;
2089}
2090
2091/*
2092 * ccdc_set_selection - Set a selection rectangle on a pad
2093 * @sd: ISP CCDC V4L2 subdevice
2094 * @fh: V4L2 subdev file handle
2095 * @sel: Selection rectangle
2096 *
2097 * The only supported rectangle is the actual crop rectangle on the output
2098 * formatter source pad.
2099 *
2100 * Return 0 on success or a negative error code otherwise.
2101 */
2102static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2103 struct v4l2_subdev_selection *sel)
2104{
2105 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2106 struct v4l2_mbus_framefmt *format;
2107
5689b288 2108 if (sel->target != V4L2_SEL_TGT_CROP ||
a64909b8
LP		 2109 sel->pad != CCDC_PAD_SOURCE_OF)
2110 return -EINVAL;
2111
2112 /* The crop rectangle can't be changed while streaming. */
2113 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2114 return -EBUSY;
2115
2116 /* Modifying the crop rectangle always changes the format on the source
2117 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2118 * rectangle.
2119 */
563df3d0 2120 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
a64909b8
LP		 2121 sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2122 return 0;
2123 }
2124
2125 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2126 ccdc_try_crop(ccdc, format, &sel->r);
2127 *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2128
2129 /* Update the source format. */
2130 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2131 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2132
2133 return 0;
2134}
2135
de1135d4
LP		 2136/*
2137 * ccdc_get_format - Retrieve the video format on a pad
2138 * @sd : ISP CCDC V4L2 subdevice
2139 * @fh : V4L2 subdev file handle
2140 * @fmt: Format
2141 *
2142 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2143 * to the format type.
2144 */
2145static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2146 struct v4l2_subdev_format *fmt)
2147{
2148 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2149 struct v4l2_mbus_framefmt *format;
2150
2151 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2152 if (format == NULL)
2153 return -EINVAL;
2154
2155 fmt->format = *format;
2156 return 0;
2157}
2158
2159/*
2160 * ccdc_set_format - Set the video format on a pad
2161 * @sd : ISP CCDC V4L2 subdevice
2162 * @fh : V4L2 subdev file handle
2163 * @fmt: Format
2164 *
2165 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2166 * to the format type.
2167 */
2168static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2169 struct v4l2_subdev_format *fmt)
2170{
2171 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2172 struct v4l2_mbus_framefmt *format;
a64909b8 2173 struct v4l2_rect *crop;
de1135d4
LP		 2174
2175 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2176 if (format == NULL)
2177 return -EINVAL;
2178
2179 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2180 *format = fmt->format;
2181
2182 /* Propagate the format from sink to source */
2183 if (fmt->pad == CCDC_PAD_SINK) {
a64909b8
LP		 2184 /* Reset the crop rectangle. */
2185 crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2186 crop->left = 0;
2187 crop->top = 0;
2188 crop->width = fmt->format.width;
2189 crop->height = fmt->format.height;
2190
2191 ccdc_try_crop(ccdc, &fmt->format, crop);
2192
2193 /* Update the source formats. */
de1135d4
LP		 2194 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2195 fmt->which);
2196 *format = fmt->format;
2197 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2198 fmt->which);
2199
2200 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2201 fmt->which);
2202 *format = fmt->format;
2203 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2204 fmt->which);
2205 }
2206
2207 return 0;
2208}
2209
a6d7a62d
SA		 2210/*
2211 * Decide whether desired output pixel code can be obtained with
2212 * the lane shifter by shifting the input pixel code.
2213 * @in: input pixelcode to shifter
2214 * @out: output pixelcode from shifter
2215 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2216 *
2217 * return true if the combination is possible
2218 * return false otherwise
2219 */
2220static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2221 enum v4l2_mbus_pixelcode out,
2222 unsigned int additional_shift)
2223{
2224 const struct isp_format_info *in_info, *out_info;
2225
2226 if (in == out)
2227 return true;
2228
2229 in_info = omap3isp_video_format_info(in);
2230 out_info = omap3isp_video_format_info(out);
2231
2232 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2233 return false;
2234
2235 if (in_info->flavor != out_info->flavor)
2236 return false;
2237
1697e49a 2238 return in_info->width - out_info->width + additional_shift <= 6;
a6d7a62d
SA		 2239}
2240
2241static int ccdc_link_validate(struct v4l2_subdev *sd,
2242 struct media_link *link,
2243 struct v4l2_subdev_format *source_fmt,
2244 struct v4l2_subdev_format *sink_fmt)
2245{
2246 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2247 unsigned long parallel_shift;
2248
2249 /* Check if the two ends match */
2250 if (source_fmt->format.width != sink_fmt->format.width ||
2251 source_fmt->format.height != sink_fmt->format.height)
2252 return -EPIPE;
2253
2254 /* We've got a parallel sensor here. */
2255 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2256 struct isp_parallel_platform_data *pdata =
2257 &((struct isp_v4l2_subdevs_group *)
2258 media_entity_to_v4l2_subdev(link->source->entity)
2259 ->host_priv)->bus.parallel;
2260 parallel_shift = pdata->data_lane_shift * 2;
2261 } else {
2262 parallel_shift = 0;
2263 }
2264
2265 /* Lane shifter may be used to drop bits on CCDC sink pad */
2266 if (!ccdc_is_shiftable(source_fmt->format.code,
2267 sink_fmt->format.code, parallel_shift))
2268 return -EPIPE;
2269
2270 return 0;
2271}
2272
de1135d4
LP		 2273/*
2274 * ccdc_init_formats - Initialize formats on all pads
2275 * @sd: ISP CCDC V4L2 subdevice
2276 * @fh: V4L2 subdev file handle
2277 *
2278 * Initialize all pad formats with default values. If fh is not NULL, try
2279 * formats are initialized on the file handle. Otherwise active formats are
2280 * initialized on the device.
2281 */
2282static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2283{
2284 struct v4l2_subdev_format format;
2285
2286 memset(&format, 0, sizeof(format));
2287 format.pad = CCDC_PAD_SINK;
2288 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2289 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2290 format.format.width = 4096;
2291 format.format.height = 4096;
2292 ccdc_set_format(sd, fh, &format);
2293
2294 return 0;
2295}
2296
2297/* V4L2 subdev core operations */
2298static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2299 .ioctl = ccdc_ioctl,
2300 .subscribe_event = ccdc_subscribe_event,
2301 .unsubscribe_event = ccdc_unsubscribe_event,
2302};
2303
2304/* V4L2 subdev video operations */
2305static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2306 .s_stream = ccdc_set_stream,
2307};
2308
2309/* V4L2 subdev pad operations */
2310static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2311 .enum_mbus_code = ccdc_enum_mbus_code,
2312 .enum_frame_size = ccdc_enum_frame_size,
2313 .get_fmt = ccdc_get_format,
2314 .set_fmt = ccdc_set_format,
a64909b8
LP		 2315 .get_selection = ccdc_get_selection,
2316 .set_selection = ccdc_set_selection,
a6d7a62d 2317 .link_validate = ccdc_link_validate,
de1135d4
LP		 2318};
2319
2320/* V4L2 subdev operations */
2321static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2322 .core = &ccdc_v4l2_core_ops,
2323 .video = &ccdc_v4l2_video_ops,
2324 .pad = &ccdc_v4l2_pad_ops,
2325};
2326
2327/* V4L2 subdev internal operations */
2328static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2329 .open = ccdc_init_formats,
2330};
2331
2332/* -----------------------------------------------------------------------------
2333 * Media entity operations
2334 */
2335
2336/*
2337 * ccdc_link_setup - Setup CCDC connections
2338 * @entity: CCDC media entity
2339 * @local: Pad at the local end of the link
2340 * @remote: Pad at the remote end of the link
2341 * @flags: Link flags
2342 *
2343 * return -EINVAL or zero on success
2344 */
2345static int ccdc_link_setup(struct media_entity *entity,
2346 const struct media_pad *local,
2347 const struct media_pad *remote, u32 flags)
2348{
2349 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2350 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2351 struct isp_device *isp = to_isp_device(ccdc);
2352
2353 switch (local->index | media_entity_type(remote->entity)) {
2354 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2355 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2356 * CSI2c.
2357 */
2358 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2359 ccdc->input = CCDC_INPUT_NONE;
2360 break;
2361 }
2362
2363 if (ccdc->input != CCDC_INPUT_NONE)
2364 return -EBUSY;
2365
2366 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2367 ccdc->input = CCDC_INPUT_CCP2B;
2368 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2369 ccdc->input = CCDC_INPUT_CSI2A;
2370 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2371 ccdc->input = CCDC_INPUT_CSI2C;
2372 else
2373 ccdc->input = CCDC_INPUT_PARALLEL;
2374
2375 break;
2376
2377 /*
2378 * The ISP core doesn't support pipelines with multiple video outputs.
2379 * Revisit this when it will be implemented, and return -EBUSY for now.
2380 */
2381
2382 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2383 /* Write to preview engine, histogram and H3A. When none of
2384 * those links are active, the video port can be disabled.
2385 */
2386 if (flags & MEDIA_LNK_FL_ENABLED) {
2387 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2388 return -EBUSY;
2389 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2390 } else {
2391 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2392 }
2393 break;
2394
2395 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2396 /* Write to memory */
2397 if (flags & MEDIA_LNK_FL_ENABLED) {
2398 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2399 return -EBUSY;
2400 ccdc->output |= CCDC_OUTPUT_MEMORY;
2401 } else {
2402 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2403 }
2404 break;
2405
2406 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2407 /* Write to resizer */
2408 if (flags & MEDIA_LNK_FL_ENABLED) {
2409 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2410 return -EBUSY;
2411 ccdc->output |= CCDC_OUTPUT_RESIZER;
2412 } else {
2413 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2414 }
2415 break;
2416
2417 default:
2418 return -EINVAL;
2419 }
2420
2421 return 0;
2422}
2423
2424/* media operations */
2425static const struct media_entity_operations ccdc_media_ops = {
2426 .link_setup = ccdc_link_setup,
a6d7a62d 2427 .link_validate = v4l2_subdev_link_validate,
de1135d4
LP		 2428};
2429
39099d09
LP		 2430void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2431{
2432 v4l2_device_unregister_subdev(&ccdc->subdev);
2433 omap3isp_video_unregister(&ccdc->video_out);
2434}
2435
2436int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2437 struct v4l2_device *vdev)
2438{
2439 int ret;
2440
2441 /* Register the subdev and video node. */
2442 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2443 if (ret < 0)
2444 goto error;
2445
2446 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2447 if (ret < 0)
2448 goto error;
2449
2450 return 0;
2451
2452error:
2453 omap3isp_ccdc_unregister_entities(ccdc);
2454 return ret;
2455}
2456
2457/* -----------------------------------------------------------------------------
2458 * ISP CCDC initialisation and cleanup
2459 */
2460
de1135d4
LP		 2461/*
2462 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2463 * @ccdc: ISP CCDC module
2464 *
2465 * Return 0 on success and a negative error code on failure.
2466 */
2467static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2468{
2469 struct v4l2_subdev *sd = &ccdc->subdev;
2470 struct media_pad *pads = ccdc->pads;
2471 struct media_entity *me = &sd->entity;
2472 int ret;
2473
2474 ccdc->input = CCDC_INPUT_NONE;
2475
2476 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2477 sd->internal_ops = &ccdc_v4l2_internal_ops;
2478 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2479 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2480 v4l2_set_subdevdata(sd, ccdc);
2481 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
de1135d4 2482
8dad936a
SA		 2483 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2484 | MEDIA_PAD_FL_MUST_CONNECT;
de1135d4
LP		 2485 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2486 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2487
2488 me->ops = &ccdc_media_ops;
2489 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2490 if (ret < 0)
2491 return ret;
2492
2493 ccdc_init_formats(sd, NULL);
2494
2495 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2496 ccdc->video_out.ops = &ccdc_video_ops;
2497 ccdc->video_out.isp = to_isp_device(ccdc);
2498 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2499 ccdc->video_out.bpl_alignment = 32;
2500
2501 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2502 if (ret < 0)
9b6390bd 2503 goto error_video;
de1135d4
LP		 2504
2505 /* Connect the CCDC subdev to the video node. */
2506 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2507 &ccdc->video_out.video.entity, 0, 0);
2508 if (ret < 0)
9b6390bd 2509 goto error_link;
de1135d4
LP		 2510
2511 return 0;
9b6390bd
LP		 2512
2513error_link:
2514 omap3isp_video_cleanup(&ccdc->video_out);
2515error_video:
2516 media_entity_cleanup(me);
2517 return ret;
de1135d4
LP		 2518}
2519
de1135d4
LP		 2520/*
2521 * omap3isp_ccdc_init - CCDC module initialization.
872aba51 2522 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2523 *
2524 * TODO: Get the initialisation values from platform data.
2525 *
2526 * Return 0 on success or a negative error code otherwise.
2527 */
2528int omap3isp_ccdc_init(struct isp_device *isp)
2529{
2530 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
9b6390bd 2531 int ret;
de1135d4
LP		 2532
2533 spin_lock_init(&ccdc->lock);
2534 init_waitqueue_head(&ccdc->wait);
2535 mutex_init(&ccdc->ioctl_lock);
2536
2537 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2538
2539 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2540 ccdc->lsc.state = LSC_STATE_STOPPED;
2541 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2542 spin_lock_init(&ccdc->lsc.req_lock);
2543
de1135d4
LP		 2544 ccdc->clamp.oblen = 0;
2545 ccdc->clamp.dcsubval = 0;
2546
de1135d4
LP		 2547 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2548 ccdc_apply_controls(ccdc);
2549
9b6390bd
LP		 2550 ret = ccdc_init_entities(ccdc);
2551 if (ret < 0) {
2552 mutex_destroy(&ccdc->ioctl_lock);
2553 return ret;
2554 }
2555
2556 return 0;
de1135d4
LP		 2557}
2558
2559/*
2560 * omap3isp_ccdc_cleanup - CCDC module cleanup.
872aba51 2561 * @isp: Device pointer specific to the OMAP3 ISP.
de1135d4
LP		 2562 */
2563void omap3isp_ccdc_cleanup(struct isp_device *isp)
2564{
2565 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2566
63b4ca23
LP		 2567 omap3isp_video_cleanup(&ccdc->video_out);
2568 media_entity_cleanup(&ccdc->subdev.entity);
2569
de1135d4
LP		 2570 /* Free LSC requests. As the CCDC is stopped there's no active request,
2571 * so only the pending request and the free queue need to be handled.
2572 */
2573 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2574 cancel_work_sync(&ccdc->lsc.table_work);
2575 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2576
2577 if (ccdc->fpc.fpcaddr != 0)
fabdbca8 2578 omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
ed33ac8e
LP		 2579
2580 mutex_destroy(&ccdc->ioctl_lock);
de1135d4 2581}
Linux kernel - Deliverables
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