Commit | Line | Data |
---|---|---|
5f3cc447 | 1 | /* |
3a3f9449 | 2 | * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver |
5f3cc447 | 3 | * |
0c9204d3 SN |
4 | * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd. |
5 | * Sylwester Nawrocki <s.nawrocki@samsung.com> | |
5f3cc447 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
5f3cc447 SN |
14 | #include <linux/types.h> |
15 | #include <linux/errno.h> | |
16 | #include <linux/bug.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/device.h> | |
e9e21083 | 19 | #include <linux/pm_runtime.h> |
5f3cc447 SN |
20 | #include <linux/list.h> |
21 | #include <linux/slab.h> | |
5f3cc447 SN |
22 | |
23 | #include <linux/videodev2.h> | |
24 | #include <media/v4l2-device.h> | |
25 | #include <media/v4l2-ioctl.h> | |
26 | #include <media/v4l2-mem2mem.h> | |
2dab38e2 SN |
27 | #include <media/videobuf2-core.h> |
28 | #include <media/videobuf2-dma-contig.h> | |
5f3cc447 | 29 | |
131b6c61 | 30 | #include "fimc-mdevice.h" |
5f3cc447 | 31 | #include "fimc-core.h" |
c83a1ff0 | 32 | #include "fimc-reg.h" |
5f3cc447 | 33 | |
bb7c276e | 34 | static int fimc_capture_hw_init(struct fimc_dev *fimc) |
9e803a04 SN |
35 | { |
36 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
0f735f52 | 37 | struct fimc_pipeline *p = &fimc->pipeline; |
9e803a04 SN |
38 | struct fimc_sensor_info *sensor; |
39 | unsigned long flags; | |
40 | int ret = 0; | |
41 | ||
0f735f52 | 42 | if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL) |
9e803a04 SN |
43 | return -ENXIO; |
44 | if (ctx->s_frame.fmt == NULL) | |
45 | return -EINVAL; | |
46 | ||
0f735f52 | 47 | sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]); |
9e803a04 SN |
48 | |
49 | spin_lock_irqsave(&fimc->slock, flags); | |
50 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); | |
51 | fimc_set_yuv_order(ctx); | |
52 | ||
6612a082 SN |
53 | fimc_hw_set_camera_polarity(fimc, &sensor->pdata); |
54 | fimc_hw_set_camera_type(fimc, &sensor->pdata); | |
55 | fimc_hw_set_camera_source(fimc, &sensor->pdata); | |
9e803a04 SN |
56 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); |
57 | ||
58 | ret = fimc_set_scaler_info(ctx); | |
59 | if (!ret) { | |
60 | fimc_hw_set_input_path(ctx); | |
61 | fimc_hw_set_prescaler(ctx); | |
62 | fimc_hw_set_mainscaler(ctx); | |
63 | fimc_hw_set_target_format(ctx); | |
64 | fimc_hw_set_rotation(ctx); | |
9448ab7d | 65 | fimc_hw_set_effect(ctx); |
9e803a04 SN |
66 | fimc_hw_set_output_path(ctx); |
67 | fimc_hw_set_out_dma(ctx); | |
dafb9c70 SN |
68 | if (fimc->variant->has_alpha) |
69 | fimc_hw_set_rgb_alpha(ctx); | |
237e0265 | 70 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); |
9e803a04 SN |
71 | } |
72 | spin_unlock_irqrestore(&fimc->slock, flags); | |
73 | return ret; | |
74 | } | |
75 | ||
bb7c276e SN |
76 | /* |
77 | * Reinitialize the driver so it is ready to start the streaming again. | |
78 | * Set fimc->state to indicate stream off and the hardware shut down state. | |
79 | * If not suspending (@suspend is false), return any buffers to videobuf2. | |
80 | * Otherwise put any owned buffers onto the pending buffers queue, so they | |
81 | * can be re-spun when the device is being resumed. Also perform FIMC | |
82 | * software reset and disable streaming on the whole pipeline if required. | |
83 | */ | |
3e4748d8 | 84 | static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend) |
5f3cc447 | 85 | { |
bd323e28 | 86 | struct fimc_vid_cap *cap = &fimc->vid_cap; |
2dab38e2 | 87 | struct fimc_vid_buffer *buf; |
bd323e28 | 88 | unsigned long flags; |
3e4748d8 | 89 | bool streaming; |
5f3cc447 SN |
90 | |
91 | spin_lock_irqsave(&fimc->slock, flags); | |
3e4748d8 | 92 | streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM); |
5f3cc447 | 93 | |
3e4748d8 SN |
94 | fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT | |
95 | 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM); | |
aa333122 SN |
96 | if (suspend) |
97 | fimc->state |= (1 << ST_CAPT_SUSPENDED); | |
98 | else | |
3e4748d8 | 99 | fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED); |
2dab38e2 | 100 | |
3e4748d8 SN |
101 | /* Release unused buffers */ |
102 | while (!suspend && !list_empty(&cap->pending_buf_q)) { | |
0295202c | 103 | buf = fimc_pending_queue_pop(cap); |
2dab38e2 SN |
104 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); |
105 | } | |
3e4748d8 | 106 | /* If suspending put unused buffers onto pending queue */ |
2dab38e2 | 107 | while (!list_empty(&cap->active_buf_q)) { |
0295202c | 108 | buf = fimc_active_queue_pop(cap); |
3e4748d8 SN |
109 | if (suspend) |
110 | fimc_pending_queue_add(cap, buf); | |
111 | else | |
112 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | |
2dab38e2 | 113 | } |
2c1bb62e SN |
114 | |
115 | fimc_hw_reset(fimc); | |
116 | cap->buf_index = 0; | |
117 | ||
5f3cc447 | 118 | spin_unlock_irqrestore(&fimc->slock, flags); |
4db5e27e | 119 | |
3e4748d8 | 120 | if (streaming) |
b9ee31e6 SN |
121 | return fimc_pipeline_call(fimc, set_stream, |
122 | &fimc->pipeline, 0); | |
4db5e27e SN |
123 | else |
124 | return 0; | |
bd323e28 MS |
125 | } |
126 | ||
3e4748d8 | 127 | static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend) |
bd323e28 | 128 | { |
bd323e28 MS |
129 | unsigned long flags; |
130 | ||
131 | if (!fimc_capture_active(fimc)) | |
132 | return 0; | |
133 | ||
134 | spin_lock_irqsave(&fimc->slock, flags); | |
135 | set_bit(ST_CAPT_SHUT, &fimc->state); | |
136 | fimc_deactivate_capture(fimc); | |
137 | spin_unlock_irqrestore(&fimc->slock, flags); | |
138 | ||
139 | wait_event_timeout(fimc->irq_queue, | |
140 | !test_bit(ST_CAPT_SHUT, &fimc->state), | |
3e4748d8 | 141 | (2*HZ/10)); /* 200 ms */ |
5f3cc447 | 142 | |
3e4748d8 | 143 | return fimc_capture_state_cleanup(fimc, suspend); |
5f3cc447 SN |
144 | } |
145 | ||
237e0265 SN |
146 | /** |
147 | * fimc_capture_config_update - apply the camera interface configuration | |
148 | * | |
149 | * To be called from within the interrupt handler with fimc.slock | |
150 | * spinlock held. It updates the camera pixel crop, rotation and | |
151 | * image flip in H/W. | |
152 | */ | |
97d97422 | 153 | static int fimc_capture_config_update(struct fimc_ctx *ctx) |
237e0265 SN |
154 | { |
155 | struct fimc_dev *fimc = ctx->fimc_dev; | |
156 | int ret; | |
157 | ||
237e0265 | 158 | fimc_hw_set_camera_offset(fimc, &ctx->s_frame); |
efb13c3d | 159 | |
237e0265 | 160 | ret = fimc_set_scaler_info(ctx); |
efb13c3d SN |
161 | if (ret) |
162 | return ret; | |
163 | ||
164 | fimc_hw_set_prescaler(ctx); | |
165 | fimc_hw_set_mainscaler(ctx); | |
166 | fimc_hw_set_target_format(ctx); | |
167 | fimc_hw_set_rotation(ctx); | |
9448ab7d | 168 | fimc_hw_set_effect(ctx); |
efb13c3d SN |
169 | fimc_prepare_dma_offset(ctx, &ctx->d_frame); |
170 | fimc_hw_set_out_dma(ctx); | |
171 | if (fimc->variant->has_alpha) | |
172 | fimc_hw_set_rgb_alpha(ctx); | |
173 | ||
174 | clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); | |
237e0265 SN |
175 | return ret; |
176 | } | |
bd323e28 | 177 | |
97d97422 SN |
178 | void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf) |
179 | { | |
14783d25 | 180 | struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS]; |
97d97422 | 181 | struct fimc_vid_cap *cap = &fimc->vid_cap; |
14783d25 | 182 | struct fimc_frame *f = &cap->ctx->d_frame; |
97d97422 SN |
183 | struct fimc_vid_buffer *v_buf; |
184 | struct timeval *tv; | |
185 | struct timespec ts; | |
186 | ||
187 | if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) { | |
188 | wake_up(&fimc->irq_queue); | |
189 | goto done; | |
190 | } | |
191 | ||
192 | if (!list_empty(&cap->active_buf_q) && | |
193 | test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) { | |
194 | ktime_get_real_ts(&ts); | |
195 | ||
196 | v_buf = fimc_active_queue_pop(cap); | |
197 | ||
198 | tv = &v_buf->vb.v4l2_buf.timestamp; | |
199 | tv->tv_sec = ts.tv_sec; | |
200 | tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC; | |
201 | v_buf->vb.v4l2_buf.sequence = cap->frame_count++; | |
202 | ||
203 | vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE); | |
204 | } | |
205 | ||
206 | if (!list_empty(&cap->pending_buf_q)) { | |
207 | ||
208 | v_buf = fimc_pending_queue_pop(cap); | |
209 | fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index); | |
210 | v_buf->index = cap->buf_index; | |
211 | ||
212 | /* Move the buffer to the capture active queue */ | |
213 | fimc_active_queue_add(cap, v_buf); | |
214 | ||
215 | dbg("next frame: %d, done frame: %d", | |
216 | fimc_hw_get_frame_index(fimc), v_buf->index); | |
217 | ||
218 | if (++cap->buf_index >= FIMC_MAX_OUT_BUFS) | |
219 | cap->buf_index = 0; | |
220 | } | |
14783d25 SN |
221 | /* |
222 | * Set up a buffer at MIPI-CSIS if current image format | |
223 | * requires the frame embedded data capture. | |
224 | */ | |
225 | if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) { | |
226 | unsigned int plane = ffs(f->fmt->mdataplanes) - 1; | |
227 | unsigned int size = f->payload[plane]; | |
228 | s32 index = fimc_hw_get_frame_index(fimc); | |
229 | void *vaddr; | |
230 | ||
231 | list_for_each_entry(v_buf, &cap->active_buf_q, list) { | |
232 | if (v_buf->index != index) | |
233 | continue; | |
234 | vaddr = vb2_plane_vaddr(&v_buf->vb, plane); | |
235 | v4l2_subdev_call(csis, video, s_rx_buffer, | |
236 | vaddr, &size); | |
237 | break; | |
238 | } | |
239 | } | |
97d97422 SN |
240 | |
241 | if (cap->active_buf_cnt == 0) { | |
242 | if (deq_buf) | |
243 | clear_bit(ST_CAPT_RUN, &fimc->state); | |
244 | ||
245 | if (++cap->buf_index >= FIMC_MAX_OUT_BUFS) | |
246 | cap->buf_index = 0; | |
247 | } else { | |
248 | set_bit(ST_CAPT_RUN, &fimc->state); | |
249 | } | |
250 | ||
bb7c276e SN |
251 | if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) |
252 | fimc_capture_config_update(cap->ctx); | |
97d97422 SN |
253 | done: |
254 | if (cap->active_buf_cnt == 1) { | |
255 | fimc_deactivate_capture(fimc); | |
256 | clear_bit(ST_CAPT_STREAM, &fimc->state); | |
257 | } | |
258 | ||
259 | dbg("frame: %d, active_buf_cnt: %d", | |
260 | fimc_hw_get_frame_index(fimc), cap->active_buf_cnt); | |
261 | } | |
262 | ||
263 | ||
bd323e28 | 264 | static int start_streaming(struct vb2_queue *q, unsigned int count) |
2dab38e2 SN |
265 | { |
266 | struct fimc_ctx *ctx = q->drv_priv; | |
267 | struct fimc_dev *fimc = ctx->fimc_dev; | |
9e803a04 | 268 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
bd323e28 | 269 | int min_bufs; |
2dab38e2 SN |
270 | int ret; |
271 | ||
9e803a04 | 272 | vid_cap->frame_count = 0; |
8ec737ff | 273 | |
bb7c276e SN |
274 | ret = fimc_capture_hw_init(fimc); |
275 | if (ret) { | |
276 | fimc_capture_state_cleanup(fimc, false); | |
277 | return ret; | |
278 | } | |
2dab38e2 | 279 | |
2dab38e2 SN |
280 | set_bit(ST_CAPT_PEND, &fimc->state); |
281 | ||
bd323e28 MS |
282 | min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1; |
283 | ||
4db5e27e SN |
284 | if (vid_cap->active_buf_cnt >= min_bufs && |
285 | !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) { | |
bd323e28 MS |
286 | fimc_activate_capture(ctx); |
287 | ||
4db5e27e | 288 | if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state)) |
b9ee31e6 SN |
289 | fimc_pipeline_call(fimc, set_stream, |
290 | &fimc->pipeline, 1); | |
4db5e27e SN |
291 | } |
292 | ||
2dab38e2 SN |
293 | return 0; |
294 | } | |
295 | ||
296 | static int stop_streaming(struct vb2_queue *q) | |
297 | { | |
298 | struct fimc_ctx *ctx = q->drv_priv; | |
299 | struct fimc_dev *fimc = ctx->fimc_dev; | |
2dab38e2 | 300 | |
4ecbf5d1 | 301 | if (!fimc_capture_active(fimc)) |
2dab38e2 | 302 | return -EINVAL; |
2dab38e2 | 303 | |
3e4748d8 | 304 | return fimc_stop_capture(fimc, false); |
2dab38e2 SN |
305 | } |
306 | ||
e9e21083 SN |
307 | int fimc_capture_suspend(struct fimc_dev *fimc) |
308 | { | |
3e4748d8 SN |
309 | bool suspend = fimc_capture_busy(fimc); |
310 | ||
311 | int ret = fimc_stop_capture(fimc, suspend); | |
312 | if (ret) | |
313 | return ret; | |
b9ee31e6 | 314 | return fimc_pipeline_call(fimc, close, &fimc->pipeline); |
e9e21083 SN |
315 | } |
316 | ||
3e4748d8 SN |
317 | static void buffer_queue(struct vb2_buffer *vb); |
318 | ||
e9e21083 SN |
319 | int fimc_capture_resume(struct fimc_dev *fimc) |
320 | { | |
3e4748d8 SN |
321 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
322 | struct fimc_vid_buffer *buf; | |
323 | int i; | |
324 | ||
325 | if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state)) | |
326 | return 0; | |
327 | ||
328 | INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q); | |
329 | vid_cap->buf_index = 0; | |
b9ee31e6 SN |
330 | fimc_pipeline_call(fimc, open, &fimc->pipeline, |
331 | &vid_cap->vfd.entity, false); | |
bb7c276e | 332 | fimc_capture_hw_init(fimc); |
3e4748d8 SN |
333 | |
334 | clear_bit(ST_CAPT_SUSPENDED, &fimc->state); | |
335 | ||
336 | for (i = 0; i < vid_cap->reqbufs_count; i++) { | |
337 | if (list_empty(&vid_cap->pending_buf_q)) | |
338 | break; | |
339 | buf = fimc_pending_queue_pop(vid_cap); | |
340 | buffer_queue(&buf->vb); | |
341 | } | |
e9e21083 | 342 | return 0; |
3e4748d8 | 343 | |
e9e21083 SN |
344 | } |
345 | ||
63746be5 | 346 | static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt, |
fc714e70 GL |
347 | unsigned int *num_buffers, unsigned int *num_planes, |
348 | unsigned int sizes[], void *allocators[]) | |
2dab38e2 | 349 | { |
63746be5 | 350 | const struct v4l2_pix_format_mplane *pixm = NULL; |
2dab38e2 | 351 | struct fimc_ctx *ctx = vq->drv_priv; |
63746be5 SN |
352 | struct fimc_frame *frame = &ctx->d_frame; |
353 | struct fimc_fmt *fmt = frame->fmt; | |
354 | unsigned long wh; | |
ef7af59b | 355 | int i; |
2dab38e2 | 356 | |
63746be5 SN |
357 | if (pfmt) { |
358 | pixm = &pfmt->fmt.pix_mp; | |
359 | fmt = fimc_find_format(&pixm->pixelformat, NULL, | |
360 | FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1); | |
361 | wh = pixm->width * pixm->height; | |
362 | } else { | |
363 | wh = frame->f_width * frame->f_height; | |
364 | } | |
365 | ||
366 | if (fmt == NULL) | |
2dab38e2 SN |
367 | return -EINVAL; |
368 | ||
ef7af59b | 369 | *num_planes = fmt->memplanes; |
2dab38e2 | 370 | |
ef7af59b | 371 | for (i = 0; i < fmt->memplanes; i++) { |
63746be5 SN |
372 | unsigned int size = (wh * fmt->depth[i]) / 8; |
373 | if (pixm) | |
374 | sizes[i] = max(size, pixm->plane_fmt[i].sizeimage); | |
14783d25 SN |
375 | else if (fimc_fmt_is_user_defined(fmt->color)) |
376 | sizes[i] = frame->payload[i]; | |
63746be5 | 377 | else |
d547ab66 SN |
378 | sizes[i] = max_t(u32, size, frame->payload[i]); |
379 | ||
ef7af59b SN |
380 | allocators[i] = ctx->fimc_dev->alloc_ctx; |
381 | } | |
2dab38e2 | 382 | |
ef7af59b | 383 | return 0; |
2dab38e2 SN |
384 | } |
385 | ||
2dab38e2 SN |
386 | static int buffer_prepare(struct vb2_buffer *vb) |
387 | { | |
388 | struct vb2_queue *vq = vb->vb2_queue; | |
389 | struct fimc_ctx *ctx = vq->drv_priv; | |
2dab38e2 SN |
390 | int i; |
391 | ||
4db5e27e | 392 | if (ctx->d_frame.fmt == NULL) |
ef7af59b | 393 | return -EINVAL; |
2dab38e2 | 394 | |
ef7af59b | 395 | for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) { |
4db5e27e | 396 | unsigned long size = ctx->d_frame.payload[i]; |
2dab38e2 SN |
397 | |
398 | if (vb2_plane_size(vb, i) < size) { | |
31d34d9b | 399 | v4l2_err(&ctx->fimc_dev->vid_cap.vfd, |
30c9939d | 400 | "User buffer too small (%ld < %ld)\n", |
2dab38e2 SN |
401 | vb2_plane_size(vb, i), size); |
402 | return -EINVAL; | |
403 | } | |
2dab38e2 SN |
404 | vb2_set_plane_payload(vb, i, size); |
405 | } | |
406 | ||
407 | return 0; | |
408 | } | |
409 | ||
410 | static void buffer_queue(struct vb2_buffer *vb) | |
411 | { | |
2dab38e2 SN |
412 | struct fimc_vid_buffer *buf |
413 | = container_of(vb, struct fimc_vid_buffer, vb); | |
4db5e27e SN |
414 | struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); |
415 | struct fimc_dev *fimc = ctx->fimc_dev; | |
2dab38e2 SN |
416 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; |
417 | unsigned long flags; | |
8ec737ff | 418 | int min_bufs; |
2dab38e2 SN |
419 | |
420 | spin_lock_irqsave(&fimc->slock, flags); | |
8ec737ff SK |
421 | fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr); |
422 | ||
3e4748d8 SN |
423 | if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) && |
424 | !test_bit(ST_CAPT_STREAM, &fimc->state) && | |
425 | vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) { | |
8ec737ff SK |
426 | /* Setup the buffer directly for processing. */ |
427 | int buf_id = (vid_cap->reqbufs_count == 1) ? -1 : | |
428 | vid_cap->buf_index; | |
2dab38e2 | 429 | |
8ec737ff SK |
430 | fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id); |
431 | buf->index = vid_cap->buf_index; | |
0295202c | 432 | fimc_active_queue_add(vid_cap, buf); |
2dab38e2 | 433 | |
8ec737ff SK |
434 | if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS) |
435 | vid_cap->buf_index = 0; | |
436 | } else { | |
437 | fimc_pending_queue_add(vid_cap, buf); | |
2dab38e2 | 438 | } |
8ec737ff SK |
439 | |
440 | min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1; | |
441 | ||
4db5e27e | 442 | |
bd323e28 MS |
443 | if (vb2_is_streaming(&vid_cap->vbq) && |
444 | vid_cap->active_buf_cnt >= min_bufs && | |
4db5e27e | 445 | !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) { |
8ec737ff | 446 | fimc_activate_capture(ctx); |
4db5e27e | 447 | spin_unlock_irqrestore(&fimc->slock, flags); |
8ec737ff | 448 | |
4db5e27e | 449 | if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state)) |
b9ee31e6 SN |
450 | fimc_pipeline_call(fimc, set_stream, |
451 | &fimc->pipeline, 1); | |
4db5e27e SN |
452 | return; |
453 | } | |
2dab38e2 SN |
454 | spin_unlock_irqrestore(&fimc->slock, flags); |
455 | } | |
456 | ||
457 | static void fimc_lock(struct vb2_queue *vq) | |
458 | { | |
459 | struct fimc_ctx *ctx = vb2_get_drv_priv(vq); | |
460 | mutex_lock(&ctx->fimc_dev->lock); | |
461 | } | |
462 | ||
463 | static void fimc_unlock(struct vb2_queue *vq) | |
464 | { | |
465 | struct fimc_ctx *ctx = vb2_get_drv_priv(vq); | |
466 | mutex_unlock(&ctx->fimc_dev->lock); | |
467 | } | |
468 | ||
469 | static struct vb2_ops fimc_capture_qops = { | |
470 | .queue_setup = queue_setup, | |
471 | .buf_prepare = buffer_prepare, | |
472 | .buf_queue = buffer_queue, | |
2dab38e2 SN |
473 | .wait_prepare = fimc_unlock, |
474 | .wait_finish = fimc_lock, | |
475 | .start_streaming = start_streaming, | |
476 | .stop_streaming = stop_streaming, | |
477 | }; | |
478 | ||
131b6c61 SN |
479 | /** |
480 | * fimc_capture_ctrls_create - initialize the control handler | |
481 | * Initialize the capture video node control handler and fill it | |
482 | * with the FIMC controls. Inherit any sensor's controls if the | |
483 | * 'user_subdev_api' flag is false (default behaviour). | |
484 | * This function need to be called with the graph mutex held. | |
485 | */ | |
486 | int fimc_capture_ctrls_create(struct fimc_dev *fimc) | |
487 | { | |
488 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; | |
489 | int ret; | |
490 | ||
491 | if (WARN_ON(vid_cap->ctx == NULL)) | |
492 | return -ENXIO; | |
9448ab7d | 493 | if (vid_cap->ctx->ctrls.ready) |
131b6c61 SN |
494 | return 0; |
495 | ||
496 | ret = fimc_ctrls_create(vid_cap->ctx); | |
9448ab7d | 497 | if (ret || vid_cap->user_subdev_api || !vid_cap->ctx->ctrls.ready) |
131b6c61 SN |
498 | return ret; |
499 | ||
9448ab7d | 500 | return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler, |
34a6b7d0 | 501 | fimc->pipeline.subdevs[IDX_SENSOR]->ctrl_handler, NULL); |
131b6c61 SN |
502 | } |
503 | ||
237e0265 SN |
504 | static int fimc_capture_set_default_format(struct fimc_dev *fimc); |
505 | ||
5f3cc447 SN |
506 | static int fimc_capture_open(struct file *file) |
507 | { | |
508 | struct fimc_dev *fimc = video_drvdata(file); | |
c2d430af | 509 | int ret = -EBUSY; |
5f3cc447 SN |
510 | |
511 | dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state); | |
512 | ||
c2d430af SN |
513 | if (mutex_lock_interruptible(&fimc->lock)) |
514 | return -ERESTARTSYS; | |
515 | ||
5f3cc447 | 516 | if (fimc_m2m_active(fimc)) |
c2d430af | 517 | goto unlock; |
5f3cc447 | 518 | |
3e4748d8 | 519 | set_bit(ST_CAPT_BUSY, &fimc->state); |
e3fc82e8 SN |
520 | ret = pm_runtime_get_sync(&fimc->pdev->dev); |
521 | if (ret < 0) | |
c2d430af | 522 | goto unlock; |
4db5e27e | 523 | |
e3fc82e8 | 524 | ret = v4l2_fh_open(file); |
c2d430af SN |
525 | if (ret) { |
526 | pm_runtime_put(&fimc->pdev->dev); | |
527 | goto unlock; | |
528 | } | |
e3fc82e8 | 529 | |
c2d430af | 530 | if (++fimc->vid_cap.refcnt == 1) { |
b9ee31e6 SN |
531 | ret = fimc_pipeline_call(fimc, open, &fimc->pipeline, |
532 | &fimc->vid_cap.vfd.entity, true); | |
e3fc82e8 | 533 | |
c2d430af SN |
534 | if (!ret && !fimc->vid_cap.user_subdev_api) |
535 | ret = fimc_capture_set_default_format(fimc); | |
536 | ||
537 | if (!ret) | |
538 | ret = fimc_capture_ctrls_create(fimc); | |
e3fc82e8 | 539 | |
c2d430af SN |
540 | if (ret < 0) { |
541 | clear_bit(ST_CAPT_BUSY, &fimc->state); | |
542 | pm_runtime_put_sync(&fimc->pdev->dev); | |
543 | fimc->vid_cap.refcnt--; | |
544 | v4l2_fh_release(file); | |
545 | } | |
546 | } | |
547 | unlock: | |
548 | mutex_unlock(&fimc->lock); | |
131b6c61 | 549 | return ret; |
5f3cc447 SN |
550 | } |
551 | ||
552 | static int fimc_capture_close(struct file *file) | |
553 | { | |
554 | struct fimc_dev *fimc = video_drvdata(file); | |
c2d430af | 555 | int ret; |
5f3cc447 | 556 | |
5f3cc447 SN |
557 | dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state); |
558 | ||
c2d430af SN |
559 | if (mutex_lock_interruptible(&fimc->lock)) |
560 | return -ERESTARTSYS; | |
561 | ||
5f3cc447 | 562 | if (--fimc->vid_cap.refcnt == 0) { |
3e4748d8 SN |
563 | clear_bit(ST_CAPT_BUSY, &fimc->state); |
564 | fimc_stop_capture(fimc, false); | |
b9ee31e6 | 565 | fimc_pipeline_call(fimc, close, &fimc->pipeline); |
3e4748d8 | 566 | clear_bit(ST_CAPT_SUSPENDED, &fimc->state); |
5f3cc447 SN |
567 | } |
568 | ||
e9e21083 SN |
569 | pm_runtime_put(&fimc->pdev->dev); |
570 | ||
3e4748d8 SN |
571 | if (fimc->vid_cap.refcnt == 0) { |
572 | vb2_queue_release(&fimc->vid_cap.vbq); | |
573 | fimc_ctrls_delete(fimc->vid_cap.ctx); | |
574 | } | |
c2d430af SN |
575 | |
576 | ret = v4l2_fh_release(file); | |
577 | ||
578 | mutex_unlock(&fimc->lock); | |
579 | return ret; | |
5f3cc447 SN |
580 | } |
581 | ||
582 | static unsigned int fimc_capture_poll(struct file *file, | |
583 | struct poll_table_struct *wait) | |
584 | { | |
e578588e | 585 | struct fimc_dev *fimc = video_drvdata(file); |
c2d430af | 586 | int ret; |
5f3cc447 | 587 | |
c2d430af SN |
588 | if (mutex_lock_interruptible(&fimc->lock)) |
589 | return POLL_ERR; | |
590 | ||
591 | ret = vb2_poll(&fimc->vid_cap.vbq, file, wait); | |
592 | mutex_unlock(&fimc->lock); | |
593 | ||
594 | return ret; | |
5f3cc447 SN |
595 | } |
596 | ||
597 | static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma) | |
598 | { | |
e578588e | 599 | struct fimc_dev *fimc = video_drvdata(file); |
c2d430af SN |
600 | int ret; |
601 | ||
602 | if (mutex_lock_interruptible(&fimc->lock)) | |
603 | return -ERESTARTSYS; | |
5f3cc447 | 604 | |
c2d430af SN |
605 | ret = vb2_mmap(&fimc->vid_cap.vbq, vma); |
606 | mutex_unlock(&fimc->lock); | |
607 | ||
608 | return ret; | |
5f3cc447 SN |
609 | } |
610 | ||
5f3cc447 SN |
611 | static const struct v4l2_file_operations fimc_capture_fops = { |
612 | .owner = THIS_MODULE, | |
613 | .open = fimc_capture_open, | |
614 | .release = fimc_capture_close, | |
615 | .poll = fimc_capture_poll, | |
616 | .unlocked_ioctl = video_ioctl2, | |
617 | .mmap = fimc_capture_mmap, | |
618 | }; | |
619 | ||
237e0265 SN |
620 | /* |
621 | * Format and crop negotiation helpers | |
622 | */ | |
623 | ||
624 | static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx, | |
625 | u32 *width, u32 *height, | |
626 | u32 *code, u32 *fourcc, int pad) | |
627 | { | |
628 | bool rotation = ctx->rotation == 90 || ctx->rotation == 270; | |
629 | struct fimc_dev *fimc = ctx->fimc_dev; | |
bb7c276e | 630 | struct fimc_variant *var = fimc->variant; |
237e0265 SN |
631 | struct fimc_pix_limit *pl = var->pix_limit; |
632 | struct fimc_frame *dst = &ctx->d_frame; | |
633 | u32 depth, min_w, max_w, min_h, align_h = 3; | |
634 | u32 mask = FMT_FLAGS_CAM; | |
635 | struct fimc_fmt *ffmt; | |
636 | ||
14783d25 | 637 | /* Conversion from/to JPEG or User Defined format is not supported */ |
237e0265 | 638 | if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE && |
14783d25 SN |
639 | fimc_fmt_is_user_defined(ctx->s_frame.fmt->color)) |
640 | *code = ctx->s_frame.fmt->mbus_code; | |
237e0265 SN |
641 | |
642 | if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK) | |
643 | mask |= FMT_FLAGS_M2M; | |
644 | ||
645 | ffmt = fimc_find_format(fourcc, code, mask, 0); | |
646 | if (WARN_ON(!ffmt)) | |
647 | return NULL; | |
648 | if (code) | |
649 | *code = ffmt->mbus_code; | |
650 | if (fourcc) | |
651 | *fourcc = ffmt->fourcc; | |
652 | ||
653 | if (pad == FIMC_SD_PAD_SINK) { | |
14783d25 | 654 | max_w = fimc_fmt_is_user_defined(ffmt->color) ? |
237e0265 SN |
655 | pl->scaler_dis_w : pl->scaler_en_w; |
656 | /* Apply the camera input interface pixel constraints */ | |
657 | v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4, | |
658 | height, max_t(u32, *height, 32), | |
659 | FIMC_CAMIF_MAX_HEIGHT, | |
14783d25 SN |
660 | fimc_fmt_is_user_defined(ffmt->color) ? |
661 | 3 : 1, | |
237e0265 SN |
662 | 0); |
663 | return ffmt; | |
664 | } | |
665 | /* Can't scale or crop in transparent (JPEG) transfer mode */ | |
14783d25 | 666 | if (fimc_fmt_is_user_defined(ffmt->color)) { |
237e0265 SN |
667 | *width = ctx->s_frame.f_width; |
668 | *height = ctx->s_frame.f_height; | |
669 | return ffmt; | |
670 | } | |
671 | /* Apply the scaler and the output DMA constraints */ | |
672 | max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; | |
fed07f84 SN |
673 | if (ctx->state & FIMC_COMPOSE) { |
674 | min_w = dst->offs_h + dst->width; | |
675 | min_h = dst->offs_v + dst->height; | |
676 | } else { | |
677 | min_w = var->min_out_pixsize; | |
678 | min_h = var->min_out_pixsize; | |
679 | } | |
9c63afcb | 680 | if (var->min_vsize_align == 1 && !rotation) |
237e0265 SN |
681 | align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; |
682 | ||
683 | depth = fimc_get_format_depth(ffmt); | |
684 | v4l_bound_align_image(width, min_w, max_w, | |
685 | ffs(var->min_out_pixsize) - 1, | |
686 | height, min_h, FIMC_CAMIF_MAX_HEIGHT, | |
687 | align_h, | |
688 | 64/(ALIGN(depth, 8))); | |
689 | ||
690 | dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d", | |
691 | pad, code ? *code : 0, *width, *height, | |
692 | dst->f_width, dst->f_height); | |
693 | ||
694 | return ffmt; | |
695 | } | |
696 | ||
fed07f84 SN |
697 | static void fimc_capture_try_selection(struct fimc_ctx *ctx, |
698 | struct v4l2_rect *r, | |
699 | int target) | |
237e0265 SN |
700 | { |
701 | bool rotate = ctx->rotation == 90 || ctx->rotation == 270; | |
702 | struct fimc_dev *fimc = ctx->fimc_dev; | |
bb7c276e | 703 | struct fimc_variant *var = fimc->variant; |
237e0265 SN |
704 | struct fimc_pix_limit *pl = var->pix_limit; |
705 | struct fimc_frame *sink = &ctx->s_frame; | |
706 | u32 max_w, max_h, min_w = 0, min_h = 0, min_sz; | |
707 | u32 align_sz = 0, align_h = 4; | |
708 | u32 max_sc_h, max_sc_v; | |
709 | ||
710 | /* In JPEG transparent transfer mode cropping is not supported */ | |
14783d25 | 711 | if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) { |
237e0265 SN |
712 | r->width = sink->f_width; |
713 | r->height = sink->f_height; | |
714 | r->left = r->top = 0; | |
715 | return; | |
716 | } | |
c1334823 | 717 | if (target == V4L2_SEL_TGT_COMPOSE) { |
237e0265 SN |
718 | if (ctx->rotation != 90 && ctx->rotation != 270) |
719 | align_h = 1; | |
720 | max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3)); | |
721 | max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1)); | |
722 | min_sz = var->min_out_pixsize; | |
723 | } else { | |
724 | u32 depth = fimc_get_format_depth(sink->fmt); | |
725 | align_sz = 64/ALIGN(depth, 8); | |
726 | min_sz = var->min_inp_pixsize; | |
727 | min_w = min_h = min_sz; | |
728 | max_sc_h = max_sc_v = 1; | |
729 | } | |
730 | /* | |
fed07f84 | 731 | * For the compose rectangle the following constraints must be met: |
237e0265 SN |
732 | * - it must fit in the sink pad format rectangle (f_width/f_height); |
733 | * - maximum downscaling ratio is 64; | |
734 | * - maximum crop size depends if the rotator is used or not; | |
735 | * - the sink pad format width/height must be 4 multiple of the | |
736 | * prescaler ratios determined by sink pad size and source pad crop, | |
737 | * the prescaler ratio is returned by fimc_get_scaler_factor(). | |
738 | */ | |
739 | max_w = min_t(u32, | |
740 | rotate ? pl->out_rot_en_w : pl->out_rot_dis_w, | |
741 | rotate ? sink->f_height : sink->f_width); | |
742 | max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height); | |
fed07f84 | 743 | |
c1334823 | 744 | if (target == V4L2_SEL_TGT_COMPOSE) { |
237e0265 SN |
745 | min_w = min_t(u32, max_w, sink->f_width / max_sc_h); |
746 | min_h = min_t(u32, max_h, sink->f_height / max_sc_v); | |
747 | if (rotate) { | |
748 | swap(max_sc_h, max_sc_v); | |
749 | swap(min_w, min_h); | |
750 | } | |
751 | } | |
752 | v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1, | |
753 | &r->height, min_h, max_h, align_h, | |
754 | align_sz); | |
fed07f84 | 755 | /* Adjust left/top if crop/compose rectangle is out of bounds */ |
237e0265 SN |
756 | r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width); |
757 | r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height); | |
758 | r->left = round_down(r->left, var->hor_offs_align); | |
759 | ||
fed07f84 SN |
760 | dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d", |
761 | target, r->left, r->top, r->width, r->height, | |
237e0265 SN |
762 | sink->f_width, sink->f_height); |
763 | } | |
764 | ||
765 | /* | |
766 | * The video node ioctl operations | |
767 | */ | |
5f3cc447 SN |
768 | static int fimc_vidioc_querycap_capture(struct file *file, void *priv, |
769 | struct v4l2_capability *cap) | |
770 | { | |
e578588e | 771 | struct fimc_dev *fimc = video_drvdata(file); |
5f3cc447 SN |
772 | |
773 | strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1); | |
774 | strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1); | |
775 | cap->bus_info[0] = 0; | |
8f401543 | 776 | cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE; |
5f3cc447 SN |
777 | |
778 | return 0; | |
779 | } | |
780 | ||
cf52df8a SN |
781 | static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv, |
782 | struct v4l2_fmtdesc *f) | |
783 | { | |
784 | struct fimc_fmt *fmt; | |
785 | ||
786 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M, | |
787 | f->index); | |
788 | if (!fmt) | |
789 | return -EINVAL; | |
790 | strncpy(f->description, fmt->name, sizeof(f->description) - 1); | |
791 | f->pixelformat = fmt->fourcc; | |
792 | if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8) | |
793 | f->flags |= V4L2_FMT_FLAG_COMPRESSED; | |
794 | return 0; | |
795 | } | |
796 | ||
237e0265 SN |
797 | /** |
798 | * fimc_pipeline_try_format - negotiate and/or set formats at pipeline | |
799 | * elements | |
800 | * @ctx: FIMC capture context | |
801 | * @tfmt: media bus format to try/set on subdevs | |
802 | * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output) | |
803 | * @set: true to set format on subdevs, false to try only | |
804 | */ | |
805 | static int fimc_pipeline_try_format(struct fimc_ctx *ctx, | |
806 | struct v4l2_mbus_framefmt *tfmt, | |
807 | struct fimc_fmt **fmt_id, | |
808 | bool set) | |
809 | { | |
810 | struct fimc_dev *fimc = ctx->fimc_dev; | |
0f735f52 SN |
811 | struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR]; |
812 | struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS]; | |
237e0265 SN |
813 | struct v4l2_subdev_format sfmt; |
814 | struct v4l2_mbus_framefmt *mf = &sfmt.format; | |
815 | struct fimc_fmt *ffmt = NULL; | |
816 | int ret, i = 0; | |
817 | ||
818 | if (WARN_ON(!sd || !tfmt)) | |
819 | return -EINVAL; | |
5f3cc447 | 820 | |
237e0265 SN |
821 | memset(&sfmt, 0, sizeof(sfmt)); |
822 | sfmt.format = *tfmt; | |
823 | ||
824 | sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY; | |
825 | while (1) { | |
826 | ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL, | |
827 | FMT_FLAGS_CAM, i++); | |
828 | if (ffmt == NULL) { | |
829 | /* | |
830 | * Notify user-space if common pixel code for | |
831 | * host and sensor does not exist. | |
832 | */ | |
833 | return -EINVAL; | |
834 | } | |
835 | mf->code = tfmt->code = ffmt->mbus_code; | |
5f3cc447 | 836 | |
237e0265 SN |
837 | ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt); |
838 | if (ret) | |
839 | return ret; | |
840 | if (mf->code != tfmt->code) { | |
841 | mf->code = 0; | |
842 | continue; | |
843 | } | |
b1aa6089 | 844 | if (mf->width != tfmt->width || mf->height != tfmt->height) { |
237e0265 SN |
845 | u32 fcc = ffmt->fourcc; |
846 | tfmt->width = mf->width; | |
847 | tfmt->height = mf->height; | |
848 | ffmt = fimc_capture_try_format(ctx, | |
849 | &tfmt->width, &tfmt->height, | |
850 | NULL, &fcc, FIMC_SD_PAD_SOURCE); | |
851 | if (ffmt && ffmt->mbus_code) | |
852 | mf->code = ffmt->mbus_code; | |
b1aa6089 JL |
853 | if (mf->width != tfmt->width || |
854 | mf->height != tfmt->height) | |
237e0265 SN |
855 | continue; |
856 | tfmt->code = mf->code; | |
857 | } | |
858 | if (csis) | |
859 | ret = v4l2_subdev_call(csis, pad, set_fmt, NULL, &sfmt); | |
5f3cc447 | 860 | |
237e0265 | 861 | if (mf->code == tfmt->code && |
b1aa6089 | 862 | mf->width == tfmt->width && mf->height == tfmt->height) |
237e0265 SN |
863 | break; |
864 | } | |
5f3cc447 | 865 | |
237e0265 SN |
866 | if (fmt_id && ffmt) |
867 | *fmt_id = ffmt; | |
868 | *tfmt = *mf; | |
5f3cc447 | 869 | |
237e0265 SN |
870 | dbg("code: 0x%x, %dx%d, %p", mf->code, mf->width, mf->height, ffmt); |
871 | return 0; | |
872 | } | |
5f3cc447 | 873 | |
14783d25 SN |
874 | /** |
875 | * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters | |
876 | * @sensor: pointer to the sensor subdev | |
877 | * @plane_fmt: provides plane sizes corresponding to the frame layout entries | |
878 | * @try: true to set the frame parameters, false to query only | |
879 | * | |
880 | * This function is used by this driver only for compressed/blob data formats. | |
881 | */ | |
882 | static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor, | |
883 | struct v4l2_plane_pix_format *plane_fmt, | |
884 | unsigned int num_planes, bool try) | |
885 | { | |
886 | struct v4l2_mbus_frame_desc fd; | |
887 | int i, ret; | |
888 | ||
889 | for (i = 0; i < num_planes; i++) | |
890 | fd.entry[i].length = plane_fmt[i].sizeimage; | |
891 | ||
892 | if (try) | |
893 | ret = v4l2_subdev_call(sensor, pad, set_frame_desc, 0, &fd); | |
894 | else | |
895 | ret = v4l2_subdev_call(sensor, pad, get_frame_desc, 0, &fd); | |
896 | ||
897 | if (ret < 0) | |
898 | return ret; | |
899 | ||
900 | if (num_planes != fd.num_entries) | |
901 | return -EINVAL; | |
902 | ||
903 | for (i = 0; i < num_planes; i++) | |
904 | plane_fmt[i].sizeimage = fd.entry[i].length; | |
905 | ||
906 | if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) { | |
907 | v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n", | |
908 | fd.entry[0].length); | |
909 | ||
910 | return -EINVAL; | |
911 | } | |
912 | ||
913 | return 0; | |
914 | } | |
915 | ||
e578588e SN |
916 | static int fimc_cap_g_fmt_mplane(struct file *file, void *fh, |
917 | struct v4l2_format *f) | |
918 | { | |
919 | struct fimc_dev *fimc = video_drvdata(file); | |
920 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
921 | ||
e578588e SN |
922 | return fimc_fill_format(&ctx->d_frame, f); |
923 | } | |
924 | ||
925 | static int fimc_cap_try_fmt_mplane(struct file *file, void *fh, | |
926 | struct v4l2_format *f) | |
927 | { | |
237e0265 | 928 | struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; |
e578588e SN |
929 | struct fimc_dev *fimc = video_drvdata(file); |
930 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
237e0265 SN |
931 | struct v4l2_mbus_framefmt mf; |
932 | struct fimc_fmt *ffmt = NULL; | |
933 | ||
14783d25 | 934 | if (fimc_jpeg_fourcc(pix->pixelformat)) { |
237e0265 SN |
935 | fimc_capture_try_format(ctx, &pix->width, &pix->height, |
936 | NULL, &pix->pixelformat, | |
937 | FIMC_SD_PAD_SINK); | |
938 | ctx->s_frame.f_width = pix->width; | |
939 | ctx->s_frame.f_height = pix->height; | |
940 | } | |
941 | ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height, | |
942 | NULL, &pix->pixelformat, | |
943 | FIMC_SD_PAD_SOURCE); | |
944 | if (!ffmt) | |
945 | return -EINVAL; | |
946 | ||
947 | if (!fimc->vid_cap.user_subdev_api) { | |
14783d25 | 948 | mf.width = pix->width; |
237e0265 | 949 | mf.height = pix->height; |
14783d25 | 950 | mf.code = ffmt->mbus_code; |
237e0265 SN |
951 | fimc_md_graph_lock(fimc); |
952 | fimc_pipeline_try_format(ctx, &mf, &ffmt, false); | |
953 | fimc_md_graph_unlock(fimc); | |
14783d25 SN |
954 | pix->width = mf.width; |
955 | pix->height = mf.height; | |
237e0265 SN |
956 | if (ffmt) |
957 | pix->pixelformat = ffmt->fourcc; | |
958 | } | |
e578588e | 959 | |
237e0265 | 960 | fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix); |
14783d25 SN |
961 | |
962 | if (ffmt->flags & FMT_FLAGS_COMPRESSED) | |
963 | fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR], | |
964 | pix->plane_fmt, ffmt->memplanes, true); | |
965 | ||
4db5e27e | 966 | return 0; |
e578588e SN |
967 | } |
968 | ||
14783d25 SN |
969 | static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx, |
970 | enum fimc_color_fmt color) | |
ee7160e5 | 971 | { |
14783d25 SN |
972 | bool jpeg = fimc_fmt_is_user_defined(color); |
973 | ||
ee7160e5 SN |
974 | ctx->scaler.enabled = !jpeg; |
975 | fimc_ctrls_activate(ctx, !jpeg); | |
976 | ||
977 | if (jpeg) | |
978 | set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state); | |
979 | else | |
980 | clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state); | |
981 | } | |
982 | ||
237e0265 | 983 | static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f) |
5f3cc447 | 984 | { |
e578588e | 985 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; |
237e0265 SN |
986 | struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; |
987 | struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf; | |
988 | struct fimc_frame *ff = &ctx->d_frame; | |
989 | struct fimc_fmt *s_fmt = NULL; | |
990 | int ret, i; | |
5f3cc447 | 991 | |
237e0265 | 992 | if (vb2_is_busy(&fimc->vid_cap.vbq)) |
ef7af59b | 993 | return -EBUSY; |
5f3cc447 | 994 | |
237e0265 | 995 | /* Pre-configure format at camera interface input, for JPEG only */ |
14783d25 | 996 | if (fimc_jpeg_fourcc(pix->pixelformat)) { |
237e0265 SN |
997 | fimc_capture_try_format(ctx, &pix->width, &pix->height, |
998 | NULL, &pix->pixelformat, | |
999 | FIMC_SD_PAD_SINK); | |
1000 | ctx->s_frame.f_width = pix->width; | |
1001 | ctx->s_frame.f_height = pix->height; | |
1002 | } | |
1003 | /* Try the format at the scaler and the DMA output */ | |
1004 | ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height, | |
1005 | NULL, &pix->pixelformat, | |
1006 | FIMC_SD_PAD_SOURCE); | |
1007 | if (!ff->fmt) | |
8293ebfc | 1008 | return -EINVAL; |
dafb9c70 SN |
1009 | |
1010 | /* Update RGB Alpha control state and value range */ | |
1011 | fimc_alpha_ctrl_update(ctx); | |
1012 | ||
237e0265 SN |
1013 | /* Try to match format at the host and the sensor */ |
1014 | if (!fimc->vid_cap.user_subdev_api) { | |
1015 | mf->code = ff->fmt->mbus_code; | |
1016 | mf->width = pix->width; | |
1017 | mf->height = pix->height; | |
1018 | ||
1019 | fimc_md_graph_lock(fimc); | |
1020 | ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true); | |
1021 | fimc_md_graph_unlock(fimc); | |
1022 | if (ret) | |
1023 | return ret; | |
1024 | pix->width = mf->width; | |
1025 | pix->height = mf->height; | |
1026 | } | |
d547ab66 | 1027 | |
237e0265 | 1028 | fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix); |
14783d25 SN |
1029 | |
1030 | if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) { | |
1031 | ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR], | |
1032 | pix->plane_fmt, ff->fmt->memplanes, | |
1033 | true); | |
1034 | if (ret < 0) | |
1035 | return ret; | |
1036 | } | |
1037 | ||
1038 | for (i = 0; i < ff->fmt->memplanes; i++) | |
d547ab66 | 1039 | ff->payload[i] = pix->plane_fmt[i].sizeimage; |
237e0265 SN |
1040 | |
1041 | set_frame_bounds(ff, pix->width, pix->height); | |
1042 | /* Reset the composition rectangle if not yet configured */ | |
fed07f84 | 1043 | if (!(ctx->state & FIMC_COMPOSE)) |
237e0265 SN |
1044 | set_frame_crop(ff, 0, 0, pix->width, pix->height); |
1045 | ||
14783d25 | 1046 | fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color); |
ee7160e5 | 1047 | |
237e0265 SN |
1048 | /* Reset cropping and set format at the camera interface input */ |
1049 | if (!fimc->vid_cap.user_subdev_api) { | |
1050 | ctx->s_frame.fmt = s_fmt; | |
1051 | set_frame_bounds(&ctx->s_frame, pix->width, pix->height); | |
1052 | set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height); | |
045030fa | 1053 | } |
ef7af59b | 1054 | |
237e0265 SN |
1055 | return ret; |
1056 | } | |
5f3cc447 | 1057 | |
237e0265 SN |
1058 | static int fimc_cap_s_fmt_mplane(struct file *file, void *priv, |
1059 | struct v4l2_format *f) | |
1060 | { | |
1061 | struct fimc_dev *fimc = video_drvdata(file); | |
5f3cc447 | 1062 | |
237e0265 | 1063 | return fimc_capture_set_format(fimc, f); |
5f3cc447 SN |
1064 | } |
1065 | ||
1066 | static int fimc_cap_enum_input(struct file *file, void *priv, | |
3e002182 | 1067 | struct v4l2_input *i) |
5f3cc447 | 1068 | { |
e578588e | 1069 | struct fimc_dev *fimc = video_drvdata(file); |
0f735f52 | 1070 | struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR]; |
5f3cc447 | 1071 | |
3e002182 | 1072 | if (i->index != 0) |
5f3cc447 SN |
1073 | return -EINVAL; |
1074 | ||
5f3cc447 | 1075 | i->type = V4L2_INPUT_TYPE_CAMERA; |
4db5e27e SN |
1076 | if (sd) |
1077 | strlcpy(i->name, sd->name, sizeof(i->name)); | |
5f3cc447 SN |
1078 | return 0; |
1079 | } | |
1080 | ||
3e002182 | 1081 | static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i) |
5f3cc447 | 1082 | { |
3e002182 | 1083 | return i == 0 ? i : -EINVAL; |
5f3cc447 SN |
1084 | } |
1085 | ||
3e002182 | 1086 | static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i) |
5f3cc447 | 1087 | { |
3e002182 | 1088 | *i = 0; |
5f3cc447 SN |
1089 | return 0; |
1090 | } | |
1091 | ||
237e0265 SN |
1092 | /** |
1093 | * fimc_pipeline_validate - check for formats inconsistencies | |
1094 | * between source and sink pad of each link | |
1095 | * | |
1096 | * Return 0 if all formats match or -EPIPE otherwise. | |
1097 | */ | |
1098 | static int fimc_pipeline_validate(struct fimc_dev *fimc) | |
1099 | { | |
1100 | struct v4l2_subdev_format sink_fmt, src_fmt; | |
1101 | struct fimc_vid_cap *vid_cap = &fimc->vid_cap; | |
1102 | struct v4l2_subdev *sd; | |
1103 | struct media_pad *pad; | |
1104 | int ret; | |
1105 | ||
1106 | /* Start with the video capture node pad */ | |
1107 | pad = media_entity_remote_source(&vid_cap->vd_pad); | |
1108 | if (pad == NULL) | |
1109 | return -EPIPE; | |
1110 | /* FIMC.{N} subdevice */ | |
1111 | sd = media_entity_to_v4l2_subdev(pad->entity); | |
1112 | ||
1113 | while (1) { | |
1114 | /* Retrieve format at the sink pad */ | |
1115 | pad = &sd->entity.pads[0]; | |
1116 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) | |
1117 | break; | |
1118 | /* Don't call FIMC subdev operation to avoid nested locking */ | |
693f5c40 | 1119 | if (sd == &fimc->vid_cap.subdev) { |
237e0265 SN |
1120 | struct fimc_frame *ff = &vid_cap->ctx->s_frame; |
1121 | sink_fmt.format.width = ff->f_width; | |
1122 | sink_fmt.format.height = ff->f_height; | |
1123 | sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0; | |
1124 | } else { | |
1125 | sink_fmt.pad = pad->index; | |
1126 | sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
1127 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt); | |
1128 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
1129 | return -EPIPE; | |
1130 | } | |
1131 | /* Retrieve format at the source pad */ | |
1132 | pad = media_entity_remote_source(pad); | |
1133 | if (pad == NULL || | |
1134 | media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) | |
1135 | break; | |
1136 | ||
1137 | sd = media_entity_to_v4l2_subdev(pad->entity); | |
1138 | src_fmt.pad = pad->index; | |
1139 | src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
1140 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); | |
1141 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
1142 | return -EPIPE; | |
1143 | ||
1144 | if (src_fmt.format.width != sink_fmt.format.width || | |
1145 | src_fmt.format.height != sink_fmt.format.height || | |
1146 | src_fmt.format.code != sink_fmt.format.code) | |
1147 | return -EPIPE; | |
14783d25 SN |
1148 | |
1149 | if (sd == fimc->pipeline.subdevs[IDX_SENSOR] && | |
1150 | fimc_user_defined_mbus_fmt(src_fmt.format.code)) { | |
1151 | struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES]; | |
1152 | struct fimc_frame *frame = &vid_cap->ctx->d_frame; | |
1153 | unsigned int i; | |
1154 | ||
1155 | ret = fimc_get_sensor_frame_desc(sd, plane_fmt, | |
1156 | frame->fmt->memplanes, | |
1157 | false); | |
1158 | if (ret < 0) | |
1159 | return -EPIPE; | |
1160 | ||
1161 | for (i = 0; i < frame->fmt->memplanes; i++) | |
1162 | if (frame->payload[i] < plane_fmt[i].sizeimage) | |
1163 | return -EPIPE; | |
1164 | } | |
237e0265 SN |
1165 | } |
1166 | return 0; | |
1167 | } | |
1168 | ||
5f3cc447 | 1169 | static int fimc_cap_streamon(struct file *file, void *priv, |
2dab38e2 | 1170 | enum v4l2_buf_type type) |
5f3cc447 | 1171 | { |
e578588e | 1172 | struct fimc_dev *fimc = video_drvdata(file); |
4db5e27e | 1173 | struct fimc_pipeline *p = &fimc->pipeline; |
f676fa06 | 1174 | struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR]; |
237e0265 | 1175 | int ret; |
5f3cc447 | 1176 | |
4db5e27e | 1177 | if (fimc_capture_active(fimc)) |
8293ebfc | 1178 | return -EBUSY; |
5f3cc447 | 1179 | |
f676fa06 | 1180 | ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline); |
a60a2959 SA |
1181 | if (ret < 0) |
1182 | return ret; | |
5f3cc447 | 1183 | |
237e0265 SN |
1184 | if (fimc->vid_cap.user_subdev_api) { |
1185 | ret = fimc_pipeline_validate(fimc); | |
f676fa06 SK |
1186 | if (ret < 0) { |
1187 | media_entity_pipeline_stop(&sd->entity); | |
237e0265 | 1188 | return ret; |
f676fa06 | 1189 | } |
237e0265 | 1190 | } |
8293ebfc | 1191 | return vb2_streamon(&fimc->vid_cap.vbq, type); |
5f3cc447 SN |
1192 | } |
1193 | ||
1194 | static int fimc_cap_streamoff(struct file *file, void *priv, | |
8293ebfc | 1195 | enum v4l2_buf_type type) |
5f3cc447 | 1196 | { |
e578588e | 1197 | struct fimc_dev *fimc = video_drvdata(file); |
0f735f52 | 1198 | struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR]; |
4db5e27e | 1199 | int ret; |
5f3cc447 | 1200 | |
4db5e27e SN |
1201 | ret = vb2_streamoff(&fimc->vid_cap.vbq, type); |
1202 | if (ret == 0) | |
1203 | media_entity_pipeline_stop(&sd->entity); | |
1204 | return ret; | |
5f3cc447 SN |
1205 | } |
1206 | ||
1207 | static int fimc_cap_reqbufs(struct file *file, void *priv, | |
ef7af59b | 1208 | struct v4l2_requestbuffers *reqbufs) |
5f3cc447 | 1209 | { |
e578588e SN |
1210 | struct fimc_dev *fimc = video_drvdata(file); |
1211 | int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs); | |
5f3cc447 | 1212 | |
5f3cc447 | 1213 | if (!ret) |
e578588e | 1214 | fimc->vid_cap.reqbufs_count = reqbufs->count; |
5f3cc447 SN |
1215 | return ret; |
1216 | } | |
1217 | ||
1218 | static int fimc_cap_querybuf(struct file *file, void *priv, | |
1219 | struct v4l2_buffer *buf) | |
1220 | { | |
e578588e | 1221 | struct fimc_dev *fimc = video_drvdata(file); |
5f3cc447 | 1222 | |
e578588e | 1223 | return vb2_querybuf(&fimc->vid_cap.vbq, buf); |
5f3cc447 SN |
1224 | } |
1225 | ||
1226 | static int fimc_cap_qbuf(struct file *file, void *priv, | |
1227 | struct v4l2_buffer *buf) | |
1228 | { | |
e578588e SN |
1229 | struct fimc_dev *fimc = video_drvdata(file); |
1230 | ||
1231 | return vb2_qbuf(&fimc->vid_cap.vbq, buf); | |
5f3cc447 SN |
1232 | } |
1233 | ||
1234 | static int fimc_cap_dqbuf(struct file *file, void *priv, | |
1235 | struct v4l2_buffer *buf) | |
1236 | { | |
e578588e SN |
1237 | struct fimc_dev *fimc = video_drvdata(file); |
1238 | ||
1239 | return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK); | |
5f3cc447 SN |
1240 | } |
1241 | ||
3b4c34aa SN |
1242 | static int fimc_cap_create_bufs(struct file *file, void *priv, |
1243 | struct v4l2_create_buffers *create) | |
1244 | { | |
1245 | struct fimc_dev *fimc = video_drvdata(file); | |
1246 | ||
1247 | return vb2_create_bufs(&fimc->vid_cap.vbq, create); | |
1248 | } | |
1249 | ||
1250 | static int fimc_cap_prepare_buf(struct file *file, void *priv, | |
1251 | struct v4l2_buffer *b) | |
1252 | { | |
1253 | struct fimc_dev *fimc = video_drvdata(file); | |
1254 | ||
1255 | return vb2_prepare_buf(&fimc->vid_cap.vbq, b); | |
1256 | } | |
1257 | ||
f9331d11 SN |
1258 | static int fimc_cap_g_selection(struct file *file, void *fh, |
1259 | struct v4l2_selection *s) | |
e004e02f | 1260 | { |
e578588e | 1261 | struct fimc_dev *fimc = video_drvdata(file); |
f9331d11 SN |
1262 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; |
1263 | struct fimc_frame *f = &ctx->s_frame; | |
e004e02f | 1264 | |
f9331d11 | 1265 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
e004e02f SN |
1266 | return -EINVAL; |
1267 | ||
f9331d11 SN |
1268 | switch (s->target) { |
1269 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | |
1270 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | |
1271 | f = &ctx->d_frame; | |
1272 | case V4L2_SEL_TGT_CROP_BOUNDS: | |
1273 | case V4L2_SEL_TGT_CROP_DEFAULT: | |
1274 | s->r.left = 0; | |
1275 | s->r.top = 0; | |
1276 | s->r.width = f->o_width; | |
1277 | s->r.height = f->o_height; | |
1278 | return 0; | |
e004e02f | 1279 | |
c1334823 | 1280 | case V4L2_SEL_TGT_COMPOSE: |
f9331d11 | 1281 | f = &ctx->d_frame; |
c1334823 | 1282 | case V4L2_SEL_TGT_CROP: |
f9331d11 SN |
1283 | s->r.left = f->offs_h; |
1284 | s->r.top = f->offs_v; | |
1285 | s->r.width = f->width; | |
1286 | s->r.height = f->height; | |
1287 | return 0; | |
1288 | } | |
1289 | ||
1290 | return -EINVAL; | |
e004e02f SN |
1291 | } |
1292 | ||
f9331d11 | 1293 | /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */ |
7e566be2 | 1294 | static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b) |
e004e02f | 1295 | { |
f9331d11 SN |
1296 | if (a->left < b->left || a->top < b->top) |
1297 | return 0; | |
1298 | if (a->left + a->width > b->left + b->width) | |
1299 | return 0; | |
1300 | if (a->top + a->height > b->top + b->height) | |
1301 | return 0; | |
e004e02f | 1302 | |
f9331d11 | 1303 | return 1; |
e004e02f SN |
1304 | } |
1305 | ||
f9331d11 SN |
1306 | static int fimc_cap_s_selection(struct file *file, void *fh, |
1307 | struct v4l2_selection *s) | |
5f3cc447 | 1308 | { |
e578588e SN |
1309 | struct fimc_dev *fimc = video_drvdata(file); |
1310 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
f9331d11 SN |
1311 | struct v4l2_rect rect = s->r; |
1312 | struct fimc_frame *f; | |
237e0265 | 1313 | unsigned long flags; |
f9331d11 SN |
1314 | |
1315 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
1316 | return -EINVAL; | |
1317 | ||
c1334823 | 1318 | if (s->target == V4L2_SEL_TGT_COMPOSE) |
f9331d11 | 1319 | f = &ctx->d_frame; |
c1334823 | 1320 | else if (s->target == V4L2_SEL_TGT_CROP) |
f9331d11 | 1321 | f = &ctx->s_frame; |
fed07f84 | 1322 | else |
f9331d11 | 1323 | return -EINVAL; |
f9331d11 | 1324 | |
fed07f84 | 1325 | fimc_capture_try_selection(ctx, &rect, s->target); |
f9331d11 SN |
1326 | |
1327 | if (s->flags & V4L2_SEL_FLAG_LE && | |
1328 | !enclosed_rectangle(&rect, &s->r)) | |
1329 | return -ERANGE; | |
5f3cc447 | 1330 | |
f9331d11 SN |
1331 | if (s->flags & V4L2_SEL_FLAG_GE && |
1332 | !enclosed_rectangle(&s->r, &rect)) | |
1333 | return -ERANGE; | |
5f3cc447 | 1334 | |
f9331d11 | 1335 | s->r = rect; |
237e0265 | 1336 | spin_lock_irqsave(&fimc->slock, flags); |
f9331d11 SN |
1337 | set_frame_crop(f, s->r.left, s->r.top, s->r.width, |
1338 | s->r.height); | |
237e0265 | 1339 | spin_unlock_irqrestore(&fimc->slock, flags); |
8293ebfc | 1340 | |
f9331d11 | 1341 | set_bit(ST_CAPT_APPLY_CFG, &fimc->state); |
8293ebfc | 1342 | return 0; |
5f3cc447 SN |
1343 | } |
1344 | ||
5f3cc447 SN |
1345 | static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = { |
1346 | .vidioc_querycap = fimc_vidioc_querycap_capture, | |
1347 | ||
cf52df8a | 1348 | .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane, |
e578588e | 1349 | .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane, |
ef7af59b | 1350 | .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane, |
e578588e | 1351 | .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane, |
5f3cc447 SN |
1352 | |
1353 | .vidioc_reqbufs = fimc_cap_reqbufs, | |
1354 | .vidioc_querybuf = fimc_cap_querybuf, | |
1355 | ||
1356 | .vidioc_qbuf = fimc_cap_qbuf, | |
1357 | .vidioc_dqbuf = fimc_cap_dqbuf, | |
1358 | ||
3b4c34aa SN |
1359 | .vidioc_prepare_buf = fimc_cap_prepare_buf, |
1360 | .vidioc_create_bufs = fimc_cap_create_bufs, | |
1361 | ||
5f3cc447 SN |
1362 | .vidioc_streamon = fimc_cap_streamon, |
1363 | .vidioc_streamoff = fimc_cap_streamoff, | |
1364 | ||
f9331d11 SN |
1365 | .vidioc_g_selection = fimc_cap_g_selection, |
1366 | .vidioc_s_selection = fimc_cap_s_selection, | |
5f3cc447 SN |
1367 | |
1368 | .vidioc_enum_input = fimc_cap_enum_input, | |
1369 | .vidioc_s_input = fimc_cap_s_input, | |
1370 | .vidioc_g_input = fimc_cap_g_input, | |
1371 | }; | |
1372 | ||
237e0265 | 1373 | /* Capture subdev media entity operations */ |
d09a7dc8 SN |
1374 | static int fimc_link_setup(struct media_entity *entity, |
1375 | const struct media_pad *local, | |
1376 | const struct media_pad *remote, u32 flags) | |
1377 | { | |
237e0265 SN |
1378 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); |
1379 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1380 | ||
1381 | if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV) | |
1382 | return -EINVAL; | |
d09a7dc8 SN |
1383 | |
1384 | if (WARN_ON(fimc == NULL)) | |
1385 | return 0; | |
1386 | ||
1387 | dbg("%s --> %s, flags: 0x%x. input: 0x%x", | |
1388 | local->entity->name, remote->entity->name, flags, | |
1389 | fimc->vid_cap.input); | |
1390 | ||
1391 | if (flags & MEDIA_LNK_FL_ENABLED) { | |
1392 | if (fimc->vid_cap.input != 0) | |
1393 | return -EBUSY; | |
1394 | fimc->vid_cap.input = sd->grp_id; | |
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | fimc->vid_cap.input = 0; | |
1399 | return 0; | |
1400 | } | |
1401 | ||
237e0265 | 1402 | static const struct media_entity_operations fimc_sd_media_ops = { |
d09a7dc8 SN |
1403 | .link_setup = fimc_link_setup, |
1404 | }; | |
1405 | ||
e1d72f4d SN |
1406 | /** |
1407 | * fimc_sensor_notify - v4l2_device notification from a sensor subdev | |
1408 | * @sd: pointer to a subdev generating the notification | |
1409 | * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY | |
1410 | * @arg: pointer to an u32 type integer that stores the frame payload value | |
1411 | * | |
1412 | * The End Of Frame notification sent by sensor subdev in its still capture | |
1413 | * mode. If there is only a single VSYNC generated by the sensor at the | |
1414 | * beginning of a frame transmission, FIMC does not issue the LastIrq | |
1415 | * (end of frame) interrupt. And this notification is used to complete the | |
1416 | * frame capture and returning a buffer to user-space. Subdev drivers should | |
1417 | * call this notification from their last 'End of frame capture' interrupt. | |
1418 | */ | |
1419 | void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification, | |
1420 | void *arg) | |
1421 | { | |
1422 | struct fimc_sensor_info *sensor; | |
1423 | struct fimc_vid_buffer *buf; | |
1424 | struct fimc_md *fmd; | |
1425 | struct fimc_dev *fimc; | |
1426 | unsigned long flags; | |
1427 | ||
1428 | if (sd == NULL) | |
1429 | return; | |
1430 | ||
1431 | sensor = v4l2_get_subdev_hostdata(sd); | |
1432 | fmd = entity_to_fimc_mdev(&sd->entity); | |
1433 | ||
1434 | spin_lock_irqsave(&fmd->slock, flags); | |
1435 | fimc = sensor ? sensor->host : NULL; | |
1436 | ||
1437 | if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY && | |
1438 | test_bit(ST_CAPT_PEND, &fimc->state)) { | |
1439 | unsigned long irq_flags; | |
1440 | spin_lock_irqsave(&fimc->slock, irq_flags); | |
1441 | if (!list_empty(&fimc->vid_cap.active_buf_q)) { | |
1442 | buf = list_entry(fimc->vid_cap.active_buf_q.next, | |
1443 | struct fimc_vid_buffer, list); | |
1444 | vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg)); | |
1445 | } | |
97d97422 | 1446 | fimc_capture_irq_handler(fimc, 1); |
e1d72f4d SN |
1447 | fimc_deactivate_capture(fimc); |
1448 | spin_unlock_irqrestore(&fimc->slock, irq_flags); | |
1449 | } | |
1450 | spin_unlock_irqrestore(&fmd->slock, flags); | |
1451 | } | |
1452 | ||
237e0265 SN |
1453 | static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd, |
1454 | struct v4l2_subdev_fh *fh, | |
1455 | struct v4l2_subdev_mbus_code_enum *code) | |
1456 | { | |
1457 | struct fimc_fmt *fmt; | |
1458 | ||
1459 | fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index); | |
1460 | if (!fmt) | |
1461 | return -EINVAL; | |
1462 | code->code = fmt->mbus_code; | |
1463 | return 0; | |
1464 | } | |
1465 | ||
1466 | static int fimc_subdev_get_fmt(struct v4l2_subdev *sd, | |
1467 | struct v4l2_subdev_fh *fh, | |
1468 | struct v4l2_subdev_format *fmt) | |
1469 | { | |
1470 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1471 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
1472 | struct v4l2_mbus_framefmt *mf; | |
1473 | struct fimc_frame *ff; | |
1474 | ||
1475 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1476 | mf = v4l2_subdev_get_try_format(fh, fmt->pad); | |
1477 | fmt->format = *mf; | |
1478 | return 0; | |
1479 | } | |
1480 | mf = &fmt->format; | |
1481 | mf->colorspace = V4L2_COLORSPACE_JPEG; | |
1482 | ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame; | |
1483 | ||
1484 | mutex_lock(&fimc->lock); | |
1485 | /* The pixel code is same on both input and output pad */ | |
1486 | if (!WARN_ON(ctx->s_frame.fmt == NULL)) | |
1487 | mf->code = ctx->s_frame.fmt->mbus_code; | |
1488 | mf->width = ff->f_width; | |
1489 | mf->height = ff->f_height; | |
1490 | mutex_unlock(&fimc->lock); | |
1491 | ||
1492 | return 0; | |
1493 | } | |
1494 | ||
1495 | static int fimc_subdev_set_fmt(struct v4l2_subdev *sd, | |
1496 | struct v4l2_subdev_fh *fh, | |
1497 | struct v4l2_subdev_format *fmt) | |
1498 | { | |
1499 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1500 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
1501 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
1502 | struct fimc_frame *ff; | |
1503 | struct fimc_fmt *ffmt; | |
1504 | ||
1505 | dbg("pad%d: code: 0x%x, %dx%d", | |
1506 | fmt->pad, mf->code, mf->width, mf->height); | |
1507 | ||
1508 | if (fmt->pad == FIMC_SD_PAD_SOURCE && | |
1509 | vb2_is_busy(&fimc->vid_cap.vbq)) | |
1510 | return -EBUSY; | |
1511 | ||
1512 | mutex_lock(&fimc->lock); | |
1513 | ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height, | |
1514 | &mf->code, NULL, fmt->pad); | |
1515 | mutex_unlock(&fimc->lock); | |
1516 | mf->colorspace = V4L2_COLORSPACE_JPEG; | |
1517 | ||
1518 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1519 | mf = v4l2_subdev_get_try_format(fh, fmt->pad); | |
1520 | *mf = fmt->format; | |
1521 | return 0; | |
1522 | } | |
dafb9c70 SN |
1523 | /* Update RGB Alpha control state and value range */ |
1524 | fimc_alpha_ctrl_update(ctx); | |
1525 | ||
14783d25 | 1526 | fimc_capture_mark_jpeg_xfer(ctx, ffmt->color); |
ee7160e5 | 1527 | |
237e0265 SN |
1528 | ff = fmt->pad == FIMC_SD_PAD_SINK ? |
1529 | &ctx->s_frame : &ctx->d_frame; | |
1530 | ||
1531 | mutex_lock(&fimc->lock); | |
1532 | set_frame_bounds(ff, mf->width, mf->height); | |
393a23fc | 1533 | fimc->vid_cap.mf = *mf; |
237e0265 SN |
1534 | ff->fmt = ffmt; |
1535 | ||
1536 | /* Reset the crop rectangle if required. */ | |
fed07f84 | 1537 | if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE))) |
237e0265 SN |
1538 | set_frame_crop(ff, 0, 0, mf->width, mf->height); |
1539 | ||
1540 | if (fmt->pad == FIMC_SD_PAD_SINK) | |
fed07f84 | 1541 | ctx->state &= ~FIMC_COMPOSE; |
237e0265 SN |
1542 | mutex_unlock(&fimc->lock); |
1543 | return 0; | |
1544 | } | |
1545 | ||
fed07f84 SN |
1546 | static int fimc_subdev_get_selection(struct v4l2_subdev *sd, |
1547 | struct v4l2_subdev_fh *fh, | |
1548 | struct v4l2_subdev_selection *sel) | |
237e0265 SN |
1549 | { |
1550 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1551 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
fed07f84 SN |
1552 | struct fimc_frame *f = &ctx->s_frame; |
1553 | struct v4l2_rect *r = &sel->r; | |
1554 | struct v4l2_rect *try_sel; | |
1555 | ||
1556 | if (sel->pad != FIMC_SD_PAD_SINK) | |
1557 | return -EINVAL; | |
1558 | ||
1559 | mutex_lock(&fimc->lock); | |
237e0265 | 1560 | |
fed07f84 | 1561 | switch (sel->target) { |
5689b288 | 1562 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: |
fed07f84 | 1563 | f = &ctx->d_frame; |
5689b288 | 1564 | case V4L2_SEL_TGT_CROP_BOUNDS: |
fed07f84 SN |
1565 | r->width = f->o_width; |
1566 | r->height = f->o_height; | |
1567 | r->left = 0; | |
1568 | r->top = 0; | |
1569 | mutex_unlock(&fimc->lock); | |
237e0265 | 1570 | return 0; |
fed07f84 | 1571 | |
5689b288 | 1572 | case V4L2_SEL_TGT_CROP: |
fed07f84 SN |
1573 | try_sel = v4l2_subdev_get_try_crop(fh, sel->pad); |
1574 | break; | |
5689b288 | 1575 | case V4L2_SEL_TGT_COMPOSE: |
fed07f84 SN |
1576 | try_sel = v4l2_subdev_get_try_compose(fh, sel->pad); |
1577 | f = &ctx->d_frame; | |
1578 | break; | |
1579 | default: | |
1580 | mutex_unlock(&fimc->lock); | |
1581 | return -EINVAL; | |
237e0265 | 1582 | } |
237e0265 | 1583 | |
fed07f84 SN |
1584 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
1585 | sel->r = *try_sel; | |
1586 | } else { | |
1587 | r->left = f->offs_h; | |
1588 | r->top = f->offs_v; | |
1589 | r->width = f->width; | |
1590 | r->height = f->height; | |
1591 | } | |
237e0265 | 1592 | |
fed07f84 SN |
1593 | dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d", |
1594 | sel->pad, r->left, r->top, r->width, r->height, | |
1595 | f->f_width, f->f_height); | |
237e0265 | 1596 | |
fed07f84 | 1597 | mutex_unlock(&fimc->lock); |
237e0265 SN |
1598 | return 0; |
1599 | } | |
1600 | ||
fed07f84 SN |
1601 | static int fimc_subdev_set_selection(struct v4l2_subdev *sd, |
1602 | struct v4l2_subdev_fh *fh, | |
1603 | struct v4l2_subdev_selection *sel) | |
237e0265 SN |
1604 | { |
1605 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1606 | struct fimc_ctx *ctx = fimc->vid_cap.ctx; | |
fed07f84 SN |
1607 | struct fimc_frame *f = &ctx->s_frame; |
1608 | struct v4l2_rect *r = &sel->r; | |
1609 | struct v4l2_rect *try_sel; | |
237e0265 SN |
1610 | unsigned long flags; |
1611 | ||
fed07f84 SN |
1612 | if (sel->pad != FIMC_SD_PAD_SINK) |
1613 | return -EINVAL; | |
237e0265 SN |
1614 | |
1615 | mutex_lock(&fimc->lock); | |
c1334823 | 1616 | fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP); |
237e0265 | 1617 | |
fed07f84 | 1618 | switch (sel->target) { |
5689b288 | 1619 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: |
fed07f84 | 1620 | f = &ctx->d_frame; |
5689b288 | 1621 | case V4L2_SEL_TGT_CROP_BOUNDS: |
fed07f84 SN |
1622 | r->width = f->o_width; |
1623 | r->height = f->o_height; | |
1624 | r->left = 0; | |
1625 | r->top = 0; | |
5be4fe63 | 1626 | mutex_unlock(&fimc->lock); |
237e0265 | 1627 | return 0; |
fed07f84 | 1628 | |
5689b288 | 1629 | case V4L2_SEL_TGT_CROP: |
fed07f84 SN |
1630 | try_sel = v4l2_subdev_get_try_crop(fh, sel->pad); |
1631 | break; | |
5689b288 | 1632 | case V4L2_SEL_TGT_COMPOSE: |
fed07f84 SN |
1633 | try_sel = v4l2_subdev_get_try_compose(fh, sel->pad); |
1634 | f = &ctx->d_frame; | |
1635 | break; | |
1636 | default: | |
1637 | mutex_unlock(&fimc->lock); | |
1638 | return -EINVAL; | |
237e0265 | 1639 | } |
237e0265 | 1640 | |
fed07f84 SN |
1641 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
1642 | *try_sel = sel->r; | |
1643 | } else { | |
1644 | spin_lock_irqsave(&fimc->slock, flags); | |
1645 | set_frame_crop(f, r->left, r->top, r->width, r->height); | |
1646 | set_bit(ST_CAPT_APPLY_CFG, &fimc->state); | |
1647 | spin_unlock_irqrestore(&fimc->slock, flags); | |
5689b288 | 1648 | if (sel->target == V4L2_SEL_TGT_COMPOSE) |
fed07f84 SN |
1649 | ctx->state |= FIMC_COMPOSE; |
1650 | } | |
237e0265 | 1651 | |
fed07f84 | 1652 | dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top, |
237e0265 SN |
1653 | r->width, r->height); |
1654 | ||
1655 | mutex_unlock(&fimc->lock); | |
1656 | return 0; | |
1657 | } | |
1658 | ||
1659 | static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = { | |
1660 | .enum_mbus_code = fimc_subdev_enum_mbus_code, | |
fed07f84 SN |
1661 | .get_selection = fimc_subdev_get_selection, |
1662 | .set_selection = fimc_subdev_set_selection, | |
237e0265 SN |
1663 | .get_fmt = fimc_subdev_get_fmt, |
1664 | .set_fmt = fimc_subdev_set_fmt, | |
237e0265 SN |
1665 | }; |
1666 | ||
1667 | static struct v4l2_subdev_ops fimc_subdev_ops = { | |
1668 | .pad = &fimc_subdev_pad_ops, | |
1669 | }; | |
1670 | ||
237e0265 SN |
1671 | /* Set default format at the sensor and host interface */ |
1672 | static int fimc_capture_set_default_format(struct fimc_dev *fimc) | |
1673 | { | |
1674 | struct v4l2_format fmt = { | |
1675 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, | |
1676 | .fmt.pix_mp = { | |
1677 | .width = 640, | |
1678 | .height = 480, | |
1679 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
1680 | .field = V4L2_FIELD_NONE, | |
1681 | .colorspace = V4L2_COLORSPACE_JPEG, | |
1682 | }, | |
1683 | }; | |
1684 | ||
1685 | return fimc_capture_set_format(fimc, &fmt); | |
1686 | } | |
1687 | ||
ef7af59b | 1688 | /* fimc->lock must be already initialized */ |
693f5c40 | 1689 | static int fimc_register_capture_device(struct fimc_dev *fimc, |
30c9939d | 1690 | struct v4l2_device *v4l2_dev) |
5f3cc447 | 1691 | { |
31d34d9b | 1692 | struct video_device *vfd = &fimc->vid_cap.vfd; |
5f3cc447 SN |
1693 | struct fimc_vid_cap *vid_cap; |
1694 | struct fimc_ctx *ctx; | |
2dab38e2 | 1695 | struct vb2_queue *q; |
30c9939d | 1696 | int ret = -ENOMEM; |
5f3cc447 | 1697 | |
26ee7f47 | 1698 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
5f3cc447 SN |
1699 | if (!ctx) |
1700 | return -ENOMEM; | |
1701 | ||
1702 | ctx->fimc_dev = fimc; | |
3d112d9a SN |
1703 | ctx->in_path = FIMC_IO_CAMERA; |
1704 | ctx->out_path = FIMC_IO_DMA; | |
5f3cc447 | 1705 | ctx->state = FIMC_CTX_CAP; |
237e0265 | 1706 | ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0); |
693f5c40 | 1707 | ctx->d_frame.fmt = ctx->s_frame.fmt; |
5f3cc447 | 1708 | |
31d34d9b | 1709 | memset(vfd, 0, sizeof(*vfd)); |
693f5c40 | 1710 | snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id); |
5f3cc447 SN |
1711 | |
1712 | vfd->fops = &fimc_capture_fops; | |
1713 | vfd->ioctl_ops = &fimc_capture_ioctl_ops; | |
574e1717 | 1714 | vfd->v4l2_dev = v4l2_dev; |
5f3cc447 | 1715 | vfd->minor = -1; |
31d34d9b | 1716 | vfd->release = video_device_release_empty; |
8293ebfc | 1717 | vfd->lock = &fimc->lock; |
c2d430af | 1718 | |
5f3cc447 SN |
1719 | video_set_drvdata(vfd, fimc); |
1720 | ||
1721 | vid_cap = &fimc->vid_cap; | |
5f3cc447 SN |
1722 | vid_cap->active_buf_cnt = 0; |
1723 | vid_cap->reqbufs_count = 0; | |
1724 | vid_cap->refcnt = 0; | |
5f3cc447 SN |
1725 | |
1726 | INIT_LIST_HEAD(&vid_cap->pending_buf_q); | |
1727 | INIT_LIST_HEAD(&vid_cap->active_buf_q); | |
5f3cc447 SN |
1728 | vid_cap->ctx = ctx; |
1729 | ||
2dab38e2 SN |
1730 | q = &fimc->vid_cap.vbq; |
1731 | memset(q, 0, sizeof(*q)); | |
ef7af59b | 1732 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; |
2dab38e2 SN |
1733 | q->io_modes = VB2_MMAP | VB2_USERPTR; |
1734 | q->drv_priv = fimc->vid_cap.ctx; | |
1735 | q->ops = &fimc_capture_qops; | |
1736 | q->mem_ops = &vb2_dma_contig_memops; | |
1737 | q->buf_struct_size = sizeof(struct fimc_vid_buffer); | |
1738 | ||
41fd087f SN |
1739 | ret = vb2_queue_init(q); |
1740 | if (ret) | |
1741 | goto err_ent; | |
5f3cc447 | 1742 | |
693f5c40 SN |
1743 | vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK; |
1744 | ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0); | |
574e1717 SN |
1745 | if (ret) |
1746 | goto err_ent; | |
693f5c40 SN |
1747 | |
1748 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1); | |
237e0265 | 1749 | if (ret) |
693f5c40 SN |
1750 | goto err_vd; |
1751 | ||
1752 | v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n", | |
1753 | vfd->name, video_device_node_name(vfd)); | |
574e1717 | 1754 | |
9448ab7d | 1755 | vfd->ctrl_handler = &ctx->ctrls.handler; |
5f3cc447 SN |
1756 | return 0; |
1757 | ||
693f5c40 | 1758 | err_vd: |
237e0265 | 1759 | media_entity_cleanup(&vfd->entity); |
574e1717 | 1760 | err_ent: |
cfd77310 | 1761 | kfree(ctx); |
5f3cc447 SN |
1762 | return ret; |
1763 | } | |
1764 | ||
693f5c40 | 1765 | static int fimc_capture_subdev_registered(struct v4l2_subdev *sd) |
5f3cc447 | 1766 | { |
693f5c40 SN |
1767 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); |
1768 | int ret; | |
5f3cc447 | 1769 | |
bbc5296f SN |
1770 | if (fimc == NULL) |
1771 | return -ENXIO; | |
1772 | ||
693f5c40 SN |
1773 | ret = fimc_register_m2m_device(fimc, sd->v4l2_dev); |
1774 | if (ret) | |
1775 | return ret; | |
1776 | ||
1777 | ret = fimc_register_capture_device(fimc, sd->v4l2_dev); | |
1778 | if (ret) | |
1779 | fimc_unregister_m2m_device(fimc); | |
1780 | ||
1781 | return ret; | |
1782 | } | |
1783 | ||
1784 | static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd) | |
1785 | { | |
1786 | struct fimc_dev *fimc = v4l2_get_subdevdata(sd); | |
1787 | ||
1788 | if (fimc == NULL) | |
1789 | return; | |
1790 | ||
1791 | fimc_unregister_m2m_device(fimc); | |
1792 | ||
31d34d9b SN |
1793 | if (video_is_registered(&fimc->vid_cap.vfd)) { |
1794 | video_unregister_device(&fimc->vid_cap.vfd); | |
1795 | media_entity_cleanup(&fimc->vid_cap.vfd.entity); | |
574e1717 SN |
1796 | } |
1797 | kfree(fimc->vid_cap.ctx); | |
96a85742 | 1798 | fimc->vid_cap.ctx = NULL; |
5f3cc447 | 1799 | } |
693f5c40 SN |
1800 | |
1801 | static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = { | |
1802 | .registered = fimc_capture_subdev_registered, | |
1803 | .unregistered = fimc_capture_subdev_unregistered, | |
1804 | }; | |
1805 | ||
1806 | int fimc_initialize_capture_subdev(struct fimc_dev *fimc) | |
1807 | { | |
1808 | struct v4l2_subdev *sd = &fimc->vid_cap.subdev; | |
1809 | int ret; | |
1810 | ||
1811 | v4l2_subdev_init(sd, &fimc_subdev_ops); | |
1812 | sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE; | |
1813 | snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id); | |
1814 | ||
1815 | fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK; | |
1816 | fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; | |
1817 | ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM, | |
1818 | fimc->vid_cap.sd_pads, 0); | |
1819 | if (ret) | |
1820 | return ret; | |
1821 | ||
1822 | sd->entity.ops = &fimc_sd_media_ops; | |
1823 | sd->internal_ops = &fimc_capture_sd_internal_ops; | |
1824 | v4l2_set_subdevdata(sd, fimc); | |
1825 | return 0; | |
1826 | } | |
1827 | ||
1828 | void fimc_unregister_capture_subdev(struct fimc_dev *fimc) | |
1829 | { | |
1830 | struct v4l2_subdev *sd = &fimc->vid_cap.subdev; | |
1831 | ||
1832 | v4l2_device_unregister_subdev(sd); | |
1833 | media_entity_cleanup(&sd->entity); | |
1834 | v4l2_set_subdevdata(sd, NULL); | |
1835 | } |