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195ebc43 JW |
1 | /* |
2 | * Copyright (c) 2011 Atmel Corporation | |
3 | * Josh Wu, <josh.wu@atmel.com> | |
4 | * | |
5 | * Based on previous work by Lars Haring, <lars.haring@atmel.com> | |
6 | * and Sedji Gaouaou | |
7 | * Based on the bttv driver for Bt848 with respective copyright holders | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/completion.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/fs.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/slab.h> | |
24 | ||
25 | #include <media/atmel-isi.h> | |
26 | #include <media/soc_camera.h> | |
27 | #include <media/soc_mediabus.h> | |
28 | #include <media/videobuf2-dma-contig.h> | |
29 | ||
30 | #define MAX_BUFFER_NUM 32 | |
31 | #define MAX_SUPPORT_WIDTH 2048 | |
32 | #define MAX_SUPPORT_HEIGHT 2048 | |
33 | #define VID_LIMIT_BYTES (16 * 1024 * 1024) | |
34 | #define MIN_FRAME_RATE 15 | |
35 | #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE) | |
36 | ||
195ebc43 JW |
37 | /* Frame buffer descriptor */ |
38 | struct fbd { | |
39 | /* Physical address of the frame buffer */ | |
40 | u32 fb_address; | |
41 | /* DMA Control Register(only in HISI2) */ | |
42 | u32 dma_ctrl; | |
43 | /* Physical address of the next fbd */ | |
44 | u32 next_fbd_address; | |
45 | }; | |
46 | ||
47 | static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl) | |
48 | { | |
49 | fb_desc->dma_ctrl = ctrl; | |
50 | } | |
51 | ||
52 | struct isi_dma_desc { | |
53 | struct list_head list; | |
54 | struct fbd *p_fbd; | |
55 | u32 fbd_phys; | |
56 | }; | |
57 | ||
58 | /* Frame buffer data */ | |
59 | struct frame_buffer { | |
60 | struct vb2_buffer vb; | |
61 | struct isi_dma_desc *p_dma_desc; | |
62 | struct list_head list; | |
63 | }; | |
64 | ||
65 | struct atmel_isi { | |
66 | /* Protects the access of variables shared with the ISR */ | |
67 | spinlock_t lock; | |
68 | void __iomem *regs; | |
69 | ||
70 | int sequence; | |
195ebc43 JW |
71 | |
72 | struct vb2_alloc_ctx *alloc_ctx; | |
73 | ||
74 | /* Allocate descriptors for dma buffer use */ | |
75 | struct fbd *p_fb_descriptors; | |
76 | u32 fb_descriptors_phys; | |
77 | struct list_head dma_desc_head; | |
78 | struct isi_dma_desc dma_desc[MAX_BUFFER_NUM]; | |
79 | ||
80 | struct completion complete; | |
d8ec0961 | 81 | /* ISI peripherial clock */ |
195ebc43 | 82 | struct clk *pclk; |
d8ec0961 JW |
83 | /* ISI_MCK, feed to camera sensor to generate pixel clock */ |
84 | struct clk *mck; | |
195ebc43 JW |
85 | unsigned int irq; |
86 | ||
87 | struct isi_platform_data *pdata; | |
a4e9f10b | 88 | u16 width_flags; /* max 12 bits */ |
195ebc43 JW |
89 | |
90 | struct list_head video_buffer_list; | |
91 | struct frame_buffer *active; | |
92 | ||
195ebc43 JW |
93 | struct soc_camera_host soc_host; |
94 | }; | |
95 | ||
96 | static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val) | |
97 | { | |
98 | writel(val, isi->regs + reg); | |
99 | } | |
100 | static u32 isi_readl(struct atmel_isi *isi, u32 reg) | |
101 | { | |
102 | return readl(isi->regs + reg); | |
103 | } | |
104 | ||
105 | static int configure_geometry(struct atmel_isi *isi, u32 width, | |
106 | u32 height, enum v4l2_mbus_pixelcode code) | |
107 | { | |
108 | u32 cfg2, cr; | |
109 | ||
110 | switch (code) { | |
111 | /* YUV, including grey */ | |
112 | case V4L2_MBUS_FMT_Y8_1X8: | |
113 | cr = ISI_CFG2_GRAYSCALE; | |
114 | break; | |
135983e8 | 115 | case V4L2_MBUS_FMT_VYUY8_2X8: |
195ebc43 JW |
116 | cr = ISI_CFG2_YCC_SWAP_MODE_3; |
117 | break; | |
135983e8 | 118 | case V4L2_MBUS_FMT_UYVY8_2X8: |
195ebc43 JW |
119 | cr = ISI_CFG2_YCC_SWAP_MODE_2; |
120 | break; | |
135983e8 | 121 | case V4L2_MBUS_FMT_YVYU8_2X8: |
195ebc43 JW |
122 | cr = ISI_CFG2_YCC_SWAP_MODE_1; |
123 | break; | |
135983e8 | 124 | case V4L2_MBUS_FMT_YUYV8_2X8: |
195ebc43 JW |
125 | cr = ISI_CFG2_YCC_SWAP_DEFAULT; |
126 | break; | |
127 | /* RGB, TODO */ | |
128 | default: | |
129 | return -EINVAL; | |
130 | } | |
131 | ||
132 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
133 | ||
134 | cfg2 = isi_readl(isi, ISI_CFG2); | |
bd6f2745 JW |
135 | /* Set YCC swap mode */ |
136 | cfg2 &= ~ISI_CFG2_YCC_SWAP_MODE_MASK; | |
195ebc43 JW |
137 | cfg2 |= cr; |
138 | /* Set width */ | |
139 | cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK); | |
140 | cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & | |
141 | ISI_CFG2_IM_HSIZE_MASK; | |
142 | /* Set height */ | |
143 | cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK); | |
144 | cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) | |
145 | & ISI_CFG2_IM_VSIZE_MASK; | |
146 | isi_writel(isi, ISI_CFG2, cfg2); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi) | |
152 | { | |
153 | if (isi->active) { | |
154 | struct vb2_buffer *vb = &isi->active->vb; | |
155 | struct frame_buffer *buf = isi->active; | |
156 | ||
157 | list_del_init(&buf->list); | |
8e6057b5 | 158 | v4l2_get_timestamp(&vb->v4l2_buf.timestamp); |
195ebc43 JW |
159 | vb->v4l2_buf.sequence = isi->sequence++; |
160 | vb2_buffer_done(vb, VB2_BUF_STATE_DONE); | |
161 | } | |
162 | ||
163 | if (list_empty(&isi->video_buffer_list)) { | |
164 | isi->active = NULL; | |
165 | } else { | |
166 | /* start next dma frame. */ | |
167 | isi->active = list_entry(isi->video_buffer_list.next, | |
168 | struct frame_buffer, list); | |
169 | isi_writel(isi, ISI_DMA_C_DSCR, | |
170 | isi->active->p_dma_desc->fbd_phys); | |
171 | isi_writel(isi, ISI_DMA_C_CTRL, | |
172 | ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | |
173 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | |
174 | } | |
175 | return IRQ_HANDLED; | |
176 | } | |
177 | ||
178 | /* ISI interrupt service routine */ | |
179 | static irqreturn_t isi_interrupt(int irq, void *dev_id) | |
180 | { | |
181 | struct atmel_isi *isi = dev_id; | |
182 | u32 status, mask, pending; | |
183 | irqreturn_t ret = IRQ_NONE; | |
184 | ||
185 | spin_lock(&isi->lock); | |
186 | ||
187 | status = isi_readl(isi, ISI_STATUS); | |
188 | mask = isi_readl(isi, ISI_INTMASK); | |
189 | pending = status & mask; | |
190 | ||
191 | if (pending & ISI_CTRL_SRST) { | |
192 | complete(&isi->complete); | |
193 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST); | |
194 | ret = IRQ_HANDLED; | |
195 | } else if (pending & ISI_CTRL_DIS) { | |
196 | complete(&isi->complete); | |
197 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS); | |
198 | ret = IRQ_HANDLED; | |
199 | } else { | |
195ebc43 JW |
200 | if (likely(pending & ISI_SR_CXFR_DONE)) |
201 | ret = atmel_isi_handle_streaming(isi); | |
202 | } | |
203 | ||
204 | spin_unlock(&isi->lock); | |
205 | return ret; | |
206 | } | |
207 | ||
208 | #define WAIT_ISI_RESET 1 | |
209 | #define WAIT_ISI_DISABLE 0 | |
210 | static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset) | |
211 | { | |
212 | unsigned long timeout; | |
213 | /* | |
214 | * The reset or disable will only succeed if we have a | |
215 | * pixel clock from the camera. | |
216 | */ | |
217 | init_completion(&isi->complete); | |
218 | ||
219 | if (wait_reset) { | |
220 | isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST); | |
221 | isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST); | |
222 | } else { | |
223 | isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS); | |
224 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
225 | } | |
226 | ||
227 | timeout = wait_for_completion_timeout(&isi->complete, | |
228 | msecs_to_jiffies(100)); | |
229 | if (timeout == 0) | |
230 | return -ETIMEDOUT; | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | /* ------------------------------------------------------------------ | |
236 | Videobuf operations | |
237 | ------------------------------------------------------------------*/ | |
fc714e70 GL |
238 | static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, |
239 | unsigned int *nbuffers, unsigned int *nplanes, | |
240 | unsigned int sizes[], void *alloc_ctxs[]) | |
195ebc43 JW |
241 | { |
242 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 243 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
244 | struct atmel_isi *isi = ici->priv; |
245 | unsigned long size; | |
195ebc43 | 246 | |
2b61d46e | 247 | size = icd->sizeimage; |
195ebc43 JW |
248 | |
249 | if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM) | |
250 | *nbuffers = MAX_BUFFER_NUM; | |
251 | ||
252 | if (size * *nbuffers > VID_LIMIT_BYTES) | |
253 | *nbuffers = VID_LIMIT_BYTES / size; | |
254 | ||
255 | *nplanes = 1; | |
256 | sizes[0] = size; | |
257 | alloc_ctxs[0] = isi->alloc_ctx; | |
258 | ||
259 | isi->sequence = 0; | |
260 | isi->active = NULL; | |
261 | ||
7dfff953 | 262 | dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__, |
195ebc43 JW |
263 | *nbuffers, size); |
264 | ||
265 | return 0; | |
266 | } | |
267 | ||
268 | static int buffer_init(struct vb2_buffer *vb) | |
269 | { | |
270 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
271 | ||
272 | buf->p_dma_desc = NULL; | |
273 | INIT_LIST_HEAD(&buf->list); | |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
278 | static int buffer_prepare(struct vb2_buffer *vb) | |
279 | { | |
280 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
281 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
7dfff953 | 282 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
283 | struct atmel_isi *isi = ici->priv; |
284 | unsigned long size; | |
285 | struct isi_dma_desc *desc; | |
195ebc43 | 286 | |
2b61d46e | 287 | size = icd->sizeimage; |
195ebc43 JW |
288 | |
289 | if (vb2_plane_size(vb, 0) < size) { | |
7dfff953 | 290 | dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n", |
195ebc43 JW |
291 | __func__, vb2_plane_size(vb, 0), size); |
292 | return -EINVAL; | |
293 | } | |
294 | ||
295 | vb2_set_plane_payload(&buf->vb, 0, size); | |
296 | ||
297 | if (!buf->p_dma_desc) { | |
298 | if (list_empty(&isi->dma_desc_head)) { | |
7dfff953 | 299 | dev_err(icd->parent, "Not enough dma descriptors.\n"); |
195ebc43 JW |
300 | return -EINVAL; |
301 | } else { | |
302 | /* Get an available descriptor */ | |
303 | desc = list_entry(isi->dma_desc_head.next, | |
304 | struct isi_dma_desc, list); | |
305 | /* Delete the descriptor since now it is used */ | |
306 | list_del_init(&desc->list); | |
307 | ||
308 | /* Initialize the dma descriptor */ | |
309 | desc->p_fbd->fb_address = | |
ba7fcb0c | 310 | vb2_dma_contig_plane_dma_addr(vb, 0); |
195ebc43 JW |
311 | desc->p_fbd->next_fbd_address = 0; |
312 | set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB); | |
313 | ||
314 | buf->p_dma_desc = desc; | |
315 | } | |
316 | } | |
317 | return 0; | |
318 | } | |
319 | ||
320 | static void buffer_cleanup(struct vb2_buffer *vb) | |
321 | { | |
322 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
7dfff953 | 323 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
324 | struct atmel_isi *isi = ici->priv; |
325 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
326 | ||
327 | /* This descriptor is available now and we add to head list */ | |
328 | if (buf->p_dma_desc) | |
329 | list_add(&buf->p_dma_desc->list, &isi->dma_desc_head); | |
330 | } | |
331 | ||
332 | static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer) | |
333 | { | |
334 | u32 ctrl, cfg1; | |
335 | ||
336 | cfg1 = isi_readl(isi, ISI_CFG1); | |
337 | /* Enable irq: cxfr for the codec path, pxfr for the preview path */ | |
338 | isi_writel(isi, ISI_INTEN, | |
339 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | |
340 | ||
341 | /* Check if already in a frame */ | |
342 | if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) { | |
f7f6ce2d | 343 | dev_err(isi->soc_host.icd->parent, "Already in frame handling.\n"); |
195ebc43 JW |
344 | return; |
345 | } | |
346 | ||
347 | isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys); | |
348 | isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | |
349 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | |
350 | ||
bd6f2745 | 351 | cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; |
195ebc43 JW |
352 | /* Enable linked list */ |
353 | cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR; | |
354 | ||
355 | /* Enable codec path and ISI */ | |
356 | ctrl = ISI_CTRL_CDC | ISI_CTRL_EN; | |
357 | isi_writel(isi, ISI_CTRL, ctrl); | |
358 | isi_writel(isi, ISI_CFG1, cfg1); | |
359 | } | |
360 | ||
361 | static void buffer_queue(struct vb2_buffer *vb) | |
362 | { | |
363 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
7dfff953 | 364 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
365 | struct atmel_isi *isi = ici->priv; |
366 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
367 | unsigned long flags = 0; | |
368 | ||
369 | spin_lock_irqsave(&isi->lock, flags); | |
370 | list_add_tail(&buf->list, &isi->video_buffer_list); | |
371 | ||
372 | if (isi->active == NULL) { | |
373 | isi->active = buf; | |
bd323e28 MS |
374 | if (vb2_is_streaming(vb->vb2_queue)) |
375 | start_dma(isi, buf); | |
195ebc43 JW |
376 | } |
377 | spin_unlock_irqrestore(&isi->lock, flags); | |
378 | } | |
379 | ||
bd323e28 | 380 | static int start_streaming(struct vb2_queue *vq, unsigned int count) |
195ebc43 JW |
381 | { |
382 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 383 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 | 384 | struct atmel_isi *isi = ici->priv; |
195ebc43 | 385 | u32 sr = 0; |
c7686264 LP |
386 | int ret; |
387 | ||
388 | /* Reset ISI */ | |
389 | ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET); | |
390 | if (ret < 0) { | |
391 | dev_err(icd->parent, "Reset ISI timed out\n"); | |
392 | return ret; | |
393 | } | |
394 | /* Disable all interrupts */ | |
395 | isi_writel(isi, ISI_INTDIS, ~0UL); | |
195ebc43 JW |
396 | |
397 | spin_lock_irq(&isi->lock); | |
1426f61b | 398 | /* Clear any pending interrupt */ |
195ebc43 | 399 | sr = isi_readl(isi, ISI_STATUS); |
195ebc43 | 400 | |
bd323e28 MS |
401 | if (count) |
402 | start_dma(isi, isi->active); | |
195ebc43 JW |
403 | spin_unlock_irq(&isi->lock); |
404 | ||
405 | return 0; | |
406 | } | |
407 | ||
408 | /* abort streaming and wait for last buffer */ | |
e37559b2 | 409 | static void stop_streaming(struct vb2_queue *vq) |
195ebc43 JW |
410 | { |
411 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 412 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
413 | struct atmel_isi *isi = ici->priv; |
414 | struct frame_buffer *buf, *node; | |
415 | int ret = 0; | |
416 | unsigned long timeout; | |
417 | ||
418 | spin_lock_irq(&isi->lock); | |
419 | isi->active = NULL; | |
420 | /* Release all active buffers */ | |
421 | list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) { | |
422 | list_del_init(&buf->list); | |
423 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | |
424 | } | |
425 | spin_unlock_irq(&isi->lock); | |
426 | ||
427 | timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ; | |
428 | /* Wait until the end of the current frame. */ | |
429 | while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) && | |
430 | time_before(jiffies, timeout)) | |
431 | msleep(1); | |
432 | ||
433 | if (time_after(jiffies, timeout)) { | |
7dfff953 | 434 | dev_err(icd->parent, |
195ebc43 | 435 | "Timeout waiting for finishing codec request\n"); |
e37559b2 | 436 | return; |
195ebc43 JW |
437 | } |
438 | ||
439 | /* Disable interrupts */ | |
440 | isi_writel(isi, ISI_INTDIS, | |
441 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | |
442 | ||
443 | /* Disable ISI and wait for it is done */ | |
444 | ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE); | |
445 | if (ret < 0) | |
7dfff953 | 446 | dev_err(icd->parent, "Disable ISI timed out\n"); |
195ebc43 JW |
447 | } |
448 | ||
449 | static struct vb2_ops isi_video_qops = { | |
450 | .queue_setup = queue_setup, | |
451 | .buf_init = buffer_init, | |
452 | .buf_prepare = buffer_prepare, | |
453 | .buf_cleanup = buffer_cleanup, | |
454 | .buf_queue = buffer_queue, | |
455 | .start_streaming = start_streaming, | |
456 | .stop_streaming = stop_streaming, | |
457 | .wait_prepare = soc_camera_unlock, | |
458 | .wait_finish = soc_camera_lock, | |
459 | }; | |
460 | ||
461 | /* ------------------------------------------------------------------ | |
462 | SOC camera operations for the device | |
463 | ------------------------------------------------------------------*/ | |
464 | static int isi_camera_init_videobuf(struct vb2_queue *q, | |
465 | struct soc_camera_device *icd) | |
466 | { | |
467 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
468 | q->io_modes = VB2_MMAP; | |
469 | q->drv_priv = icd; | |
470 | q->buf_struct_size = sizeof(struct frame_buffer); | |
471 | q->ops = &isi_video_qops; | |
472 | q->mem_ops = &vb2_dma_contig_memops; | |
ade48681 | 473 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
195ebc43 JW |
474 | |
475 | return vb2_queue_init(q); | |
476 | } | |
477 | ||
478 | static int isi_camera_set_fmt(struct soc_camera_device *icd, | |
479 | struct v4l2_format *f) | |
480 | { | |
7dfff953 | 481 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
482 | struct atmel_isi *isi = ici->priv; |
483 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
484 | const struct soc_camera_format_xlate *xlate; | |
485 | struct v4l2_pix_format *pix = &f->fmt.pix; | |
486 | struct v4l2_mbus_framefmt mf; | |
487 | int ret; | |
488 | ||
489 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | |
490 | if (!xlate) { | |
7dfff953 | 491 | dev_warn(icd->parent, "Format %x not found\n", |
195ebc43 JW |
492 | pix->pixelformat); |
493 | return -EINVAL; | |
494 | } | |
495 | ||
7dfff953 | 496 | dev_dbg(icd->parent, "Plan to set format %dx%d\n", |
195ebc43 JW |
497 | pix->width, pix->height); |
498 | ||
499 | mf.width = pix->width; | |
500 | mf.height = pix->height; | |
501 | mf.field = pix->field; | |
502 | mf.colorspace = pix->colorspace; | |
503 | mf.code = xlate->code; | |
504 | ||
505 | ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); | |
506 | if (ret < 0) | |
507 | return ret; | |
508 | ||
509 | if (mf.code != xlate->code) | |
510 | return -EINVAL; | |
511 | ||
512 | ret = configure_geometry(isi, pix->width, pix->height, xlate->code); | |
513 | if (ret < 0) | |
514 | return ret; | |
515 | ||
516 | pix->width = mf.width; | |
517 | pix->height = mf.height; | |
518 | pix->field = mf.field; | |
519 | pix->colorspace = mf.colorspace; | |
520 | icd->current_fmt = xlate; | |
521 | ||
7dfff953 | 522 | dev_dbg(icd->parent, "Finally set format %dx%d\n", |
195ebc43 JW |
523 | pix->width, pix->height); |
524 | ||
525 | return ret; | |
526 | } | |
527 | ||
528 | static int isi_camera_try_fmt(struct soc_camera_device *icd, | |
529 | struct v4l2_format *f) | |
530 | { | |
531 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
532 | const struct soc_camera_format_xlate *xlate; | |
533 | struct v4l2_pix_format *pix = &f->fmt.pix; | |
534 | struct v4l2_mbus_framefmt mf; | |
535 | u32 pixfmt = pix->pixelformat; | |
536 | int ret; | |
537 | ||
538 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | |
539 | if (pixfmt && !xlate) { | |
7dfff953 | 540 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
195ebc43 JW |
541 | return -EINVAL; |
542 | } | |
543 | ||
544 | /* limit to Atmel ISI hardware capabilities */ | |
545 | if (pix->height > MAX_SUPPORT_HEIGHT) | |
546 | pix->height = MAX_SUPPORT_HEIGHT; | |
547 | if (pix->width > MAX_SUPPORT_WIDTH) | |
548 | pix->width = MAX_SUPPORT_WIDTH; | |
549 | ||
550 | /* limit to sensor capabilities */ | |
551 | mf.width = pix->width; | |
552 | mf.height = pix->height; | |
553 | mf.field = pix->field; | |
554 | mf.colorspace = pix->colorspace; | |
555 | mf.code = xlate->code; | |
556 | ||
557 | ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); | |
558 | if (ret < 0) | |
559 | return ret; | |
560 | ||
561 | pix->width = mf.width; | |
562 | pix->height = mf.height; | |
563 | pix->colorspace = mf.colorspace; | |
564 | ||
565 | switch (mf.field) { | |
566 | case V4L2_FIELD_ANY: | |
567 | pix->field = V4L2_FIELD_NONE; | |
568 | break; | |
569 | case V4L2_FIELD_NONE: | |
570 | break; | |
571 | default: | |
7dfff953 | 572 | dev_err(icd->parent, "Field type %d unsupported.\n", |
195ebc43 JW |
573 | mf.field); |
574 | ret = -EINVAL; | |
575 | } | |
576 | ||
577 | return ret; | |
578 | } | |
579 | ||
580 | static const struct soc_mbus_pixelfmt isi_camera_formats[] = { | |
581 | { | |
582 | .fourcc = V4L2_PIX_FMT_YUYV, | |
583 | .name = "Packed YUV422 16 bit", | |
584 | .bits_per_sample = 8, | |
585 | .packing = SOC_MBUS_PACKING_2X8_PADHI, | |
586 | .order = SOC_MBUS_ORDER_LE, | |
ad3b81fa | 587 | .layout = SOC_MBUS_LAYOUT_PACKED, |
195ebc43 JW |
588 | }, |
589 | }; | |
590 | ||
591 | /* This will be corrected as we get more formats */ | |
592 | static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt) | |
593 | { | |
594 | return fmt->packing == SOC_MBUS_PACKING_NONE || | |
595 | (fmt->bits_per_sample == 8 && | |
596 | fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || | |
597 | (fmt->bits_per_sample > 8 && | |
598 | fmt->packing == SOC_MBUS_PACKING_EXTEND16); | |
599 | } | |
600 | ||
a4e9f10b GL |
601 | #define ISI_BUS_PARAM (V4L2_MBUS_MASTER | \ |
602 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \ | |
603 | V4L2_MBUS_HSYNC_ACTIVE_LOW | \ | |
604 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | \ | |
605 | V4L2_MBUS_VSYNC_ACTIVE_LOW | \ | |
606 | V4L2_MBUS_PCLK_SAMPLE_RISING | \ | |
607 | V4L2_MBUS_PCLK_SAMPLE_FALLING | \ | |
608 | V4L2_MBUS_DATA_ACTIVE_HIGH) | |
195ebc43 JW |
609 | |
610 | static int isi_camera_try_bus_param(struct soc_camera_device *icd, | |
611 | unsigned char buswidth) | |
612 | { | |
a4e9f10b | 613 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
7dfff953 | 614 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 | 615 | struct atmel_isi *isi = ici->priv; |
a4e9f10b GL |
616 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; |
617 | unsigned long common_flags; | |
195ebc43 JW |
618 | int ret; |
619 | ||
a4e9f10b GL |
620 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); |
621 | if (!ret) { | |
622 | common_flags = soc_mbus_config_compatible(&cfg, | |
623 | ISI_BUS_PARAM); | |
624 | if (!common_flags) { | |
625 | dev_warn(icd->parent, | |
626 | "Flags incompatible: camera 0x%x, host 0x%x\n", | |
627 | cfg.flags, ISI_BUS_PARAM); | |
628 | return -EINVAL; | |
629 | } | |
630 | } else if (ret != -ENOIOCTLCMD) { | |
631 | return ret; | |
632 | } | |
633 | ||
634 | if ((1 << (buswidth - 1)) & isi->width_flags) | |
635 | return 0; | |
636 | return -EINVAL; | |
195ebc43 JW |
637 | } |
638 | ||
639 | ||
640 | static int isi_camera_get_formats(struct soc_camera_device *icd, | |
641 | unsigned int idx, | |
642 | struct soc_camera_format_xlate *xlate) | |
643 | { | |
644 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
645 | int formats = 0, ret; | |
646 | /* sensor format */ | |
647 | enum v4l2_mbus_pixelcode code; | |
648 | /* soc camera host format */ | |
649 | const struct soc_mbus_pixelfmt *fmt; | |
650 | ||
651 | ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); | |
652 | if (ret < 0) | |
653 | /* No more formats */ | |
654 | return 0; | |
655 | ||
656 | fmt = soc_mbus_get_fmtdesc(code); | |
657 | if (!fmt) { | |
7dfff953 | 658 | dev_err(icd->parent, |
195ebc43 JW |
659 | "Invalid format code #%u: %d\n", idx, code); |
660 | return 0; | |
661 | } | |
662 | ||
663 | /* This also checks support for the requested bits-per-sample */ | |
664 | ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample); | |
665 | if (ret < 0) { | |
7dfff953 | 666 | dev_err(icd->parent, |
195ebc43 JW |
667 | "Fail to try the bus parameters.\n"); |
668 | return 0; | |
669 | } | |
670 | ||
671 | switch (code) { | |
672 | case V4L2_MBUS_FMT_UYVY8_2X8: | |
673 | case V4L2_MBUS_FMT_VYUY8_2X8: | |
674 | case V4L2_MBUS_FMT_YUYV8_2X8: | |
675 | case V4L2_MBUS_FMT_YVYU8_2X8: | |
676 | formats++; | |
677 | if (xlate) { | |
678 | xlate->host_fmt = &isi_camera_formats[0]; | |
679 | xlate->code = code; | |
680 | xlate++; | |
7dfff953 | 681 | dev_dbg(icd->parent, "Providing format %s using code %d\n", |
195ebc43 JW |
682 | isi_camera_formats[0].name, code); |
683 | } | |
684 | break; | |
685 | default: | |
686 | if (!isi_camera_packing_supported(fmt)) | |
687 | return 0; | |
688 | if (xlate) | |
7dfff953 | 689 | dev_dbg(icd->parent, |
195ebc43 JW |
690 | "Providing format %s in pass-through mode\n", |
691 | fmt->name); | |
692 | } | |
693 | ||
694 | /* Generic pass-through */ | |
695 | formats++; | |
696 | if (xlate) { | |
697 | xlate->host_fmt = fmt; | |
698 | xlate->code = code; | |
699 | xlate++; | |
700 | } | |
701 | ||
702 | return formats; | |
703 | } | |
704 | ||
195ebc43 JW |
705 | static int isi_camera_add_device(struct soc_camera_device *icd) |
706 | { | |
ffebad79 GL |
707 | dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n", |
708 | icd->devnum); | |
709 | ||
710 | return 0; | |
711 | } | |
712 | ||
713 | static void isi_camera_remove_device(struct soc_camera_device *icd) | |
714 | { | |
715 | dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n", | |
716 | icd->devnum); | |
717 | } | |
718 | ||
719 | /* Called with .host_lock held */ | |
720 | static int isi_camera_clock_start(struct soc_camera_host *ici) | |
721 | { | |
195ebc43 JW |
722 | struct atmel_isi *isi = ici->priv; |
723 | int ret; | |
724 | ||
c01d568e | 725 | ret = clk_prepare_enable(isi->pclk); |
195ebc43 JW |
726 | if (ret) |
727 | return ret; | |
728 | ||
f389e89c LP |
729 | if (!IS_ERR(isi->mck)) { |
730 | ret = clk_prepare_enable(isi->mck); | |
731 | if (ret) { | |
732 | clk_disable_unprepare(isi->pclk); | |
733 | return ret; | |
734 | } | |
d8ec0961 JW |
735 | } |
736 | ||
195ebc43 JW |
737 | return 0; |
738 | } | |
ffebad79 | 739 | |
dd669e90 | 740 | /* Called with .host_lock held */ |
ffebad79 | 741 | static void isi_camera_clock_stop(struct soc_camera_host *ici) |
195ebc43 | 742 | { |
195ebc43 JW |
743 | struct atmel_isi *isi = ici->priv; |
744 | ||
f389e89c LP |
745 | if (!IS_ERR(isi->mck)) |
746 | clk_disable_unprepare(isi->mck); | |
c01d568e | 747 | clk_disable_unprepare(isi->pclk); |
195ebc43 JW |
748 | } |
749 | ||
750 | static unsigned int isi_camera_poll(struct file *file, poll_table *pt) | |
751 | { | |
752 | struct soc_camera_device *icd = file->private_data; | |
753 | ||
754 | return vb2_poll(&icd->vb2_vidq, file, pt); | |
755 | } | |
756 | ||
757 | static int isi_camera_querycap(struct soc_camera_host *ici, | |
758 | struct v4l2_capability *cap) | |
759 | { | |
760 | strcpy(cap->driver, "atmel-isi"); | |
761 | strcpy(cap->card, "Atmel Image Sensor Interface"); | |
762 | cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE | | |
763 | V4L2_CAP_STREAMING); | |
764 | return 0; | |
765 | } | |
766 | ||
8843d119 | 767 | static int isi_camera_set_bus_param(struct soc_camera_device *icd) |
195ebc43 | 768 | { |
a4e9f10b | 769 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
7dfff953 | 770 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 | 771 | struct atmel_isi *isi = ici->priv; |
a4e9f10b GL |
772 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; |
773 | unsigned long common_flags; | |
195ebc43 JW |
774 | int ret; |
775 | u32 cfg1 = 0; | |
776 | ||
a4e9f10b GL |
777 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); |
778 | if (!ret) { | |
779 | common_flags = soc_mbus_config_compatible(&cfg, | |
780 | ISI_BUS_PARAM); | |
781 | if (!common_flags) { | |
782 | dev_warn(icd->parent, | |
783 | "Flags incompatible: camera 0x%x, host 0x%x\n", | |
784 | cfg.flags, ISI_BUS_PARAM); | |
785 | return -EINVAL; | |
786 | } | |
787 | } else if (ret != -ENOIOCTLCMD) { | |
788 | return ret; | |
789 | } else { | |
790 | common_flags = ISI_BUS_PARAM; | |
791 | } | |
792 | dev_dbg(icd->parent, "Flags cam: 0x%x host: 0x%x common: 0x%lx\n", | |
793 | cfg.flags, ISI_BUS_PARAM, common_flags); | |
195ebc43 JW |
794 | |
795 | /* Make choises, based on platform preferences */ | |
a4e9f10b GL |
796 | if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) && |
797 | (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) { | |
195ebc43 | 798 | if (isi->pdata->hsync_act_low) |
a4e9f10b | 799 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH; |
195ebc43 | 800 | else |
a4e9f10b | 801 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW; |
195ebc43 JW |
802 | } |
803 | ||
a4e9f10b GL |
804 | if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) && |
805 | (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) { | |
195ebc43 | 806 | if (isi->pdata->vsync_act_low) |
a4e9f10b | 807 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH; |
195ebc43 | 808 | else |
a4e9f10b | 809 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW; |
195ebc43 JW |
810 | } |
811 | ||
a4e9f10b GL |
812 | if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) && |
813 | (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) { | |
195ebc43 | 814 | if (isi->pdata->pclk_act_falling) |
a4e9f10b | 815 | common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING; |
195ebc43 | 816 | else |
a4e9f10b | 817 | common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING; |
195ebc43 JW |
818 | } |
819 | ||
a4e9f10b GL |
820 | cfg.flags = common_flags; |
821 | ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg); | |
822 | if (ret < 0 && ret != -ENOIOCTLCMD) { | |
823 | dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n", | |
195ebc43 JW |
824 | common_flags, ret); |
825 | return ret; | |
826 | } | |
827 | ||
828 | /* set bus param for ISI */ | |
a4e9f10b | 829 | if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) |
195ebc43 | 830 | cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; |
a4e9f10b | 831 | if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) |
195ebc43 | 832 | cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; |
a4e9f10b | 833 | if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) |
195ebc43 JW |
834 | cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; |
835 | ||
836 | if (isi->pdata->has_emb_sync) | |
837 | cfg1 |= ISI_CFG1_EMB_SYNC; | |
d8ec0961 | 838 | if (isi->pdata->full_mode) |
195ebc43 JW |
839 | cfg1 |= ISI_CFG1_FULL_MODE; |
840 | ||
841 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
842 | isi_writel(isi, ISI_CFG1, cfg1); | |
843 | ||
844 | return 0; | |
845 | } | |
846 | ||
847 | static struct soc_camera_host_ops isi_soc_camera_host_ops = { | |
848 | .owner = THIS_MODULE, | |
849 | .add = isi_camera_add_device, | |
850 | .remove = isi_camera_remove_device, | |
ffebad79 GL |
851 | .clock_start = isi_camera_clock_start, |
852 | .clock_stop = isi_camera_clock_stop, | |
195ebc43 JW |
853 | .set_fmt = isi_camera_set_fmt, |
854 | .try_fmt = isi_camera_try_fmt, | |
855 | .get_formats = isi_camera_get_formats, | |
856 | .init_videobuf2 = isi_camera_init_videobuf, | |
857 | .poll = isi_camera_poll, | |
858 | .querycap = isi_camera_querycap, | |
859 | .set_bus_param = isi_camera_set_bus_param, | |
860 | }; | |
861 | ||
862 | /* -----------------------------------------------------------------------*/ | |
4c62e976 | 863 | static int atmel_isi_remove(struct platform_device *pdev) |
195ebc43 JW |
864 | { |
865 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | |
866 | struct atmel_isi *isi = container_of(soc_host, | |
867 | struct atmel_isi, soc_host); | |
868 | ||
195ebc43 JW |
869 | soc_camera_host_unregister(soc_host); |
870 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | |
871 | dma_free_coherent(&pdev->dev, | |
872 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
873 | isi->p_fb_descriptors, | |
874 | isi->fb_descriptors_phys); | |
875 | ||
195ebc43 JW |
876 | return 0; |
877 | } | |
878 | ||
4c62e976 | 879 | static int atmel_isi_probe(struct platform_device *pdev) |
195ebc43 JW |
880 | { |
881 | unsigned int irq; | |
882 | struct atmel_isi *isi; | |
195ebc43 JW |
883 | struct resource *regs; |
884 | int ret, i; | |
885 | struct device *dev = &pdev->dev; | |
886 | struct soc_camera_host *soc_host; | |
887 | struct isi_platform_data *pdata; | |
888 | ||
889 | pdata = dev->platform_data; | |
f389e89c | 890 | if (!pdata || !pdata->data_width_flags) { |
195ebc43 JW |
891 | dev_err(&pdev->dev, |
892 | "No config available for Atmel ISI\n"); | |
893 | return -EINVAL; | |
894 | } | |
895 | ||
c52c0cbf | 896 | isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL); |
195ebc43 | 897 | if (!isi) { |
195ebc43 | 898 | dev_err(&pdev->dev, "Can't allocate interface!\n"); |
c52c0cbf | 899 | return -ENOMEM; |
195ebc43 JW |
900 | } |
901 | ||
c52c0cbf LP |
902 | isi->pclk = devm_clk_get(&pdev->dev, "isi_clk"); |
903 | if (IS_ERR(isi->pclk)) | |
904 | return PTR_ERR(isi->pclk); | |
905 | ||
195ebc43 JW |
906 | isi->pdata = pdata; |
907 | isi->active = NULL; | |
908 | spin_lock_init(&isi->lock); | |
195ebc43 JW |
909 | INIT_LIST_HEAD(&isi->video_buffer_list); |
910 | INIT_LIST_HEAD(&isi->dma_desc_head); | |
911 | ||
f389e89c LP |
912 | /* ISI_MCK is the sensor master clock. It should be handled by the |
913 | * sensor driver directly, as the ISI has no use for that clock. Make | |
914 | * the clock optional here while platforms transition to the correct | |
915 | * model. | |
916 | */ | |
c52c0cbf | 917 | isi->mck = devm_clk_get(dev, "isi_mck"); |
f389e89c LP |
918 | if (!IS_ERR(isi->mck)) { |
919 | /* Set ISI_MCK's frequency, it should be faster than pixel | |
920 | * clock. | |
921 | */ | |
922 | ret = clk_set_rate(isi->mck, pdata->mck_hz); | |
923 | if (ret < 0) | |
924 | return ret; | |
d8ec0961 JW |
925 | } |
926 | ||
195ebc43 JW |
927 | isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev, |
928 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
929 | &isi->fb_descriptors_phys, | |
930 | GFP_KERNEL); | |
931 | if (!isi->p_fb_descriptors) { | |
195ebc43 | 932 | dev_err(&pdev->dev, "Can't allocate descriptors!\n"); |
c01d568e | 933 | return -ENOMEM; |
195ebc43 JW |
934 | } |
935 | ||
936 | for (i = 0; i < MAX_BUFFER_NUM; i++) { | |
937 | isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i; | |
938 | isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys + | |
939 | i * sizeof(struct fbd); | |
940 | list_add(&isi->dma_desc[i].list, &isi->dma_desc_head); | |
941 | } | |
942 | ||
943 | isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | |
944 | if (IS_ERR(isi->alloc_ctx)) { | |
945 | ret = PTR_ERR(isi->alloc_ctx); | |
946 | goto err_alloc_ctx; | |
947 | } | |
948 | ||
c52c0cbf LP |
949 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
950 | isi->regs = devm_ioremap_resource(&pdev->dev, regs); | |
951 | if (IS_ERR(isi->regs)) { | |
952 | ret = PTR_ERR(isi->regs); | |
195ebc43 JW |
953 | goto err_ioremap; |
954 | } | |
955 | ||
a4e9f10b GL |
956 | if (pdata->data_width_flags & ISI_DATAWIDTH_8) |
957 | isi->width_flags = 1 << 7; | |
958 | if (pdata->data_width_flags & ISI_DATAWIDTH_10) | |
959 | isi->width_flags |= 1 << 9; | |
960 | ||
195ebc43 JW |
961 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); |
962 | ||
963 | irq = platform_get_irq(pdev, 0); | |
e35abd44 | 964 | if (IS_ERR_VALUE(irq)) { |
195ebc43 JW |
965 | ret = irq; |
966 | goto err_req_irq; | |
967 | } | |
968 | ||
c52c0cbf | 969 | ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi); |
195ebc43 JW |
970 | if (ret) { |
971 | dev_err(&pdev->dev, "Unable to request irq %d\n", irq); | |
972 | goto err_req_irq; | |
973 | } | |
974 | isi->irq = irq; | |
975 | ||
976 | soc_host = &isi->soc_host; | |
977 | soc_host->drv_name = "isi-camera"; | |
978 | soc_host->ops = &isi_soc_camera_host_ops; | |
979 | soc_host->priv = isi; | |
980 | soc_host->v4l2_dev.dev = &pdev->dev; | |
981 | soc_host->nr = pdev->id; | |
982 | ||
983 | ret = soc_camera_host_register(soc_host); | |
984 | if (ret) { | |
985 | dev_err(&pdev->dev, "Unable to register soc camera host\n"); | |
986 | goto err_register_soc_camera_host; | |
987 | } | |
988 | return 0; | |
989 | ||
990 | err_register_soc_camera_host: | |
195ebc43 | 991 | err_req_irq: |
195ebc43 JW |
992 | err_ioremap: |
993 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | |
994 | err_alloc_ctx: | |
995 | dma_free_coherent(&pdev->dev, | |
996 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
997 | isi->p_fb_descriptors, | |
998 | isi->fb_descriptors_phys); | |
195ebc43 JW |
999 | |
1000 | return ret; | |
1001 | } | |
1002 | ||
1003 | static struct platform_driver atmel_isi_driver = { | |
4c62e976 | 1004 | .remove = atmel_isi_remove, |
195ebc43 JW |
1005 | .driver = { |
1006 | .name = "atmel_isi", | |
1007 | .owner = THIS_MODULE, | |
1008 | }, | |
1009 | }; | |
1010 | ||
8c31aeca | 1011 | module_platform_driver_probe(atmel_isi_driver, atmel_isi_probe); |
195ebc43 JW |
1012 | |
1013 | MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>"); | |
1014 | MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux"); | |
1015 | MODULE_LICENSE("GPL"); | |
1016 | MODULE_SUPPORTED_DEVICE("video"); |