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9262e5a2 AT |
1 | /* |
2 | * Copyright (c) 2013 Texas Instruments Inc. | |
3 | * | |
4 | * David Griego, <dagriego@biglakesoftware.com> | |
5 | * Dale Farnsworth, <dale@farnsworth.org> | |
6 | * Archit Taneja, <archit@ti.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published by | |
10 | * the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __TI_VPDMA_H_ | |
14 | #define __TI_VPDMA_H_ | |
15 | ||
16 | /* | |
17 | * A vpdma_buf tracks the size, DMA address and mapping status of each | |
18 | * driver DMA area. | |
19 | */ | |
20 | struct vpdma_buf { | |
21 | void *addr; | |
22 | dma_addr_t dma_addr; | |
23 | size_t size; | |
24 | bool mapped; | |
25 | }; | |
26 | ||
27 | struct vpdma_desc_list { | |
28 | struct vpdma_buf buf; | |
29 | void *next; | |
30 | int type; | |
31 | }; | |
32 | ||
33 | struct vpdma_data { | |
34 | void __iomem *base; | |
35 | ||
36 | struct platform_device *pdev; | |
37 | ||
38 | /* tells whether vpdma firmware is loaded or not */ | |
39 | bool ready; | |
40 | }; | |
41 | ||
b4fcdaf7 AT |
42 | enum vpdma_data_format_type { |
43 | VPDMA_DATA_FMT_TYPE_YUV, | |
44 | VPDMA_DATA_FMT_TYPE_RGB, | |
45 | VPDMA_DATA_FMT_TYPE_MISC, | |
46 | }; | |
47 | ||
9262e5a2 | 48 | struct vpdma_data_format { |
b4fcdaf7 | 49 | enum vpdma_data_format_type type; |
9262e5a2 AT |
50 | int data_type; |
51 | u8 depth; | |
52 | }; | |
53 | ||
54 | #define VPDMA_DESC_ALIGN 16 /* 16-byte descriptor alignment */ | |
a51cd8f5 AT |
55 | #define VPDMA_STRIDE_ALIGN 16 /* |
56 | * line stride of source and dest | |
57 | * buffers should be 16 byte aligned | |
58 | */ | |
9262e5a2 AT |
59 | #define VPDMA_DTD_DESC_SIZE 32 /* 8 words */ |
60 | #define VPDMA_CFD_CTD_DESC_SIZE 16 /* 4 words */ | |
61 | ||
62 | #define VPDMA_LIST_TYPE_NORMAL 0 | |
63 | #define VPDMA_LIST_TYPE_SELF_MODIFYING 1 | |
64 | #define VPDMA_LIST_TYPE_DOORBELL 2 | |
65 | ||
66 | enum vpdma_yuv_formats { | |
67 | VPDMA_DATA_FMT_Y444 = 0, | |
68 | VPDMA_DATA_FMT_Y422, | |
69 | VPDMA_DATA_FMT_Y420, | |
70 | VPDMA_DATA_FMT_C444, | |
71 | VPDMA_DATA_FMT_C422, | |
72 | VPDMA_DATA_FMT_C420, | |
73 | VPDMA_DATA_FMT_YC422, | |
74 | VPDMA_DATA_FMT_YC444, | |
75 | VPDMA_DATA_FMT_CY422, | |
76 | }; | |
77 | ||
78 | enum vpdma_rgb_formats { | |
79 | VPDMA_DATA_FMT_RGB565 = 0, | |
80 | VPDMA_DATA_FMT_ARGB16_1555, | |
81 | VPDMA_DATA_FMT_ARGB16, | |
82 | VPDMA_DATA_FMT_RGBA16_5551, | |
83 | VPDMA_DATA_FMT_RGBA16, | |
84 | VPDMA_DATA_FMT_ARGB24, | |
85 | VPDMA_DATA_FMT_RGB24, | |
86 | VPDMA_DATA_FMT_ARGB32, | |
87 | VPDMA_DATA_FMT_RGBA24, | |
88 | VPDMA_DATA_FMT_RGBA32, | |
89 | VPDMA_DATA_FMT_BGR565, | |
90 | VPDMA_DATA_FMT_ABGR16_1555, | |
91 | VPDMA_DATA_FMT_ABGR16, | |
92 | VPDMA_DATA_FMT_BGRA16_5551, | |
93 | VPDMA_DATA_FMT_BGRA16, | |
94 | VPDMA_DATA_FMT_ABGR24, | |
95 | VPDMA_DATA_FMT_BGR24, | |
96 | VPDMA_DATA_FMT_ABGR32, | |
97 | VPDMA_DATA_FMT_BGRA24, | |
98 | VPDMA_DATA_FMT_BGRA32, | |
99 | }; | |
100 | ||
101 | enum vpdma_misc_formats { | |
102 | VPDMA_DATA_FMT_MV = 0, | |
103 | }; | |
104 | ||
105 | extern const struct vpdma_data_format vpdma_yuv_fmts[]; | |
106 | extern const struct vpdma_data_format vpdma_rgb_fmts[]; | |
107 | extern const struct vpdma_data_format vpdma_misc_fmts[]; | |
108 | ||
109 | enum vpdma_frame_start_event { | |
110 | VPDMA_FSEVENT_HDMI_FID = 0, | |
111 | VPDMA_FSEVENT_DVO2_FID, | |
112 | VPDMA_FSEVENT_HDCOMP_FID, | |
113 | VPDMA_FSEVENT_SD_FID, | |
114 | VPDMA_FSEVENT_LM_FID0, | |
115 | VPDMA_FSEVENT_LM_FID1, | |
116 | VPDMA_FSEVENT_LM_FID2, | |
117 | VPDMA_FSEVENT_CHANNEL_ACTIVE, | |
118 | }; | |
119 | ||
120 | /* | |
121 | * VPDMA channel numbers | |
122 | */ | |
123 | enum vpdma_channel { | |
124 | VPE_CHAN_LUMA1_IN, | |
125 | VPE_CHAN_CHROMA1_IN, | |
126 | VPE_CHAN_LUMA2_IN, | |
127 | VPE_CHAN_CHROMA2_IN, | |
128 | VPE_CHAN_LUMA3_IN, | |
129 | VPE_CHAN_CHROMA3_IN, | |
130 | VPE_CHAN_MV_IN, | |
131 | VPE_CHAN_MV_OUT, | |
132 | VPE_CHAN_LUMA_OUT, | |
133 | VPE_CHAN_CHROMA_OUT, | |
134 | VPE_CHAN_RGB_OUT, | |
135 | }; | |
136 | ||
213b8ee4 AT |
137 | /* flags for VPDMA data descriptors */ |
138 | #define VPDMA_DATA_ODD_LINE_SKIP (1 << 0) | |
139 | #define VPDMA_DATA_EVEN_LINE_SKIP (1 << 1) | |
140 | #define VPDMA_DATA_FRAME_1D (1 << 2) | |
141 | #define VPDMA_DATA_MODE_TILED (1 << 3) | |
142 | ||
143 | /* | |
144 | * client identifiers used for configuration descriptors | |
145 | */ | |
146 | #define CFD_MMR_CLIENT 0 | |
147 | #define CFD_SC_CLIENT 4 | |
148 | ||
149 | /* Address data block header format */ | |
150 | struct vpdma_adb_hdr { | |
151 | u32 offset; | |
152 | u32 nwords; | |
153 | u32 reserved0; | |
154 | u32 reserved1; | |
155 | }; | |
156 | ||
157 | /* helpers for creating ADB headers for config descriptors MMRs as client */ | |
158 | #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) | |
159 | #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) | |
160 | ||
161 | #define VPDMA_SET_MMR_ADB_HDR(buf, str, hdr, regs, offset_a) \ | |
162 | do { \ | |
163 | struct vpdma_adb_hdr *h; \ | |
164 | struct str *adb = NULL; \ | |
165 | h = MMR_ADB_ADDR(buf, str, hdr); \ | |
166 | h->offset = (offset_a); \ | |
167 | h->nwords = sizeof(adb->regs) >> 2; \ | |
168 | } while (0) | |
169 | ||
9262e5a2 AT |
170 | /* vpdma descriptor buffer allocation and management */ |
171 | int vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size); | |
172 | void vpdma_free_desc_buf(struct vpdma_buf *buf); | |
173 | int vpdma_map_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); | |
174 | void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); | |
175 | ||
176 | /* vpdma descriptor list funcs */ | |
177 | int vpdma_create_desc_list(struct vpdma_desc_list *list, size_t size, int type); | |
178 | void vpdma_reset_desc_list(struct vpdma_desc_list *list); | |
179 | void vpdma_free_desc_list(struct vpdma_desc_list *list); | |
180 | int vpdma_submit_descs(struct vpdma_data *vpdma, struct vpdma_desc_list *list); | |
181 | ||
213b8ee4 AT |
182 | /* helpers for creating vpdma descriptors */ |
183 | void vpdma_add_cfd_block(struct vpdma_desc_list *list, int client, | |
184 | struct vpdma_buf *blk, u32 dest_offset); | |
185 | void vpdma_add_cfd_adb(struct vpdma_desc_list *list, int client, | |
186 | struct vpdma_buf *adb); | |
187 | void vpdma_add_sync_on_channel_ctd(struct vpdma_desc_list *list, | |
188 | enum vpdma_channel chan); | |
189 | void vpdma_add_out_dtd(struct vpdma_desc_list *list, struct v4l2_rect *c_rect, | |
190 | const struct vpdma_data_format *fmt, dma_addr_t dma_addr, | |
191 | enum vpdma_channel chan, u32 flags); | |
192 | void vpdma_add_in_dtd(struct vpdma_desc_list *list, int frame_width, | |
193 | int frame_height, struct v4l2_rect *c_rect, | |
194 | const struct vpdma_data_format *fmt, dma_addr_t dma_addr, | |
195 | enum vpdma_channel chan, int field, u32 flags); | |
196 | ||
9262e5a2 AT |
197 | /* vpdma list interrupt management */ |
198 | void vpdma_enable_list_complete_irq(struct vpdma_data *vpdma, int list_num, | |
199 | bool enable); | |
200 | void vpdma_clear_list_stat(struct vpdma_data *vpdma); | |
201 | ||
202 | /* vpdma client configuration */ | |
203 | void vpdma_set_line_mode(struct vpdma_data *vpdma, int line_mode, | |
204 | enum vpdma_channel chan); | |
205 | void vpdma_set_frame_start_event(struct vpdma_data *vpdma, | |
206 | enum vpdma_frame_start_event fs_event, enum vpdma_channel chan); | |
207 | ||
208 | void vpdma_dump_regs(struct vpdma_data *vpdma); | |
209 | ||
210 | /* initialize vpdma, passed with VPE's platform device pointer */ | |
211 | struct vpdma_data *vpdma_create(struct platform_device *pdev); | |
212 | ||
213 | #endif |