[media] v4l: vsp1: Store active selection rectangles in a pad config structure
[deliverable/linux.git] / drivers / media / platform / vsp1 / vsp1_bru.c
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1/*
2 * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
3 *
4 * Copyright (C) 2013 Renesas Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/device.h>
15#include <linux/gfp.h>
16
17#include <media/v4l2-subdev.h>
18
19#include "vsp1.h"
20#include "vsp1_bru.h"
6418b4d6 21#include "vsp1_rwpf.h"
9d40637a 22#include "vsp1_video.h"
629bb6d4 23
8cb0b634 24#define BRU_MIN_SIZE 1U
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25#define BRU_MAX_SIZE 8190U
26
27/* -----------------------------------------------------------------------------
28 * Device Access
29 */
30
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31static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
32{
1517b039 33 vsp1_mod_write(&bru->entity, reg, data);
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34}
35
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36/* -----------------------------------------------------------------------------
37 * Controls
38 */
39
40static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
41{
42 struct vsp1_bru *bru =
43 container_of(ctrl->handler, struct vsp1_bru, ctrls);
44
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45 switch (ctrl->id) {
46 case V4L2_CID_BG_COLOR:
f22af945 47 bru->bgcolor = ctrl->val;
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48 break;
49 }
50
51 return 0;
52}
53
54static const struct v4l2_ctrl_ops bru_ctrl_ops = {
55 .s_ctrl = bru_s_ctrl,
56};
57
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58/* -----------------------------------------------------------------------------
59 * V4L2 Subdevice Core Operations
60 */
61
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62static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
63{
9aca813e 64 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
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65 struct vsp1_bru *bru = to_bru(subdev);
66 struct v4l2_mbus_framefmt *format;
9aca813e 67 unsigned int flags;
629bb6d4 68 unsigned int i;
a16e2794 69
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70 if (!enable)
71 return 0;
72
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73 format = vsp1_entity_get_pad_format(&bru->entity, bru->entity.config,
74 bru->entity.source_pad);
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75
76 /* The hardware is extremely flexible but we have no userspace API to
77 * expose all the parameters, nor is it clear whether we would have use
78 * cases for all the supported modes. Let's just harcode the parameters
79 * to sane default values for now.
80 */
81
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82 /* Disable dithering and enable color data normalization unless the
83 * format at the pipeline output is premultiplied.
84 */
86960eec 85 flags = pipe->output ? pipe->output->format.flags : 0;
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86 vsp1_bru_write(bru, VI6_BRU_INCTRL,
87 flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
88 0 : VI6_BRU_INCTRL_NRM);
629bb6d4 89
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90 /* Set the background position to cover the whole output image and
91 * configure its color.
92 */
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93 vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
94 (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
95 (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
96 vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
629bb6d4 97
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98 vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, bru->bgcolor |
99 (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
100
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101 /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
102 * unit with a NOP operation to make BRU input 1 available as the
103 * Blend/ROP unit B SRC input.
104 */
105 vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
106 VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
107 VI6_BRU_ROP_AROP(VI6_ROP_NOP));
108
a96c5fa4 109 for (i = 0; i < bru->entity.source_pad; ++i) {
6418b4d6 110 bool premultiplied = false;
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111 u32 ctrl = 0;
112
113 /* Configure all Blend/ROP units corresponding to an enabled BRU
114 * input for alpha blending. Blend/ROP units corresponding to
115 * disabled BRU inputs are used in ROP NOP mode to ignore the
116 * SRC input.
117 */
6418b4d6 118 if (bru->inputs[i].rpf) {
629bb6d4 119 ctrl |= VI6_BRU_CTRL_RBC;
6418b4d6 120
86960eec 121 premultiplied = bru->inputs[i].rpf->format.flags
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122 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
123 } else {
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124 ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
125 | VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
6418b4d6 126 }
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127
128 /* Select the virtual RPF as the Blend/ROP unit A DST input to
129 * serve as a background color.
130 */
131 if (i == 0)
132 ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
133
134 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
135 * D in that order. The Blend/ROP unit B SRC is hardwired to the
136 * ROP unit output, the corresponding register bits must be set
137 * to 0.
138 */
139 if (i != 1)
140 ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
141
142 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
143
144 /* Harcode the blending formula to
145 *
146 * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
147 * DSTa = DSTa * (1 - SRCa) + SRCa
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148 *
149 * when the SRC input isn't premultiplied, and to
150 *
151 * DSTc = DSTc * (1 - SRCa) + SRCc
152 * DSTa = DSTa * (1 - SRCa) + SRCa
153 *
154 * otherwise.
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155 */
156 vsp1_bru_write(bru, VI6_BRU_BLD(i),
157 VI6_BRU_BLD_CCMDX_255_SRC_A |
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158 (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
159 VI6_BRU_BLD_CCMDY_SRC_A) |
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160 VI6_BRU_BLD_ACMDX_255_SRC_A |
161 VI6_BRU_BLD_ACMDY_COEFY |
162 (0xff << VI6_BRU_BLD_COEFY_SHIFT));
163 }
164
165 return 0;
166}
167
168/* -----------------------------------------------------------------------------
169 * V4L2 Subdevice Pad Operations
170 */
171
172/*
173 * The BRU can't perform format conversion, all sink and source formats must be
174 * identical. We pick the format on the first sink pad (pad 0) and propagate it
175 * to all other pads.
176 */
177
178static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
f7234138 179 struct v4l2_subdev_pad_config *cfg,
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180 struct v4l2_subdev_mbus_code_enum *code)
181{
182 static const unsigned int codes[] = {
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183 MEDIA_BUS_FMT_ARGB8888_1X32,
184 MEDIA_BUS_FMT_AYUV8_1X32,
629bb6d4 185 };
3f1ccf16 186 struct vsp1_bru *bru = to_bru(subdev);
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187
188 if (code->pad == BRU_PAD_SINK(0)) {
189 if (code->index >= ARRAY_SIZE(codes))
190 return -EINVAL;
191
192 code->code = codes[code->index];
193 } else {
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194 struct v4l2_subdev_pad_config *config;
195 struct v4l2_mbus_framefmt *format;
196
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197 if (code->index)
198 return -EINVAL;
199
e790c3cb 200 config = vsp1_entity_get_pad_config(&bru->entity, cfg,
1bd0a1bd 201 code->which);
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202 if (!config)
203 return -EINVAL;
204
205 format = vsp1_entity_get_pad_format(&bru->entity, config,
206 BRU_PAD_SINK(0));
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207 code->code = format->code;
208 }
209
210 return 0;
211}
212
213static int bru_enum_frame_size(struct v4l2_subdev *subdev,
f7234138 214 struct v4l2_subdev_pad_config *cfg,
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215 struct v4l2_subdev_frame_size_enum *fse)
216{
217 if (fse->index)
218 return -EINVAL;
219
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220 if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
221 fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
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222 return -EINVAL;
223
224 fse->min_width = BRU_MIN_SIZE;
225 fse->max_width = BRU_MAX_SIZE;
226 fse->min_height = BRU_MIN_SIZE;
227 fse->max_height = BRU_MAX_SIZE;
228
229 return 0;
230}
231
232static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
f7234138 233 struct v4l2_subdev_pad_config *cfg,
b7e5107e 234 unsigned int pad)
629bb6d4 235{
b7e5107e 236 return v4l2_subdev_get_try_compose(&bru->entity.subdev, cfg, pad);
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237}
238
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239static int bru_get_format(struct v4l2_subdev *subdev,
240 struct v4l2_subdev_pad_config *cfg,
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241 struct v4l2_subdev_format *fmt)
242{
243 struct vsp1_bru *bru = to_bru(subdev);
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244 struct v4l2_subdev_pad_config *config;
245
246 config = vsp1_entity_get_pad_config(&bru->entity, cfg, fmt->which);
247 if (!config)
248 return -EINVAL;
629bb6d4 249
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250 fmt->format = *vsp1_entity_get_pad_format(&bru->entity, config,
251 fmt->pad);
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252
253 return 0;
254}
255
1bd0a1bd 256static void bru_try_format(struct vsp1_bru *bru,
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257 struct v4l2_subdev_pad_config *config,
258 unsigned int pad, struct v4l2_mbus_framefmt *fmt)
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259{
260 struct v4l2_mbus_framefmt *format;
261
262 switch (pad) {
263 case BRU_PAD_SINK(0):
264 /* Default to YUV if the requested format is not supported. */
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265 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
266 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
267 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
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268 break;
269
270 default:
271 /* The BRU can't perform format conversion. */
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272 format = vsp1_entity_get_pad_format(&bru->entity, config,
273 BRU_PAD_SINK(0));
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274 fmt->code = format->code;
275 break;
276 }
277
278 fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
279 fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
280 fmt->field = V4L2_FIELD_NONE;
281 fmt->colorspace = V4L2_COLORSPACE_SRGB;
282}
283
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284static int bru_set_format(struct v4l2_subdev *subdev,
285 struct v4l2_subdev_pad_config *cfg,
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286 struct v4l2_subdev_format *fmt)
287{
288 struct vsp1_bru *bru = to_bru(subdev);
e790c3cb 289 struct v4l2_subdev_pad_config *config;
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290 struct v4l2_mbus_framefmt *format;
291
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292 config = vsp1_entity_get_pad_config(&bru->entity, cfg, fmt->which);
293 if (!config)
294 return -EINVAL;
295
296 bru_try_format(bru, config, fmt->pad, &fmt->format);
629bb6d4 297
e790c3cb 298 format = vsp1_entity_get_pad_format(&bru->entity, config, fmt->pad);
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299 *format = fmt->format;
300
301 /* Reset the compose rectangle */
a96c5fa4 302 if (fmt->pad != bru->entity.source_pad) {
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303 struct v4l2_rect *compose;
304
b7e5107e 305 compose = bru_get_compose(bru, config, fmt->pad);
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306 compose->left = 0;
307 compose->top = 0;
308 compose->width = format->width;
309 compose->height = format->height;
310 }
311
312 /* Propagate the format code to all pads */
313 if (fmt->pad == BRU_PAD_SINK(0)) {
314 unsigned int i;
315
a96c5fa4 316 for (i = 0; i <= bru->entity.source_pad; ++i) {
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317 format = vsp1_entity_get_pad_format(&bru->entity,
318 config, i);
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319 format->code = fmt->format.code;
320 }
321 }
322
323 return 0;
324}
325
326static int bru_get_selection(struct v4l2_subdev *subdev,
f7234138 327 struct v4l2_subdev_pad_config *cfg,
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328 struct v4l2_subdev_selection *sel)
329{
330 struct vsp1_bru *bru = to_bru(subdev);
b7e5107e 331 struct v4l2_subdev_pad_config *config;
629bb6d4 332
a96c5fa4 333 if (sel->pad == bru->entity.source_pad)
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334 return -EINVAL;
335
336 switch (sel->target) {
337 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
338 sel->r.left = 0;
339 sel->r.top = 0;
340 sel->r.width = BRU_MAX_SIZE;
341 sel->r.height = BRU_MAX_SIZE;
342 return 0;
343
344 case V4L2_SEL_TGT_COMPOSE:
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345 config = vsp1_entity_get_pad_config(&bru->entity, cfg,
346 sel->which);
347 if (!config)
348 return -EINVAL;
349
350 sel->r = *bru_get_compose(bru, config, sel->pad);
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351 return 0;
352
353 default:
354 return -EINVAL;
355 }
356}
357
358static int bru_set_selection(struct v4l2_subdev *subdev,
f7234138 359 struct v4l2_subdev_pad_config *cfg,
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360 struct v4l2_subdev_selection *sel)
361{
362 struct vsp1_bru *bru = to_bru(subdev);
e790c3cb 363 struct v4l2_subdev_pad_config *config;
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364 struct v4l2_mbus_framefmt *format;
365 struct v4l2_rect *compose;
366
a96c5fa4 367 if (sel->pad == bru->entity.source_pad)
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368 return -EINVAL;
369
370 if (sel->target != V4L2_SEL_TGT_COMPOSE)
371 return -EINVAL;
372
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373 config = vsp1_entity_get_pad_config(&bru->entity, cfg, sel->which);
374 if (!config)
375 return -EINVAL;
376
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377 /* The compose rectangle top left corner must be inside the output
378 * frame.
379 */
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380 format = vsp1_entity_get_pad_format(&bru->entity, config,
381 bru->entity.source_pad);
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382 sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
383 sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
384
385 /* Scaling isn't supported, the compose rectangle size must be identical
386 * to the sink format size.
387 */
e790c3cb 388 format = vsp1_entity_get_pad_format(&bru->entity, config, sel->pad);
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389 sel->r.width = format->width;
390 sel->r.height = format->height;
391
b7e5107e 392 compose = bru_get_compose(bru, config, sel->pad);
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393 *compose = sel->r;
394
395 return 0;
396}
397
398/* -----------------------------------------------------------------------------
399 * V4L2 Subdevice Operations
400 */
401
402static struct v4l2_subdev_video_ops bru_video_ops = {
403 .s_stream = bru_s_stream,
404};
405
406static struct v4l2_subdev_pad_ops bru_pad_ops = {
0efdf0f5 407 .init_cfg = vsp1_entity_init_cfg,
629bb6d4
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408 .enum_mbus_code = bru_enum_mbus_code,
409 .enum_frame_size = bru_enum_frame_size,
410 .get_fmt = bru_get_format,
411 .set_fmt = bru_set_format,
412 .get_selection = bru_get_selection,
413 .set_selection = bru_set_selection,
414};
415
416static struct v4l2_subdev_ops bru_ops = {
417 .video = &bru_video_ops,
418 .pad = &bru_pad_ops,
419};
420
421/* -----------------------------------------------------------------------------
422 * Initialization and Cleanup
423 */
424
425struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
426{
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427 struct vsp1_bru *bru;
428 int ret;
429
430 bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
431 if (bru == NULL)
432 return ERR_PTR(-ENOMEM);
433
434 bru->entity.type = VSP1_ENTITY_BRU;
435
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436 ret = vsp1_entity_init(vsp1, &bru->entity, "bru",
437 vsp1->info->num_bru_inputs + 1, &bru_ops);
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438 if (ret < 0)
439 return ERR_PTR(ret);
440
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441 /* Initialize the control handler. */
442 v4l2_ctrl_handler_init(&bru->ctrls, 1);
443 v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
444 0, 0xffffff, 1, 0);
445
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446 bru->bgcolor = 0;
447
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448 bru->entity.subdev.ctrl_handler = &bru->ctrls;
449
450 if (bru->ctrls.error) {
451 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
452 ret = bru->ctrls.error;
453 vsp1_entity_destroy(&bru->entity);
454 return ERR_PTR(ret);
455 }
456
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457 return bru;
458}
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