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1fd87bf2 LP |
1 | /* |
2 | * vsp1_clu.c -- R-Car VSP1 Cubic Look-Up Table | |
3 | * | |
4 | * Copyright (C) 2015-2016 Renesas Electronics Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/slab.h> | |
16 | ||
17 | #include <media/v4l2-subdev.h> | |
18 | ||
19 | #include "vsp1.h" | |
20 | #include "vsp1_clu.h" | |
21 | #include "vsp1_dl.h" | |
22 | ||
23 | #define CLU_MIN_SIZE 4U | |
24 | #define CLU_MAX_SIZE 8190U | |
25 | ||
26 | /* ----------------------------------------------------------------------------- | |
27 | * Device Access | |
28 | */ | |
29 | ||
30 | static inline void vsp1_clu_write(struct vsp1_clu *clu, struct vsp1_dl_list *dl, | |
31 | u32 reg, u32 data) | |
32 | { | |
33 | vsp1_dl_list_write(dl, reg, data); | |
34 | } | |
35 | ||
36 | /* ----------------------------------------------------------------------------- | |
37 | * Controls | |
38 | */ | |
39 | ||
40 | #define V4L2_CID_VSP1_CLU_TABLE (V4L2_CID_USER_BASE | 0x1001) | |
41 | #define V4L2_CID_VSP1_CLU_MODE (V4L2_CID_USER_BASE | 0x1002) | |
42 | #define V4L2_CID_VSP1_CLU_MODE_2D 0 | |
43 | #define V4L2_CID_VSP1_CLU_MODE_3D 1 | |
44 | ||
45 | static int clu_set_table(struct vsp1_clu *clu, struct v4l2_ctrl *ctrl) | |
46 | { | |
47 | struct vsp1_dl_body *dlb; | |
48 | unsigned int i; | |
49 | ||
50 | dlb = vsp1_dl_fragment_alloc(clu->entity.vsp1, 1 + 17 * 17 * 17); | |
51 | if (!dlb) | |
52 | return -ENOMEM; | |
53 | ||
54 | vsp1_dl_fragment_write(dlb, VI6_CLU_ADDR, 0); | |
55 | for (i = 0; i < 17 * 17 * 17; ++i) | |
56 | vsp1_dl_fragment_write(dlb, VI6_CLU_DATA, ctrl->p_new.p_u32[i]); | |
57 | ||
20fab5e0 | 58 | spin_lock_irq(&clu->lock); |
1fd87bf2 | 59 | swap(clu->clu, dlb); |
20fab5e0 | 60 | spin_unlock_irq(&clu->lock); |
1fd87bf2 LP |
61 | |
62 | vsp1_dl_fragment_free(dlb); | |
63 | return 0; | |
64 | } | |
65 | ||
66 | static int clu_s_ctrl(struct v4l2_ctrl *ctrl) | |
67 | { | |
68 | struct vsp1_clu *clu = | |
69 | container_of(ctrl->handler, struct vsp1_clu, ctrls); | |
70 | ||
71 | switch (ctrl->id) { | |
72 | case V4L2_CID_VSP1_CLU_TABLE: | |
73 | clu_set_table(clu, ctrl); | |
74 | break; | |
75 | ||
76 | case V4L2_CID_VSP1_CLU_MODE: | |
77 | clu->mode = ctrl->val; | |
78 | break; | |
79 | } | |
80 | ||
81 | return 0; | |
82 | } | |
83 | ||
84 | static const struct v4l2_ctrl_ops clu_ctrl_ops = { | |
85 | .s_ctrl = clu_s_ctrl, | |
86 | }; | |
87 | ||
88 | static const struct v4l2_ctrl_config clu_table_control = { | |
89 | .ops = &clu_ctrl_ops, | |
90 | .id = V4L2_CID_VSP1_CLU_TABLE, | |
91 | .name = "Look-Up Table", | |
92 | .type = V4L2_CTRL_TYPE_U32, | |
93 | .min = 0x00000000, | |
94 | .max = 0x00ffffff, | |
95 | .step = 1, | |
96 | .def = 0, | |
97 | .dims = { 17, 17, 17 }, | |
98 | }; | |
99 | ||
100 | static const char * const clu_mode_menu[] = { | |
101 | "2D", | |
102 | "3D", | |
103 | NULL, | |
104 | }; | |
105 | ||
106 | static const struct v4l2_ctrl_config clu_mode_control = { | |
107 | .ops = &clu_ctrl_ops, | |
108 | .id = V4L2_CID_VSP1_CLU_MODE, | |
109 | .name = "Mode", | |
110 | .type = V4L2_CTRL_TYPE_MENU, | |
111 | .min = 0, | |
112 | .max = 1, | |
113 | .def = 1, | |
114 | .qmenu = clu_mode_menu, | |
115 | }; | |
116 | ||
117 | /* ----------------------------------------------------------------------------- | |
118 | * V4L2 Subdevice Pad Operations | |
119 | */ | |
120 | ||
121 | static int clu_enum_mbus_code(struct v4l2_subdev *subdev, | |
122 | struct v4l2_subdev_pad_config *cfg, | |
123 | struct v4l2_subdev_mbus_code_enum *code) | |
124 | { | |
125 | static const unsigned int codes[] = { | |
126 | MEDIA_BUS_FMT_ARGB8888_1X32, | |
127 | MEDIA_BUS_FMT_AHSV8888_1X32, | |
128 | MEDIA_BUS_FMT_AYUV8_1X32, | |
129 | }; | |
130 | ||
131 | return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes, | |
132 | ARRAY_SIZE(codes)); | |
133 | } | |
134 | ||
135 | static int clu_enum_frame_size(struct v4l2_subdev *subdev, | |
136 | struct v4l2_subdev_pad_config *cfg, | |
137 | struct v4l2_subdev_frame_size_enum *fse) | |
138 | { | |
139 | return vsp1_subdev_enum_frame_size(subdev, cfg, fse, CLU_MIN_SIZE, | |
140 | CLU_MIN_SIZE, CLU_MAX_SIZE, | |
141 | CLU_MAX_SIZE); | |
142 | } | |
143 | ||
144 | static int clu_set_format(struct v4l2_subdev *subdev, | |
145 | struct v4l2_subdev_pad_config *cfg, | |
146 | struct v4l2_subdev_format *fmt) | |
147 | { | |
148 | struct vsp1_clu *clu = to_clu(subdev); | |
149 | struct v4l2_subdev_pad_config *config; | |
150 | struct v4l2_mbus_framefmt *format; | |
151 | ||
152 | config = vsp1_entity_get_pad_config(&clu->entity, cfg, fmt->which); | |
153 | if (!config) | |
154 | return -EINVAL; | |
155 | ||
156 | /* Default to YUV if the requested format is not supported. */ | |
157 | if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 && | |
158 | fmt->format.code != MEDIA_BUS_FMT_AHSV8888_1X32 && | |
159 | fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32) | |
160 | fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32; | |
161 | ||
162 | format = vsp1_entity_get_pad_format(&clu->entity, config, fmt->pad); | |
163 | ||
164 | if (fmt->pad == CLU_PAD_SOURCE) { | |
165 | /* The CLU output format can't be modified. */ | |
166 | fmt->format = *format; | |
167 | return 0; | |
168 | } | |
169 | ||
170 | format->code = fmt->format.code; | |
171 | format->width = clamp_t(unsigned int, fmt->format.width, | |
172 | CLU_MIN_SIZE, CLU_MAX_SIZE); | |
173 | format->height = clamp_t(unsigned int, fmt->format.height, | |
174 | CLU_MIN_SIZE, CLU_MAX_SIZE); | |
175 | format->field = V4L2_FIELD_NONE; | |
176 | format->colorspace = V4L2_COLORSPACE_SRGB; | |
177 | ||
178 | fmt->format = *format; | |
179 | ||
180 | /* Propagate the format to the source pad. */ | |
181 | format = vsp1_entity_get_pad_format(&clu->entity, config, | |
182 | CLU_PAD_SOURCE); | |
183 | *format = fmt->format; | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
188 | /* ----------------------------------------------------------------------------- | |
189 | * V4L2 Subdevice Operations | |
190 | */ | |
191 | ||
192 | static const struct v4l2_subdev_pad_ops clu_pad_ops = { | |
193 | .init_cfg = vsp1_entity_init_cfg, | |
194 | .enum_mbus_code = clu_enum_mbus_code, | |
195 | .enum_frame_size = clu_enum_frame_size, | |
196 | .get_fmt = vsp1_subdev_get_pad_format, | |
197 | .set_fmt = clu_set_format, | |
198 | }; | |
199 | ||
200 | static const struct v4l2_subdev_ops clu_ops = { | |
201 | .pad = &clu_pad_ops, | |
202 | }; | |
203 | ||
204 | /* ----------------------------------------------------------------------------- | |
205 | * VSP1 Entity Operations | |
206 | */ | |
207 | ||
208 | static void clu_configure(struct vsp1_entity *entity, | |
209 | struct vsp1_pipeline *pipe, | |
fc845e52 | 210 | struct vsp1_dl_list *dl, bool full) |
1fd87bf2 LP |
211 | { |
212 | struct vsp1_clu *clu = to_clu(&entity->subdev); | |
20fab5e0 LP |
213 | struct vsp1_dl_body *dlb; |
214 | unsigned long flags; | |
1fd87bf2 LP |
215 | u32 ctrl = VI6_CLU_CTRL_AAI | VI6_CLU_CTRL_MVS | VI6_CLU_CTRL_EN; |
216 | ||
20fab5e0 LP |
217 | /* The format can't be changed during streaming, only verify it at |
218 | * stream start and store the information internally for future partial | |
219 | * reconfiguration calls. | |
220 | */ | |
221 | if (full) { | |
222 | struct v4l2_mbus_framefmt *format; | |
223 | ||
224 | format = vsp1_entity_get_pad_format(&clu->entity, | |
225 | clu->entity.config, | |
226 | CLU_PAD_SINK); | |
227 | clu->yuv_mode = format->code == MEDIA_BUS_FMT_AYUV8_1X32; | |
fc845e52 | 228 | return; |
20fab5e0 | 229 | } |
1fd87bf2 LP |
230 | |
231 | /* 2D mode can only be used with the YCbCr pixel encoding. */ | |
20fab5e0 | 232 | if (clu->mode == V4L2_CID_VSP1_CLU_MODE_2D && clu->yuv_mode) |
1fd87bf2 LP |
233 | ctrl |= VI6_CLU_CTRL_AX1I_2D | VI6_CLU_CTRL_AX2I_2D |
234 | | VI6_CLU_CTRL_OS0_2D | VI6_CLU_CTRL_OS1_2D | |
235 | | VI6_CLU_CTRL_OS2_2D | VI6_CLU_CTRL_M2D; | |
236 | ||
20fab5e0 | 237 | vsp1_clu_write(clu, dl, VI6_CLU_CTRL, ctrl); |
1fd87bf2 | 238 | |
20fab5e0 LP |
239 | spin_lock_irqsave(&clu->lock, flags); |
240 | dlb = clu->clu; | |
241 | clu->clu = NULL; | |
242 | spin_unlock_irqrestore(&clu->lock, flags); | |
1fd87bf2 | 243 | |
20fab5e0 LP |
244 | if (dlb) |
245 | vsp1_dl_list_add_fragment(dl, dlb); | |
1fd87bf2 LP |
246 | } |
247 | ||
248 | static const struct vsp1_entity_operations clu_entity_ops = { | |
249 | .configure = clu_configure, | |
250 | }; | |
251 | ||
252 | /* ----------------------------------------------------------------------------- | |
253 | * Initialization and Cleanup | |
254 | */ | |
255 | ||
256 | struct vsp1_clu *vsp1_clu_create(struct vsp1_device *vsp1) | |
257 | { | |
258 | struct vsp1_clu *clu; | |
259 | int ret; | |
260 | ||
261 | clu = devm_kzalloc(vsp1->dev, sizeof(*clu), GFP_KERNEL); | |
262 | if (clu == NULL) | |
263 | return ERR_PTR(-ENOMEM); | |
264 | ||
20fab5e0 LP |
265 | spin_lock_init(&clu->lock); |
266 | ||
1fd87bf2 LP |
267 | clu->entity.ops = &clu_entity_ops; |
268 | clu->entity.type = VSP1_ENTITY_CLU; | |
269 | ||
270 | ret = vsp1_entity_init(vsp1, &clu->entity, "clu", 2, &clu_ops, | |
271 | MEDIA_ENT_F_PROC_VIDEO_LUT); | |
272 | if (ret < 0) | |
273 | return ERR_PTR(ret); | |
274 | ||
275 | /* Initialize the control handler. */ | |
276 | v4l2_ctrl_handler_init(&clu->ctrls, 2); | |
277 | v4l2_ctrl_new_custom(&clu->ctrls, &clu_table_control, NULL); | |
278 | v4l2_ctrl_new_custom(&clu->ctrls, &clu_mode_control, NULL); | |
279 | ||
280 | clu->entity.subdev.ctrl_handler = &clu->ctrls; | |
281 | ||
282 | if (clu->ctrls.error) { | |
283 | dev_err(vsp1->dev, "clu: failed to initialize controls\n"); | |
284 | ret = clu->ctrls.error; | |
285 | vsp1_entity_destroy(&clu->entity); | |
286 | return ERR_PTR(ret); | |
287 | } | |
288 | ||
289 | v4l2_ctrl_handler_setup(&clu->ctrls); | |
290 | ||
291 | return clu; | |
292 | } |