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f3af9572 LP |
1 | /* |
2 | * vsp1_drm.c -- R-Car VSP1 DRM API | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/vsp1.h> | |
17 | ||
18 | #include <media/media-entity.h> | |
19 | #include <media/v4l2-subdev.h> | |
20 | ||
21 | #include "vsp1.h" | |
22 | #include "vsp1_bru.h" | |
23 | #include "vsp1_drm.h" | |
24 | #include "vsp1_lif.h" | |
25 | #include "vsp1_pipe.h" | |
26 | #include "vsp1_rwpf.h" | |
27 | ||
28 | /* ----------------------------------------------------------------------------- | |
29 | * Runtime Handling | |
30 | */ | |
31 | ||
32 | static int vsp1_drm_pipeline_run(struct vsp1_pipeline *pipe) | |
33 | { | |
34 | struct vsp1_device *vsp1 = pipe->output->entity.vsp1; | |
35 | int ret; | |
36 | ||
37 | if (vsp1->drm->update) { | |
38 | struct vsp1_entity *entity; | |
39 | ||
40 | list_for_each_entry(entity, &pipe->entities, list_pipe) { | |
41 | /* Skip unused RPFs. */ | |
42 | if (entity->type == VSP1_ENTITY_RPF) { | |
43 | struct vsp1_rwpf *rpf = | |
44 | to_rwpf(&entity->subdev); | |
45 | ||
46 | if (!pipe->inputs[rpf->entity.index]) | |
47 | continue; | |
48 | } | |
49 | ||
50 | vsp1_entity_route_setup(entity); | |
51 | ||
52 | ret = v4l2_subdev_call(&entity->subdev, video, | |
53 | s_stream, 1); | |
54 | if (ret < 0) { | |
55 | dev_err(vsp1->dev, | |
56 | "DRM pipeline start failure on entity %s\n", | |
57 | entity->subdev.name); | |
58 | return ret; | |
59 | } | |
60 | } | |
61 | ||
62 | vsp1->drm->update = false; | |
63 | } | |
64 | ||
65 | vsp1_pipeline_run(pipe); | |
66 | ||
67 | return 0; | |
68 | } | |
69 | ||
70 | static void vsp1_drm_pipeline_frame_end(struct vsp1_pipeline *pipe) | |
71 | { | |
72 | unsigned long flags; | |
73 | ||
74 | spin_lock_irqsave(&pipe->irqlock, flags); | |
75 | if (pipe->num_inputs) | |
76 | vsp1_drm_pipeline_run(pipe); | |
77 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
78 | } | |
79 | ||
80 | /* ----------------------------------------------------------------------------- | |
81 | * DU Driver API | |
82 | */ | |
83 | ||
84 | int vsp1_du_init(struct device *dev) | |
85 | { | |
86 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
87 | ||
88 | if (!vsp1) | |
89 | return -EPROBE_DEFER; | |
90 | ||
91 | return 0; | |
92 | } | |
93 | EXPORT_SYMBOL_GPL(vsp1_du_init); | |
94 | ||
95 | /** | |
96 | * vsp1_du_setup_lif - Setup the output part of the VSP pipeline | |
97 | * @dev: the VSP device | |
98 | * @width: output frame width in pixels | |
99 | * @height: output frame height in pixels | |
100 | * | |
101 | * Configure the output part of VSP DRM pipeline for the given frame @width and | |
102 | * @height. This sets up formats on the BRU source pad, the WPF0 sink and source | |
103 | * pads, and the LIF sink pad. | |
104 | * | |
105 | * As the media bus code on the BRU source pad is conditioned by the | |
106 | * configuration of the BRU sink 0 pad, we also set up the formats on all BRU | |
107 | * sinks, even if the configuration will be overwritten later by | |
108 | * vsp1_du_setup_rpf(). This ensures that the BRU configuration is set to a well | |
109 | * defined state. | |
110 | * | |
111 | * Return 0 on success or a negative error code on failure. | |
112 | */ | |
113 | int vsp1_du_setup_lif(struct device *dev, unsigned int width, | |
114 | unsigned int height) | |
115 | { | |
116 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
117 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
118 | struct vsp1_bru *bru = vsp1->bru; | |
119 | struct v4l2_subdev_format format; | |
120 | unsigned int i; | |
121 | int ret; | |
122 | ||
123 | dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n", | |
124 | __func__, width, height); | |
125 | ||
126 | if (width == 0 || height == 0) { | |
127 | /* Zero width or height means the CRTC is being disabled, stop | |
128 | * the pipeline and turn the light off. | |
129 | */ | |
130 | ret = vsp1_pipeline_stop(pipe); | |
131 | if (ret == -ETIMEDOUT) | |
132 | dev_err(vsp1->dev, "DRM pipeline stop timeout\n"); | |
133 | ||
134 | media_entity_pipeline_stop(&pipe->output->entity.subdev.entity); | |
135 | ||
136 | for (i = 0; i < bru->entity.source_pad; ++i) { | |
137 | bru->inputs[i].rpf = NULL; | |
138 | pipe->inputs[i] = NULL; | |
139 | } | |
140 | ||
141 | pipe->num_inputs = 0; | |
142 | ||
143 | vsp1_device_put(vsp1); | |
144 | ||
145 | dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__); | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | /* Configure the format at the BRU sinks and propagate it through the | |
151 | * pipeline. | |
152 | */ | |
153 | memset(&format, 0, sizeof(format)); | |
154 | format.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
155 | ||
156 | for (i = 0; i < bru->entity.source_pad; ++i) { | |
157 | format.pad = i; | |
158 | ||
159 | format.format.width = width; | |
160 | format.format.height = height; | |
161 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
162 | format.format.field = V4L2_FIELD_NONE; | |
163 | ||
164 | ret = v4l2_subdev_call(&bru->entity.subdev, pad, | |
165 | set_fmt, NULL, &format); | |
166 | if (ret < 0) | |
167 | return ret; | |
168 | ||
169 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
170 | __func__, format.format.width, format.format.height, | |
171 | format.format.code, i); | |
172 | } | |
173 | ||
174 | format.pad = bru->entity.source_pad; | |
175 | format.format.width = width; | |
176 | format.format.height = height; | |
177 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
178 | format.format.field = V4L2_FIELD_NONE; | |
179 | ||
180 | ret = v4l2_subdev_call(&bru->entity.subdev, pad, set_fmt, NULL, | |
181 | &format); | |
182 | if (ret < 0) | |
183 | return ret; | |
184 | ||
185 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
186 | __func__, format.format.width, format.format.height, | |
187 | format.format.code, i); | |
188 | ||
189 | format.pad = RWPF_PAD_SINK; | |
190 | ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, set_fmt, NULL, | |
191 | &format); | |
192 | if (ret < 0) | |
193 | return ret; | |
194 | ||
195 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF0 sink\n", | |
196 | __func__, format.format.width, format.format.height, | |
197 | format.format.code); | |
198 | ||
199 | format.pad = RWPF_PAD_SOURCE; | |
200 | ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, get_fmt, NULL, | |
201 | &format); | |
202 | if (ret < 0) | |
203 | return ret; | |
204 | ||
205 | dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF0 source\n", | |
206 | __func__, format.format.width, format.format.height, | |
207 | format.format.code); | |
208 | ||
209 | format.pad = LIF_PAD_SINK; | |
210 | ret = v4l2_subdev_call(&vsp1->lif->entity.subdev, pad, set_fmt, NULL, | |
211 | &format); | |
212 | if (ret < 0) | |
213 | return ret; | |
214 | ||
215 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF sink\n", | |
216 | __func__, format.format.width, format.format.height, | |
217 | format.format.code); | |
218 | ||
219 | /* Verify that the format at the output of the pipeline matches the | |
220 | * requested frame size and media bus code. | |
221 | */ | |
222 | if (format.format.width != width || format.format.height != height || | |
223 | format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) { | |
224 | dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__); | |
225 | return -EPIPE; | |
226 | } | |
227 | ||
228 | /* Mark the pipeline as streaming and enable the VSP1. This will store | |
229 | * the pipeline pointer in all entities, which the s_stream handlers | |
230 | * will need. We don't start the entities themselves right at this point | |
231 | * as there's no plane configured yet, so we can't start processing | |
232 | * buffers. | |
233 | */ | |
234 | ret = vsp1_device_get(vsp1); | |
235 | if (ret < 0) | |
236 | return ret; | |
237 | ||
238 | ret = media_entity_pipeline_start(&pipe->output->entity.subdev.entity, | |
239 | &pipe->pipe); | |
240 | if (ret < 0) { | |
241 | dev_dbg(vsp1->dev, "%s: pipeline start failed\n", __func__); | |
242 | vsp1_device_put(vsp1); | |
243 | return ret; | |
244 | } | |
245 | ||
246 | dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__); | |
247 | ||
248 | return 0; | |
249 | } | |
250 | EXPORT_SYMBOL_GPL(vsp1_du_setup_lif); | |
251 | ||
252 | /** | |
253 | * vsp1_du_setup_rpf - Setup one RPF input of the VSP pipeline | |
254 | * @dev: the VSP device | |
255 | * @rpf_index: index of the RPF to setup (0-based) | |
256 | * @pixelformat: V4L2 pixel format for the RPF memory input | |
257 | * @pitch: number of bytes per line in the image stored in memory | |
258 | * @mem: DMA addresses of the memory buffers (one per plane) | |
259 | * @src: the source crop rectangle for the RPF | |
260 | * @dst: the destination compose rectangle for the BRU input | |
261 | * | |
262 | * Configure the VSP to perform composition of the image referenced by @mem | |
263 | * through RPF @rpf_index, using the @src crop rectangle and the @dst | |
264 | * composition rectangle. The Z-order is fixed with RPF 0 at the bottom. | |
265 | * | |
266 | * Image format as stored in memory is expressed as a V4L2 @pixelformat value. | |
267 | * As a special case, setting the pixel format to 0 will disable the RPF. The | |
268 | * @pitch, @mem, @src and @dst parameters are ignored in that case. Calling the | |
269 | * function on a disabled RPF is allowed. | |
270 | * | |
271 | * The memory pitch is configurable to allow for padding at end of lines, or | |
272 | * simple for images that extend beyond the crop rectangle boundaries. The | |
273 | * @pitch value is expressed in bytes and applies to all planes for multiplanar | |
274 | * formats. | |
275 | * | |
276 | * The source memory buffer is referenced by the DMA address of its planes in | |
277 | * the @mem array. Up to two planes are supported. The second plane DMA address | |
278 | * is ignored for formats using a single plane. | |
279 | * | |
280 | * This function isn't reentrant, the caller needs to serialize calls. | |
281 | * | |
282 | * TODO: Implement Z-order control by decoupling the RPF index from the BRU | |
283 | * input index. | |
284 | * | |
285 | * Return 0 on success or a negative error code on failure. | |
286 | */ | |
287 | int vsp1_du_setup_rpf(struct device *dev, unsigned int rpf_index, | |
288 | u32 pixelformat, unsigned int pitch, | |
289 | dma_addr_t mem[2], const struct v4l2_rect *src, | |
290 | const struct v4l2_rect *dst) | |
291 | { | |
292 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
293 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
294 | const struct vsp1_format_info *fmtinfo; | |
295 | struct v4l2_subdev_selection sel; | |
296 | struct v4l2_subdev_format format; | |
297 | struct vsp1_rwpf_memory memory; | |
298 | struct vsp1_rwpf *rpf; | |
299 | unsigned long flags; | |
300 | bool start_stop = false; | |
301 | int ret; | |
302 | ||
303 | if (rpf_index >= vsp1->pdata.rpf_count) | |
304 | return -EINVAL; | |
305 | ||
306 | rpf = vsp1->rpf[rpf_index]; | |
307 | ||
308 | if (pixelformat == 0) { | |
309 | dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__, | |
310 | rpf_index); | |
311 | ||
312 | spin_lock_irqsave(&pipe->irqlock, flags); | |
313 | ||
314 | if (pipe->inputs[rpf_index]) { | |
315 | /* Remove the RPF from the pipeline if it was previously | |
316 | * enabled. | |
317 | */ | |
318 | vsp1->bru->inputs[rpf_index].rpf = NULL; | |
319 | pipe->inputs[rpf_index] = NULL; | |
320 | ||
321 | vsp1->drm->update = true; | |
322 | start_stop = --pipe->num_inputs == 0; | |
323 | } | |
324 | ||
325 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
326 | ||
327 | /* Stop the pipeline if we're the last user. */ | |
328 | if (start_stop) | |
329 | vsp1_pipeline_stop(pipe); | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
334 | dev_dbg(vsp1->dev, | |
335 | "%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad }\n", | |
336 | __func__, rpf_index, | |
337 | src->left, src->top, src->width, src->height, | |
338 | dst->left, dst->top, dst->width, dst->height, | |
339 | pixelformat, pitch, &mem[0], &mem[1]); | |
340 | ||
341 | /* Set the stride at the RPF input. */ | |
342 | fmtinfo = vsp1_get_format_info(pixelformat); | |
343 | if (!fmtinfo) { | |
344 | dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n", | |
345 | pixelformat); | |
346 | return -EINVAL; | |
347 | } | |
348 | ||
349 | rpf->fmtinfo = fmtinfo; | |
350 | rpf->format.num_planes = fmtinfo->planes; | |
351 | rpf->format.plane_fmt[0].bytesperline = pitch; | |
352 | rpf->format.plane_fmt[1].bytesperline = pitch; | |
353 | ||
354 | /* Configure the format on the RPF sink pad and propagate it up to the | |
355 | * BRU sink pad. | |
356 | */ | |
357 | memset(&format, 0, sizeof(format)); | |
358 | format.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
359 | format.pad = RWPF_PAD_SINK; | |
360 | format.format.width = src->width + src->left; | |
361 | format.format.height = src->height + src->top; | |
362 | format.format.code = fmtinfo->mbus; | |
363 | format.format.field = V4L2_FIELD_NONE; | |
364 | ||
365 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL, | |
366 | &format); | |
367 | if (ret < 0) | |
368 | return ret; | |
369 | ||
370 | dev_dbg(vsp1->dev, | |
371 | "%s: set format %ux%u (%x) on RPF%u sink\n", | |
372 | __func__, format.format.width, format.format.height, | |
373 | format.format.code, rpf->entity.index); | |
374 | ||
375 | memset(&sel, 0, sizeof(sel)); | |
376 | sel.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
377 | sel.pad = RWPF_PAD_SINK; | |
378 | sel.target = V4L2_SEL_TGT_CROP; | |
379 | sel.r = *src; | |
380 | ||
381 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL, | |
382 | &sel); | |
383 | if (ret < 0) | |
384 | return ret; | |
385 | ||
386 | dev_dbg(vsp1->dev, | |
387 | "%s: set selection (%u,%u)/%ux%u on RPF%u sink\n", | |
388 | __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height, | |
389 | rpf->entity.index); | |
390 | ||
391 | /* RPF source, hardcode the format to ARGB8888 to turn on format | |
392 | * conversion if needed. | |
393 | */ | |
394 | format.pad = RWPF_PAD_SOURCE; | |
395 | ||
396 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, get_fmt, NULL, | |
397 | &format); | |
398 | if (ret < 0) | |
399 | return ret; | |
400 | ||
401 | dev_dbg(vsp1->dev, | |
402 | "%s: got format %ux%u (%x) on RPF%u source\n", | |
403 | __func__, format.format.width, format.format.height, | |
404 | format.format.code, rpf->entity.index); | |
405 | ||
406 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
407 | ||
408 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL, | |
409 | &format); | |
410 | if (ret < 0) | |
411 | return ret; | |
412 | ||
413 | /* BRU sink, propagate the format from the RPF source. */ | |
414 | format.pad = rpf->entity.index; | |
415 | ||
416 | ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL, | |
417 | &format); | |
418 | if (ret < 0) | |
419 | return ret; | |
420 | ||
421 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
422 | __func__, format.format.width, format.format.height, | |
423 | format.format.code, format.pad); | |
424 | ||
425 | sel.pad = rpf->entity.index; | |
426 | sel.target = V4L2_SEL_TGT_COMPOSE; | |
427 | sel.r = *dst; | |
428 | ||
429 | ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection, | |
430 | NULL, &sel); | |
431 | if (ret < 0) | |
432 | return ret; | |
433 | ||
434 | dev_dbg(vsp1->dev, | |
435 | "%s: set selection (%u,%u)/%ux%u on BRU pad %u\n", | |
436 | __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height, | |
437 | sel.pad); | |
438 | ||
439 | /* Store the compose rectangle coordinates in the RPF. */ | |
440 | rpf->location.left = dst->left; | |
441 | rpf->location.top = dst->top; | |
442 | ||
443 | /* Set the memory buffer address. */ | |
444 | memory.num_planes = fmtinfo->planes; | |
445 | memory.addr[0] = mem[0]; | |
446 | memory.addr[1] = mem[1]; | |
447 | ||
448 | rpf->ops->set_memory(rpf, &memory); | |
449 | ||
450 | spin_lock_irqsave(&pipe->irqlock, flags); | |
451 | ||
452 | /* If the RPF was previously stopped set the BRU input to the RPF and | |
453 | * store the RPF in the pipeline inputs array. | |
454 | */ | |
455 | if (!pipe->inputs[rpf->entity.index]) { | |
456 | vsp1->bru->inputs[rpf_index].rpf = rpf; | |
457 | pipe->inputs[rpf->entity.index] = rpf; | |
458 | start_stop = pipe->num_inputs++ == 0; | |
459 | } | |
460 | ||
461 | /* Start the pipeline if it's currently stopped. */ | |
462 | vsp1->drm->update = true; | |
463 | if (start_stop) | |
464 | vsp1_drm_pipeline_run(pipe); | |
465 | ||
466 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
467 | ||
468 | return 0; | |
469 | } | |
470 | EXPORT_SYMBOL_GPL(vsp1_du_setup_rpf); | |
471 | ||
472 | /* ----------------------------------------------------------------------------- | |
473 | * Initialization | |
474 | */ | |
475 | ||
476 | int vsp1_drm_create_links(struct vsp1_device *vsp1) | |
477 | { | |
478 | const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE; | |
479 | unsigned int i; | |
480 | int ret; | |
481 | ||
482 | /* VSPD instances require a BRU to perform composition and a LIF to | |
483 | * output to the DU. | |
484 | */ | |
485 | if (!vsp1->bru || !vsp1->lif) | |
486 | return -ENXIO; | |
487 | ||
488 | for (i = 0; i < vsp1->pdata.rpf_count; ++i) { | |
489 | struct vsp1_rwpf *rpf = vsp1->rpf[i]; | |
490 | ||
491 | ret = media_create_pad_link(&rpf->entity.subdev.entity, | |
492 | RWPF_PAD_SOURCE, | |
493 | &vsp1->bru->entity.subdev.entity, | |
494 | i, flags); | |
495 | if (ret < 0) | |
496 | return ret; | |
497 | ||
498 | rpf->entity.sink = &vsp1->bru->entity.subdev.entity; | |
499 | rpf->entity.sink_pad = i; | |
500 | } | |
501 | ||
502 | ret = media_create_pad_link(&vsp1->bru->entity.subdev.entity, | |
503 | vsp1->bru->entity.source_pad, | |
504 | &vsp1->wpf[0]->entity.subdev.entity, | |
505 | RWPF_PAD_SINK, flags); | |
506 | if (ret < 0) | |
507 | return ret; | |
508 | ||
509 | vsp1->bru->entity.sink = &vsp1->wpf[0]->entity.subdev.entity; | |
510 | vsp1->bru->entity.sink_pad = RWPF_PAD_SINK; | |
511 | ||
512 | ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity, | |
513 | RWPF_PAD_SOURCE, | |
514 | &vsp1->lif->entity.subdev.entity, | |
515 | LIF_PAD_SINK, flags); | |
516 | if (ret < 0) | |
517 | return ret; | |
518 | ||
519 | return 0; | |
520 | } | |
521 | ||
522 | int vsp1_drm_init(struct vsp1_device *vsp1) | |
523 | { | |
524 | struct vsp1_pipeline *pipe; | |
525 | unsigned int i; | |
526 | ||
527 | vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL); | |
528 | if (!vsp1->drm) | |
529 | return -ENOMEM; | |
530 | ||
531 | pipe = &vsp1->drm->pipe; | |
532 | ||
533 | vsp1_pipeline_init(pipe); | |
534 | pipe->frame_end = vsp1_drm_pipeline_frame_end; | |
535 | ||
536 | /* The DRM pipeline is static, add entities manually. */ | |
537 | for (i = 0; i < vsp1->pdata.rpf_count; ++i) { | |
538 | struct vsp1_rwpf *input = vsp1->rpf[i]; | |
539 | ||
540 | list_add_tail(&input->entity.list_pipe, &pipe->entities); | |
541 | } | |
542 | ||
543 | list_add_tail(&vsp1->bru->entity.list_pipe, &pipe->entities); | |
544 | list_add_tail(&vsp1->wpf[0]->entity.list_pipe, &pipe->entities); | |
545 | list_add_tail(&vsp1->lif->entity.list_pipe, &pipe->entities); | |
546 | ||
547 | pipe->bru = &vsp1->bru->entity; | |
548 | pipe->lif = &vsp1->lif->entity; | |
549 | pipe->output = vsp1->wpf[0]; | |
550 | ||
551 | return 0; | |
552 | } |