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a626e64e LP |
1 | /* |
2 | * vsp1_sru.c -- R-Car VSP1 Super Resolution Unit | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/gfp.h> | |
16 | ||
17 | #include <media/v4l2-subdev.h> | |
18 | ||
19 | #include "vsp1.h" | |
20 | #include "vsp1_sru.h" | |
21 | ||
22 | #define SRU_MIN_SIZE 4U | |
23 | #define SRU_MAX_SIZE 8190U | |
24 | ||
25 | /* ----------------------------------------------------------------------------- | |
26 | * Device Access | |
27 | */ | |
28 | ||
29 | static inline u32 vsp1_sru_read(struct vsp1_sru *sru, u32 reg) | |
30 | { | |
31 | return vsp1_read(sru->entity.vsp1, reg); | |
32 | } | |
33 | ||
34 | static inline void vsp1_sru_write(struct vsp1_sru *sru, u32 reg, u32 data) | |
35 | { | |
36 | vsp1_write(sru->entity.vsp1, reg, data); | |
37 | } | |
38 | ||
39 | /* ----------------------------------------------------------------------------- | |
40 | * Controls | |
41 | */ | |
42 | ||
43 | #define V4L2_CID_VSP1_SRU_INTENSITY (V4L2_CID_USER_BASE + 1) | |
44 | ||
a626e64e LP |
45 | struct vsp1_sru_param { |
46 | u32 ctrl0; | |
47 | u32 ctrl2; | |
48 | }; | |
49 | ||
50 | #define VI6_SRU_CTRL0_PARAMS(p0, p1) \ | |
51 | (((p0) << VI6_SRU_CTRL0_PARAM0_SHIFT) | \ | |
52 | ((p1) << VI6_SRU_CTRL0_PARAM1_SHIFT)) | |
53 | ||
54 | #define VI6_SRU_CTRL2_PARAMS(p6, p7, p8) \ | |
55 | (((p6) << VI6_SRU_CTRL2_PARAM6_SHIFT) | \ | |
56 | ((p7) << VI6_SRU_CTRL2_PARAM7_SHIFT) | \ | |
57 | ((p8) << VI6_SRU_CTRL2_PARAM8_SHIFT)) | |
58 | ||
59 | static const struct vsp1_sru_param vsp1_sru_params[] = { | |
60 | { | |
61 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
62 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(24, 40, 255), | |
63 | }, { | |
64 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
65 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(8, 16, 255), | |
66 | }, { | |
67 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
68 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(36, 60, 255), | |
69 | }, { | |
70 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
71 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(12, 27, 255), | |
72 | }, { | |
73 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
74 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(48, 80, 255), | |
75 | }, { | |
76 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
77 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(16, 36, 255), | |
78 | }, | |
79 | }; | |
80 | ||
58f896d8 LP |
81 | static int sru_s_ctrl(struct v4l2_ctrl *ctrl) |
82 | { | |
83 | struct vsp1_sru *sru = | |
84 | container_of(ctrl->handler, struct vsp1_sru, ctrls); | |
85 | const struct vsp1_sru_param *param; | |
86 | u32 value; | |
87 | ||
88 | switch (ctrl->id) { | |
89 | case V4L2_CID_VSP1_SRU_INTENSITY: | |
90 | param = &vsp1_sru_params[ctrl->val - 1]; | |
91 | ||
92 | value = vsp1_sru_read(sru, VI6_SRU_CTRL0); | |
93 | value &= ~(VI6_SRU_CTRL0_PARAM0_MASK | | |
94 | VI6_SRU_CTRL0_PARAM1_MASK); | |
95 | value |= param->ctrl0; | |
96 | vsp1_sru_write(sru, VI6_SRU_CTRL0, value); | |
97 | ||
98 | vsp1_sru_write(sru, VI6_SRU_CTRL2, param->ctrl2); | |
99 | break; | |
100 | } | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
105 | static const struct v4l2_ctrl_ops sru_ctrl_ops = { | |
106 | .s_ctrl = sru_s_ctrl, | |
107 | }; | |
108 | ||
109 | static const struct v4l2_ctrl_config sru_intensity_control = { | |
110 | .ops = &sru_ctrl_ops, | |
111 | .id = V4L2_CID_VSP1_SRU_INTENSITY, | |
112 | .name = "Intensity", | |
113 | .type = V4L2_CTRL_TYPE_INTEGER, | |
114 | .min = 1, | |
115 | .max = 6, | |
116 | .def = 1, | |
117 | .step = 1, | |
118 | }; | |
119 | ||
120 | /* ----------------------------------------------------------------------------- | |
121 | * V4L2 Subdevice Core Operations | |
122 | */ | |
123 | ||
a626e64e LP |
124 | static int sru_s_stream(struct v4l2_subdev *subdev, int enable) |
125 | { | |
126 | struct vsp1_sru *sru = to_sru(subdev); | |
a626e64e LP |
127 | struct v4l2_mbus_framefmt *input; |
128 | struct v4l2_mbus_framefmt *output; | |
a626e64e | 129 | u32 ctrl0; |
58f896d8 LP |
130 | int ret; |
131 | ||
132 | ret = vsp1_entity_set_streaming(&sru->entity, enable); | |
133 | if (ret < 0) | |
134 | return ret; | |
a626e64e LP |
135 | |
136 | if (!enable) | |
137 | return 0; | |
138 | ||
139 | input = &sru->entity.formats[SRU_PAD_SINK]; | |
140 | output = &sru->entity.formats[SRU_PAD_SOURCE]; | |
a626e64e | 141 | |
27ffaeb0 | 142 | if (input->code == MEDIA_BUS_FMT_ARGB8888_1X32) |
a626e64e LP |
143 | ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3 |
144 | | VI6_SRU_CTRL0_PARAM4; | |
145 | else | |
146 | ctrl0 = VI6_SRU_CTRL0_PARAM3; | |
147 | ||
58f896d8 LP |
148 | if (input->width != output->width) |
149 | ctrl0 |= VI6_SRU_CTRL0_MODE_UPSCALE; | |
150 | ||
151 | /* Take the control handler lock to ensure that the CTRL0 value won't be | |
152 | * changed behind our back by a set control operation. | |
153 | */ | |
5aa2eb3c | 154 | if (sru->entity.vsp1->info->uapi) |
f2ed459d | 155 | mutex_lock(sru->ctrls.lock); |
58f896d8 LP |
156 | ctrl0 |= vsp1_sru_read(sru, VI6_SRU_CTRL0) |
157 | & (VI6_SRU_CTRL0_PARAM0_MASK | VI6_SRU_CTRL0_PARAM1_MASK); | |
f6acfcdc | 158 | vsp1_sru_write(sru, VI6_SRU_CTRL0, ctrl0); |
5aa2eb3c | 159 | if (sru->entity.vsp1->info->uapi) |
f2ed459d | 160 | mutex_unlock(sru->ctrls.lock); |
58f896d8 | 161 | |
a626e64e | 162 | vsp1_sru_write(sru, VI6_SRU_CTRL1, VI6_SRU_CTRL1_PARAM5); |
a626e64e LP |
163 | |
164 | return 0; | |
165 | } | |
166 | ||
167 | /* ----------------------------------------------------------------------------- | |
168 | * V4L2 Subdevice Pad Operations | |
169 | */ | |
170 | ||
171 | static int sru_enum_mbus_code(struct v4l2_subdev *subdev, | |
f7234138 | 172 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
173 | struct v4l2_subdev_mbus_code_enum *code) |
174 | { | |
175 | static const unsigned int codes[] = { | |
27ffaeb0 BB |
176 | MEDIA_BUS_FMT_ARGB8888_1X32, |
177 | MEDIA_BUS_FMT_AYUV8_1X32, | |
a626e64e | 178 | }; |
3f1ccf16 | 179 | struct vsp1_sru *sru = to_sru(subdev); |
a626e64e LP |
180 | struct v4l2_mbus_framefmt *format; |
181 | ||
182 | if (code->pad == SRU_PAD_SINK) { | |
183 | if (code->index >= ARRAY_SIZE(codes)) | |
184 | return -EINVAL; | |
185 | ||
186 | code->code = codes[code->index]; | |
187 | } else { | |
188 | /* The SRU can't perform format conversion, the sink format is | |
189 | * always identical to the source format. | |
190 | */ | |
191 | if (code->index) | |
192 | return -EINVAL; | |
193 | ||
3f1ccf16 HV |
194 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
195 | SRU_PAD_SINK, code->which); | |
a626e64e LP |
196 | code->code = format->code; |
197 | } | |
198 | ||
199 | return 0; | |
200 | } | |
201 | ||
202 | static int sru_enum_frame_size(struct v4l2_subdev *subdev, | |
f7234138 | 203 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
204 | struct v4l2_subdev_frame_size_enum *fse) |
205 | { | |
5778e749 | 206 | struct vsp1_sru *sru = to_sru(subdev); |
a626e64e LP |
207 | struct v4l2_mbus_framefmt *format; |
208 | ||
5778e749 HV |
209 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
210 | SRU_PAD_SINK, fse->which); | |
a626e64e LP |
211 | |
212 | if (fse->index || fse->code != format->code) | |
213 | return -EINVAL; | |
214 | ||
215 | if (fse->pad == SRU_PAD_SINK) { | |
216 | fse->min_width = SRU_MIN_SIZE; | |
217 | fse->max_width = SRU_MAX_SIZE; | |
218 | fse->min_height = SRU_MIN_SIZE; | |
219 | fse->max_height = SRU_MAX_SIZE; | |
220 | } else { | |
221 | fse->min_width = format->width; | |
222 | fse->min_height = format->height; | |
223 | if (format->width <= SRU_MAX_SIZE / 2 && | |
224 | format->height <= SRU_MAX_SIZE / 2) { | |
225 | fse->max_width = format->width * 2; | |
226 | fse->max_height = format->height * 2; | |
227 | } else { | |
228 | fse->max_width = format->width; | |
229 | fse->max_height = format->height; | |
230 | } | |
231 | } | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
f7234138 | 236 | static int sru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
237 | struct v4l2_subdev_format *fmt) |
238 | { | |
239 | struct vsp1_sru *sru = to_sru(subdev); | |
240 | ||
f7234138 | 241 | fmt->format = *vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, |
a626e64e LP |
242 | fmt->which); |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
f7234138 | 247 | static void sru_try_format(struct vsp1_sru *sru, struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
248 | unsigned int pad, struct v4l2_mbus_framefmt *fmt, |
249 | enum v4l2_subdev_format_whence which) | |
250 | { | |
251 | struct v4l2_mbus_framefmt *format; | |
252 | unsigned int input_area; | |
253 | unsigned int output_area; | |
254 | ||
255 | switch (pad) { | |
256 | case SRU_PAD_SINK: | |
257 | /* Default to YUV if the requested format is not supported. */ | |
27ffaeb0 BB |
258 | if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && |
259 | fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) | |
260 | fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; | |
a626e64e LP |
261 | |
262 | fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
263 | fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
264 | break; | |
265 | ||
266 | case SRU_PAD_SOURCE: | |
267 | /* The SRU can't perform format conversion. */ | |
f7234138 | 268 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
a626e64e LP |
269 | SRU_PAD_SINK, which); |
270 | fmt->code = format->code; | |
271 | ||
272 | /* We can upscale by 2 in both direction, but not independently. | |
273 | * Compare the input and output rectangles areas (avoiding | |
274 | * integer overflows on the output): if the requested output | |
275 | * area is larger than 1.5^2 the input area upscale by two, | |
276 | * otherwise don't scale. | |
277 | */ | |
278 | input_area = format->width * format->height; | |
279 | output_area = min(fmt->width, SRU_MAX_SIZE) | |
280 | * min(fmt->height, SRU_MAX_SIZE); | |
281 | ||
282 | if (fmt->width <= SRU_MAX_SIZE / 2 && | |
283 | fmt->height <= SRU_MAX_SIZE / 2 && | |
284 | output_area > input_area * 9 / 4) { | |
285 | fmt->width = format->width * 2; | |
286 | fmt->height = format->height * 2; | |
287 | } else { | |
288 | fmt->width = format->width; | |
289 | fmt->height = format->height; | |
290 | } | |
291 | break; | |
292 | } | |
293 | ||
294 | fmt->field = V4L2_FIELD_NONE; | |
295 | fmt->colorspace = V4L2_COLORSPACE_SRGB; | |
296 | } | |
297 | ||
f7234138 | 298 | static int sru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
299 | struct v4l2_subdev_format *fmt) |
300 | { | |
301 | struct vsp1_sru *sru = to_sru(subdev); | |
302 | struct v4l2_mbus_framefmt *format; | |
303 | ||
f7234138 | 304 | sru_try_format(sru, cfg, fmt->pad, &fmt->format, fmt->which); |
a626e64e | 305 | |
f7234138 | 306 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, |
a626e64e LP |
307 | fmt->which); |
308 | *format = fmt->format; | |
309 | ||
310 | if (fmt->pad == SRU_PAD_SINK) { | |
311 | /* Propagate the format to the source pad. */ | |
f7234138 | 312 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
a626e64e LP |
313 | SRU_PAD_SOURCE, fmt->which); |
314 | *format = fmt->format; | |
315 | ||
f7234138 | 316 | sru_try_format(sru, cfg, SRU_PAD_SOURCE, format, fmt->which); |
a626e64e LP |
317 | } |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
322 | /* ----------------------------------------------------------------------------- | |
323 | * V4L2 Subdevice Operations | |
324 | */ | |
325 | ||
326 | static struct v4l2_subdev_video_ops sru_video_ops = { | |
327 | .s_stream = sru_s_stream, | |
328 | }; | |
329 | ||
330 | static struct v4l2_subdev_pad_ops sru_pad_ops = { | |
331 | .enum_mbus_code = sru_enum_mbus_code, | |
332 | .enum_frame_size = sru_enum_frame_size, | |
333 | .get_fmt = sru_get_format, | |
334 | .set_fmt = sru_set_format, | |
335 | }; | |
336 | ||
337 | static struct v4l2_subdev_ops sru_ops = { | |
338 | .video = &sru_video_ops, | |
339 | .pad = &sru_pad_ops, | |
340 | }; | |
341 | ||
342 | /* ----------------------------------------------------------------------------- | |
343 | * Initialization and Cleanup | |
344 | */ | |
345 | ||
346 | struct vsp1_sru *vsp1_sru_create(struct vsp1_device *vsp1) | |
347 | { | |
348 | struct v4l2_subdev *subdev; | |
349 | struct vsp1_sru *sru; | |
350 | int ret; | |
351 | ||
352 | sru = devm_kzalloc(vsp1->dev, sizeof(*sru), GFP_KERNEL); | |
353 | if (sru == NULL) | |
354 | return ERR_PTR(-ENOMEM); | |
355 | ||
356 | sru->entity.type = VSP1_ENTITY_SRU; | |
a626e64e LP |
357 | |
358 | ret = vsp1_entity_init(vsp1, &sru->entity, 2); | |
359 | if (ret < 0) | |
360 | return ERR_PTR(ret); | |
361 | ||
362 | /* Initialize the V4L2 subdev. */ | |
363 | subdev = &sru->entity.subdev; | |
364 | v4l2_subdev_init(subdev, &sru_ops); | |
365 | ||
babca007 | 366 | subdev->entity.ops = &vsp1->media_ops; |
a626e64e LP |
367 | subdev->internal_ops = &vsp1_subdev_internal_ops; |
368 | snprintf(subdev->name, sizeof(subdev->name), "%s sru", | |
369 | dev_name(vsp1->dev)); | |
370 | v4l2_set_subdevdata(subdev, sru); | |
371 | subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; | |
372 | ||
373 | vsp1_entity_init_formats(subdev, NULL); | |
374 | ||
375 | /* Initialize the control handler. */ | |
376 | v4l2_ctrl_handler_init(&sru->ctrls, 1); | |
377 | v4l2_ctrl_new_custom(&sru->ctrls, &sru_intensity_control, NULL); | |
a1606102 | 378 | |
a626e64e LP |
379 | sru->entity.subdev.ctrl_handler = &sru->ctrls; |
380 | ||
a1606102 LP |
381 | if (sru->ctrls.error) { |
382 | dev_err(vsp1->dev, "sru: failed to initialize controls\n"); | |
383 | ret = sru->ctrls.error; | |
384 | vsp1_entity_destroy(&sru->entity); | |
385 | return ERR_PTR(ret); | |
386 | } | |
387 | ||
a626e64e LP |
388 | return sru; |
389 | } |