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a626e64e LP |
1 | /* |
2 | * vsp1_sru.c -- R-Car VSP1 Super Resolution Unit | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/gfp.h> | |
16 | ||
17 | #include <media/v4l2-subdev.h> | |
18 | ||
19 | #include "vsp1.h" | |
20 | #include "vsp1_sru.h" | |
21 | ||
22 | #define SRU_MIN_SIZE 4U | |
23 | #define SRU_MAX_SIZE 8190U | |
24 | ||
25 | /* ----------------------------------------------------------------------------- | |
26 | * Device Access | |
27 | */ | |
28 | ||
a626e64e LP |
29 | static inline void vsp1_sru_write(struct vsp1_sru *sru, u32 reg, u32 data) |
30 | { | |
773abafe | 31 | vsp1_mod_write(&sru->entity, reg, data); |
a626e64e LP |
32 | } |
33 | ||
34 | /* ----------------------------------------------------------------------------- | |
35 | * Controls | |
36 | */ | |
37 | ||
38 | #define V4L2_CID_VSP1_SRU_INTENSITY (V4L2_CID_USER_BASE + 1) | |
39 | ||
a626e64e LP |
40 | struct vsp1_sru_param { |
41 | u32 ctrl0; | |
42 | u32 ctrl2; | |
43 | }; | |
44 | ||
45 | #define VI6_SRU_CTRL0_PARAMS(p0, p1) \ | |
46 | (((p0) << VI6_SRU_CTRL0_PARAM0_SHIFT) | \ | |
47 | ((p1) << VI6_SRU_CTRL0_PARAM1_SHIFT)) | |
48 | ||
49 | #define VI6_SRU_CTRL2_PARAMS(p6, p7, p8) \ | |
50 | (((p6) << VI6_SRU_CTRL2_PARAM6_SHIFT) | \ | |
51 | ((p7) << VI6_SRU_CTRL2_PARAM7_SHIFT) | \ | |
52 | ((p8) << VI6_SRU_CTRL2_PARAM8_SHIFT)) | |
53 | ||
54 | static const struct vsp1_sru_param vsp1_sru_params[] = { | |
55 | { | |
56 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
57 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(24, 40, 255), | |
58 | }, { | |
59 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
60 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(8, 16, 255), | |
61 | }, { | |
62 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
63 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(36, 60, 255), | |
64 | }, { | |
65 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
66 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(12, 27, 255), | |
67 | }, { | |
68 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
69 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(48, 80, 255), | |
70 | }, { | |
71 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
72 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(16, 36, 255), | |
73 | }, | |
74 | }; | |
75 | ||
58f896d8 LP |
76 | static int sru_s_ctrl(struct v4l2_ctrl *ctrl) |
77 | { | |
78 | struct vsp1_sru *sru = | |
79 | container_of(ctrl->handler, struct vsp1_sru, ctrls); | |
58f896d8 LP |
80 | |
81 | switch (ctrl->id) { | |
82 | case V4L2_CID_VSP1_SRU_INTENSITY: | |
d884a8b2 | 83 | sru->intensity = ctrl->val; |
58f896d8 LP |
84 | break; |
85 | } | |
86 | ||
87 | return 0; | |
88 | } | |
89 | ||
90 | static const struct v4l2_ctrl_ops sru_ctrl_ops = { | |
91 | .s_ctrl = sru_s_ctrl, | |
92 | }; | |
93 | ||
94 | static const struct v4l2_ctrl_config sru_intensity_control = { | |
95 | .ops = &sru_ctrl_ops, | |
96 | .id = V4L2_CID_VSP1_SRU_INTENSITY, | |
97 | .name = "Intensity", | |
98 | .type = V4L2_CTRL_TYPE_INTEGER, | |
99 | .min = 1, | |
100 | .max = 6, | |
101 | .def = 1, | |
102 | .step = 1, | |
103 | }; | |
104 | ||
105 | /* ----------------------------------------------------------------------------- | |
106 | * V4L2 Subdevice Core Operations | |
107 | */ | |
108 | ||
a626e64e LP |
109 | static int sru_s_stream(struct v4l2_subdev *subdev, int enable) |
110 | { | |
d884a8b2 | 111 | const struct vsp1_sru_param *param; |
a626e64e | 112 | struct vsp1_sru *sru = to_sru(subdev); |
a626e64e LP |
113 | struct v4l2_mbus_framefmt *input; |
114 | struct v4l2_mbus_framefmt *output; | |
a626e64e | 115 | u32 ctrl0; |
58f896d8 | 116 | |
a626e64e LP |
117 | if (!enable) |
118 | return 0; | |
119 | ||
120 | input = &sru->entity.formats[SRU_PAD_SINK]; | |
121 | output = &sru->entity.formats[SRU_PAD_SOURCE]; | |
a626e64e | 122 | |
27ffaeb0 | 123 | if (input->code == MEDIA_BUS_FMT_ARGB8888_1X32) |
a626e64e LP |
124 | ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3 |
125 | | VI6_SRU_CTRL0_PARAM4; | |
126 | else | |
127 | ctrl0 = VI6_SRU_CTRL0_PARAM3; | |
128 | ||
58f896d8 LP |
129 | if (input->width != output->width) |
130 | ctrl0 |= VI6_SRU_CTRL0_MODE_UPSCALE; | |
131 | ||
d884a8b2 LP |
132 | param = &vsp1_sru_params[sru->intensity - 1]; |
133 | ||
134 | ctrl0 |= param->ctrl0; | |
58f896d8 | 135 | |
d884a8b2 | 136 | vsp1_sru_write(sru, VI6_SRU_CTRL0, ctrl0); |
a626e64e | 137 | vsp1_sru_write(sru, VI6_SRU_CTRL1, VI6_SRU_CTRL1_PARAM5); |
d884a8b2 | 138 | vsp1_sru_write(sru, VI6_SRU_CTRL2, param->ctrl2); |
a626e64e LP |
139 | |
140 | return 0; | |
141 | } | |
142 | ||
143 | /* ----------------------------------------------------------------------------- | |
144 | * V4L2 Subdevice Pad Operations | |
145 | */ | |
146 | ||
147 | static int sru_enum_mbus_code(struct v4l2_subdev *subdev, | |
f7234138 | 148 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
149 | struct v4l2_subdev_mbus_code_enum *code) |
150 | { | |
151 | static const unsigned int codes[] = { | |
27ffaeb0 BB |
152 | MEDIA_BUS_FMT_ARGB8888_1X32, |
153 | MEDIA_BUS_FMT_AYUV8_1X32, | |
a626e64e | 154 | }; |
3f1ccf16 | 155 | struct vsp1_sru *sru = to_sru(subdev); |
a626e64e LP |
156 | struct v4l2_mbus_framefmt *format; |
157 | ||
158 | if (code->pad == SRU_PAD_SINK) { | |
159 | if (code->index >= ARRAY_SIZE(codes)) | |
160 | return -EINVAL; | |
161 | ||
162 | code->code = codes[code->index]; | |
163 | } else { | |
164 | /* The SRU can't perform format conversion, the sink format is | |
165 | * always identical to the source format. | |
166 | */ | |
167 | if (code->index) | |
168 | return -EINVAL; | |
169 | ||
3f1ccf16 HV |
170 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
171 | SRU_PAD_SINK, code->which); | |
a626e64e LP |
172 | code->code = format->code; |
173 | } | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | static int sru_enum_frame_size(struct v4l2_subdev *subdev, | |
f7234138 | 179 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
180 | struct v4l2_subdev_frame_size_enum *fse) |
181 | { | |
5778e749 | 182 | struct vsp1_sru *sru = to_sru(subdev); |
a626e64e LP |
183 | struct v4l2_mbus_framefmt *format; |
184 | ||
5778e749 HV |
185 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
186 | SRU_PAD_SINK, fse->which); | |
a626e64e LP |
187 | |
188 | if (fse->index || fse->code != format->code) | |
189 | return -EINVAL; | |
190 | ||
191 | if (fse->pad == SRU_PAD_SINK) { | |
192 | fse->min_width = SRU_MIN_SIZE; | |
193 | fse->max_width = SRU_MAX_SIZE; | |
194 | fse->min_height = SRU_MIN_SIZE; | |
195 | fse->max_height = SRU_MAX_SIZE; | |
196 | } else { | |
197 | fse->min_width = format->width; | |
198 | fse->min_height = format->height; | |
199 | if (format->width <= SRU_MAX_SIZE / 2 && | |
200 | format->height <= SRU_MAX_SIZE / 2) { | |
201 | fse->max_width = format->width * 2; | |
202 | fse->max_height = format->height * 2; | |
203 | } else { | |
204 | fse->max_width = format->width; | |
205 | fse->max_height = format->height; | |
206 | } | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
1bd0a1bd LP |
212 | static int sru_get_format(struct v4l2_subdev *subdev, |
213 | struct v4l2_subdev_pad_config *cfg, | |
a626e64e LP |
214 | struct v4l2_subdev_format *fmt) |
215 | { | |
216 | struct vsp1_sru *sru = to_sru(subdev); | |
217 | ||
f7234138 | 218 | fmt->format = *vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, |
a626e64e LP |
219 | fmt->which); |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
1bd0a1bd LP |
224 | static void sru_try_format(struct vsp1_sru *sru, |
225 | struct v4l2_subdev_pad_config *cfg, | |
a626e64e LP |
226 | unsigned int pad, struct v4l2_mbus_framefmt *fmt, |
227 | enum v4l2_subdev_format_whence which) | |
228 | { | |
229 | struct v4l2_mbus_framefmt *format; | |
230 | unsigned int input_area; | |
231 | unsigned int output_area; | |
232 | ||
233 | switch (pad) { | |
234 | case SRU_PAD_SINK: | |
235 | /* Default to YUV if the requested format is not supported. */ | |
27ffaeb0 BB |
236 | if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && |
237 | fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) | |
238 | fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; | |
a626e64e LP |
239 | |
240 | fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
241 | fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
242 | break; | |
243 | ||
244 | case SRU_PAD_SOURCE: | |
245 | /* The SRU can't perform format conversion. */ | |
f7234138 | 246 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
a626e64e LP |
247 | SRU_PAD_SINK, which); |
248 | fmt->code = format->code; | |
249 | ||
250 | /* We can upscale by 2 in both direction, but not independently. | |
251 | * Compare the input and output rectangles areas (avoiding | |
252 | * integer overflows on the output): if the requested output | |
253 | * area is larger than 1.5^2 the input area upscale by two, | |
254 | * otherwise don't scale. | |
255 | */ | |
256 | input_area = format->width * format->height; | |
257 | output_area = min(fmt->width, SRU_MAX_SIZE) | |
258 | * min(fmt->height, SRU_MAX_SIZE); | |
259 | ||
260 | if (fmt->width <= SRU_MAX_SIZE / 2 && | |
261 | fmt->height <= SRU_MAX_SIZE / 2 && | |
262 | output_area > input_area * 9 / 4) { | |
263 | fmt->width = format->width * 2; | |
264 | fmt->height = format->height * 2; | |
265 | } else { | |
266 | fmt->width = format->width; | |
267 | fmt->height = format->height; | |
268 | } | |
269 | break; | |
270 | } | |
271 | ||
272 | fmt->field = V4L2_FIELD_NONE; | |
273 | fmt->colorspace = V4L2_COLORSPACE_SRGB; | |
274 | } | |
275 | ||
1bd0a1bd LP |
276 | static int sru_set_format(struct v4l2_subdev *subdev, |
277 | struct v4l2_subdev_pad_config *cfg, | |
a626e64e LP |
278 | struct v4l2_subdev_format *fmt) |
279 | { | |
280 | struct vsp1_sru *sru = to_sru(subdev); | |
281 | struct v4l2_mbus_framefmt *format; | |
282 | ||
f7234138 | 283 | sru_try_format(sru, cfg, fmt->pad, &fmt->format, fmt->which); |
a626e64e | 284 | |
f7234138 | 285 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, |
a626e64e LP |
286 | fmt->which); |
287 | *format = fmt->format; | |
288 | ||
289 | if (fmt->pad == SRU_PAD_SINK) { | |
290 | /* Propagate the format to the source pad. */ | |
f7234138 | 291 | format = vsp1_entity_get_pad_format(&sru->entity, cfg, |
a626e64e LP |
292 | SRU_PAD_SOURCE, fmt->which); |
293 | *format = fmt->format; | |
294 | ||
f7234138 | 295 | sru_try_format(sru, cfg, SRU_PAD_SOURCE, format, fmt->which); |
a626e64e LP |
296 | } |
297 | ||
298 | return 0; | |
299 | } | |
300 | ||
301 | /* ----------------------------------------------------------------------------- | |
302 | * V4L2 Subdevice Operations | |
303 | */ | |
304 | ||
305 | static struct v4l2_subdev_video_ops sru_video_ops = { | |
306 | .s_stream = sru_s_stream, | |
307 | }; | |
308 | ||
309 | static struct v4l2_subdev_pad_ops sru_pad_ops = { | |
310 | .enum_mbus_code = sru_enum_mbus_code, | |
311 | .enum_frame_size = sru_enum_frame_size, | |
312 | .get_fmt = sru_get_format, | |
313 | .set_fmt = sru_set_format, | |
314 | }; | |
315 | ||
316 | static struct v4l2_subdev_ops sru_ops = { | |
317 | .video = &sru_video_ops, | |
318 | .pad = &sru_pad_ops, | |
319 | }; | |
320 | ||
321 | /* ----------------------------------------------------------------------------- | |
322 | * Initialization and Cleanup | |
323 | */ | |
324 | ||
325 | struct vsp1_sru *vsp1_sru_create(struct vsp1_device *vsp1) | |
326 | { | |
a626e64e LP |
327 | struct vsp1_sru *sru; |
328 | int ret; | |
329 | ||
330 | sru = devm_kzalloc(vsp1->dev, sizeof(*sru), GFP_KERNEL); | |
331 | if (sru == NULL) | |
332 | return ERR_PTR(-ENOMEM); | |
333 | ||
334 | sru->entity.type = VSP1_ENTITY_SRU; | |
a626e64e | 335 | |
823329df | 336 | ret = vsp1_entity_init(vsp1, &sru->entity, "sru", 2, &sru_ops); |
a626e64e LP |
337 | if (ret < 0) |
338 | return ERR_PTR(ret); | |
339 | ||
a626e64e LP |
340 | /* Initialize the control handler. */ |
341 | v4l2_ctrl_handler_init(&sru->ctrls, 1); | |
342 | v4l2_ctrl_new_custom(&sru->ctrls, &sru_intensity_control, NULL); | |
a1606102 | 343 | |
d884a8b2 LP |
344 | sru->intensity = 1; |
345 | ||
a626e64e LP |
346 | sru->entity.subdev.ctrl_handler = &sru->ctrls; |
347 | ||
a1606102 LP |
348 | if (sru->ctrls.error) { |
349 | dev_err(vsp1->dev, "sru: failed to initialize controls\n"); | |
350 | ret = sru->ctrls.error; | |
351 | vsp1_entity_destroy(&sru->entity); | |
352 | return ERR_PTR(ret); | |
353 | } | |
354 | ||
a626e64e LP |
355 | return sru; |
356 | } |