Commit | Line | Data |
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a626e64e LP |
1 | /* |
2 | * vsp1_sru.c -- R-Car VSP1 Super Resolution Unit | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/gfp.h> | |
16 | ||
17 | #include <media/v4l2-subdev.h> | |
18 | ||
19 | #include "vsp1.h" | |
5e8dbbf3 | 20 | #include "vsp1_dl.h" |
a626e64e LP |
21 | #include "vsp1_sru.h" |
22 | ||
23 | #define SRU_MIN_SIZE 4U | |
24 | #define SRU_MAX_SIZE 8190U | |
25 | ||
26 | /* ----------------------------------------------------------------------------- | |
27 | * Device Access | |
28 | */ | |
29 | ||
5e8dbbf3 LP |
30 | static inline void vsp1_sru_write(struct vsp1_sru *sru, struct vsp1_dl_list *dl, |
31 | u32 reg, u32 data) | |
a626e64e | 32 | { |
5e8dbbf3 | 33 | vsp1_dl_list_write(dl, reg, data); |
a626e64e LP |
34 | } |
35 | ||
36 | /* ----------------------------------------------------------------------------- | |
37 | * Controls | |
38 | */ | |
39 | ||
67a706f3 | 40 | #define V4L2_CID_VSP1_SRU_INTENSITY (V4L2_CID_USER_BASE | 0x1001) |
a626e64e | 41 | |
a626e64e LP |
42 | struct vsp1_sru_param { |
43 | u32 ctrl0; | |
44 | u32 ctrl2; | |
45 | }; | |
46 | ||
47 | #define VI6_SRU_CTRL0_PARAMS(p0, p1) \ | |
48 | (((p0) << VI6_SRU_CTRL0_PARAM0_SHIFT) | \ | |
49 | ((p1) << VI6_SRU_CTRL0_PARAM1_SHIFT)) | |
50 | ||
51 | #define VI6_SRU_CTRL2_PARAMS(p6, p7, p8) \ | |
52 | (((p6) << VI6_SRU_CTRL2_PARAM6_SHIFT) | \ | |
53 | ((p7) << VI6_SRU_CTRL2_PARAM7_SHIFT) | \ | |
54 | ((p8) << VI6_SRU_CTRL2_PARAM8_SHIFT)) | |
55 | ||
56 | static const struct vsp1_sru_param vsp1_sru_params[] = { | |
57 | { | |
58 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
59 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(24, 40, 255), | |
60 | }, { | |
61 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(256, 4) | VI6_SRU_CTRL0_EN, | |
62 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(8, 16, 255), | |
63 | }, { | |
64 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
65 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(36, 60, 255), | |
66 | }, { | |
67 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(384, 5) | VI6_SRU_CTRL0_EN, | |
68 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(12, 27, 255), | |
69 | }, { | |
70 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
71 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(48, 80, 255), | |
72 | }, { | |
73 | .ctrl0 = VI6_SRU_CTRL0_PARAMS(511, 6) | VI6_SRU_CTRL0_EN, | |
74 | .ctrl2 = VI6_SRU_CTRL2_PARAMS(16, 36, 255), | |
75 | }, | |
76 | }; | |
77 | ||
58f896d8 LP |
78 | static int sru_s_ctrl(struct v4l2_ctrl *ctrl) |
79 | { | |
80 | struct vsp1_sru *sru = | |
81 | container_of(ctrl->handler, struct vsp1_sru, ctrls); | |
58f896d8 LP |
82 | |
83 | switch (ctrl->id) { | |
84 | case V4L2_CID_VSP1_SRU_INTENSITY: | |
d884a8b2 | 85 | sru->intensity = ctrl->val; |
58f896d8 LP |
86 | break; |
87 | } | |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static const struct v4l2_ctrl_ops sru_ctrl_ops = { | |
93 | .s_ctrl = sru_s_ctrl, | |
94 | }; | |
95 | ||
96 | static const struct v4l2_ctrl_config sru_intensity_control = { | |
97 | .ops = &sru_ctrl_ops, | |
98 | .id = V4L2_CID_VSP1_SRU_INTENSITY, | |
99 | .name = "Intensity", | |
100 | .type = V4L2_CTRL_TYPE_INTEGER, | |
101 | .min = 1, | |
102 | .max = 6, | |
103 | .def = 1, | |
104 | .step = 1, | |
105 | }; | |
106 | ||
107 | /* ----------------------------------------------------------------------------- | |
7b905f05 | 108 | * V4L2 Subdevice Operations |
a626e64e LP |
109 | */ |
110 | ||
111 | static int sru_enum_mbus_code(struct v4l2_subdev *subdev, | |
f7234138 | 112 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
113 | struct v4l2_subdev_mbus_code_enum *code) |
114 | { | |
115 | static const unsigned int codes[] = { | |
27ffaeb0 BB |
116 | MEDIA_BUS_FMT_ARGB8888_1X32, |
117 | MEDIA_BUS_FMT_AYUV8_1X32, | |
a626e64e | 118 | }; |
a626e64e | 119 | |
6ad9ba9c LP |
120 | return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes, |
121 | ARRAY_SIZE(codes)); | |
a626e64e LP |
122 | } |
123 | ||
124 | static int sru_enum_frame_size(struct v4l2_subdev *subdev, | |
f7234138 | 125 | struct v4l2_subdev_pad_config *cfg, |
a626e64e LP |
126 | struct v4l2_subdev_frame_size_enum *fse) |
127 | { | |
5778e749 | 128 | struct vsp1_sru *sru = to_sru(subdev); |
e790c3cb | 129 | struct v4l2_subdev_pad_config *config; |
a626e64e LP |
130 | struct v4l2_mbus_framefmt *format; |
131 | ||
e790c3cb LP |
132 | config = vsp1_entity_get_pad_config(&sru->entity, cfg, fse->which); |
133 | if (!config) | |
134 | return -EINVAL; | |
135 | ||
136 | format = vsp1_entity_get_pad_format(&sru->entity, config, SRU_PAD_SINK); | |
a626e64e LP |
137 | |
138 | if (fse->index || fse->code != format->code) | |
139 | return -EINVAL; | |
140 | ||
141 | if (fse->pad == SRU_PAD_SINK) { | |
142 | fse->min_width = SRU_MIN_SIZE; | |
143 | fse->max_width = SRU_MAX_SIZE; | |
144 | fse->min_height = SRU_MIN_SIZE; | |
145 | fse->max_height = SRU_MAX_SIZE; | |
146 | } else { | |
147 | fse->min_width = format->width; | |
148 | fse->min_height = format->height; | |
149 | if (format->width <= SRU_MAX_SIZE / 2 && | |
150 | format->height <= SRU_MAX_SIZE / 2) { | |
151 | fse->max_width = format->width * 2; | |
152 | fse->max_height = format->height * 2; | |
153 | } else { | |
154 | fse->max_width = format->width; | |
155 | fse->max_height = format->height; | |
156 | } | |
157 | } | |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
1bd0a1bd | 162 | static void sru_try_format(struct vsp1_sru *sru, |
e790c3cb LP |
163 | struct v4l2_subdev_pad_config *config, |
164 | unsigned int pad, struct v4l2_mbus_framefmt *fmt) | |
a626e64e LP |
165 | { |
166 | struct v4l2_mbus_framefmt *format; | |
167 | unsigned int input_area; | |
168 | unsigned int output_area; | |
169 | ||
170 | switch (pad) { | |
171 | case SRU_PAD_SINK: | |
172 | /* Default to YUV if the requested format is not supported. */ | |
27ffaeb0 BB |
173 | if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && |
174 | fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) | |
175 | fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; | |
a626e64e LP |
176 | |
177 | fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
178 | fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE); | |
179 | break; | |
180 | ||
181 | case SRU_PAD_SOURCE: | |
182 | /* The SRU can't perform format conversion. */ | |
e790c3cb LP |
183 | format = vsp1_entity_get_pad_format(&sru->entity, config, |
184 | SRU_PAD_SINK); | |
a626e64e LP |
185 | fmt->code = format->code; |
186 | ||
187 | /* We can upscale by 2 in both direction, but not independently. | |
188 | * Compare the input and output rectangles areas (avoiding | |
189 | * integer overflows on the output): if the requested output | |
190 | * area is larger than 1.5^2 the input area upscale by two, | |
191 | * otherwise don't scale. | |
192 | */ | |
193 | input_area = format->width * format->height; | |
194 | output_area = min(fmt->width, SRU_MAX_SIZE) | |
195 | * min(fmt->height, SRU_MAX_SIZE); | |
196 | ||
197 | if (fmt->width <= SRU_MAX_SIZE / 2 && | |
198 | fmt->height <= SRU_MAX_SIZE / 2 && | |
199 | output_area > input_area * 9 / 4) { | |
200 | fmt->width = format->width * 2; | |
201 | fmt->height = format->height * 2; | |
202 | } else { | |
203 | fmt->width = format->width; | |
204 | fmt->height = format->height; | |
205 | } | |
206 | break; | |
207 | } | |
208 | ||
209 | fmt->field = V4L2_FIELD_NONE; | |
210 | fmt->colorspace = V4L2_COLORSPACE_SRGB; | |
211 | } | |
212 | ||
1bd0a1bd LP |
213 | static int sru_set_format(struct v4l2_subdev *subdev, |
214 | struct v4l2_subdev_pad_config *cfg, | |
a626e64e LP |
215 | struct v4l2_subdev_format *fmt) |
216 | { | |
217 | struct vsp1_sru *sru = to_sru(subdev); | |
e790c3cb | 218 | struct v4l2_subdev_pad_config *config; |
a626e64e LP |
219 | struct v4l2_mbus_framefmt *format; |
220 | ||
e790c3cb LP |
221 | config = vsp1_entity_get_pad_config(&sru->entity, cfg, fmt->which); |
222 | if (!config) | |
223 | return -EINVAL; | |
224 | ||
225 | sru_try_format(sru, config, fmt->pad, &fmt->format); | |
a626e64e | 226 | |
e790c3cb | 227 | format = vsp1_entity_get_pad_format(&sru->entity, config, fmt->pad); |
a626e64e LP |
228 | *format = fmt->format; |
229 | ||
230 | if (fmt->pad == SRU_PAD_SINK) { | |
231 | /* Propagate the format to the source pad. */ | |
e790c3cb LP |
232 | format = vsp1_entity_get_pad_format(&sru->entity, config, |
233 | SRU_PAD_SOURCE); | |
a626e64e LP |
234 | *format = fmt->format; |
235 | ||
e790c3cb | 236 | sru_try_format(sru, config, SRU_PAD_SOURCE, format); |
a626e64e LP |
237 | } |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
eb9163d3 | 242 | static const struct v4l2_subdev_pad_ops sru_pad_ops = { |
0efdf0f5 | 243 | .init_cfg = vsp1_entity_init_cfg, |
a626e64e LP |
244 | .enum_mbus_code = sru_enum_mbus_code, |
245 | .enum_frame_size = sru_enum_frame_size, | |
3f557220 | 246 | .get_fmt = vsp1_subdev_get_pad_format, |
a626e64e LP |
247 | .set_fmt = sru_set_format, |
248 | }; | |
249 | ||
eb9163d3 | 250 | static const struct v4l2_subdev_ops sru_ops = { |
a626e64e LP |
251 | .pad = &sru_pad_ops, |
252 | }; | |
253 | ||
7b905f05 LP |
254 | /* ----------------------------------------------------------------------------- |
255 | * VSP1 Entity Operations | |
256 | */ | |
257 | ||
83dd019d LP |
258 | static void sru_configure(struct vsp1_entity *entity, |
259 | struct vsp1_pipeline *pipe, | |
fc845e52 | 260 | struct vsp1_dl_list *dl, bool full) |
7b905f05 LP |
261 | { |
262 | const struct vsp1_sru_param *param; | |
263 | struct vsp1_sru *sru = to_sru(&entity->subdev); | |
264 | struct v4l2_mbus_framefmt *input; | |
265 | struct v4l2_mbus_framefmt *output; | |
266 | u32 ctrl0; | |
267 | ||
fc845e52 LP |
268 | if (!full) |
269 | return; | |
270 | ||
7b905f05 LP |
271 | input = vsp1_entity_get_pad_format(&sru->entity, sru->entity.config, |
272 | SRU_PAD_SINK); | |
273 | output = vsp1_entity_get_pad_format(&sru->entity, sru->entity.config, | |
274 | SRU_PAD_SOURCE); | |
275 | ||
276 | if (input->code == MEDIA_BUS_FMT_ARGB8888_1X32) | |
277 | ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3 | |
278 | | VI6_SRU_CTRL0_PARAM4; | |
279 | else | |
280 | ctrl0 = VI6_SRU_CTRL0_PARAM3; | |
281 | ||
282 | if (input->width != output->width) | |
283 | ctrl0 |= VI6_SRU_CTRL0_MODE_UPSCALE; | |
284 | ||
285 | param = &vsp1_sru_params[sru->intensity - 1]; | |
286 | ||
287 | ctrl0 |= param->ctrl0; | |
288 | ||
5e8dbbf3 LP |
289 | vsp1_sru_write(sru, dl, VI6_SRU_CTRL0, ctrl0); |
290 | vsp1_sru_write(sru, dl, VI6_SRU_CTRL1, VI6_SRU_CTRL1_PARAM5); | |
291 | vsp1_sru_write(sru, dl, VI6_SRU_CTRL2, param->ctrl2); | |
7b905f05 LP |
292 | } |
293 | ||
294 | static const struct vsp1_entity_operations sru_entity_ops = { | |
295 | .configure = sru_configure, | |
296 | }; | |
297 | ||
a626e64e LP |
298 | /* ----------------------------------------------------------------------------- |
299 | * Initialization and Cleanup | |
300 | */ | |
301 | ||
302 | struct vsp1_sru *vsp1_sru_create(struct vsp1_device *vsp1) | |
303 | { | |
a626e64e LP |
304 | struct vsp1_sru *sru; |
305 | int ret; | |
306 | ||
307 | sru = devm_kzalloc(vsp1->dev, sizeof(*sru), GFP_KERNEL); | |
308 | if (sru == NULL) | |
309 | return ERR_PTR(-ENOMEM); | |
310 | ||
7b905f05 | 311 | sru->entity.ops = &sru_entity_ops; |
a626e64e | 312 | sru->entity.type = VSP1_ENTITY_SRU; |
a626e64e | 313 | |
6a8e07b2 LP |
314 | ret = vsp1_entity_init(vsp1, &sru->entity, "sru", 2, &sru_ops, |
315 | MEDIA_ENT_F_PROC_VIDEO_SCALER); | |
a626e64e LP |
316 | if (ret < 0) |
317 | return ERR_PTR(ret); | |
318 | ||
a626e64e LP |
319 | /* Initialize the control handler. */ |
320 | v4l2_ctrl_handler_init(&sru->ctrls, 1); | |
321 | v4l2_ctrl_new_custom(&sru->ctrls, &sru_intensity_control, NULL); | |
a1606102 | 322 | |
d884a8b2 LP |
323 | sru->intensity = 1; |
324 | ||
a626e64e LP |
325 | sru->entity.subdev.ctrl_handler = &sru->ctrls; |
326 | ||
a1606102 LP |
327 | if (sru->ctrls.error) { |
328 | dev_err(vsp1->dev, "sru: failed to initialize controls\n"); | |
329 | ret = sru->ctrls.error; | |
330 | vsp1_entity_destroy(&sru->entity); | |
331 | return ERR_PTR(ret); | |
332 | } | |
333 | ||
a626e64e LP |
334 | return sru; |
335 | } |