Commit | Line | Data |
---|---|---|
26e0ca22 LP |
1 | /* |
2 | * vsp1_video.c -- R-Car VSP1 Video Node | |
3 | * | |
139c9286 | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
26e0ca22 LP |
5 | * |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/list.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/mutex.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/v4l2-mediabus.h> | |
20 | #include <linux/videodev2.h> | |
21 | ||
22 | #include <media/media-entity.h> | |
23 | #include <media/v4l2-dev.h> | |
24 | #include <media/v4l2-fh.h> | |
25 | #include <media/v4l2-ioctl.h> | |
26 | #include <media/v4l2-subdev.h> | |
c139990e | 27 | #include <media/videobuf2-v4l2.h> |
26e0ca22 LP |
28 | #include <media/videobuf2-dma-contig.h> |
29 | ||
30 | #include "vsp1.h" | |
629bb6d4 | 31 | #include "vsp1_bru.h" |
26e0ca22 LP |
32 | #include "vsp1_entity.h" |
33 | #include "vsp1_rwpf.h" | |
bdc2df62 | 34 | #include "vsp1_uds.h" |
26e0ca22 LP |
35 | #include "vsp1_video.h" |
36 | ||
37 | #define VSP1_VIDEO_DEF_FORMAT V4L2_PIX_FMT_YUYV | |
38 | #define VSP1_VIDEO_DEF_WIDTH 1024 | |
39 | #define VSP1_VIDEO_DEF_HEIGHT 768 | |
40 | ||
41 | #define VSP1_VIDEO_MIN_WIDTH 2U | |
42 | #define VSP1_VIDEO_MAX_WIDTH 8190U | |
43 | #define VSP1_VIDEO_MIN_HEIGHT 2U | |
44 | #define VSP1_VIDEO_MAX_HEIGHT 8190U | |
45 | ||
46 | /* ----------------------------------------------------------------------------- | |
47 | * Helper functions | |
48 | */ | |
49 | ||
50 | static const struct vsp1_format_info vsp1_video_formats[] = { | |
27ffaeb0 | 51 | { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
52 | VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
53 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 54 | 1, { 8, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 55 | { V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32, |
7a52b6de LP |
56 | VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
57 | VI6_RPF_DSWAP_P_WDS, | |
58 | 1, { 16, 0, 0 }, false, false, 1, 1, true }, | |
27ffaeb0 | 59 | { V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
60 | VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
61 | VI6_RPF_DSWAP_P_WDS, | |
7a52b6de | 62 | 1, { 16, 0, 0 }, false, false, 1, 1, true }, |
27ffaeb0 | 63 | { V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32, |
7a52b6de LP |
64 | VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
65 | VI6_RPF_DSWAP_P_WDS, | |
66 | 1, { 16, 0, 0 }, false, false, 1, 1, true }, | |
27ffaeb0 | 67 | { V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
68 | VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
69 | VI6_RPF_DSWAP_P_WDS, | |
7a52b6de | 70 | 1, { 16, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 71 | { V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
72 | VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
73 | VI6_RPF_DSWAP_P_WDS, | |
7a52b6de | 74 | 1, { 16, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 75 | { V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
76 | VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
77 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 78 | 1, { 24, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 79 | { V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
80 | VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
81 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 82 | 1, { 24, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 83 | { V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32, |
7a52b6de LP |
84 | VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, |
85 | 1, { 32, 0, 0 }, false, false, 1, 1, true }, | |
27ffaeb0 | 86 | { V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 | 87 | VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, |
7a52b6de | 88 | 1, { 32, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 89 | { V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32, |
7a52b6de LP |
90 | VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
91 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
92 | 1, { 32, 0, 0 }, false, false, 1, 1, true }, | |
27ffaeb0 | 93 | { V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32, |
26e0ca22 LP |
94 | VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
95 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 96 | 1, { 32, 0, 0 }, false, false, 1, 1, false }, |
27ffaeb0 | 97 | { V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
98 | VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
99 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 100 | 1, { 16, 0, 0 }, false, false, 2, 1, false }, |
27ffaeb0 | 101 | { V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
102 | VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
103 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 104 | 1, { 16, 0, 0 }, false, true, 2, 1, false }, |
27ffaeb0 | 105 | { V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
106 | VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
107 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 108 | 1, { 16, 0, 0 }, true, false, 2, 1, false }, |
27ffaeb0 | 109 | { V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
110 | VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
111 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 112 | 1, { 16, 0, 0 }, true, true, 2, 1, false }, |
27ffaeb0 | 113 | { V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
114 | VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
115 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 116 | 2, { 8, 16, 0 }, false, false, 2, 2, false }, |
27ffaeb0 | 117 | { V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
118 | VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
119 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 120 | 2, { 8, 16, 0 }, false, true, 2, 2, false }, |
27ffaeb0 | 121 | { V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
122 | VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
123 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 124 | 2, { 8, 16, 0 }, false, false, 2, 1, false }, |
27ffaeb0 | 125 | { V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
126 | VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
127 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 128 | 2, { 8, 16, 0 }, false, true, 2, 1, false }, |
27ffaeb0 | 129 | { V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32, |
26e0ca22 LP |
130 | VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | |
131 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
7a52b6de | 132 | 3, { 8, 8, 8 }, false, false, 2, 2, false }, |
b915bd24 LP |
133 | { V4L2_PIX_FMT_YVU420M, MEDIA_BUS_FMT_AYUV8_1X32, |
134 | VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | | |
135 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
136 | 3, { 8, 8, 8 }, false, true, 2, 2, false }, | |
137 | { V4L2_PIX_FMT_YUV422M, MEDIA_BUS_FMT_AYUV8_1X32, | |
138 | VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | | |
139 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
140 | 3, { 8, 8, 8 }, false, false, 2, 1, false }, | |
141 | { V4L2_PIX_FMT_YVU422M, MEDIA_BUS_FMT_AYUV8_1X32, | |
142 | VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | | |
143 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
144 | 3, { 8, 8, 8 }, false, true, 2, 1, false }, | |
145 | { V4L2_PIX_FMT_YUV444M, MEDIA_BUS_FMT_AYUV8_1X32, | |
146 | VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | | |
147 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
148 | 3, { 8, 8, 8 }, false, false, 1, 1, false }, | |
149 | { V4L2_PIX_FMT_YVU444M, MEDIA_BUS_FMT_AYUV8_1X32, | |
150 | VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | | |
151 | VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, | |
152 | 3, { 8, 8, 8 }, false, true, 1, 1, false }, | |
26e0ca22 LP |
153 | }; |
154 | ||
155 | /* | |
156 | * vsp1_get_format_info - Retrieve format information for a 4CC | |
157 | * @fourcc: the format 4CC | |
158 | * | |
159 | * Return a pointer to the format information structure corresponding to the | |
160 | * given V4L2 format 4CC, or NULL if no corresponding format can be found. | |
161 | */ | |
162 | static const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc) | |
163 | { | |
164 | unsigned int i; | |
165 | ||
166 | for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) { | |
167 | const struct vsp1_format_info *info = &vsp1_video_formats[i]; | |
168 | ||
169 | if (info->fourcc == fourcc) | |
170 | return info; | |
171 | } | |
172 | ||
173 | return NULL; | |
174 | } | |
175 | ||
176 | ||
177 | static struct v4l2_subdev * | |
178 | vsp1_video_remote_subdev(struct media_pad *local, u32 *pad) | |
179 | { | |
180 | struct media_pad *remote; | |
181 | ||
182 | remote = media_entity_remote_pad(local); | |
3efdf62c | 183 | if (!remote || !is_media_entity_v4l2_subdev(remote->entity)) |
26e0ca22 LP |
184 | return NULL; |
185 | ||
186 | if (pad) | |
187 | *pad = remote->index; | |
188 | ||
189 | return media_entity_to_v4l2_subdev(remote->entity); | |
190 | } | |
191 | ||
192 | static int vsp1_video_verify_format(struct vsp1_video *video) | |
193 | { | |
194 | struct v4l2_subdev_format fmt; | |
195 | struct v4l2_subdev *subdev; | |
196 | int ret; | |
197 | ||
198 | subdev = vsp1_video_remote_subdev(&video->pad, &fmt.pad); | |
199 | if (subdev == NULL) | |
200 | return -EINVAL; | |
201 | ||
202 | fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
203 | ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt); | |
204 | if (ret < 0) | |
205 | return ret == -ENOIOCTLCMD ? -EINVAL : ret; | |
206 | ||
86960eec LP |
207 | if (video->rwpf->fmtinfo->mbus != fmt.format.code || |
208 | video->rwpf->format.height != fmt.format.height || | |
209 | video->rwpf->format.width != fmt.format.width) | |
26e0ca22 LP |
210 | return -EINVAL; |
211 | ||
212 | return 0; | |
213 | } | |
214 | ||
215 | static int __vsp1_video_try_format(struct vsp1_video *video, | |
216 | struct v4l2_pix_format_mplane *pix, | |
217 | const struct vsp1_format_info **fmtinfo) | |
218 | { | |
56bfef3e LP |
219 | static const u32 xrgb_formats[][2] = { |
220 | { V4L2_PIX_FMT_RGB444, V4L2_PIX_FMT_XRGB444 }, | |
221 | { V4L2_PIX_FMT_RGB555, V4L2_PIX_FMT_XRGB555 }, | |
222 | { V4L2_PIX_FMT_BGR32, V4L2_PIX_FMT_XBGR32 }, | |
223 | { V4L2_PIX_FMT_RGB32, V4L2_PIX_FMT_XRGB32 }, | |
224 | }; | |
225 | ||
26e0ca22 LP |
226 | const struct vsp1_format_info *info; |
227 | unsigned int width = pix->width; | |
228 | unsigned int height = pix->height; | |
229 | unsigned int i; | |
230 | ||
56bfef3e LP |
231 | /* Backward compatibility: replace deprecated RGB formats by their XRGB |
232 | * equivalent. This selects the format older userspace applications want | |
233 | * while still exposing the new format. | |
234 | */ | |
235 | for (i = 0; i < ARRAY_SIZE(xrgb_formats); ++i) { | |
236 | if (xrgb_formats[i][0] == pix->pixelformat) { | |
237 | pix->pixelformat = xrgb_formats[i][1]; | |
238 | break; | |
239 | } | |
240 | } | |
241 | ||
26e0ca22 LP |
242 | /* Retrieve format information and select the default format if the |
243 | * requested format isn't supported. | |
244 | */ | |
245 | info = vsp1_get_format_info(pix->pixelformat); | |
246 | if (info == NULL) | |
247 | info = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT); | |
248 | ||
249 | pix->pixelformat = info->fourcc; | |
250 | pix->colorspace = V4L2_COLORSPACE_SRGB; | |
251 | pix->field = V4L2_FIELD_NONE; | |
252 | memset(pix->reserved, 0, sizeof(pix->reserved)); | |
253 | ||
254 | /* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */ | |
255 | width = round_down(width, info->hsub); | |
256 | height = round_down(height, info->vsub); | |
257 | ||
258 | /* Clamp the width and height. */ | |
259 | pix->width = clamp(width, VSP1_VIDEO_MIN_WIDTH, VSP1_VIDEO_MAX_WIDTH); | |
260 | pix->height = clamp(height, VSP1_VIDEO_MIN_HEIGHT, | |
261 | VSP1_VIDEO_MAX_HEIGHT); | |
262 | ||
263 | /* Compute and clamp the stride and image size. While not documented in | |
264 | * the datasheet, strides not aligned to a multiple of 128 bytes result | |
265 | * in image corruption. | |
266 | */ | |
df5c3e7c | 267 | for (i = 0; i < min(info->planes, 2U); ++i) { |
26e0ca22 LP |
268 | unsigned int hsub = i > 0 ? info->hsub : 1; |
269 | unsigned int vsub = i > 0 ? info->vsub : 1; | |
270 | unsigned int align = 128; | |
271 | unsigned int bpl; | |
272 | ||
273 | bpl = clamp_t(unsigned int, pix->plane_fmt[i].bytesperline, | |
274 | pix->width / hsub * info->bpp[i] / 8, | |
275 | round_down(65535U, align)); | |
276 | ||
277 | pix->plane_fmt[i].bytesperline = round_up(bpl, align); | |
278 | pix->plane_fmt[i].sizeimage = pix->plane_fmt[i].bytesperline | |
279 | * pix->height / vsub; | |
280 | } | |
281 | ||
282 | if (info->planes == 3) { | |
283 | /* The second and third planes must have the same stride. */ | |
284 | pix->plane_fmt[2].bytesperline = pix->plane_fmt[1].bytesperline; | |
285 | pix->plane_fmt[2].sizeimage = pix->plane_fmt[1].sizeimage; | |
286 | } | |
287 | ||
288 | pix->num_planes = info->planes; | |
289 | ||
290 | if (fmtinfo) | |
291 | *fmtinfo = info; | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
26e0ca22 LP |
296 | /* ----------------------------------------------------------------------------- |
297 | * Pipeline Management | |
298 | */ | |
299 | ||
bdc2df62 LP |
300 | static int vsp1_pipeline_validate_branch(struct vsp1_pipeline *pipe, |
301 | struct vsp1_rwpf *input, | |
26e0ca22 LP |
302 | struct vsp1_rwpf *output) |
303 | { | |
304 | struct vsp1_entity *entity; | |
54b5a749 | 305 | struct media_entity_enum ent_enum; |
26e0ca22 | 306 | struct media_pad *pad; |
54b5a749 | 307 | int rval; |
bdc2df62 | 308 | bool bru_found = false; |
26e0ca22 | 309 | |
629bb6d4 LP |
310 | input->location.left = 0; |
311 | input->location.top = 0; | |
312 | ||
54b5a749 SA |
313 | rval = media_entity_enum_init( |
314 | &ent_enum, input->entity.pads[RWPF_PAD_SOURCE].graph_obj.mdev); | |
315 | if (rval) | |
316 | return rval; | |
317 | ||
26e0ca22 LP |
318 | pad = media_entity_remote_pad(&input->entity.pads[RWPF_PAD_SOURCE]); |
319 | ||
320 | while (1) { | |
54b5a749 SA |
321 | if (pad == NULL) { |
322 | rval = -EPIPE; | |
323 | goto out; | |
324 | } | |
26e0ca22 LP |
325 | |
326 | /* We've reached a video node, that shouldn't have happened. */ | |
54b5a749 SA |
327 | if (!is_media_entity_v4l2_subdev(pad->entity)) { |
328 | rval = -EPIPE; | |
329 | goto out; | |
330 | } | |
26e0ca22 | 331 | |
54b5a749 SA |
332 | entity = to_vsp1_entity( |
333 | media_entity_to_v4l2_subdev(pad->entity)); | |
26e0ca22 | 334 | |
629bb6d4 LP |
335 | /* A BRU is present in the pipeline, store the compose rectangle |
336 | * location in the input RPF for use when configuring the RPF. | |
337 | */ | |
338 | if (entity->type == VSP1_ENTITY_BRU) { | |
339 | struct vsp1_bru *bru = to_bru(&entity->subdev); | |
6418b4d6 LP |
340 | struct v4l2_rect *rect = |
341 | &bru->inputs[pad->index].compose; | |
342 | ||
343 | bru->inputs[pad->index].rpf = input; | |
629bb6d4 LP |
344 | |
345 | input->location.left = rect->left; | |
346 | input->location.top = rect->top; | |
bdc2df62 LP |
347 | |
348 | bru_found = true; | |
629bb6d4 LP |
349 | } |
350 | ||
26e0ca22 LP |
351 | /* We've reached the WPF, we're done. */ |
352 | if (entity->type == VSP1_ENTITY_WPF) | |
353 | break; | |
354 | ||
355 | /* Ensure the branch has no loop. */ | |
54b5a749 SA |
356 | if (media_entity_enum_test_and_set(&ent_enum, |
357 | &entity->subdev.entity)) { | |
358 | rval = -EPIPE; | |
359 | goto out; | |
360 | } | |
26e0ca22 LP |
361 | |
362 | /* UDS can't be chained. */ | |
363 | if (entity->type == VSP1_ENTITY_UDS) { | |
54b5a749 SA |
364 | if (pipe->uds) { |
365 | rval = -EPIPE; | |
366 | goto out; | |
367 | } | |
bdc2df62 LP |
368 | |
369 | pipe->uds = entity; | |
370 | pipe->uds_input = bru_found ? pipe->bru | |
371 | : &input->entity; | |
26e0ca22 LP |
372 | } |
373 | ||
374 | /* Follow the source link. The link setup operations ensure | |
375 | * that the output fan-out can't be more than one, there is thus | |
376 | * no need to verify here that only a single source link is | |
377 | * activated. | |
378 | */ | |
379 | pad = &entity->pads[entity->source_pad]; | |
380 | pad = media_entity_remote_pad(pad); | |
381 | } | |
382 | ||
383 | /* The last entity must be the output WPF. */ | |
384 | if (entity != &output->entity) | |
54b5a749 | 385 | rval = -EPIPE; |
26e0ca22 | 386 | |
54b5a749 SA |
387 | out: |
388 | media_entity_enum_cleanup(&ent_enum); | |
389 | ||
390 | return rval; | |
26e0ca22 LP |
391 | } |
392 | ||
6418b4d6 LP |
393 | static void __vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe) |
394 | { | |
395 | if (pipe->bru) { | |
396 | struct vsp1_bru *bru = to_bru(&pipe->bru->subdev); | |
397 | unsigned int i; | |
398 | ||
399 | for (i = 0; i < ARRAY_SIZE(bru->inputs); ++i) | |
400 | bru->inputs[i].rpf = NULL; | |
401 | } | |
402 | ||
403 | INIT_LIST_HEAD(&pipe->entities); | |
404 | pipe->state = VSP1_PIPELINE_STOPPED; | |
405 | pipe->buffers_ready = 0; | |
6418b4d6 LP |
406 | pipe->num_inputs = 0; |
407 | pipe->output = NULL; | |
408 | pipe->bru = NULL; | |
409 | pipe->lif = NULL; | |
bdc2df62 | 410 | pipe->uds = NULL; |
6418b4d6 LP |
411 | } |
412 | ||
26e0ca22 LP |
413 | static int vsp1_pipeline_validate(struct vsp1_pipeline *pipe, |
414 | struct vsp1_video *video) | |
415 | { | |
416 | struct media_entity_graph graph; | |
417 | struct media_entity *entity = &video->video.entity; | |
d10c9894 | 418 | struct media_device *mdev = entity->graph_obj.mdev; |
26e0ca22 LP |
419 | unsigned int i; |
420 | int ret; | |
421 | ||
422 | mutex_lock(&mdev->graph_mutex); | |
423 | ||
424 | /* Walk the graph to locate the entities and video nodes. */ | |
c1a5f1bc SA |
425 | ret = media_entity_graph_walk_init(&graph, mdev); |
426 | if (ret) { | |
427 | mutex_unlock(&mdev->graph_mutex); | |
428 | return ret; | |
429 | } | |
430 | ||
26e0ca22 LP |
431 | media_entity_graph_walk_start(&graph, entity); |
432 | ||
433 | while ((entity = media_entity_graph_walk_next(&graph))) { | |
434 | struct v4l2_subdev *subdev; | |
435 | struct vsp1_rwpf *rwpf; | |
436 | struct vsp1_entity *e; | |
437 | ||
2f2db2f2 | 438 | if (is_media_entity_v4l2_io(entity)) |
26e0ca22 | 439 | continue; |
26e0ca22 LP |
440 | |
441 | subdev = media_entity_to_v4l2_subdev(entity); | |
442 | e = to_vsp1_entity(subdev); | |
443 | list_add_tail(&e->list_pipe, &pipe->entities); | |
444 | ||
445 | if (e->type == VSP1_ENTITY_RPF) { | |
446 | rwpf = to_rwpf(subdev); | |
447 | pipe->inputs[pipe->num_inputs++] = rwpf; | |
faf2644d | 448 | rwpf->video->pipe_index = pipe->num_inputs; |
26e0ca22 LP |
449 | } else if (e->type == VSP1_ENTITY_WPF) { |
450 | rwpf = to_rwpf(subdev); | |
451 | pipe->output = to_rwpf(subdev); | |
faf2644d | 452 | rwpf->video->pipe_index = 0; |
26e0ca22 LP |
453 | } else if (e->type == VSP1_ENTITY_LIF) { |
454 | pipe->lif = e; | |
629bb6d4 LP |
455 | } else if (e->type == VSP1_ENTITY_BRU) { |
456 | pipe->bru = e; | |
26e0ca22 LP |
457 | } |
458 | } | |
459 | ||
460 | mutex_unlock(&mdev->graph_mutex); | |
461 | ||
c1a5f1bc SA |
462 | media_entity_graph_walk_cleanup(&graph); |
463 | ||
26e0ca22 LP |
464 | /* We need one output and at least one input. */ |
465 | if (pipe->num_inputs == 0 || !pipe->output) { | |
466 | ret = -EPIPE; | |
467 | goto error; | |
468 | } | |
469 | ||
470 | /* Follow links downstream for each input and make sure the graph | |
471 | * contains no loop and that all branches end at the output WPF. | |
472 | */ | |
473 | for (i = 0; i < pipe->num_inputs; ++i) { | |
bdc2df62 | 474 | ret = vsp1_pipeline_validate_branch(pipe, pipe->inputs[i], |
26e0ca22 LP |
475 | pipe->output); |
476 | if (ret < 0) | |
477 | goto error; | |
478 | } | |
479 | ||
480 | return 0; | |
481 | ||
482 | error: | |
6418b4d6 | 483 | __vsp1_pipeline_cleanup(pipe); |
26e0ca22 LP |
484 | return ret; |
485 | } | |
486 | ||
487 | static int vsp1_pipeline_init(struct vsp1_pipeline *pipe, | |
488 | struct vsp1_video *video) | |
489 | { | |
490 | int ret; | |
491 | ||
492 | mutex_lock(&pipe->lock); | |
493 | ||
494 | /* If we're the first user validate and initialize the pipeline. */ | |
495 | if (pipe->use_count == 0) { | |
496 | ret = vsp1_pipeline_validate(pipe, video); | |
497 | if (ret < 0) | |
498 | goto done; | |
499 | } | |
500 | ||
501 | pipe->use_count++; | |
502 | ret = 0; | |
503 | ||
504 | done: | |
505 | mutex_unlock(&pipe->lock); | |
506 | return ret; | |
507 | } | |
508 | ||
509 | static void vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe) | |
510 | { | |
511 | mutex_lock(&pipe->lock); | |
512 | ||
513 | /* If we're the last user clean up the pipeline. */ | |
6418b4d6 LP |
514 | if (--pipe->use_count == 0) |
515 | __vsp1_pipeline_cleanup(pipe); | |
26e0ca22 LP |
516 | |
517 | mutex_unlock(&pipe->lock); | |
518 | } | |
519 | ||
520 | static void vsp1_pipeline_run(struct vsp1_pipeline *pipe) | |
521 | { | |
522 | struct vsp1_device *vsp1 = pipe->output->entity.vsp1; | |
523 | ||
524 | vsp1_write(vsp1, VI6_CMD(pipe->output->entity.index), VI6_CMD_STRCMD); | |
525 | pipe->state = VSP1_PIPELINE_RUNNING; | |
526 | pipe->buffers_ready = 0; | |
527 | } | |
528 | ||
41bdc3cf | 529 | static bool vsp1_pipeline_stopped(struct vsp1_pipeline *pipe) |
1c991fee LP |
530 | { |
531 | unsigned long flags; | |
532 | bool stopped; | |
533 | ||
534 | spin_lock_irqsave(&pipe->irqlock, flags); | |
1b4ca5aa | 535 | stopped = pipe->state == VSP1_PIPELINE_STOPPED; |
1c991fee LP |
536 | spin_unlock_irqrestore(&pipe->irqlock, flags); |
537 | ||
538 | return stopped; | |
539 | } | |
540 | ||
26e0ca22 LP |
541 | static int vsp1_pipeline_stop(struct vsp1_pipeline *pipe) |
542 | { | |
543 | struct vsp1_entity *entity; | |
544 | unsigned long flags; | |
545 | int ret; | |
546 | ||
547 | spin_lock_irqsave(&pipe->irqlock, flags); | |
9b3e6e2a LP |
548 | if (pipe->state == VSP1_PIPELINE_RUNNING) |
549 | pipe->state = VSP1_PIPELINE_STOPPING; | |
26e0ca22 LP |
550 | spin_unlock_irqrestore(&pipe->irqlock, flags); |
551 | ||
1c991fee | 552 | ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe), |
26e0ca22 LP |
553 | msecs_to_jiffies(500)); |
554 | ret = ret == 0 ? -ETIMEDOUT : 0; | |
555 | ||
556 | list_for_each_entry(entity, &pipe->entities, list_pipe) { | |
aaa48cbb | 557 | if (entity->route && entity->route->reg) |
d9b45ed3 | 558 | vsp1_write(entity->vsp1, entity->route->reg, |
26e0ca22 LP |
559 | VI6_DPR_NODE_UNUSED); |
560 | ||
561 | v4l2_subdev_call(&entity->subdev, video, s_stream, 0); | |
562 | } | |
563 | ||
564 | return ret; | |
565 | } | |
566 | ||
567 | static bool vsp1_pipeline_ready(struct vsp1_pipeline *pipe) | |
568 | { | |
569 | unsigned int mask; | |
570 | ||
571 | mask = ((1 << pipe->num_inputs) - 1) << 1; | |
572 | if (!pipe->lif) | |
573 | mask |= 1 << 0; | |
574 | ||
575 | return pipe->buffers_ready == mask; | |
576 | } | |
577 | ||
578 | /* | |
579 | * vsp1_video_complete_buffer - Complete the current buffer | |
580 | * @video: the video node | |
581 | * | |
582 | * This function completes the current buffer by filling its sequence number, | |
583 | * time stamp and payload size, and hands it back to the videobuf core. | |
584 | * | |
3299ba5c LP |
585 | * When operating in DU output mode (deep pipeline to the DU through the LIF), |
586 | * the VSP1 needs to constantly supply frames to the display. In that case, if | |
587 | * no other buffer is queued, reuse the one that has just been processed instead | |
588 | * of handing it back to the videobuf core. | |
589 | * | |
26e0ca22 LP |
590 | * Return the next queued buffer or NULL if the queue is empty. |
591 | */ | |
f7ebf3ca | 592 | static struct vsp1_vb2_buffer * |
26e0ca22 LP |
593 | vsp1_video_complete_buffer(struct vsp1_video *video) |
594 | { | |
3299ba5c | 595 | struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity); |
f7ebf3ca LP |
596 | struct vsp1_vb2_buffer *next = NULL; |
597 | struct vsp1_vb2_buffer *done; | |
26e0ca22 LP |
598 | unsigned long flags; |
599 | unsigned int i; | |
600 | ||
601 | spin_lock_irqsave(&video->irqlock, flags); | |
602 | ||
603 | if (list_empty(&video->irqqueue)) { | |
604 | spin_unlock_irqrestore(&video->irqlock, flags); | |
605 | return NULL; | |
606 | } | |
607 | ||
608 | done = list_first_entry(&video->irqqueue, | |
f7ebf3ca | 609 | struct vsp1_vb2_buffer, queue); |
3299ba5c LP |
610 | |
611 | /* In DU output mode reuse the buffer if the list is singular. */ | |
612 | if (pipe->lif && list_is_singular(&video->irqqueue)) { | |
613 | spin_unlock_irqrestore(&video->irqlock, flags); | |
614 | return done; | |
615 | } | |
616 | ||
26e0ca22 LP |
617 | list_del(&done->queue); |
618 | ||
619 | if (!list_empty(&video->irqqueue)) | |
620 | next = list_first_entry(&video->irqqueue, | |
f7ebf3ca | 621 | struct vsp1_vb2_buffer, queue); |
26e0ca22 LP |
622 | |
623 | spin_unlock_irqrestore(&video->irqlock, flags); | |
624 | ||
2d700715 | 625 | done->buf.sequence = video->sequence++; |
d6dd645e | 626 | done->buf.vb2_buf.timestamp = ktime_get_ns(); |
2d700715 | 627 | for (i = 0; i < done->buf.vb2_buf.num_planes; ++i) |
b58faa95 LP |
628 | vb2_set_plane_payload(&done->buf.vb2_buf, i, |
629 | done->mem.length[i]); | |
2d700715 | 630 | vb2_buffer_done(&done->buf.vb2_buf, VB2_BUF_STATE_DONE); |
26e0ca22 LP |
631 | |
632 | return next; | |
633 | } | |
634 | ||
635 | static void vsp1_video_frame_end(struct vsp1_pipeline *pipe, | |
3f725b7e | 636 | struct vsp1_rwpf *rwpf) |
26e0ca22 | 637 | { |
3f725b7e | 638 | struct vsp1_video *video = rwpf->video; |
f7ebf3ca | 639 | struct vsp1_vb2_buffer *buf; |
26e0ca22 LP |
640 | unsigned long flags; |
641 | ||
642 | buf = vsp1_video_complete_buffer(video); | |
643 | if (buf == NULL) | |
644 | return; | |
645 | ||
646 | spin_lock_irqsave(&pipe->irqlock, flags); | |
647 | ||
b58faa95 | 648 | video->rwpf->ops->set_memory(video->rwpf, &buf->mem); |
26e0ca22 LP |
649 | pipe->buffers_ready |= 1 << video->pipe_index; |
650 | ||
651 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
652 | } | |
653 | ||
3f725b7e LP |
654 | static void vsp1_video_pipeline_frame_end(struct vsp1_pipeline *pipe) |
655 | { | |
656 | unsigned int i; | |
657 | ||
658 | /* Complete buffers on all video nodes. */ | |
659 | for (i = 0; i < pipe->num_inputs; ++i) | |
660 | vsp1_video_frame_end(pipe, pipe->inputs[i]); | |
661 | ||
662 | if (!pipe->lif) | |
663 | vsp1_video_frame_end(pipe, pipe->output); | |
664 | } | |
665 | ||
26e0ca22 LP |
666 | void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe) |
667 | { | |
9b3e6e2a | 668 | enum vsp1_pipeline_state state; |
26e0ca22 | 669 | unsigned long flags; |
26e0ca22 LP |
670 | |
671 | if (pipe == NULL) | |
672 | return; | |
673 | ||
3f725b7e LP |
674 | /* Signal frame end to the pipeline handler. */ |
675 | pipe->frame_end(pipe); | |
26e0ca22 LP |
676 | |
677 | spin_lock_irqsave(&pipe->irqlock, flags); | |
678 | ||
9b3e6e2a LP |
679 | state = pipe->state; |
680 | pipe->state = VSP1_PIPELINE_STOPPED; | |
681 | ||
26e0ca22 LP |
682 | /* If a stop has been requested, mark the pipeline as stopped and |
683 | * return. | |
684 | */ | |
9b3e6e2a | 685 | if (state == VSP1_PIPELINE_STOPPING) { |
26e0ca22 LP |
686 | wake_up(&pipe->wq); |
687 | goto done; | |
688 | } | |
689 | ||
690 | /* Restart the pipeline if ready. */ | |
691 | if (vsp1_pipeline_ready(pipe)) | |
692 | vsp1_pipeline_run(pipe); | |
693 | ||
694 | done: | |
695 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
696 | } | |
697 | ||
bdc2df62 LP |
698 | /* |
699 | * Propagate the alpha value through the pipeline. | |
700 | * | |
701 | * As the UDS has restricted scaling capabilities when the alpha component needs | |
702 | * to be scaled, we disable alpha scaling when the UDS input has a fixed alpha | |
703 | * value. The UDS then outputs a fixed alpha value which needs to be programmed | |
704 | * from the input RPF alpha. | |
705 | */ | |
706 | void vsp1_pipeline_propagate_alpha(struct vsp1_pipeline *pipe, | |
707 | struct vsp1_entity *input, | |
708 | unsigned int alpha) | |
709 | { | |
710 | struct vsp1_entity *entity; | |
711 | struct media_pad *pad; | |
712 | ||
713 | pad = media_entity_remote_pad(&input->pads[RWPF_PAD_SOURCE]); | |
714 | ||
715 | while (pad) { | |
3efdf62c | 716 | if (!is_media_entity_v4l2_subdev(pad->entity)) |
bdc2df62 LP |
717 | break; |
718 | ||
719 | entity = to_vsp1_entity(media_entity_to_v4l2_subdev(pad->entity)); | |
720 | ||
721 | /* The BRU background color has a fixed alpha value set to 255, | |
722 | * the output alpha value is thus always equal to 255. | |
723 | */ | |
724 | if (entity->type == VSP1_ENTITY_BRU) | |
725 | alpha = 255; | |
726 | ||
727 | if (entity->type == VSP1_ENTITY_UDS) { | |
728 | struct vsp1_uds *uds = to_uds(&entity->subdev); | |
729 | ||
730 | vsp1_uds_set_alpha(uds, alpha); | |
731 | break; | |
732 | } | |
733 | ||
734 | pad = &entity->pads[entity->source_pad]; | |
735 | pad = media_entity_remote_pad(pad); | |
736 | } | |
737 | } | |
738 | ||
139c9286 SF |
739 | void vsp1_pipelines_suspend(struct vsp1_device *vsp1) |
740 | { | |
741 | unsigned long flags; | |
742 | unsigned int i; | |
743 | int ret; | |
744 | ||
745 | /* To avoid increasing the system suspend time needlessly, loop over the | |
746 | * pipelines twice, first to set them all to the stopping state, and then | |
747 | * to wait for the stop to complete. | |
748 | */ | |
749 | for (i = 0; i < vsp1->pdata.wpf_count; ++i) { | |
750 | struct vsp1_rwpf *wpf = vsp1->wpf[i]; | |
751 | struct vsp1_pipeline *pipe; | |
752 | ||
753 | if (wpf == NULL) | |
754 | continue; | |
755 | ||
756 | pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity); | |
757 | if (pipe == NULL) | |
758 | continue; | |
759 | ||
760 | spin_lock_irqsave(&pipe->irqlock, flags); | |
761 | if (pipe->state == VSP1_PIPELINE_RUNNING) | |
762 | pipe->state = VSP1_PIPELINE_STOPPING; | |
763 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
764 | } | |
765 | ||
766 | for (i = 0; i < vsp1->pdata.wpf_count; ++i) { | |
767 | struct vsp1_rwpf *wpf = vsp1->wpf[i]; | |
768 | struct vsp1_pipeline *pipe; | |
769 | ||
770 | if (wpf == NULL) | |
771 | continue; | |
772 | ||
773 | pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity); | |
774 | if (pipe == NULL) | |
775 | continue; | |
776 | ||
1c991fee | 777 | ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe), |
139c9286 SF |
778 | msecs_to_jiffies(500)); |
779 | if (ret == 0) | |
780 | dev_warn(vsp1->dev, "pipeline %u stop timeout\n", | |
781 | wpf->entity.index); | |
782 | } | |
783 | } | |
784 | ||
785 | void vsp1_pipelines_resume(struct vsp1_device *vsp1) | |
786 | { | |
787 | unsigned int i; | |
788 | ||
789 | /* Resume pipeline all running pipelines. */ | |
790 | for (i = 0; i < vsp1->pdata.wpf_count; ++i) { | |
791 | struct vsp1_rwpf *wpf = vsp1->wpf[i]; | |
792 | struct vsp1_pipeline *pipe; | |
793 | ||
794 | if (wpf == NULL) | |
795 | continue; | |
796 | ||
797 | pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity); | |
798 | if (pipe == NULL) | |
799 | continue; | |
800 | ||
801 | if (vsp1_pipeline_ready(pipe)) | |
802 | vsp1_pipeline_run(pipe); | |
803 | } | |
804 | } | |
805 | ||
26e0ca22 LP |
806 | /* ----------------------------------------------------------------------------- |
807 | * videobuf2 Queue Operations | |
808 | */ | |
809 | ||
810 | static int | |
df9ecb0c | 811 | vsp1_video_queue_setup(struct vb2_queue *vq, |
26e0ca22 LP |
812 | unsigned int *nbuffers, unsigned int *nplanes, |
813 | unsigned int sizes[], void *alloc_ctxs[]) | |
814 | { | |
815 | struct vsp1_video *video = vb2_get_drv_priv(vq); | |
86960eec | 816 | const struct v4l2_pix_format_mplane *format = &video->rwpf->format; |
26e0ca22 LP |
817 | unsigned int i; |
818 | ||
df9ecb0c HV |
819 | if (*nplanes) { |
820 | if (*nplanes != format->num_planes) | |
26e0ca22 LP |
821 | return -EINVAL; |
822 | ||
df9ecb0c HV |
823 | for (i = 0; i < *nplanes; i++) { |
824 | if (sizes[i] < format->plane_fmt[i].sizeimage) | |
825 | return -EINVAL; | |
826 | alloc_ctxs[i] = video->alloc_ctx; | |
827 | } | |
828 | return 0; | |
26e0ca22 LP |
829 | } |
830 | ||
831 | *nplanes = format->num_planes; | |
832 | ||
833 | for (i = 0; i < format->num_planes; ++i) { | |
834 | sizes[i] = format->plane_fmt[i].sizeimage; | |
835 | alloc_ctxs[i] = video->alloc_ctx; | |
836 | } | |
837 | ||
838 | return 0; | |
839 | } | |
840 | ||
841 | static int vsp1_video_buffer_prepare(struct vb2_buffer *vb) | |
842 | { | |
2d700715 | 843 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
26e0ca22 | 844 | struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue); |
f7ebf3ca | 845 | struct vsp1_vb2_buffer *buf = to_vsp1_vb2_buffer(vbuf); |
86960eec | 846 | const struct v4l2_pix_format_mplane *format = &video->rwpf->format; |
26e0ca22 LP |
847 | unsigned int i; |
848 | ||
849 | if (vb->num_planes < format->num_planes) | |
850 | return -EINVAL; | |
851 | ||
b58faa95 LP |
852 | buf->mem.num_planes = vb->num_planes; |
853 | ||
26e0ca22 | 854 | for (i = 0; i < vb->num_planes; ++i) { |
b58faa95 LP |
855 | buf->mem.addr[i] = vb2_dma_contig_plane_dma_addr(vb, i); |
856 | buf->mem.length[i] = vb2_plane_size(vb, i); | |
26e0ca22 | 857 | |
b58faa95 | 858 | if (buf->mem.length[i] < format->plane_fmt[i].sizeimage) |
26e0ca22 LP |
859 | return -EINVAL; |
860 | } | |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
865 | static void vsp1_video_buffer_queue(struct vb2_buffer *vb) | |
866 | { | |
2d700715 | 867 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
26e0ca22 LP |
868 | struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue); |
869 | struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity); | |
f7ebf3ca | 870 | struct vsp1_vb2_buffer *buf = to_vsp1_vb2_buffer(vbuf); |
26e0ca22 LP |
871 | unsigned long flags; |
872 | bool empty; | |
873 | ||
874 | spin_lock_irqsave(&video->irqlock, flags); | |
875 | empty = list_empty(&video->irqqueue); | |
876 | list_add_tail(&buf->queue, &video->irqqueue); | |
877 | spin_unlock_irqrestore(&video->irqlock, flags); | |
878 | ||
879 | if (!empty) | |
880 | return; | |
881 | ||
882 | spin_lock_irqsave(&pipe->irqlock, flags); | |
883 | ||
b58faa95 | 884 | video->rwpf->ops->set_memory(video->rwpf, &buf->mem); |
26e0ca22 LP |
885 | pipe->buffers_ready |= 1 << video->pipe_index; |
886 | ||
887 | if (vb2_is_streaming(&video->queue) && | |
888 | vsp1_pipeline_ready(pipe)) | |
889 | vsp1_pipeline_run(pipe); | |
890 | ||
891 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
892 | } | |
893 | ||
894 | static void vsp1_entity_route_setup(struct vsp1_entity *source) | |
895 | { | |
896 | struct vsp1_entity *sink; | |
897 | ||
d9b45ed3 | 898 | if (source->route->reg == 0) |
26e0ca22 LP |
899 | return; |
900 | ||
901 | sink = container_of(source->sink, struct vsp1_entity, subdev.entity); | |
d9b45ed3 LP |
902 | vsp1_write(source->vsp1, source->route->reg, |
903 | sink->route->inputs[source->sink_pad]); | |
26e0ca22 LP |
904 | } |
905 | ||
906 | static int vsp1_video_start_streaming(struct vb2_queue *vq, unsigned int count) | |
907 | { | |
908 | struct vsp1_video *video = vb2_get_drv_priv(vq); | |
909 | struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity); | |
910 | struct vsp1_entity *entity; | |
911 | unsigned long flags; | |
912 | int ret; | |
913 | ||
914 | mutex_lock(&pipe->lock); | |
2f2db2f2 | 915 | if (pipe->stream_count == pipe->num_inputs) { |
bdc2df62 LP |
916 | if (pipe->uds) { |
917 | struct vsp1_uds *uds = to_uds(&pipe->uds->subdev); | |
918 | ||
919 | /* If a BRU is present in the pipeline before the UDS, | |
920 | * the alpha component doesn't need to be scaled as the | |
921 | * BRU output alpha value is fixed to 255. Otherwise we | |
922 | * need to scale the alpha component only when available | |
923 | * at the input RPF. | |
924 | */ | |
925 | if (pipe->uds_input->type == VSP1_ENTITY_BRU) { | |
926 | uds->scale_alpha = false; | |
927 | } else { | |
928 | struct vsp1_rwpf *rpf = | |
929 | to_rwpf(&pipe->uds_input->subdev); | |
930 | ||
86960eec | 931 | uds->scale_alpha = rpf->fmtinfo->alpha; |
bdc2df62 LP |
932 | } |
933 | } | |
934 | ||
26e0ca22 LP |
935 | list_for_each_entry(entity, &pipe->entities, list_pipe) { |
936 | vsp1_entity_route_setup(entity); | |
937 | ||
938 | ret = v4l2_subdev_call(&entity->subdev, video, | |
939 | s_stream, 1); | |
940 | if (ret < 0) { | |
941 | mutex_unlock(&pipe->lock); | |
942 | return ret; | |
943 | } | |
944 | } | |
945 | } | |
946 | ||
947 | pipe->stream_count++; | |
948 | mutex_unlock(&pipe->lock); | |
949 | ||
950 | spin_lock_irqsave(&pipe->irqlock, flags); | |
951 | if (vsp1_pipeline_ready(pipe)) | |
952 | vsp1_pipeline_run(pipe); | |
953 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
954 | ||
955 | return 0; | |
956 | } | |
957 | ||
e37559b2 | 958 | static void vsp1_video_stop_streaming(struct vb2_queue *vq) |
26e0ca22 LP |
959 | { |
960 | struct vsp1_video *video = vb2_get_drv_priv(vq); | |
961 | struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity); | |
f7ebf3ca | 962 | struct vsp1_vb2_buffer *buffer; |
26e0ca22 LP |
963 | unsigned long flags; |
964 | int ret; | |
965 | ||
966 | mutex_lock(&pipe->lock); | |
967 | if (--pipe->stream_count == 0) { | |
968 | /* Stop the pipeline. */ | |
969 | ret = vsp1_pipeline_stop(pipe); | |
970 | if (ret == -ETIMEDOUT) | |
971 | dev_err(video->vsp1->dev, "pipeline stop timeout\n"); | |
972 | } | |
973 | mutex_unlock(&pipe->lock); | |
974 | ||
975 | vsp1_pipeline_cleanup(pipe); | |
976 | media_entity_pipeline_stop(&video->video.entity); | |
977 | ||
978 | /* Remove all buffers from the IRQ queue. */ | |
979 | spin_lock_irqsave(&video->irqlock, flags); | |
9df04e9d | 980 | list_for_each_entry(buffer, &video->irqqueue, queue) |
2d700715 | 981 | vb2_buffer_done(&buffer->buf.vb2_buf, VB2_BUF_STATE_ERROR); |
26e0ca22 LP |
982 | INIT_LIST_HEAD(&video->irqqueue); |
983 | spin_unlock_irqrestore(&video->irqlock, flags); | |
26e0ca22 LP |
984 | } |
985 | ||
986 | static struct vb2_ops vsp1_video_queue_qops = { | |
987 | .queue_setup = vsp1_video_queue_setup, | |
988 | .buf_prepare = vsp1_video_buffer_prepare, | |
989 | .buf_queue = vsp1_video_buffer_queue, | |
990 | .wait_prepare = vb2_ops_wait_prepare, | |
991 | .wait_finish = vb2_ops_wait_finish, | |
992 | .start_streaming = vsp1_video_start_streaming, | |
993 | .stop_streaming = vsp1_video_stop_streaming, | |
994 | }; | |
995 | ||
996 | /* ----------------------------------------------------------------------------- | |
997 | * V4L2 ioctls | |
998 | */ | |
999 | ||
1000 | static int | |
1001 | vsp1_video_querycap(struct file *file, void *fh, struct v4l2_capability *cap) | |
1002 | { | |
1003 | struct v4l2_fh *vfh = file->private_data; | |
1004 | struct vsp1_video *video = to_vsp1_video(vfh->vdev); | |
1005 | ||
1006 | cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING | |
1007 | | V4L2_CAP_VIDEO_CAPTURE_MPLANE | |
1008 | | V4L2_CAP_VIDEO_OUTPUT_MPLANE; | |
1009 | ||
1010 | if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
1011 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | |
1012 | | V4L2_CAP_STREAMING; | |
1013 | else | |
1014 | cap->device_caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE | |
1015 | | V4L2_CAP_STREAMING; | |
1016 | ||
1017 | strlcpy(cap->driver, "vsp1", sizeof(cap->driver)); | |
1018 | strlcpy(cap->card, video->video.name, sizeof(cap->card)); | |
1019 | snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", | |
1020 | dev_name(video->vsp1->dev)); | |
1021 | ||
1022 | return 0; | |
1023 | } | |
1024 | ||
1025 | static int | |
1026 | vsp1_video_get_format(struct file *file, void *fh, struct v4l2_format *format) | |
1027 | { | |
1028 | struct v4l2_fh *vfh = file->private_data; | |
1029 | struct vsp1_video *video = to_vsp1_video(vfh->vdev); | |
1030 | ||
1031 | if (format->type != video->queue.type) | |
1032 | return -EINVAL; | |
1033 | ||
1034 | mutex_lock(&video->lock); | |
86960eec | 1035 | format->fmt.pix_mp = video->rwpf->format; |
26e0ca22 LP |
1036 | mutex_unlock(&video->lock); |
1037 | ||
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | static int | |
1042 | vsp1_video_try_format(struct file *file, void *fh, struct v4l2_format *format) | |
1043 | { | |
1044 | struct v4l2_fh *vfh = file->private_data; | |
1045 | struct vsp1_video *video = to_vsp1_video(vfh->vdev); | |
1046 | ||
1047 | if (format->type != video->queue.type) | |
1048 | return -EINVAL; | |
1049 | ||
1050 | return __vsp1_video_try_format(video, &format->fmt.pix_mp, NULL); | |
1051 | } | |
1052 | ||
1053 | static int | |
1054 | vsp1_video_set_format(struct file *file, void *fh, struct v4l2_format *format) | |
1055 | { | |
1056 | struct v4l2_fh *vfh = file->private_data; | |
1057 | struct vsp1_video *video = to_vsp1_video(vfh->vdev); | |
1058 | const struct vsp1_format_info *info; | |
1059 | int ret; | |
1060 | ||
1061 | if (format->type != video->queue.type) | |
1062 | return -EINVAL; | |
1063 | ||
1064 | ret = __vsp1_video_try_format(video, &format->fmt.pix_mp, &info); | |
1065 | if (ret < 0) | |
1066 | return ret; | |
1067 | ||
1068 | mutex_lock(&video->lock); | |
1069 | ||
1070 | if (vb2_is_busy(&video->queue)) { | |
1071 | ret = -EBUSY; | |
1072 | goto done; | |
1073 | } | |
1074 | ||
86960eec LP |
1075 | video->rwpf->format = format->fmt.pix_mp; |
1076 | video->rwpf->fmtinfo = info; | |
26e0ca22 LP |
1077 | |
1078 | done: | |
1079 | mutex_unlock(&video->lock); | |
1080 | return ret; | |
1081 | } | |
1082 | ||
1083 | static int | |
1084 | vsp1_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type) | |
1085 | { | |
1086 | struct v4l2_fh *vfh = file->private_data; | |
1087 | struct vsp1_video *video = to_vsp1_video(vfh->vdev); | |
1088 | struct vsp1_pipeline *pipe; | |
1089 | int ret; | |
1090 | ||
26e0ca22 LP |
1091 | if (video->queue.owner && video->queue.owner != file->private_data) |
1092 | return -EBUSY; | |
1093 | ||
1094 | video->sequence = 0; | |
1095 | ||
1096 | /* Start streaming on the pipeline. No link touching an entity in the | |
1097 | * pipeline can be activated or deactivated once streaming is started. | |
1098 | * | |
1099 | * Use the VSP1 pipeline object embedded in the first video object that | |
1100 | * starts streaming. | |
1101 | */ | |
1102 | pipe = video->video.entity.pipe | |
1103 | ? to_vsp1_pipeline(&video->video.entity) : &video->pipe; | |
1104 | ||
1105 | ret = media_entity_pipeline_start(&video->video.entity, &pipe->pipe); | |
1106 | if (ret < 0) | |
1107 | return ret; | |
1108 | ||
1109 | /* Verify that the configured format matches the output of the connected | |
1110 | * subdev. | |
1111 | */ | |
1112 | ret = vsp1_video_verify_format(video); | |
1113 | if (ret < 0) | |
1114 | goto err_stop; | |
1115 | ||
1116 | ret = vsp1_pipeline_init(pipe, video); | |
1117 | if (ret < 0) | |
1118 | goto err_stop; | |
1119 | ||
1120 | /* Start the queue. */ | |
1121 | ret = vb2_streamon(&video->queue, type); | |
1122 | if (ret < 0) | |
1123 | goto err_cleanup; | |
1124 | ||
1125 | return 0; | |
1126 | ||
1127 | err_cleanup: | |
1128 | vsp1_pipeline_cleanup(pipe); | |
1129 | err_stop: | |
1130 | media_entity_pipeline_stop(&video->video.entity); | |
1131 | return ret; | |
1132 | } | |
1133 | ||
1134 | static const struct v4l2_ioctl_ops vsp1_video_ioctl_ops = { | |
1135 | .vidioc_querycap = vsp1_video_querycap, | |
1136 | .vidioc_g_fmt_vid_cap_mplane = vsp1_video_get_format, | |
1137 | .vidioc_s_fmt_vid_cap_mplane = vsp1_video_set_format, | |
1138 | .vidioc_try_fmt_vid_cap_mplane = vsp1_video_try_format, | |
1139 | .vidioc_g_fmt_vid_out_mplane = vsp1_video_get_format, | |
1140 | .vidioc_s_fmt_vid_out_mplane = vsp1_video_set_format, | |
1141 | .vidioc_try_fmt_vid_out_mplane = vsp1_video_try_format, | |
1142 | .vidioc_reqbufs = vb2_ioctl_reqbufs, | |
1143 | .vidioc_querybuf = vb2_ioctl_querybuf, | |
1144 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
1145 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
1146 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | |
1147 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
1148 | .vidioc_streamon = vsp1_video_streamon, | |
1149 | .vidioc_streamoff = vb2_ioctl_streamoff, | |
1150 | }; | |
1151 | ||
1152 | /* ----------------------------------------------------------------------------- | |
1153 | * V4L2 File Operations | |
1154 | */ | |
1155 | ||
1156 | static int vsp1_video_open(struct file *file) | |
1157 | { | |
1158 | struct vsp1_video *video = video_drvdata(file); | |
1159 | struct v4l2_fh *vfh; | |
1160 | int ret = 0; | |
1161 | ||
1162 | vfh = kzalloc(sizeof(*vfh), GFP_KERNEL); | |
1163 | if (vfh == NULL) | |
1164 | return -ENOMEM; | |
1165 | ||
1166 | v4l2_fh_init(vfh, &video->video); | |
1167 | v4l2_fh_add(vfh); | |
1168 | ||
1169 | file->private_data = vfh; | |
1170 | ||
4c16d6a0 LP |
1171 | ret = vsp1_device_get(video->vsp1); |
1172 | if (ret < 0) { | |
26e0ca22 LP |
1173 | v4l2_fh_del(vfh); |
1174 | kfree(vfh); | |
1175 | } | |
1176 | ||
1177 | return ret; | |
1178 | } | |
1179 | ||
1180 | static int vsp1_video_release(struct file *file) | |
1181 | { | |
1182 | struct vsp1_video *video = video_drvdata(file); | |
1183 | struct v4l2_fh *vfh = file->private_data; | |
1184 | ||
1185 | mutex_lock(&video->lock); | |
1186 | if (video->queue.owner == vfh) { | |
1187 | vb2_queue_release(&video->queue); | |
1188 | video->queue.owner = NULL; | |
1189 | } | |
1190 | mutex_unlock(&video->lock); | |
1191 | ||
1192 | vsp1_device_put(video->vsp1); | |
1193 | ||
1194 | v4l2_fh_release(file); | |
1195 | ||
1196 | file->private_data = NULL; | |
1197 | ||
1198 | return 0; | |
1199 | } | |
1200 | ||
1201 | static struct v4l2_file_operations vsp1_video_fops = { | |
1202 | .owner = THIS_MODULE, | |
1203 | .unlocked_ioctl = video_ioctl2, | |
1204 | .open = vsp1_video_open, | |
1205 | .release = vsp1_video_release, | |
1206 | .poll = vb2_fop_poll, | |
1207 | .mmap = vb2_fop_mmap, | |
1208 | }; | |
1209 | ||
1210 | /* ----------------------------------------------------------------------------- | |
1211 | * Initialization and Cleanup | |
1212 | */ | |
1213 | ||
9d40637a LP |
1214 | struct vsp1_video *vsp1_video_create(struct vsp1_device *vsp1, |
1215 | struct vsp1_rwpf *rwpf) | |
26e0ca22 | 1216 | { |
9d40637a | 1217 | struct vsp1_video *video; |
26e0ca22 LP |
1218 | const char *direction; |
1219 | int ret; | |
1220 | ||
9d40637a LP |
1221 | video = devm_kzalloc(vsp1->dev, sizeof(*video), GFP_KERNEL); |
1222 | if (!video) | |
1223 | return ERR_PTR(-ENOMEM); | |
26e0ca22 | 1224 | |
faf2644d | 1225 | rwpf->video = video; |
9d40637a LP |
1226 | |
1227 | video->vsp1 = vsp1; | |
1228 | video->rwpf = rwpf; | |
1229 | ||
1230 | if (rwpf->entity.type == VSP1_ENTITY_RPF) { | |
26e0ca22 | 1231 | direction = "input"; |
9d40637a | 1232 | video->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; |
26e0ca22 LP |
1233 | video->pad.flags = MEDIA_PAD_FL_SOURCE; |
1234 | video->video.vfl_dir = VFL_DIR_TX; | |
9d40637a LP |
1235 | } else { |
1236 | direction = "output"; | |
1237 | video->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | |
1238 | video->pad.flags = MEDIA_PAD_FL_SINK; | |
1239 | video->video.vfl_dir = VFL_DIR_RX; | |
26e0ca22 LP |
1240 | } |
1241 | ||
26e0ca22 LP |
1242 | mutex_init(&video->lock); |
1243 | spin_lock_init(&video->irqlock); | |
1244 | INIT_LIST_HEAD(&video->irqqueue); | |
1245 | ||
1246 | mutex_init(&video->pipe.lock); | |
1247 | spin_lock_init(&video->pipe.irqlock); | |
1248 | INIT_LIST_HEAD(&video->pipe.entities); | |
1249 | init_waitqueue_head(&video->pipe.wq); | |
1250 | video->pipe.state = VSP1_PIPELINE_STOPPED; | |
3f725b7e | 1251 | video->pipe.frame_end = vsp1_video_pipeline_frame_end; |
26e0ca22 LP |
1252 | |
1253 | /* Initialize the media entity... */ | |
ab22e77c | 1254 | ret = media_entity_pads_init(&video->video.entity, 1, &video->pad); |
26e0ca22 | 1255 | if (ret < 0) |
9d40637a | 1256 | return ERR_PTR(ret); |
26e0ca22 LP |
1257 | |
1258 | /* ... and the format ... */ | |
86960eec LP |
1259 | rwpf->fmtinfo = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT); |
1260 | rwpf->format.pixelformat = rwpf->fmtinfo->fourcc; | |
1261 | rwpf->format.colorspace = V4L2_COLORSPACE_SRGB; | |
1262 | rwpf->format.field = V4L2_FIELD_NONE; | |
1263 | rwpf->format.width = VSP1_VIDEO_DEF_WIDTH; | |
1264 | rwpf->format.height = VSP1_VIDEO_DEF_HEIGHT; | |
1265 | rwpf->format.num_planes = 1; | |
1266 | rwpf->format.plane_fmt[0].bytesperline = | |
1267 | rwpf->format.width * rwpf->fmtinfo->bpp[0] / 8; | |
1268 | rwpf->format.plane_fmt[0].sizeimage = | |
1269 | rwpf->format.plane_fmt[0].bytesperline * rwpf->format.height; | |
26e0ca22 LP |
1270 | |
1271 | /* ... and the video node... */ | |
1272 | video->video.v4l2_dev = &video->vsp1->v4l2_dev; | |
1273 | video->video.fops = &vsp1_video_fops; | |
1274 | snprintf(video->video.name, sizeof(video->video.name), "%s %s", | |
8b4a0563 | 1275 | rwpf->entity.subdev.name, direction); |
26e0ca22 LP |
1276 | video->video.vfl_type = VFL_TYPE_GRABBER; |
1277 | video->video.release = video_device_release_empty; | |
1278 | video->video.ioctl_ops = &vsp1_video_ioctl_ops; | |
1279 | ||
1280 | video_set_drvdata(&video->video, video); | |
1281 | ||
1282 | /* ... and the buffers queue... */ | |
1283 | video->alloc_ctx = vb2_dma_contig_init_ctx(video->vsp1->dev); | |
b317828b WY |
1284 | if (IS_ERR(video->alloc_ctx)) { |
1285 | ret = PTR_ERR(video->alloc_ctx); | |
26e0ca22 | 1286 | goto error; |
b317828b | 1287 | } |
26e0ca22 LP |
1288 | |
1289 | video->queue.type = video->type; | |
1290 | video->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; | |
1291 | video->queue.lock = &video->lock; | |
1292 | video->queue.drv_priv = video; | |
f7ebf3ca | 1293 | video->queue.buf_struct_size = sizeof(struct vsp1_vb2_buffer); |
26e0ca22 LP |
1294 | video->queue.ops = &vsp1_video_queue_qops; |
1295 | video->queue.mem_ops = &vb2_dma_contig_memops; | |
ade48681 | 1296 | video->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; |
26e0ca22 LP |
1297 | ret = vb2_queue_init(&video->queue); |
1298 | if (ret < 0) { | |
1299 | dev_err(video->vsp1->dev, "failed to initialize vb2 queue\n"); | |
1300 | goto error; | |
1301 | } | |
1302 | ||
1303 | /* ... and register the video device. */ | |
1304 | video->video.queue = &video->queue; | |
1305 | ret = video_register_device(&video->video, VFL_TYPE_GRABBER, -1); | |
1306 | if (ret < 0) { | |
1307 | dev_err(video->vsp1->dev, "failed to register video device\n"); | |
1308 | goto error; | |
1309 | } | |
1310 | ||
9d40637a | 1311 | return video; |
26e0ca22 LP |
1312 | |
1313 | error: | |
1314 | vb2_dma_contig_cleanup_ctx(video->alloc_ctx); | |
1315 | vsp1_video_cleanup(video); | |
9d40637a | 1316 | return ERR_PTR(ret); |
26e0ca22 LP |
1317 | } |
1318 | ||
1319 | void vsp1_video_cleanup(struct vsp1_video *video) | |
1320 | { | |
1321 | if (video_is_registered(&video->video)) | |
1322 | video_unregister_device(&video->video); | |
1323 | ||
1324 | vb2_dma_contig_cleanup_ctx(video->alloc_ctx); | |
1325 | media_entity_cleanup(&video->video.entity); | |
1326 | } |