[deliverable/linux.git] / drivers / media / rc / ir-rx51.c

/*
 *  Copyright (C) 2008 Nokia Corporation
 *
 *  Based on lirc_serial.c
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/uaccess.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/wait.h>

#include <plat/dmtimer.h>
#include <plat/clock.h>
#include <plat/omap-pm.h>

#include <media/lirc.h>
#include <media/lirc_dev.h>
#include <media/ir-rx51.h>

#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE |	\
				   LIRC_CAN_SET_SEND_CARRIER |		\
				   LIRC_CAN_SEND_PULSE)

#define DRIVER_NAME "lirc_rx51"

#define WBUF_LEN 256

#define TIMER_MAX_VALUE 0xffffffff

struct lirc_rx51 {
	struct omap_dm_timer *pwm_timer;
	struct omap_dm_timer *pulse_timer;
	struct device	     *dev;
	struct lirc_rx51_platform_data *pdata;
	wait_queue_head_t     wqueue;

	unsigned long	fclk_khz;
	unsigned int	freq;		/* carrier frequency */
	unsigned int	duty_cycle;	/* carrier duty cycle */
	unsigned int	irq_num;
	unsigned int	match;
	int		wbuf[WBUF_LEN];
	int		wbuf_index;
	unsigned long	device_is_open;
	unsigned int	pwm_timer_num;
};

static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
{
	omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
			      OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
}

static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
{
	omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
			      OMAP_TIMER_TRIGGER_NONE);
}

static int init_timing_params(struct lirc_rx51 *lirc_rx51)
{
	u32 load, match;

	load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
	match = -(lirc_rx51->duty_cycle * -load / 100);
	omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
	omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
	omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
	omap_dm_timer_start(lirc_rx51->pwm_timer);
	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
	omap_dm_timer_start(lirc_rx51->pulse_timer);

	lirc_rx51->match = 0;

	return 0;
}

#define tics_after(a, b) ((long)(b) - (long)(a) < 0)

static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
{
	int counter;

	BUG_ON(usec < 0);

	if (lirc_rx51->match == 0)
		counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
	else
		counter = lirc_rx51->match;

	counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
	omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
				     OMAP_TIMER_INT_MATCH);
	if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
		       counter)) {
		return 1;
	}
	return 0;
}

static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
{
	unsigned int retval;
	struct lirc_rx51 *lirc_rx51 = ptr;

	retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer);
	if (!retval)
		return IRQ_NONE;

	if ((retval & ~OMAP_TIMER_INT_MATCH))
		dev_err_ratelimited(lirc_rx51->dev,
				": Unexpected interrupt source: %x\n", retval);

	omap_dm_timer_write_status(lirc_rx51->pulse_timer, 7);
	if (lirc_rx51->wbuf_index < 0) {
		dev_err_ratelimited(lirc_rx51->dev,
				": BUG wbuf_index has value of %i\n",
				lirc_rx51->wbuf_index);
		goto end;
	}

	/*
	 * If we happen to hit an odd latency spike, loop through the
	 * pulses until we catch up.
	 */
	do {
		if (lirc_rx51->wbuf_index >= WBUF_LEN)
			goto end;
		if (lirc_rx51->wbuf[lirc_rx51->wbuf_index] == -1)
			goto end;

		if (lirc_rx51->wbuf_index % 2)
			lirc_rx51_off(lirc_rx51);
		else
			lirc_rx51_on(lirc_rx51);

		retval = pulse_timer_set_timeout(lirc_rx51,
					lirc_rx51->wbuf[lirc_rx51->wbuf_index]);
		lirc_rx51->wbuf_index++;

	} while (retval);

	return IRQ_HANDLED;
end:
	/* Stop TX here */
	lirc_rx51_off(lirc_rx51);
	lirc_rx51->wbuf_index = -1;
	omap_dm_timer_stop(lirc_rx51->pwm_timer);
	omap_dm_timer_stop(lirc_rx51->pulse_timer);
	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
	wake_up_interruptible(&lirc_rx51->wqueue);

	return IRQ_HANDLED;
}

static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
{
	struct clk *clk_fclk;
	int retval, pwm_timer = lirc_rx51->pwm_timer_num;

	lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer);
	if (lirc_rx51->pwm_timer == NULL) {
		dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
			pwm_timer);
		return -EBUSY;
	}

	lirc_rx51->pulse_timer = omap_dm_timer_request();
	if (lirc_rx51->pulse_timer == NULL) {
		dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
		retval = -EBUSY;
		goto err1;
	}

	omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK);
	omap_dm_timer_set_source(lirc_rx51->pulse_timer,
				OMAP_TIMER_SRC_SYS_CLK);

	omap_dm_timer_enable(lirc_rx51->pwm_timer);
	omap_dm_timer_enable(lirc_rx51->pulse_timer);

	lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer);
	retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
			     IRQF_DISABLED | IRQF_SHARED,
			     "lirc_pulse_timer", lirc_rx51);
	if (retval) {
		dev_err(lirc_rx51->dev, ": Failed to request interrupt line\n");
		goto err2;
	}

	clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer);
	lirc_rx51->fclk_khz = clk_fclk->rate / 1000;

	return 0;

err2:
	omap_dm_timer_free(lirc_rx51->pulse_timer);
err1:
	omap_dm_timer_free(lirc_rx51->pwm_timer);

	return retval;
}

static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
{
	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
	free_irq(lirc_rx51->irq_num, lirc_rx51);
	lirc_rx51_off(lirc_rx51);
	omap_dm_timer_disable(lirc_rx51->pwm_timer);
	omap_dm_timer_disable(lirc_rx51->pulse_timer);
	omap_dm_timer_free(lirc_rx51->pwm_timer);
	omap_dm_timer_free(lirc_rx51->pulse_timer);
	lirc_rx51->wbuf_index = -1;

	return 0;
}

static ssize_t lirc_rx51_write(struct file *file, const char *buf,
			  size_t n, loff_t *ppos)
{
	int count, i;
	struct lirc_rx51 *lirc_rx51 = file->private_data;

	if (n % sizeof(int))
		return -EINVAL;

	count = n / sizeof(int);
	if ((count > WBUF_LEN) || (count % 2 == 0))
		return -EINVAL;

	/* Wait any pending transfers to finish */
	wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0);

	if (copy_from_user(lirc_rx51->wbuf, buf, n))
		return -EFAULT;

	/* Sanity check the input pulses */
	for (i = 0; i < count; i++)
		if (lirc_rx51->wbuf[i] < 0)
			return -EINVAL;

	init_timing_params(lirc_rx51);
	if (count < WBUF_LEN)
		lirc_rx51->wbuf[count] = -1; /* Insert termination mark */

	/*
	 * Adjust latency requirements so the device doesn't go in too
	 * deep sleep states
	 */
	lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, 50);

	lirc_rx51_on(lirc_rx51);
	lirc_rx51->wbuf_index = 1;
	pulse_timer_set_timeout(lirc_rx51, lirc_rx51->wbuf[0]);

	/*
	 * Don't return back to the userspace until the transfer has
	 * finished
	 */
	wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0);

	/* We can sleep again */
	lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, -1);

	return n;
}

static long lirc_rx51_ioctl(struct file *filep,
			unsigned int cmd, unsigned long arg)
{
	int result;
	unsigned long value;
	unsigned int ivalue;
	struct lirc_rx51 *lirc_rx51 = filep->private_data;

	switch (cmd) {
	case LIRC_GET_SEND_MODE:
		result = put_user(LIRC_MODE_PULSE, (unsigned long *)arg);
		if (result)
			return result;
		break;

	case LIRC_SET_SEND_MODE:
		result = get_user(value, (unsigned long *)arg);
		if (result)
			return result;

		/* only LIRC_MODE_PULSE supported */
		if (value != LIRC_MODE_PULSE)
			return -ENOSYS;
		break;

	case LIRC_GET_REC_MODE:
		result = put_user(0, (unsigned long *) arg);
		if (result)
			return result;
		break;

	case LIRC_GET_LENGTH:
		return -ENOSYS;
		break;

	case LIRC_SET_SEND_DUTY_CYCLE:
		result = get_user(ivalue, (unsigned int *) arg);
		if (result)
			return result;

		if (ivalue <= 0 || ivalue > 100) {
			dev_err(lirc_rx51->dev, ": invalid duty cycle %d\n",
				ivalue);
			return -EINVAL;
		}

		lirc_rx51->duty_cycle = ivalue;
		break;

	case LIRC_SET_SEND_CARRIER:
		result = get_user(ivalue, (unsigned int *) arg);
		if (result)
			return result;

		if (ivalue > 500000 || ivalue < 20000) {
			dev_err(lirc_rx51->dev, ": invalid carrier freq %d\n",
				ivalue);
			return -EINVAL;
		}

		lirc_rx51->freq = ivalue;
		break;

	case LIRC_GET_FEATURES:
		result = put_user(LIRC_RX51_DRIVER_FEATURES,
				  (unsigned long *) arg);
		if (result)
			return result;
		break;

	default:
		return -ENOIOCTLCMD;
	}

	return 0;
}

static int lirc_rx51_open(struct inode *inode, struct file *file)
{
	struct lirc_rx51 *lirc_rx51 = lirc_get_pdata(file);
	BUG_ON(!lirc_rx51);

	file->private_data = lirc_rx51;

	if (test_and_set_bit(1, &lirc_rx51->device_is_open))
		return -EBUSY;

	return lirc_rx51_init_port(lirc_rx51);
}

static int lirc_rx51_release(struct inode *inode, struct file *file)
{
	struct lirc_rx51 *lirc_rx51 = file->private_data;

	lirc_rx51_free_port(lirc_rx51);

	clear_bit(1, &lirc_rx51->device_is_open);

	return 0;
}

static struct lirc_rx51 lirc_rx51 = {
	.freq		= 38000,
	.duty_cycle	= 50,
	.wbuf_index	= -1,
};

static const struct file_operations lirc_fops = {
	.owner		= THIS_MODULE,
	.write		= lirc_rx51_write,
	.unlocked_ioctl	= lirc_rx51_ioctl,
	.read		= lirc_dev_fop_read,
	.poll		= lirc_dev_fop_poll,
	.open		= lirc_rx51_open,
	.release	= lirc_rx51_release,
};

static struct lirc_driver lirc_rx51_driver = {
	.name		= DRIVER_NAME,
	.minor		= -1,
	.code_length	= 1,
	.data		= &lirc_rx51,
	.fops		= &lirc_fops,
	.owner		= THIS_MODULE,
};

#ifdef CONFIG_PM

static int lirc_rx51_suspend(struct platform_device *dev, pm_message_t state)
{
	/*
	 * In case the device is still open, do not suspend. Normally
	 * this should not be a problem as lircd only keeps the device
	 * open only for short periods of time. We also don't want to
	 * get involved with race conditions that might happen if we
	 * were in a middle of a transmit. Thus, we defer any suspend
	 * actions until transmit has completed.
	 */
	if (test_and_set_bit(1, &lirc_rx51.device_is_open))
		return -EAGAIN;

	clear_bit(1, &lirc_rx51.device_is_open);

	return 0;
}

static int lirc_rx51_resume(struct platform_device *dev)
{
	return 0;
}

#else

#define lirc_rx51_suspend	NULL
#define lirc_rx51_resume	NULL

#endif /* CONFIG_PM */

static int __devinit lirc_rx51_probe(struct platform_device *dev)
{
	lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
	lirc_rx51.pdata = dev->dev.platform_data;
	lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
	lirc_rx51.dev = &dev->dev;
	lirc_rx51_driver.dev = &dev->dev;
	lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);
	init_waitqueue_head(&lirc_rx51.wqueue);

	if (lirc_rx51_driver.minor < 0) {
		dev_err(lirc_rx51.dev, ": lirc_register_driver failed: %d\n",
		       lirc_rx51_driver.minor);
		return lirc_rx51_driver.minor;
	}
	dev_info(lirc_rx51.dev, "registration ok, minor: %d, pwm: %d\n",
		 lirc_rx51_driver.minor, lirc_rx51.pwm_timer_num);

	return 0;
}

static int __exit lirc_rx51_remove(struct platform_device *dev)
{
	return lirc_unregister_driver(lirc_rx51_driver.minor);
}

struct platform_driver lirc_rx51_platform_driver = {
	.probe		= lirc_rx51_probe,
	.remove		= __exit_p(lirc_rx51_remove),
	.suspend	= lirc_rx51_suspend,
	.resume		= lirc_rx51_resume,
	.remove		= __exit_p(lirc_rx51_remove),
	.driver		= {
		.name	= DRIVER_NAME,
		.owner	= THIS_MODULE,
	},
};

static int __init lirc_rx51_init(void)
{
	return platform_driver_register(&lirc_rx51_platform_driver);
}
module_init(lirc_rx51_init);

static void __exit lirc_rx51_exit(void)
{
	platform_driver_unregister(&lirc_rx51_platform_driver);
}
module_exit(lirc_rx51_exit);

MODULE_DESCRIPTION("LIRC TX driver for Nokia RX51");
MODULE_AUTHOR("Nokia Corporation");
MODULE_LICENSE("GPL");
Commit	Line	Data
c332e847 TK	1	/*
	2	* Copyright (C) 2008 Nokia Corporation
	3	*
	4	* Based on lirc_serial.c
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
	20	*/
	21
	22	#include <linux/module.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/uaccess.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/sched.h>
	27	#include <linux/wait.h>
	28
	29	#include <plat/dmtimer.h>
	30	#include <plat/clock.h>
	31	#include <plat/omap-pm.h>
	32
	33	#include <media/lirc.h>
	34	#include <media/lirc_dev.h>
	35	#include <media/ir-rx51.h>
	36
	37	#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE \| \
	38	LIRC_CAN_SET_SEND_CARRIER \| \
	39	LIRC_CAN_SEND_PULSE)
	40
	41	#define DRIVER_NAME "lirc_rx51"
	42
	43	#define WBUF_LEN 256
	44
	45	#define TIMER_MAX_VALUE 0xffffffff
	46
	47	struct lirc_rx51 {
	48	struct omap_dm_timer *pwm_timer;
	49	struct omap_dm_timer *pulse_timer;
	50	struct device *dev;
	51	struct lirc_rx51_platform_data *pdata;
	52	wait_queue_head_t wqueue;
	53
	54	unsigned long fclk_khz;
	55	unsigned int freq; /* carrier frequency */
	56	unsigned int duty_cycle; /* carrier duty cycle */
	57	unsigned int irq_num;
	58	unsigned int match;
	59	int wbuf[WBUF_LEN];
	60	int wbuf_index;
	61	unsigned long device_is_open;
	62	unsigned int pwm_timer_num;
	63	};
	64
65	static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
66	{
67	omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
68	OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
69	}
70
71	static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
72	{
73	omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
74	OMAP_TIMER_TRIGGER_NONE);
75	}
76
77	static int init_timing_params(struct lirc_rx51 *lirc_rx51)
78	{
79	u32 load, match;
80
81	load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
82	match = -(lirc_rx51->duty_cycle * -load / 100);
83	omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
84	omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
85	omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
86	omap_dm_timer_start(lirc_rx51->pwm_timer);
87	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
88	omap_dm_timer_start(lirc_rx51->pulse_timer);
89
90	lirc_rx51->match = 0;
91
92	return 0;
93	}
94
95	#define tics_after(a, b) ((long)(b) - (long)(a) < 0)
96
97	static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
98	{
99	int counter;
100
101	BUG_ON(usec < 0);
102
103	if (lirc_rx51->match == 0)
104	counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
105	else
106	counter = lirc_rx51->match;
107
108	counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
109	omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
110	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
111	OMAP_TIMER_INT_MATCH);
112	if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
113	counter)) {
114	return 1;
115	}
116	return 0;
117	}
118
119	static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
120	{
121	unsigned int retval;
122	struct lirc_rx51 *lirc_rx51 = ptr;
123
124	retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer);
125	if (!retval)
126	return IRQ_NONE;
127
128	if ((retval & ~OMAP_TIMER_INT_MATCH))
129	dev_err_ratelimited(lirc_rx51->dev,
130	": Unexpected interrupt source: %x\n", retval);
131
132	omap_dm_timer_write_status(lirc_rx51->pulse_timer, 7);
133	if (lirc_rx51->wbuf_index < 0) {
134	dev_err_ratelimited(lirc_rx51->dev,
135	": BUG wbuf_index has value of %i\n",
136	lirc_rx51->wbuf_index);
137	goto end;
138	}
139
140	/*
141	* If we happen to hit an odd latency spike, loop through the
142	* pulses until we catch up.
143	*/
144	do {
145	if (lirc_rx51->wbuf_index >= WBUF_LEN)
146	goto end;
147	if (lirc_rx51->wbuf[lirc_rx51->wbuf_index] == -1)
148	goto end;
149
150	if (lirc_rx51->wbuf_index % 2)
151	lirc_rx51_off(lirc_rx51);
152	else
153	lirc_rx51_on(lirc_rx51);
154
155	retval = pulse_timer_set_timeout(lirc_rx51,
156	lirc_rx51->wbuf[lirc_rx51->wbuf_index]);
157	lirc_rx51->wbuf_index++;
158
159	} while (retval);
160
161	return IRQ_HANDLED;
162	end:
163	/* Stop TX here */
164	lirc_rx51_off(lirc_rx51);
165	lirc_rx51->wbuf_index = -1;
166	omap_dm_timer_stop(lirc_rx51->pwm_timer);
167	omap_dm_timer_stop(lirc_rx51->pulse_timer);
168	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
169	wake_up_interruptible(&lirc_rx51->wqueue);
170
171	return IRQ_HANDLED;
172	}
173
174	static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
175	{
176	struct clk *clk_fclk;
177	int retval, pwm_timer = lirc_rx51->pwm_timer_num;
178
179	lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer);
180	if (lirc_rx51->pwm_timer == NULL) {
181	dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
182	pwm_timer);
183	return -EBUSY;
184	}
185
186	lirc_rx51->pulse_timer = omap_dm_timer_request();
187	if (lirc_rx51->pulse_timer == NULL) {
188	dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
189	retval = -EBUSY;
190	goto err1;
191	}
192
193	omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK);
194	omap_dm_timer_set_source(lirc_rx51->pulse_timer,
195	OMAP_TIMER_SRC_SYS_CLK);
196
197	omap_dm_timer_enable(lirc_rx51->pwm_timer);
198	omap_dm_timer_enable(lirc_rx51->pulse_timer);
199
200	lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer);
201	retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
202	IRQF_DISABLED \| IRQF_SHARED,
203	"lirc_pulse_timer", lirc_rx51);
204	if (retval) {
205	dev_err(lirc_rx51->dev, ": Failed to request interrupt line\n");
206	goto err2;
207	}
208
209	clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer);
210	lirc_rx51->fclk_khz = clk_fclk->rate / 1000;
211
212	return 0;
213
214	err2:
215	omap_dm_timer_free(lirc_rx51->pulse_timer);
216	err1:
217	omap_dm_timer_free(lirc_rx51->pwm_timer);
218
219	return retval;
220	}
221
222	static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
223	{
224	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
225	free_irq(lirc_rx51->irq_num, lirc_rx51);
226	lirc_rx51_off(lirc_rx51);
227	omap_dm_timer_disable(lirc_rx51->pwm_timer);
228	omap_dm_timer_disable(lirc_rx51->pulse_timer);
229	omap_dm_timer_free(lirc_rx51->pwm_timer);
230	omap_dm_timer_free(lirc_rx51->pulse_timer);
231	lirc_rx51->wbuf_index = -1;
232
233	return 0;
234	}
235
236	static ssize_t lirc_rx51_write(struct file file, const char buf,
237	size_t n, loff_t *ppos)
238	{
239	int count, i;
240	struct lirc_rx51 *lirc_rx51 = file->private_data;
241
242	if (n % sizeof(int))
243	return -EINVAL;
244
245	count = n / sizeof(int);
246	if ((count > WBUF_LEN) \|\| (count % 2 == 0))
247	return -EINVAL;
248
249	/* Wait any pending transfers to finish */
250	wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0);
251
252	if (copy_from_user(lirc_rx51->wbuf, buf, n))
253	return -EFAULT;
254
255	/* Sanity check the input pulses */
256	for (i = 0; i < count; i++)
257	if (lirc_rx51->wbuf[i] < 0)
258	return -EINVAL;
259
260	init_timing_params(lirc_rx51);
261	if (count < WBUF_LEN)
262	lirc_rx51->wbuf[count] = -1; /* Insert termination mark */
263
264	/*
265	* Adjust latency requirements so the device doesn't go in too
266	* deep sleep states
267	*/
268	lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, 50);
269
270	lirc_rx51_on(lirc_rx51);
271	lirc_rx51->wbuf_index = 1;
272	pulse_timer_set_timeout(lirc_rx51, lirc_rx51->wbuf[0]);
273
274	/*
275	* Don't return back to the userspace until the transfer has
276	* finished
277	*/
278	wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0);
279
280	/* We can sleep again */
281	lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, -1);
282
283	return n;
284	}
285
286	static long lirc_rx51_ioctl(struct file *filep,
287	unsigned int cmd, unsigned long arg)
288	{
289	int result;
290	unsigned long value;
291	unsigned int ivalue;
292	struct lirc_rx51 *lirc_rx51 = filep->private_data;
293
294	switch (cmd) {
295	case LIRC_GET_SEND_MODE:
296	result = put_user(LIRC_MODE_PULSE, (unsigned long *)arg);
297	if (result)
298	return result;
299	break;
300
301	case LIRC_SET_SEND_MODE:
302	result = get_user(value, (unsigned long *)arg);
303	if (result)
304	return result;
305
306	/* only LIRC_MODE_PULSE supported */
307	if (value != LIRC_MODE_PULSE)
308	return -ENOSYS;
309	break;
310
311	case LIRC_GET_REC_MODE:
312	result = put_user(0, (unsigned long *) arg);
313	if (result)
314	return result;
315	break;
316
317	case LIRC_GET_LENGTH:
318	return -ENOSYS;
319	break;
320
321	case LIRC_SET_SEND_DUTY_CYCLE:
322	result = get_user(ivalue, (unsigned int *) arg);
323	if (result)
324	return result;
325
326	if (ivalue <= 0 \|\| ivalue > 100) {
327	dev_err(lirc_rx51->dev, ": invalid duty cycle %d\n",
328	ivalue);
329	return -EINVAL;
330	}
331
332	lirc_rx51->duty_cycle = ivalue;
333	break;
334
335	case LIRC_SET_SEND_CARRIER:
336	result = get_user(ivalue, (unsigned int *) arg);
337	if (result)
338	return result;
339
340	if (ivalue > 500000 \|\| ivalue < 20000) {
341	dev_err(lirc_rx51->dev, ": invalid carrier freq %d\n",
342	ivalue);
343	return -EINVAL;
344	}
345
346	lirc_rx51->freq = ivalue;
347	break;
348
349	case LIRC_GET_FEATURES:
350	result = put_user(LIRC_RX51_DRIVER_FEATURES,
351	(unsigned long *) arg);
352	if (result)
353	return result;
354	break;
355
356	default:
357	return -ENOIOCTLCMD;
358	}
359
360	return 0;
361	}
362
363	static int lirc_rx51_open(struct inode inode, struct file file)
364	{
365	struct lirc_rx51 *lirc_rx51 = lirc_get_pdata(file);
366	BUG_ON(!lirc_rx51);
367
368	file->private_data = lirc_rx51;
369
370	if (test_and_set_bit(1, &lirc_rx51->device_is_open))
371	return -EBUSY;
372
373	return lirc_rx51_init_port(lirc_rx51);
374	}
375
376	static int lirc_rx51_release(struct inode inode, struct file file)
377	{
378	struct lirc_rx51 *lirc_rx51 = file->private_data;
379
380	lirc_rx51_free_port(lirc_rx51);
381
382	clear_bit(1, &lirc_rx51->device_is_open);
383
384	return 0;
385	}
386
387	static struct lirc_rx51 lirc_rx51 = {
388	.freq = 38000,
389	.duty_cycle = 50,
390	.wbuf_index = -1,
391	};
392
393	static const struct file_operations lirc_fops = {
394	.owner = THIS_MODULE,
395	.write = lirc_rx51_write,
396	.unlocked_ioctl = lirc_rx51_ioctl,
397	.read = lirc_dev_fop_read,
398	.poll = lirc_dev_fop_poll,
399	.open = lirc_rx51_open,
400	.release = lirc_rx51_release,
401	};
402
403	static struct lirc_driver lirc_rx51_driver = {
404	.name = DRIVER_NAME,
405	.minor = -1,
406	.code_length = 1,
407	.data = &lirc_rx51,
408	.fops = &lirc_fops,
409	.owner = THIS_MODULE,
410	};
411
412	#ifdef CONFIG_PM
413
414	static int lirc_rx51_suspend(struct platform_device *dev, pm_message_t state)
415	{
416	/*
417	* In case the device is still open, do not suspend. Normally
418	* this should not be a problem as lircd only keeps the device
419	* open only for short periods of time. We also don't want to
420	* get involved with race conditions that might happen if we
421	* were in a middle of a transmit. Thus, we defer any suspend
422	* actions until transmit has completed.
423	*/
424	if (test_and_set_bit(1, &lirc_rx51.device_is_open))
425	return -EAGAIN;
426
427	clear_bit(1, &lirc_rx51.device_is_open);
428
429	return 0;
430	}
431
432	static int lirc_rx51_resume(struct platform_device *dev)
433	{
434	return 0;
435	}
436
437	#else
438
439	#define lirc_rx51_suspend NULL
440	#define lirc_rx51_resume NULL
441
442	#endif /* CONFIG_PM */
443
444	static int __devinit lirc_rx51_probe(struct platform_device *dev)
445	{
446	lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
447	lirc_rx51.pdata = dev->dev.platform_data;
448	lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
449	lirc_rx51.dev = &dev->dev;
450	lirc_rx51_driver.dev = &dev->dev;
451	lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);
452	init_waitqueue_head(&lirc_rx51.wqueue);
453
454	if (lirc_rx51_driver.minor < 0) {
455	dev_err(lirc_rx51.dev, ": lirc_register_driver failed: %d\n",
456	lirc_rx51_driver.minor);
457	return lirc_rx51_driver.minor;
458	}
459	dev_info(lirc_rx51.dev, "registration ok, minor: %d, pwm: %d\n",
460	lirc_rx51_driver.minor, lirc_rx51.pwm_timer_num);
461
462	return 0;
463	}
464
465	static int __exit lirc_rx51_remove(struct platform_device *dev)
466	{
467	return lirc_unregister_driver(lirc_rx51_driver.minor);
468	}
469
470	struct platform_driver lirc_rx51_platform_driver = {
471	.probe = lirc_rx51_probe,
472	.remove = __exit_p(lirc_rx51_remove),
473	.suspend = lirc_rx51_suspend,
474	.resume = lirc_rx51_resume,
475	.remove = __exit_p(lirc_rx51_remove),
476	.driver = {
477	.name = DRIVER_NAME,
478	.owner = THIS_MODULE,
479	},
480	};
481
482	static int __init lirc_rx51_init(void)
483	{
484	return platform_driver_register(&lirc_rx51_platform_driver);
485	}
486	module_init(lirc_rx51_init);
487
488	static void __exit lirc_rx51_exit(void)
489	{
490	platform_driver_unregister(&lirc_rx51_platform_driver);
491	}
492	module_exit(lirc_rx51_exit);
493
494	MODULE_DESCRIPTION("LIRC TX driver for Nokia RX51");
495	MODULE_AUTHOR("Nokia Corporation");
496	MODULE_LICENSE("GPL");