Commit | Line | Data |
---|---|---|
620a32bb JGS |
1 | /* |
2 | * Driver for ITE Tech Inc. IT8712F/IT8512 CIR | |
3 | * | |
4 | * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation; either version 2 of the | |
9 | * License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | |
19 | * USA. | |
20 | * | |
21 | * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the | |
22 | * skeleton provided by the nuvoton-cir driver. | |
23 | * | |
24 | * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues | |
25 | * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus | |
26 | * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards | |
27 | * <jimbo-lirc@edwardsclan.net>. | |
28 | * | |
29 | * The lirc_ite8709 driver was written by Grégory Lardière | |
30 | * <spmf2004-lirc@yahoo.fr> in 2008. | |
31 | */ | |
32 | ||
33 | #include <linux/kernel.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/pnp.h> | |
36 | #include <linux/io.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/sched.h> | |
d7516c7c | 39 | #include <linux/delay.h> |
620a32bb JGS |
40 | #include <linux/slab.h> |
41 | #include <linux/input.h> | |
42 | #include <linux/bitops.h> | |
43 | #include <media/rc-core.h> | |
44 | #include <linux/pci_ids.h> | |
ca444564 | 45 | #include <linux/delay.h> |
620a32bb JGS |
46 | |
47 | #include "ite-cir.h" | |
48 | ||
49 | /* module parameters */ | |
50 | ||
51 | /* debug level */ | |
52 | static int debug; | |
53 | module_param(debug, int, S_IRUGO | S_IWUSR); | |
54 | MODULE_PARM_DESC(debug, "Enable debugging output"); | |
55 | ||
56 | /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */ | |
57 | static int rx_low_carrier_freq; | |
58 | module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR); | |
59 | MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, " | |
60 | "0 for no RX demodulation"); | |
61 | ||
62 | /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */ | |
63 | static int rx_high_carrier_freq; | |
64 | module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR); | |
65 | MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, " | |
66 | "Hz, 0 for no RX demodulation"); | |
67 | ||
68 | /* override tx carrier frequency */ | |
69 | static int tx_carrier_freq; | |
70 | module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR); | |
71 | MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz"); | |
72 | ||
73 | /* override tx duty cycle */ | |
74 | static int tx_duty_cycle; | |
75 | module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR); | |
76 | MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100"); | |
77 | ||
78 | /* override default sample period */ | |
79 | static long sample_period; | |
80 | module_param(sample_period, long, S_IRUGO | S_IWUSR); | |
81 | MODULE_PARM_DESC(sample_period, "Override carrier sample period, us"); | |
82 | ||
83 | /* override detected model id */ | |
84 | static int model_number = -1; | |
85 | module_param(model_number, int, S_IRUGO | S_IWUSR); | |
86 | MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect"); | |
87 | ||
88 | ||
89 | /* HW-independent code functions */ | |
90 | ||
91 | /* check whether carrier frequency is high frequency */ | |
92 | static inline bool ite_is_high_carrier_freq(unsigned int freq) | |
93 | { | |
94 | return freq >= ITE_HCF_MIN_CARRIER_FREQ; | |
95 | } | |
96 | ||
97 | /* get the bits required to program the carrier frequency in CFQ bits, | |
98 | * unshifted */ | |
99 | static u8 ite_get_carrier_freq_bits(unsigned int freq) | |
100 | { | |
101 | if (ite_is_high_carrier_freq(freq)) { | |
102 | if (freq < 425000) | |
103 | return ITE_CFQ_400; | |
104 | ||
105 | else if (freq < 465000) | |
106 | return ITE_CFQ_450; | |
107 | ||
108 | else if (freq < 490000) | |
109 | return ITE_CFQ_480; | |
110 | ||
111 | else | |
112 | return ITE_CFQ_500; | |
113 | } else { | |
114 | /* trim to limits */ | |
115 | if (freq < ITE_LCF_MIN_CARRIER_FREQ) | |
116 | freq = ITE_LCF_MIN_CARRIER_FREQ; | |
117 | if (freq > ITE_LCF_MAX_CARRIER_FREQ) | |
118 | freq = ITE_LCF_MAX_CARRIER_FREQ; | |
119 | ||
120 | /* convert to kHz and subtract the base freq */ | |
121 | freq = | |
122 | DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ, | |
123 | 1000); | |
124 | ||
125 | return (u8) freq; | |
126 | } | |
127 | } | |
128 | ||
129 | /* get the bits required to program the pulse with in TXMPW */ | |
130 | static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle) | |
131 | { | |
132 | unsigned long period_ns, on_ns; | |
133 | ||
134 | /* sanitize freq into range */ | |
135 | if (freq < ITE_LCF_MIN_CARRIER_FREQ) | |
136 | freq = ITE_LCF_MIN_CARRIER_FREQ; | |
137 | if (freq > ITE_HCF_MAX_CARRIER_FREQ) | |
138 | freq = ITE_HCF_MAX_CARRIER_FREQ; | |
139 | ||
140 | period_ns = 1000000000UL / freq; | |
141 | on_ns = period_ns * duty_cycle / 100; | |
142 | ||
143 | if (ite_is_high_carrier_freq(freq)) { | |
144 | if (on_ns < 750) | |
145 | return ITE_TXMPW_A; | |
146 | ||
147 | else if (on_ns < 850) | |
148 | return ITE_TXMPW_B; | |
149 | ||
150 | else if (on_ns < 950) | |
151 | return ITE_TXMPW_C; | |
152 | ||
153 | else if (on_ns < 1080) | |
154 | return ITE_TXMPW_D; | |
155 | ||
156 | else | |
157 | return ITE_TXMPW_E; | |
158 | } else { | |
159 | if (on_ns < 6500) | |
160 | return ITE_TXMPW_A; | |
161 | ||
162 | else if (on_ns < 7850) | |
163 | return ITE_TXMPW_B; | |
164 | ||
165 | else if (on_ns < 9650) | |
166 | return ITE_TXMPW_C; | |
167 | ||
168 | else if (on_ns < 11950) | |
169 | return ITE_TXMPW_D; | |
170 | ||
171 | else | |
172 | return ITE_TXMPW_E; | |
173 | } | |
174 | } | |
175 | ||
176 | /* decode raw bytes as received by the hardware, and push them to the ir-core | |
177 | * layer */ | |
178 | static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int | |
179 | length) | |
180 | { | |
181 | u32 sample_period; | |
182 | unsigned long *ldata; | |
183 | unsigned int next_one, next_zero, size; | |
184 | DEFINE_IR_RAW_EVENT(ev); | |
185 | ||
186 | if (length == 0) | |
187 | return; | |
188 | ||
189 | sample_period = dev->params.sample_period; | |
190 | ldata = (unsigned long *)data; | |
191 | size = length << 3; | |
30f5b28e | 192 | next_one = find_next_bit_le(ldata, size, 0); |
620a32bb JGS |
193 | if (next_one > 0) { |
194 | ev.pulse = true; | |
195 | ev.duration = | |
196 | ITE_BITS_TO_NS(next_one, sample_period); | |
197 | ir_raw_event_store_with_filter(dev->rdev, &ev); | |
198 | } | |
199 | ||
200 | while (next_one < size) { | |
30f5b28e | 201 | next_zero = find_next_zero_bit_le(ldata, size, next_one + 1); |
620a32bb JGS |
202 | ev.pulse = false; |
203 | ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period); | |
204 | ir_raw_event_store_with_filter(dev->rdev, &ev); | |
205 | ||
206 | if (next_zero < size) { | |
207 | next_one = | |
30f5b28e | 208 | find_next_bit_le(ldata, |
620a32bb JGS |
209 | size, |
210 | next_zero + 1); | |
211 | ev.pulse = true; | |
212 | ev.duration = | |
213 | ITE_BITS_TO_NS(next_one - next_zero, | |
214 | sample_period); | |
215 | ir_raw_event_store_with_filter | |
216 | (dev->rdev, &ev); | |
217 | } else | |
218 | next_one = size; | |
219 | } | |
220 | ||
221 | ir_raw_event_handle(dev->rdev); | |
222 | ||
223 | ite_dbg_verbose("decoded %d bytes.", length); | |
224 | } | |
225 | ||
226 | /* set all the rx/tx carrier parameters; this must be called with the device | |
227 | * spinlock held */ | |
228 | static void ite_set_carrier_params(struct ite_dev *dev) | |
229 | { | |
230 | unsigned int freq, low_freq, high_freq; | |
231 | int allowance; | |
232 | bool use_demodulator; | |
233 | bool for_tx = dev->transmitting; | |
234 | ||
235 | ite_dbg("%s called", __func__); | |
236 | ||
237 | if (for_tx) { | |
238 | /* we don't need no stinking calculations */ | |
239 | freq = dev->params.tx_carrier_freq; | |
240 | allowance = ITE_RXDCR_DEFAULT; | |
241 | use_demodulator = false; | |
242 | } else { | |
243 | low_freq = dev->params.rx_low_carrier_freq; | |
244 | high_freq = dev->params.rx_high_carrier_freq; | |
245 | ||
246 | if (low_freq == 0) { | |
247 | /* don't demodulate */ | |
248 | freq = | |
249 | ITE_DEFAULT_CARRIER_FREQ; | |
250 | allowance = ITE_RXDCR_DEFAULT; | |
251 | use_demodulator = false; | |
252 | } else { | |
253 | /* calculate the middle freq */ | |
254 | freq = (low_freq + high_freq) / 2; | |
255 | ||
256 | /* calculate the allowance */ | |
257 | allowance = | |
258 | DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq), | |
259 | ITE_RXDCR_PER_10000_STEP | |
260 | * (high_freq + low_freq)); | |
261 | ||
262 | if (allowance < 1) | |
263 | allowance = 1; | |
264 | ||
265 | if (allowance > ITE_RXDCR_MAX) | |
266 | allowance = ITE_RXDCR_MAX; | |
267 | } | |
268 | } | |
269 | ||
270 | /* set the carrier parameters in a device-dependent way */ | |
271 | dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq), | |
272 | use_demodulator, ite_get_carrier_freq_bits(freq), allowance, | |
273 | ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle)); | |
274 | } | |
275 | ||
276 | /* interrupt service routine for incoming and outgoing CIR data */ | |
277 | static irqreturn_t ite_cir_isr(int irq, void *data) | |
278 | { | |
279 | struct ite_dev *dev = data; | |
280 | unsigned long flags; | |
281 | irqreturn_t ret = IRQ_RETVAL(IRQ_NONE); | |
282 | u8 rx_buf[ITE_RX_FIFO_LEN]; | |
283 | int rx_bytes; | |
284 | int iflags; | |
285 | ||
286 | ite_dbg_verbose("%s firing", __func__); | |
287 | ||
288 | /* grab the spinlock */ | |
289 | spin_lock_irqsave(&dev->lock, flags); | |
290 | ||
291 | /* read the interrupt flags */ | |
292 | iflags = dev->params.get_irq_causes(dev); | |
293 | ||
294 | /* check for the receive interrupt */ | |
295 | if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) { | |
296 | /* read the FIFO bytes */ | |
297 | rx_bytes = | |
298 | dev->params.get_rx_bytes(dev, rx_buf, | |
299 | ITE_RX_FIFO_LEN); | |
300 | ||
301 | if (rx_bytes > 0) { | |
302 | /* drop the spinlock, since the ir-core layer | |
303 | * may call us back again through | |
304 | * ite_s_idle() */ | |
305 | spin_unlock_irqrestore(&dev-> | |
306 | lock, | |
307 | flags); | |
308 | ||
309 | /* decode the data we've just received */ | |
310 | ite_decode_bytes(dev, rx_buf, | |
311 | rx_bytes); | |
312 | ||
313 | /* reacquire the spinlock */ | |
314 | spin_lock_irqsave(&dev->lock, | |
315 | flags); | |
316 | ||
317 | /* mark the interrupt as serviced */ | |
318 | ret = IRQ_RETVAL(IRQ_HANDLED); | |
319 | } | |
320 | } else if (iflags & ITE_IRQ_TX_FIFO) { | |
321 | /* FIFO space available interrupt */ | |
322 | ite_dbg_verbose("got interrupt for TX FIFO"); | |
323 | ||
324 | /* wake any sleeping transmitter */ | |
325 | wake_up_interruptible(&dev->tx_queue); | |
326 | ||
327 | /* mark the interrupt as serviced */ | |
328 | ret = IRQ_RETVAL(IRQ_HANDLED); | |
329 | } | |
330 | ||
331 | /* drop the spinlock */ | |
332 | spin_unlock_irqrestore(&dev->lock, flags); | |
333 | ||
334 | ite_dbg_verbose("%s done returning %d", __func__, (int)ret); | |
335 | ||
336 | return ret; | |
337 | } | |
338 | ||
339 | /* set the rx carrier freq range, guess it's in Hz... */ | |
340 | static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32 | |
341 | carrier_high) | |
342 | { | |
343 | unsigned long flags; | |
344 | struct ite_dev *dev = rcdev->priv; | |
345 | ||
346 | spin_lock_irqsave(&dev->lock, flags); | |
347 | dev->params.rx_low_carrier_freq = carrier_low; | |
348 | dev->params.rx_high_carrier_freq = carrier_high; | |
349 | ite_set_carrier_params(dev); | |
350 | spin_unlock_irqrestore(&dev->lock, flags); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | /* set the tx carrier freq, guess it's in Hz... */ | |
356 | static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier) | |
357 | { | |
358 | unsigned long flags; | |
359 | struct ite_dev *dev = rcdev->priv; | |
360 | ||
361 | spin_lock_irqsave(&dev->lock, flags); | |
362 | dev->params.tx_carrier_freq = carrier; | |
363 | ite_set_carrier_params(dev); | |
364 | spin_unlock_irqrestore(&dev->lock, flags); | |
365 | ||
366 | return 0; | |
367 | } | |
368 | ||
369 | /* set the tx duty cycle by controlling the pulse width */ | |
370 | static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle) | |
371 | { | |
372 | unsigned long flags; | |
373 | struct ite_dev *dev = rcdev->priv; | |
374 | ||
375 | spin_lock_irqsave(&dev->lock, flags); | |
376 | dev->params.tx_duty_cycle = duty_cycle; | |
377 | ite_set_carrier_params(dev); | |
378 | spin_unlock_irqrestore(&dev->lock, flags); | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
383 | /* transmit out IR pulses; what you get here is a batch of alternating | |
384 | * pulse/space/pulse/space lengths that we should write out completely through | |
385 | * the FIFO, blocking on a full FIFO */ | |
386 | static int ite_tx_ir(struct rc_dev *rcdev, int *txbuf, u32 n) | |
387 | { | |
388 | unsigned long flags; | |
389 | struct ite_dev *dev = rcdev->priv; | |
390 | bool is_pulse = false; | |
391 | int remaining_us, fifo_avail, fifo_remaining, last_idx = 0; | |
392 | int max_rle_us, next_rle_us; | |
393 | int ret = n; | |
394 | u8 last_sent[ITE_TX_FIFO_LEN]; | |
395 | u8 val; | |
396 | ||
397 | ite_dbg("%s called", __func__); | |
398 | ||
399 | /* clear the array just in case */ | |
400 | memset(last_sent, 0, ARRAY_SIZE(last_sent)); | |
401 | ||
402 | /* n comes in bytes; convert to ints */ | |
403 | n /= sizeof(int); | |
404 | ||
405 | spin_lock_irqsave(&dev->lock, flags); | |
406 | ||
407 | /* let everybody know we're now transmitting */ | |
408 | dev->transmitting = true; | |
409 | ||
410 | /* and set the carrier values for transmission */ | |
411 | ite_set_carrier_params(dev); | |
412 | ||
413 | /* calculate how much time we can send in one byte */ | |
414 | max_rle_us = | |
415 | (ITE_BAUDRATE_DIVISOR * dev->params.sample_period * | |
416 | ITE_TX_MAX_RLE) / 1000; | |
417 | ||
418 | /* disable the receiver */ | |
419 | dev->params.disable_rx(dev); | |
420 | ||
421 | /* this is where we'll begin filling in the FIFO, until it's full. | |
422 | * then we'll just activate the interrupt, wait for it to wake us up | |
423 | * again, disable it, continue filling the FIFO... until everything | |
424 | * has been pushed out */ | |
425 | fifo_avail = | |
426 | ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev); | |
427 | ||
428 | while (n > 0 && dev->in_use) { | |
429 | /* transmit the next sample */ | |
430 | is_pulse = !is_pulse; | |
431 | remaining_us = *(txbuf++); | |
432 | n--; | |
433 | ||
434 | ite_dbg("%s: %ld", | |
435 | ((is_pulse) ? "pulse" : "space"), | |
436 | (long int) | |
437 | remaining_us); | |
438 | ||
439 | /* repeat while the pulse is non-zero length */ | |
440 | while (remaining_us > 0 && dev->in_use) { | |
441 | if (remaining_us > max_rle_us) | |
442 | next_rle_us = max_rle_us; | |
443 | ||
444 | else | |
445 | next_rle_us = remaining_us; | |
446 | ||
447 | remaining_us -= next_rle_us; | |
448 | ||
449 | /* check what's the length we have to pump out */ | |
450 | val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us; | |
451 | ||
452 | /* put it into the sent buffer */ | |
453 | last_sent[last_idx++] = val; | |
454 | last_idx &= (ITE_TX_FIFO_LEN); | |
455 | ||
456 | /* encode it for 7 bits */ | |
457 | val = (val - 1) & ITE_TX_RLE_MASK; | |
458 | ||
459 | /* take into account pulse/space prefix */ | |
460 | if (is_pulse) | |
461 | val |= ITE_TX_PULSE; | |
462 | ||
463 | else | |
464 | val |= ITE_TX_SPACE; | |
465 | ||
2ccb24ff MCC |
466 | /* |
467 | * if we get to 0 available, read again, just in case | |
468 | * some other slot got freed | |
469 | */ | |
620a32bb JGS |
470 | if (fifo_avail <= 0) |
471 | fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev); | |
472 | ||
473 | /* if it's still full */ | |
474 | if (fifo_avail <= 0) { | |
475 | /* enable the tx interrupt */ | |
476 | dev->params. | |
477 | enable_tx_interrupt(dev); | |
478 | ||
479 | /* drop the spinlock */ | |
480 | spin_unlock_irqrestore(&dev->lock, flags); | |
481 | ||
482 | /* wait for the FIFO to empty enough */ | |
483 | wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8); | |
484 | ||
485 | /* get the spinlock again */ | |
486 | spin_lock_irqsave(&dev->lock, flags); | |
487 | ||
488 | /* disable the tx interrupt again. */ | |
489 | dev->params. | |
490 | disable_tx_interrupt(dev); | |
491 | } | |
492 | ||
493 | /* now send the byte through the FIFO */ | |
494 | dev->params.put_tx_byte(dev, val); | |
495 | fifo_avail--; | |
496 | } | |
497 | } | |
498 | ||
499 | /* wait and don't return until the whole FIFO has been sent out; | |
500 | * otherwise we could configure the RX carrier params instead of the | |
501 | * TX ones while the transmission is still being performed! */ | |
502 | fifo_remaining = dev->params.get_tx_used_slots(dev); | |
503 | remaining_us = 0; | |
504 | while (fifo_remaining > 0) { | |
505 | fifo_remaining--; | |
506 | last_idx--; | |
507 | last_idx &= (ITE_TX_FIFO_LEN - 1); | |
508 | remaining_us += last_sent[last_idx]; | |
509 | } | |
510 | remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE); | |
511 | ||
512 | /* drop the spinlock while we sleep */ | |
513 | spin_unlock_irqrestore(&dev->lock, flags); | |
514 | ||
515 | /* sleep remaining_us microseconds */ | |
516 | mdelay(DIV_ROUND_UP(remaining_us, 1000)); | |
517 | ||
518 | /* reacquire the spinlock */ | |
519 | spin_lock_irqsave(&dev->lock, flags); | |
520 | ||
521 | /* now we're not transmitting anymore */ | |
522 | dev->transmitting = false; | |
523 | ||
524 | /* and set the carrier values for reception */ | |
525 | ite_set_carrier_params(dev); | |
526 | ||
527 | /* reenable the receiver */ | |
528 | if (dev->in_use) | |
529 | dev->params.enable_rx(dev); | |
530 | ||
531 | /* notify transmission end */ | |
532 | wake_up_interruptible(&dev->tx_ended); | |
533 | ||
534 | spin_unlock_irqrestore(&dev->lock, flags); | |
535 | ||
536 | return ret; | |
537 | } | |
538 | ||
539 | /* idle the receiver if needed */ | |
540 | static void ite_s_idle(struct rc_dev *rcdev, bool enable) | |
541 | { | |
542 | unsigned long flags; | |
543 | struct ite_dev *dev = rcdev->priv; | |
544 | ||
545 | ite_dbg("%s called", __func__); | |
546 | ||
547 | if (enable) { | |
548 | spin_lock_irqsave(&dev->lock, flags); | |
549 | dev->params.idle_rx(dev); | |
550 | spin_unlock_irqrestore(&dev->lock, flags); | |
551 | } | |
552 | } | |
553 | ||
554 | ||
555 | /* IT8712F HW-specific functions */ | |
556 | ||
557 | /* retrieve a bitmask of the current causes for a pending interrupt; this may | |
558 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN | |
559 | * */ | |
560 | static int it87_get_irq_causes(struct ite_dev *dev) | |
561 | { | |
562 | u8 iflags; | |
563 | int ret = 0; | |
564 | ||
565 | ite_dbg("%s called", __func__); | |
566 | ||
567 | /* read the interrupt flags */ | |
568 | iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II; | |
569 | ||
570 | switch (iflags) { | |
571 | case IT87_II_RXDS: | |
572 | ret = ITE_IRQ_RX_FIFO; | |
573 | break; | |
574 | case IT87_II_RXFO: | |
575 | ret = ITE_IRQ_RX_FIFO_OVERRUN; | |
576 | break; | |
577 | case IT87_II_TXLDL: | |
578 | ret = ITE_IRQ_TX_FIFO; | |
579 | break; | |
580 | } | |
581 | ||
582 | return ret; | |
583 | } | |
584 | ||
585 | /* set the carrier parameters; to be called with the spinlock held */ | |
586 | static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq, | |
587 | bool use_demodulator, | |
588 | u8 carrier_freq_bits, u8 allowance_bits, | |
589 | u8 pulse_width_bits) | |
590 | { | |
591 | u8 val; | |
592 | ||
593 | ite_dbg("%s called", __func__); | |
594 | ||
595 | /* program the RCR register */ | |
596 | val = inb(dev->cir_addr + IT87_RCR) | |
597 | & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR); | |
598 | ||
599 | if (high_freq) | |
600 | val |= IT87_HCFS; | |
601 | ||
602 | if (use_demodulator) | |
603 | val |= IT87_RXEND; | |
604 | ||
605 | val |= allowance_bits; | |
606 | ||
607 | outb(val, dev->cir_addr + IT87_RCR); | |
608 | ||
609 | /* program the TCR2 register */ | |
610 | outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits, | |
611 | dev->cir_addr + IT87_TCR2); | |
612 | } | |
613 | ||
614 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock | |
615 | * held */ | |
616 | static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) | |
617 | { | |
618 | int fifo, read = 0; | |
619 | ||
620 | ite_dbg("%s called", __func__); | |
621 | ||
622 | /* read how many bytes are still in the FIFO */ | |
623 | fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC; | |
624 | ||
625 | while (fifo > 0 && buf_size > 0) { | |
626 | *(buf++) = inb(dev->cir_addr + IT87_DR); | |
627 | fifo--; | |
628 | read++; | |
629 | buf_size--; | |
630 | } | |
631 | ||
632 | return read; | |
633 | } | |
634 | ||
635 | /* return how many bytes are still in the FIFO; this will be called | |
636 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get | |
637 | * empty; let's expect this won't be a problem */ | |
638 | static int it87_get_tx_used_slots(struct ite_dev *dev) | |
639 | { | |
640 | ite_dbg("%s called", __func__); | |
641 | ||
642 | return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC; | |
643 | } | |
644 | ||
645 | /* put a byte to the TX fifo; this should be called with the spinlock held */ | |
646 | static void it87_put_tx_byte(struct ite_dev *dev, u8 value) | |
647 | { | |
648 | outb(value, dev->cir_addr + IT87_DR); | |
649 | } | |
650 | ||
651 | /* idle the receiver so that we won't receive samples until another | |
652 | pulse is detected; this must be called with the device spinlock held */ | |
653 | static void it87_idle_rx(struct ite_dev *dev) | |
654 | { | |
655 | ite_dbg("%s called", __func__); | |
656 | ||
657 | /* disable streaming by clearing RXACT writing it as 1 */ | |
658 | outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT, | |
659 | dev->cir_addr + IT87_RCR); | |
660 | ||
661 | /* clear the FIFO */ | |
662 | outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR, | |
663 | dev->cir_addr + IT87_TCR1); | |
664 | } | |
665 | ||
666 | /* disable the receiver; this must be called with the device spinlock held */ | |
667 | static void it87_disable_rx(struct ite_dev *dev) | |
668 | { | |
669 | ite_dbg("%s called", __func__); | |
670 | ||
671 | /* disable the receiver interrupts */ | |
672 | outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE), | |
673 | dev->cir_addr + IT87_IER); | |
674 | ||
675 | /* disable the receiver */ | |
676 | outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN, | |
677 | dev->cir_addr + IT87_RCR); | |
678 | ||
679 | /* clear the FIFO and RXACT (actually RXACT should have been cleared | |
680 | * in the previous outb() call) */ | |
681 | it87_idle_rx(dev); | |
682 | } | |
683 | ||
684 | /* enable the receiver; this must be called with the device spinlock held */ | |
685 | static void it87_enable_rx(struct ite_dev *dev) | |
686 | { | |
687 | ite_dbg("%s called", __func__); | |
688 | ||
689 | /* enable the receiver by setting RXEN */ | |
690 | outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN, | |
691 | dev->cir_addr + IT87_RCR); | |
692 | ||
693 | /* just prepare it to idle for the next reception */ | |
694 | it87_idle_rx(dev); | |
695 | ||
696 | /* enable the receiver interrupts and master enable flag */ | |
697 | outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC, | |
698 | dev->cir_addr + IT87_IER); | |
699 | } | |
700 | ||
701 | /* disable the transmitter interrupt; this must be called with the device | |
702 | * spinlock held */ | |
703 | static void it87_disable_tx_interrupt(struct ite_dev *dev) | |
704 | { | |
705 | ite_dbg("%s called", __func__); | |
706 | ||
707 | /* disable the transmitter interrupts */ | |
708 | outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE, | |
709 | dev->cir_addr + IT87_IER); | |
710 | } | |
711 | ||
712 | /* enable the transmitter interrupt; this must be called with the device | |
713 | * spinlock held */ | |
714 | static void it87_enable_tx_interrupt(struct ite_dev *dev) | |
715 | { | |
716 | ite_dbg("%s called", __func__); | |
717 | ||
718 | /* enable the transmitter interrupts and master enable flag */ | |
719 | outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC, | |
720 | dev->cir_addr + IT87_IER); | |
721 | } | |
722 | ||
723 | /* disable the device; this must be called with the device spinlock held */ | |
724 | static void it87_disable(struct ite_dev *dev) | |
725 | { | |
726 | ite_dbg("%s called", __func__); | |
727 | ||
728 | /* clear out all interrupt enable flags */ | |
729 | outb(inb(dev->cir_addr + IT87_IER) & | |
730 | ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE), | |
731 | dev->cir_addr + IT87_IER); | |
732 | ||
733 | /* disable the receiver */ | |
734 | it87_disable_rx(dev); | |
735 | ||
736 | /* erase the FIFO */ | |
737 | outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1), | |
738 | dev->cir_addr + IT87_TCR1); | |
739 | } | |
740 | ||
741 | /* initialize the hardware */ | |
742 | static void it87_init_hardware(struct ite_dev *dev) | |
743 | { | |
744 | ite_dbg("%s called", __func__); | |
745 | ||
746 | /* enable just the baud rate divisor register, | |
747 | disabling all the interrupts at the same time */ | |
748 | outb((inb(dev->cir_addr + IT87_IER) & | |
749 | ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR, | |
750 | dev->cir_addr + IT87_IER); | |
751 | ||
752 | /* write out the baud rate divisor */ | |
753 | outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR); | |
754 | outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR); | |
755 | ||
756 | /* disable the baud rate divisor register again */ | |
757 | outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR, | |
758 | dev->cir_addr + IT87_IER); | |
759 | ||
760 | /* program the RCR register defaults */ | |
761 | outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR); | |
762 | ||
763 | /* program the TCR1 register */ | |
764 | outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE | |
765 | | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR, | |
766 | dev->cir_addr + IT87_TCR1); | |
767 | ||
768 | /* program the carrier parameters */ | |
769 | ite_set_carrier_params(dev); | |
770 | } | |
771 | ||
772 | /* IT8512F on ITE8708 HW-specific functions */ | |
773 | ||
774 | /* retrieve a bitmask of the current causes for a pending interrupt; this may | |
775 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN | |
776 | * */ | |
777 | static int it8708_get_irq_causes(struct ite_dev *dev) | |
778 | { | |
779 | u8 iflags; | |
780 | int ret = 0; | |
781 | ||
782 | ite_dbg("%s called", __func__); | |
783 | ||
784 | /* read the interrupt flags */ | |
785 | iflags = inb(dev->cir_addr + IT8708_C0IIR); | |
786 | ||
787 | if (iflags & IT85_TLDLI) | |
788 | ret |= ITE_IRQ_TX_FIFO; | |
789 | if (iflags & IT85_RDAI) | |
790 | ret |= ITE_IRQ_RX_FIFO; | |
791 | if (iflags & IT85_RFOI) | |
792 | ret |= ITE_IRQ_RX_FIFO_OVERRUN; | |
793 | ||
794 | return ret; | |
795 | } | |
796 | ||
797 | /* set the carrier parameters; to be called with the spinlock held */ | |
798 | static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq, | |
799 | bool use_demodulator, | |
800 | u8 carrier_freq_bits, u8 allowance_bits, | |
801 | u8 pulse_width_bits) | |
802 | { | |
803 | u8 val; | |
804 | ||
805 | ite_dbg("%s called", __func__); | |
806 | ||
807 | /* program the C0CFR register, with HRAE=1 */ | |
808 | outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, | |
809 | dev->cir_addr + IT8708_BANKSEL); | |
810 | ||
811 | val = (inb(dev->cir_addr + IT8708_C0CFR) | |
812 | & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits; | |
813 | ||
814 | if (high_freq) | |
815 | val |= IT85_HCFS; | |
816 | ||
817 | outb(val, dev->cir_addr + IT8708_C0CFR); | |
818 | ||
819 | outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, | |
820 | dev->cir_addr + IT8708_BANKSEL); | |
821 | ||
822 | /* program the C0RCR register */ | |
823 | val = inb(dev->cir_addr + IT8708_C0RCR) | |
824 | & ~(IT85_RXEND | IT85_RXDCR); | |
825 | ||
826 | if (use_demodulator) | |
827 | val |= IT85_RXEND; | |
828 | ||
829 | val |= allowance_bits; | |
830 | ||
831 | outb(val, dev->cir_addr + IT8708_C0RCR); | |
832 | ||
833 | /* program the C0TCR register */ | |
834 | val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW; | |
835 | val |= pulse_width_bits; | |
836 | outb(val, dev->cir_addr + IT8708_C0TCR); | |
837 | } | |
838 | ||
839 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock | |
840 | * held */ | |
841 | static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) | |
842 | { | |
843 | int fifo, read = 0; | |
844 | ||
845 | ite_dbg("%s called", __func__); | |
846 | ||
847 | /* read how many bytes are still in the FIFO */ | |
848 | fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC; | |
849 | ||
850 | while (fifo > 0 && buf_size > 0) { | |
851 | *(buf++) = inb(dev->cir_addr + IT8708_C0DR); | |
852 | fifo--; | |
853 | read++; | |
854 | buf_size--; | |
855 | } | |
856 | ||
857 | return read; | |
858 | } | |
859 | ||
860 | /* return how many bytes are still in the FIFO; this will be called | |
861 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get | |
862 | * empty; let's expect this won't be a problem */ | |
863 | static int it8708_get_tx_used_slots(struct ite_dev *dev) | |
864 | { | |
865 | ite_dbg("%s called", __func__); | |
866 | ||
867 | return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC; | |
868 | } | |
869 | ||
870 | /* put a byte to the TX fifo; this should be called with the spinlock held */ | |
871 | static void it8708_put_tx_byte(struct ite_dev *dev, u8 value) | |
872 | { | |
873 | outb(value, dev->cir_addr + IT8708_C0DR); | |
874 | } | |
875 | ||
876 | /* idle the receiver so that we won't receive samples until another | |
877 | pulse is detected; this must be called with the device spinlock held */ | |
878 | static void it8708_idle_rx(struct ite_dev *dev) | |
879 | { | |
880 | ite_dbg("%s called", __func__); | |
881 | ||
882 | /* disable streaming by clearing RXACT writing it as 1 */ | |
883 | outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT, | |
884 | dev->cir_addr + IT8708_C0RCR); | |
885 | ||
886 | /* clear the FIFO */ | |
887 | outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR, | |
888 | dev->cir_addr + IT8708_C0MSTCR); | |
889 | } | |
890 | ||
891 | /* disable the receiver; this must be called with the device spinlock held */ | |
892 | static void it8708_disable_rx(struct ite_dev *dev) | |
893 | { | |
894 | ite_dbg("%s called", __func__); | |
895 | ||
896 | /* disable the receiver interrupts */ | |
897 | outb(inb(dev->cir_addr + IT8708_C0IER) & | |
898 | ~(IT85_RDAIE | IT85_RFOIE), | |
899 | dev->cir_addr + IT8708_C0IER); | |
900 | ||
901 | /* disable the receiver */ | |
902 | outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN, | |
903 | dev->cir_addr + IT8708_C0RCR); | |
904 | ||
905 | /* clear the FIFO and RXACT (actually RXACT should have been cleared | |
906 | * in the previous outb() call) */ | |
907 | it8708_idle_rx(dev); | |
908 | } | |
909 | ||
910 | /* enable the receiver; this must be called with the device spinlock held */ | |
911 | static void it8708_enable_rx(struct ite_dev *dev) | |
912 | { | |
913 | ite_dbg("%s called", __func__); | |
914 | ||
915 | /* enable the receiver by setting RXEN */ | |
916 | outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN, | |
917 | dev->cir_addr + IT8708_C0RCR); | |
918 | ||
919 | /* just prepare it to idle for the next reception */ | |
920 | it8708_idle_rx(dev); | |
921 | ||
922 | /* enable the receiver interrupts and master enable flag */ | |
923 | outb(inb(dev->cir_addr + IT8708_C0IER) | |
924 | |IT85_RDAIE | IT85_RFOIE | IT85_IEC, | |
925 | dev->cir_addr + IT8708_C0IER); | |
926 | } | |
927 | ||
928 | /* disable the transmitter interrupt; this must be called with the device | |
929 | * spinlock held */ | |
930 | static void it8708_disable_tx_interrupt(struct ite_dev *dev) | |
931 | { | |
932 | ite_dbg("%s called", __func__); | |
933 | ||
934 | /* disable the transmitter interrupts */ | |
935 | outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE, | |
936 | dev->cir_addr + IT8708_C0IER); | |
937 | } | |
938 | ||
939 | /* enable the transmitter interrupt; this must be called with the device | |
940 | * spinlock held */ | |
941 | static void it8708_enable_tx_interrupt(struct ite_dev *dev) | |
942 | { | |
943 | ite_dbg("%s called", __func__); | |
944 | ||
945 | /* enable the transmitter interrupts and master enable flag */ | |
946 | outb(inb(dev->cir_addr + IT8708_C0IER) | |
947 | |IT85_TLDLIE | IT85_IEC, | |
948 | dev->cir_addr + IT8708_C0IER); | |
949 | } | |
950 | ||
951 | /* disable the device; this must be called with the device spinlock held */ | |
952 | static void it8708_disable(struct ite_dev *dev) | |
953 | { | |
954 | ite_dbg("%s called", __func__); | |
955 | ||
956 | /* clear out all interrupt enable flags */ | |
957 | outb(inb(dev->cir_addr + IT8708_C0IER) & | |
958 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), | |
959 | dev->cir_addr + IT8708_C0IER); | |
960 | ||
961 | /* disable the receiver */ | |
962 | it8708_disable_rx(dev); | |
963 | ||
964 | /* erase the FIFO */ | |
965 | outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR), | |
966 | dev->cir_addr + IT8708_C0MSTCR); | |
967 | } | |
968 | ||
969 | /* initialize the hardware */ | |
970 | static void it8708_init_hardware(struct ite_dev *dev) | |
971 | { | |
972 | ite_dbg("%s called", __func__); | |
973 | ||
974 | /* disable all the interrupts */ | |
975 | outb(inb(dev->cir_addr + IT8708_C0IER) & | |
976 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), | |
977 | dev->cir_addr + IT8708_C0IER); | |
978 | ||
979 | /* program the baud rate divisor */ | |
980 | outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, | |
981 | dev->cir_addr + IT8708_BANKSEL); | |
982 | ||
983 | outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR); | |
984 | outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, | |
985 | dev->cir_addr + IT8708_C0BDHR); | |
986 | ||
987 | outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, | |
988 | dev->cir_addr + IT8708_BANKSEL); | |
989 | ||
990 | /* program the C0MSTCR register defaults */ | |
991 | outb((inb(dev->cir_addr + IT8708_C0MSTCR) & | |
992 | ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL | | |
993 | IT85_FIFOCLR | IT85_RESET)) | | |
994 | IT85_FIFOTL_DEFAULT, | |
995 | dev->cir_addr + IT8708_C0MSTCR); | |
996 | ||
997 | /* program the C0RCR register defaults */ | |
998 | outb((inb(dev->cir_addr + IT8708_C0RCR) & | |
999 | ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | | |
1000 | IT85_RXACT | IT85_RXDCR)) | | |
1001 | ITE_RXDCR_DEFAULT, | |
1002 | dev->cir_addr + IT8708_C0RCR); | |
1003 | ||
1004 | /* program the C0TCR register defaults */ | |
1005 | outb((inb(dev->cir_addr + IT8708_C0TCR) & | |
1006 | ~(IT85_TXMPM | IT85_TXMPW)) | |
1007 | |IT85_TXRLE | IT85_TXENDF | | |
1008 | IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT, | |
1009 | dev->cir_addr + IT8708_C0TCR); | |
1010 | ||
1011 | /* program the carrier parameters */ | |
1012 | ite_set_carrier_params(dev); | |
1013 | } | |
1014 | ||
1015 | /* IT8512F on ITE8709 HW-specific functions */ | |
1016 | ||
1017 | /* read a byte from the SRAM module */ | |
1018 | static inline u8 it8709_rm(struct ite_dev *dev, int index) | |
1019 | { | |
1020 | outb(index, dev->cir_addr + IT8709_RAM_IDX); | |
1021 | return inb(dev->cir_addr + IT8709_RAM_VAL); | |
1022 | } | |
1023 | ||
1024 | /* write a byte to the SRAM module */ | |
1025 | static inline void it8709_wm(struct ite_dev *dev, u8 val, int index) | |
1026 | { | |
1027 | outb(index, dev->cir_addr + IT8709_RAM_IDX); | |
1028 | outb(val, dev->cir_addr + IT8709_RAM_VAL); | |
1029 | } | |
1030 | ||
1031 | static void it8709_wait(struct ite_dev *dev) | |
1032 | { | |
1033 | int i = 0; | |
1034 | /* | |
1035 | * loop until device tells it's ready to continue | |
1036 | * iterations count is usually ~750 but can sometimes achieve 13000 | |
1037 | */ | |
1038 | for (i = 0; i < 15000; i++) { | |
1039 | udelay(2); | |
1040 | if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE) | |
1041 | break; | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | /* read the value of a CIR register */ | |
1046 | static u8 it8709_rr(struct ite_dev *dev, int index) | |
1047 | { | |
1048 | /* just wait in case the previous access was a write */ | |
1049 | it8709_wait(dev); | |
1050 | it8709_wm(dev, index, IT8709_REG_IDX); | |
1051 | it8709_wm(dev, IT8709_READ, IT8709_MODE); | |
1052 | ||
1053 | /* wait for the read data to be available */ | |
1054 | it8709_wait(dev); | |
1055 | ||
1056 | /* return the read value */ | |
1057 | return it8709_rm(dev, IT8709_REG_VAL); | |
1058 | } | |
1059 | ||
1060 | /* write the value of a CIR register */ | |
1061 | static void it8709_wr(struct ite_dev *dev, u8 val, int index) | |
1062 | { | |
1063 | /* we wait before writing, and not afterwards, since this allows us to | |
1064 | * pipeline the host CPU with the microcontroller */ | |
1065 | it8709_wait(dev); | |
1066 | it8709_wm(dev, val, IT8709_REG_VAL); | |
1067 | it8709_wm(dev, index, IT8709_REG_IDX); | |
1068 | it8709_wm(dev, IT8709_WRITE, IT8709_MODE); | |
1069 | } | |
1070 | ||
1071 | /* retrieve a bitmask of the current causes for a pending interrupt; this may | |
1072 | * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN | |
1073 | * */ | |
1074 | static int it8709_get_irq_causes(struct ite_dev *dev) | |
1075 | { | |
1076 | u8 iflags; | |
1077 | int ret = 0; | |
1078 | ||
1079 | ite_dbg("%s called", __func__); | |
1080 | ||
1081 | /* read the interrupt flags */ | |
1082 | iflags = it8709_rm(dev, IT8709_IIR); | |
1083 | ||
1084 | if (iflags & IT85_TLDLI) | |
1085 | ret |= ITE_IRQ_TX_FIFO; | |
1086 | if (iflags & IT85_RDAI) | |
1087 | ret |= ITE_IRQ_RX_FIFO; | |
1088 | if (iflags & IT85_RFOI) | |
1089 | ret |= ITE_IRQ_RX_FIFO_OVERRUN; | |
1090 | ||
1091 | return ret; | |
1092 | } | |
1093 | ||
1094 | /* set the carrier parameters; to be called with the spinlock held */ | |
1095 | static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq, | |
1096 | bool use_demodulator, | |
1097 | u8 carrier_freq_bits, u8 allowance_bits, | |
1098 | u8 pulse_width_bits) | |
1099 | { | |
1100 | u8 val; | |
1101 | ||
1102 | ite_dbg("%s called", __func__); | |
1103 | ||
1104 | val = (it8709_rr(dev, IT85_C0CFR) | |
1105 | &~(IT85_HCFS | IT85_CFQ)) | | |
1106 | carrier_freq_bits; | |
1107 | ||
1108 | if (high_freq) | |
1109 | val |= IT85_HCFS; | |
1110 | ||
1111 | it8709_wr(dev, val, IT85_C0CFR); | |
1112 | ||
1113 | /* program the C0RCR register */ | |
1114 | val = it8709_rr(dev, IT85_C0RCR) | |
1115 | & ~(IT85_RXEND | IT85_RXDCR); | |
1116 | ||
1117 | if (use_demodulator) | |
1118 | val |= IT85_RXEND; | |
1119 | ||
1120 | val |= allowance_bits; | |
1121 | ||
1122 | it8709_wr(dev, val, IT85_C0RCR); | |
1123 | ||
1124 | /* program the C0TCR register */ | |
1125 | val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW; | |
1126 | val |= pulse_width_bits; | |
1127 | it8709_wr(dev, val, IT85_C0TCR); | |
1128 | } | |
1129 | ||
1130 | /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock | |
1131 | * held */ | |
1132 | static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) | |
1133 | { | |
1134 | int fifo, read = 0; | |
1135 | ||
1136 | ite_dbg("%s called", __func__); | |
1137 | ||
1138 | /* read how many bytes are still in the FIFO */ | |
1139 | fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC; | |
1140 | ||
1141 | while (fifo > 0 && buf_size > 0) { | |
1142 | *(buf++) = it8709_rm(dev, IT8709_FIFO + read); | |
1143 | fifo--; | |
1144 | read++; | |
1145 | buf_size--; | |
1146 | } | |
1147 | ||
1148 | /* 'clear' the FIFO by setting the writing index to 0; this is | |
1149 | * completely bound to be racy, but we can't help it, since it's a | |
1150 | * limitation of the protocol */ | |
1151 | it8709_wm(dev, 0, IT8709_RFSR); | |
1152 | ||
1153 | return read; | |
1154 | } | |
1155 | ||
1156 | /* return how many bytes are still in the FIFO; this will be called | |
1157 | * with the device spinlock NOT HELD while waiting for the TX FIFO to get | |
1158 | * empty; let's expect this won't be a problem */ | |
1159 | static int it8709_get_tx_used_slots(struct ite_dev *dev) | |
1160 | { | |
1161 | ite_dbg("%s called", __func__); | |
1162 | ||
1163 | return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC; | |
1164 | } | |
1165 | ||
1166 | /* put a byte to the TX fifo; this should be called with the spinlock held */ | |
1167 | static void it8709_put_tx_byte(struct ite_dev *dev, u8 value) | |
1168 | { | |
1169 | it8709_wr(dev, value, IT85_C0DR); | |
1170 | } | |
1171 | ||
1172 | /* idle the receiver so that we won't receive samples until another | |
1173 | pulse is detected; this must be called with the device spinlock held */ | |
1174 | static void it8709_idle_rx(struct ite_dev *dev) | |
1175 | { | |
1176 | ite_dbg("%s called", __func__); | |
1177 | ||
1178 | /* disable streaming by clearing RXACT writing it as 1 */ | |
1179 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT, | |
1180 | IT85_C0RCR); | |
1181 | ||
1182 | /* clear the FIFO */ | |
1183 | it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR, | |
1184 | IT85_C0MSTCR); | |
1185 | } | |
1186 | ||
1187 | /* disable the receiver; this must be called with the device spinlock held */ | |
1188 | static void it8709_disable_rx(struct ite_dev *dev) | |
1189 | { | |
1190 | ite_dbg("%s called", __func__); | |
1191 | ||
1192 | /* disable the receiver interrupts */ | |
1193 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & | |
1194 | ~(IT85_RDAIE | IT85_RFOIE), | |
1195 | IT85_C0IER); | |
1196 | ||
1197 | /* disable the receiver */ | |
1198 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN, | |
1199 | IT85_C0RCR); | |
1200 | ||
1201 | /* clear the FIFO and RXACT (actually RXACT should have been cleared | |
1202 | * in the previous it8709_wr(dev, ) call) */ | |
1203 | it8709_idle_rx(dev); | |
1204 | } | |
1205 | ||
1206 | /* enable the receiver; this must be called with the device spinlock held */ | |
1207 | static void it8709_enable_rx(struct ite_dev *dev) | |
1208 | { | |
1209 | ite_dbg("%s called", __func__); | |
1210 | ||
1211 | /* enable the receiver by setting RXEN */ | |
1212 | it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN, | |
1213 | IT85_C0RCR); | |
1214 | ||
1215 | /* just prepare it to idle for the next reception */ | |
1216 | it8709_idle_rx(dev); | |
1217 | ||
1218 | /* enable the receiver interrupts and master enable flag */ | |
1219 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) | |
1220 | |IT85_RDAIE | IT85_RFOIE | IT85_IEC, | |
1221 | IT85_C0IER); | |
1222 | } | |
1223 | ||
1224 | /* disable the transmitter interrupt; this must be called with the device | |
1225 | * spinlock held */ | |
1226 | static void it8709_disable_tx_interrupt(struct ite_dev *dev) | |
1227 | { | |
1228 | ite_dbg("%s called", __func__); | |
1229 | ||
1230 | /* disable the transmitter interrupts */ | |
1231 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE, | |
1232 | IT85_C0IER); | |
1233 | } | |
1234 | ||
1235 | /* enable the transmitter interrupt; this must be called with the device | |
1236 | * spinlock held */ | |
1237 | static void it8709_enable_tx_interrupt(struct ite_dev *dev) | |
1238 | { | |
1239 | ite_dbg("%s called", __func__); | |
1240 | ||
1241 | /* enable the transmitter interrupts and master enable flag */ | |
1242 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) | |
1243 | |IT85_TLDLIE | IT85_IEC, | |
1244 | IT85_C0IER); | |
1245 | } | |
1246 | ||
1247 | /* disable the device; this must be called with the device spinlock held */ | |
1248 | static void it8709_disable(struct ite_dev *dev) | |
1249 | { | |
1250 | ite_dbg("%s called", __func__); | |
1251 | ||
1252 | /* clear out all interrupt enable flags */ | |
f0c1629d JW |
1253 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & |
1254 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), | |
1255 | IT85_C0IER); | |
620a32bb JGS |
1256 | |
1257 | /* disable the receiver */ | |
1258 | it8709_disable_rx(dev); | |
1259 | ||
1260 | /* erase the FIFO */ | |
1261 | it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR), | |
1262 | IT85_C0MSTCR); | |
1263 | } | |
1264 | ||
1265 | /* initialize the hardware */ | |
1266 | static void it8709_init_hardware(struct ite_dev *dev) | |
1267 | { | |
1268 | ite_dbg("%s called", __func__); | |
1269 | ||
1270 | /* disable all the interrupts */ | |
f0c1629d JW |
1271 | it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & |
1272 | ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), | |
1273 | IT85_C0IER); | |
620a32bb JGS |
1274 | |
1275 | /* program the baud rate divisor */ | |
1276 | it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR); | |
1277 | it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff, | |
1278 | IT85_C0BDHR); | |
1279 | ||
1280 | /* program the C0MSTCR register defaults */ | |
f0c1629d JW |
1281 | it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) & |
1282 | ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL | |
1283 | | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT, | |
1284 | IT85_C0MSTCR); | |
620a32bb JGS |
1285 | |
1286 | /* program the C0RCR register defaults */ | |
f0c1629d JW |
1287 | it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) & |
1288 | ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT | |
1289 | | IT85_RXDCR)) | ITE_RXDCR_DEFAULT, | |
1290 | IT85_C0RCR); | |
620a32bb JGS |
1291 | |
1292 | /* program the C0TCR register defaults */ | |
f0c1629d JW |
1293 | it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW)) |
1294 | | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT | |
1295 | | IT85_TXMPW_DEFAULT, | |
1296 | IT85_C0TCR); | |
620a32bb JGS |
1297 | |
1298 | /* program the carrier parameters */ | |
1299 | ite_set_carrier_params(dev); | |
1300 | } | |
1301 | ||
1302 | ||
1303 | /* generic hardware setup/teardown code */ | |
1304 | ||
1305 | /* activate the device for use */ | |
1306 | static int ite_open(struct rc_dev *rcdev) | |
1307 | { | |
1308 | struct ite_dev *dev = rcdev->priv; | |
1309 | unsigned long flags; | |
1310 | ||
1311 | ite_dbg("%s called", __func__); | |
1312 | ||
1313 | spin_lock_irqsave(&dev->lock, flags); | |
1314 | dev->in_use = true; | |
1315 | ||
1316 | /* enable the receiver */ | |
1317 | dev->params.enable_rx(dev); | |
1318 | ||
1319 | spin_unlock_irqrestore(&dev->lock, flags); | |
1320 | ||
1321 | return 0; | |
1322 | } | |
1323 | ||
1324 | /* deactivate the device for use */ | |
1325 | static void ite_close(struct rc_dev *rcdev) | |
1326 | { | |
1327 | struct ite_dev *dev = rcdev->priv; | |
1328 | unsigned long flags; | |
1329 | ||
1330 | ite_dbg("%s called", __func__); | |
1331 | ||
1332 | spin_lock_irqsave(&dev->lock, flags); | |
1333 | dev->in_use = false; | |
1334 | ||
1335 | /* wait for any transmission to end */ | |
1336 | spin_unlock_irqrestore(&dev->lock, flags); | |
1337 | wait_event_interruptible(dev->tx_ended, !dev->transmitting); | |
1338 | spin_lock_irqsave(&dev->lock, flags); | |
1339 | ||
1340 | dev->params.disable(dev); | |
1341 | ||
1342 | spin_unlock_irqrestore(&dev->lock, flags); | |
1343 | } | |
1344 | ||
1345 | /* supported models and their parameters */ | |
1346 | static const struct ite_dev_params ite_dev_descs[] = { | |
1347 | { /* 0: ITE8704 */ | |
1348 | .model = "ITE8704 CIR transceiver", | |
1349 | .io_region_size = IT87_IOREG_LENGTH, | |
35d136c8 | 1350 | .io_rsrc_no = 0, |
620a32bb JGS |
1351 | .hw_tx_capable = true, |
1352 | .sample_period = (u32) (1000000000ULL / 115200), | |
1353 | .tx_carrier_freq = 38000, | |
1354 | .tx_duty_cycle = 33, | |
1355 | .rx_low_carrier_freq = 0, | |
1356 | .rx_high_carrier_freq = 0, | |
1357 | ||
1358 | /* operations */ | |
1359 | .get_irq_causes = it87_get_irq_causes, | |
1360 | .enable_rx = it87_enable_rx, | |
1361 | .idle_rx = it87_idle_rx, | |
1362 | .disable_rx = it87_idle_rx, | |
1363 | .get_rx_bytes = it87_get_rx_bytes, | |
1364 | .enable_tx_interrupt = it87_enable_tx_interrupt, | |
1365 | .disable_tx_interrupt = it87_disable_tx_interrupt, | |
1366 | .get_tx_used_slots = it87_get_tx_used_slots, | |
1367 | .put_tx_byte = it87_put_tx_byte, | |
1368 | .disable = it87_disable, | |
1369 | .init_hardware = it87_init_hardware, | |
1370 | .set_carrier_params = it87_set_carrier_params, | |
1371 | }, | |
1372 | { /* 1: ITE8713 */ | |
1373 | .model = "ITE8713 CIR transceiver", | |
1374 | .io_region_size = IT87_IOREG_LENGTH, | |
35d136c8 | 1375 | .io_rsrc_no = 0, |
620a32bb JGS |
1376 | .hw_tx_capable = true, |
1377 | .sample_period = (u32) (1000000000ULL / 115200), | |
1378 | .tx_carrier_freq = 38000, | |
1379 | .tx_duty_cycle = 33, | |
1380 | .rx_low_carrier_freq = 0, | |
1381 | .rx_high_carrier_freq = 0, | |
1382 | ||
1383 | /* operations */ | |
1384 | .get_irq_causes = it87_get_irq_causes, | |
1385 | .enable_rx = it87_enable_rx, | |
1386 | .idle_rx = it87_idle_rx, | |
1387 | .disable_rx = it87_idle_rx, | |
1388 | .get_rx_bytes = it87_get_rx_bytes, | |
1389 | .enable_tx_interrupt = it87_enable_tx_interrupt, | |
1390 | .disable_tx_interrupt = it87_disable_tx_interrupt, | |
1391 | .get_tx_used_slots = it87_get_tx_used_slots, | |
1392 | .put_tx_byte = it87_put_tx_byte, | |
1393 | .disable = it87_disable, | |
1394 | .init_hardware = it87_init_hardware, | |
1395 | .set_carrier_params = it87_set_carrier_params, | |
1396 | }, | |
1397 | { /* 2: ITE8708 */ | |
1398 | .model = "ITE8708 CIR transceiver", | |
1399 | .io_region_size = IT8708_IOREG_LENGTH, | |
35d136c8 | 1400 | .io_rsrc_no = 0, |
620a32bb JGS |
1401 | .hw_tx_capable = true, |
1402 | .sample_period = (u32) (1000000000ULL / 115200), | |
1403 | .tx_carrier_freq = 38000, | |
1404 | .tx_duty_cycle = 33, | |
1405 | .rx_low_carrier_freq = 0, | |
1406 | .rx_high_carrier_freq = 0, | |
1407 | ||
1408 | /* operations */ | |
1409 | .get_irq_causes = it8708_get_irq_causes, | |
1410 | .enable_rx = it8708_enable_rx, | |
1411 | .idle_rx = it8708_idle_rx, | |
1412 | .disable_rx = it8708_idle_rx, | |
1413 | .get_rx_bytes = it8708_get_rx_bytes, | |
1414 | .enable_tx_interrupt = it8708_enable_tx_interrupt, | |
1415 | .disable_tx_interrupt = | |
1416 | it8708_disable_tx_interrupt, | |
1417 | .get_tx_used_slots = it8708_get_tx_used_slots, | |
1418 | .put_tx_byte = it8708_put_tx_byte, | |
1419 | .disable = it8708_disable, | |
1420 | .init_hardware = it8708_init_hardware, | |
1421 | .set_carrier_params = it8708_set_carrier_params, | |
1422 | }, | |
1423 | { /* 3: ITE8709 */ | |
1424 | .model = "ITE8709 CIR transceiver", | |
1425 | .io_region_size = IT8709_IOREG_LENGTH, | |
35d136c8 | 1426 | .io_rsrc_no = 2, |
620a32bb JGS |
1427 | .hw_tx_capable = true, |
1428 | .sample_period = (u32) (1000000000ULL / 115200), | |
1429 | .tx_carrier_freq = 38000, | |
1430 | .tx_duty_cycle = 33, | |
1431 | .rx_low_carrier_freq = 0, | |
1432 | .rx_high_carrier_freq = 0, | |
1433 | ||
1434 | /* operations */ | |
1435 | .get_irq_causes = it8709_get_irq_causes, | |
1436 | .enable_rx = it8709_enable_rx, | |
1437 | .idle_rx = it8709_idle_rx, | |
1438 | .disable_rx = it8709_idle_rx, | |
1439 | .get_rx_bytes = it8709_get_rx_bytes, | |
1440 | .enable_tx_interrupt = it8709_enable_tx_interrupt, | |
1441 | .disable_tx_interrupt = | |
1442 | it8709_disable_tx_interrupt, | |
1443 | .get_tx_used_slots = it8709_get_tx_used_slots, | |
1444 | .put_tx_byte = it8709_put_tx_byte, | |
1445 | .disable = it8709_disable, | |
1446 | .init_hardware = it8709_init_hardware, | |
1447 | .set_carrier_params = it8709_set_carrier_params, | |
1448 | }, | |
1449 | }; | |
1450 | ||
1451 | static const struct pnp_device_id ite_ids[] = { | |
1452 | {"ITE8704", 0}, /* Default model */ | |
1453 | {"ITE8713", 1}, /* CIR found in EEEBox 1501U */ | |
1454 | {"ITE8708", 2}, /* Bridged IT8512 */ | |
1455 | {"ITE8709", 3}, /* SRAM-Bridged IT8512 */ | |
1456 | {"", 0}, | |
1457 | }; | |
1458 | ||
1459 | /* allocate memory, probe hardware, and initialize everything */ | |
1460 | static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id | |
1461 | *dev_id) | |
1462 | { | |
1463 | const struct ite_dev_params *dev_desc = NULL; | |
1464 | struct ite_dev *itdev = NULL; | |
1465 | struct rc_dev *rdev = NULL; | |
1466 | int ret = -ENOMEM; | |
1467 | int model_no; | |
35d136c8 | 1468 | int io_rsrc_no; |
620a32bb JGS |
1469 | |
1470 | ite_dbg("%s called", __func__); | |
1471 | ||
1472 | itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL); | |
1473 | if (!itdev) | |
1474 | return ret; | |
1475 | ||
1476 | /* input device for IR remote (and tx) */ | |
1477 | rdev = rc_allocate_device(); | |
1478 | if (!rdev) | |
1479 | goto failure; | |
1480 | ||
1481 | ret = -ENODEV; | |
1482 | ||
1483 | /* get the model number */ | |
1484 | model_no = (int)dev_id->driver_data; | |
1485 | ite_pr(KERN_NOTICE, "Auto-detected model: %s\n", | |
1486 | ite_dev_descs[model_no].model); | |
1487 | ||
1488 | if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) { | |
1489 | model_no = model_number; | |
1490 | ite_pr(KERN_NOTICE, "The model has been fixed by a module " | |
1491 | "parameter."); | |
1492 | } | |
1493 | ||
1494 | ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model); | |
1495 | ||
1496 | /* get the description for the device */ | |
1497 | dev_desc = &ite_dev_descs[model_no]; | |
35d136c8 | 1498 | io_rsrc_no = dev_desc->io_rsrc_no; |
620a32bb JGS |
1499 | |
1500 | /* validate pnp resources */ | |
35d136c8 JW |
1501 | if (!pnp_port_valid(pdev, io_rsrc_no) || |
1502 | pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) { | |
620a32bb JGS |
1503 | dev_err(&pdev->dev, "IR PNP Port not valid!\n"); |
1504 | goto failure; | |
1505 | } | |
1506 | ||
1507 | if (!pnp_irq_valid(pdev, 0)) { | |
1508 | dev_err(&pdev->dev, "PNP IRQ not valid!\n"); | |
1509 | goto failure; | |
1510 | } | |
1511 | ||
1512 | /* store resource values */ | |
35d136c8 | 1513 | itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no); |
2ccb24ff | 1514 | itdev->cir_irq = pnp_irq(pdev, 0); |
620a32bb JGS |
1515 | |
1516 | /* initialize spinlocks */ | |
1517 | spin_lock_init(&itdev->lock); | |
1518 | ||
1519 | /* initialize raw event */ | |
1520 | init_ir_raw_event(&itdev->rawir); | |
1521 | ||
1522 | ret = -EBUSY; | |
1523 | /* now claim resources */ | |
1524 | if (!request_region(itdev->cir_addr, | |
1525 | dev_desc->io_region_size, ITE_DRIVER_NAME)) | |
1526 | goto failure; | |
1527 | ||
1528 | if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED, | |
1529 | ITE_DRIVER_NAME, (void *)itdev)) | |
1530 | goto failure; | |
1531 | ||
1532 | /* set driver data into the pnp device */ | |
1533 | pnp_set_drvdata(pdev, itdev); | |
1534 | itdev->pdev = pdev; | |
1535 | ||
1536 | /* initialize waitqueues for transmission */ | |
1537 | init_waitqueue_head(&itdev->tx_queue); | |
1538 | init_waitqueue_head(&itdev->tx_ended); | |
1539 | ||
1540 | /* copy model-specific parameters */ | |
1541 | itdev->params = *dev_desc; | |
1542 | ||
1543 | /* apply any overrides */ | |
1544 | if (sample_period > 0) | |
1545 | itdev->params.sample_period = sample_period; | |
1546 | ||
1547 | if (tx_carrier_freq > 0) | |
1548 | itdev->params.tx_carrier_freq = tx_carrier_freq; | |
1549 | ||
1550 | if (tx_duty_cycle > 0 && tx_duty_cycle <= 100) | |
1551 | itdev->params.tx_duty_cycle = tx_duty_cycle; | |
1552 | ||
1553 | if (rx_low_carrier_freq > 0) | |
1554 | itdev->params.rx_low_carrier_freq = rx_low_carrier_freq; | |
1555 | ||
1556 | if (rx_high_carrier_freq > 0) | |
1557 | itdev->params.rx_high_carrier_freq = rx_high_carrier_freq; | |
1558 | ||
1559 | /* print out parameters */ | |
1560 | ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int) | |
1561 | itdev->params.hw_tx_capable); | |
1562 | ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long) | |
1563 | itdev->params.sample_period); | |
1564 | ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int) | |
1565 | itdev->params.tx_carrier_freq); | |
1566 | ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int) | |
1567 | itdev->params.tx_duty_cycle); | |
1568 | ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int) | |
1569 | itdev->params.rx_low_carrier_freq); | |
1570 | ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int) | |
1571 | itdev->params.rx_high_carrier_freq); | |
1572 | ||
1573 | /* set up hardware initial state */ | |
1574 | itdev->params.init_hardware(itdev); | |
1575 | ||
1576 | /* set up ir-core props */ | |
1577 | rdev->priv = itdev; | |
1578 | rdev->driver_type = RC_DRIVER_IR_RAW; | |
1579 | rdev->allowed_protos = RC_TYPE_ALL; | |
1580 | rdev->open = ite_open; | |
1581 | rdev->close = ite_close; | |
1582 | rdev->s_idle = ite_s_idle; | |
1583 | rdev->s_rx_carrier_range = ite_set_rx_carrier_range; | |
1584 | rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT; | |
1585 | rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT; | |
1586 | rdev->timeout = ITE_IDLE_TIMEOUT; | |
1587 | rdev->rx_resolution = ITE_BAUDRATE_DIVISOR * | |
1588 | itdev->params.sample_period; | |
1589 | rdev->tx_resolution = ITE_BAUDRATE_DIVISOR * | |
1590 | itdev->params.sample_period; | |
1591 | ||
1592 | /* set up transmitter related values if needed */ | |
1593 | if (itdev->params.hw_tx_capable) { | |
1594 | rdev->tx_ir = ite_tx_ir; | |
1595 | rdev->s_tx_carrier = ite_set_tx_carrier; | |
1596 | rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle; | |
1597 | } | |
1598 | ||
1599 | rdev->input_name = dev_desc->model; | |
1600 | rdev->input_id.bustype = BUS_HOST; | |
1601 | rdev->input_id.vendor = PCI_VENDOR_ID_ITE; | |
1602 | rdev->input_id.product = 0; | |
1603 | rdev->input_id.version = 0; | |
1604 | rdev->driver_name = ITE_DRIVER_NAME; | |
1605 | rdev->map_name = RC_MAP_RC6_MCE; | |
1606 | ||
1607 | ret = rc_register_device(rdev); | |
1608 | if (ret) | |
1609 | goto failure; | |
1610 | ||
1611 | itdev->rdev = rdev; | |
1612 | ite_pr(KERN_NOTICE, "driver has been successfully loaded\n"); | |
1613 | ||
1614 | return 0; | |
1615 | ||
1616 | failure: | |
1617 | if (itdev->cir_irq) | |
1618 | free_irq(itdev->cir_irq, itdev); | |
1619 | ||
1620 | if (itdev->cir_addr) | |
1621 | release_region(itdev->cir_addr, itdev->params.io_region_size); | |
1622 | ||
1623 | rc_free_device(rdev); | |
1624 | kfree(itdev); | |
1625 | ||
1626 | return ret; | |
1627 | } | |
1628 | ||
1629 | static void __devexit ite_remove(struct pnp_dev *pdev) | |
1630 | { | |
1631 | struct ite_dev *dev = pnp_get_drvdata(pdev); | |
1632 | unsigned long flags; | |
1633 | ||
1634 | ite_dbg("%s called", __func__); | |
1635 | ||
1636 | spin_lock_irqsave(&dev->lock, flags); | |
1637 | ||
1638 | /* disable hardware */ | |
1639 | dev->params.disable(dev); | |
1640 | ||
1641 | spin_unlock_irqrestore(&dev->lock, flags); | |
1642 | ||
1643 | /* free resources */ | |
1644 | free_irq(dev->cir_irq, dev); | |
1645 | release_region(dev->cir_addr, dev->params.io_region_size); | |
1646 | ||
1647 | rc_unregister_device(dev->rdev); | |
1648 | ||
1649 | kfree(dev); | |
1650 | } | |
1651 | ||
1652 | static int ite_suspend(struct pnp_dev *pdev, pm_message_t state) | |
1653 | { | |
1654 | struct ite_dev *dev = pnp_get_drvdata(pdev); | |
1655 | unsigned long flags; | |
1656 | ||
1657 | ite_dbg("%s called", __func__); | |
1658 | ||
c8120454 JW |
1659 | /* wait for any transmission to end */ |
1660 | wait_event_interruptible(dev->tx_ended, !dev->transmitting); | |
1661 | ||
620a32bb JGS |
1662 | spin_lock_irqsave(&dev->lock, flags); |
1663 | ||
1664 | /* disable all interrupts */ | |
1665 | dev->params.disable(dev); | |
1666 | ||
1667 | spin_unlock_irqrestore(&dev->lock, flags); | |
1668 | ||
1669 | return 0; | |
1670 | } | |
1671 | ||
1672 | static int ite_resume(struct pnp_dev *pdev) | |
1673 | { | |
1674 | int ret = 0; | |
1675 | struct ite_dev *dev = pnp_get_drvdata(pdev); | |
1676 | unsigned long flags; | |
1677 | ||
1678 | ite_dbg("%s called", __func__); | |
1679 | ||
1680 | spin_lock_irqsave(&dev->lock, flags); | |
1681 | ||
c8120454 JW |
1682 | /* reinitialize hardware config registers */ |
1683 | dev->params.init_hardware(dev); | |
1684 | /* enable the receiver */ | |
1685 | dev->params.enable_rx(dev); | |
620a32bb JGS |
1686 | |
1687 | spin_unlock_irqrestore(&dev->lock, flags); | |
1688 | ||
1689 | return ret; | |
1690 | } | |
1691 | ||
1692 | static void ite_shutdown(struct pnp_dev *pdev) | |
1693 | { | |
1694 | struct ite_dev *dev = pnp_get_drvdata(pdev); | |
1695 | unsigned long flags; | |
1696 | ||
1697 | ite_dbg("%s called", __func__); | |
1698 | ||
1699 | spin_lock_irqsave(&dev->lock, flags); | |
1700 | ||
1701 | /* disable all interrupts */ | |
1702 | dev->params.disable(dev); | |
1703 | ||
1704 | spin_unlock_irqrestore(&dev->lock, flags); | |
1705 | } | |
1706 | ||
1707 | static struct pnp_driver ite_driver = { | |
1708 | .name = ITE_DRIVER_NAME, | |
1709 | .id_table = ite_ids, | |
1710 | .probe = ite_probe, | |
1711 | .remove = __devexit_p(ite_remove), | |
1712 | .suspend = ite_suspend, | |
1713 | .resume = ite_resume, | |
1714 | .shutdown = ite_shutdown, | |
1715 | }; | |
1716 | ||
1717 | int ite_init(void) | |
1718 | { | |
1719 | return pnp_register_driver(&ite_driver); | |
1720 | } | |
1721 | ||
1722 | void ite_exit(void) | |
1723 | { | |
1724 | pnp_unregister_driver(&ite_driver); | |
1725 | } | |
1726 | ||
1727 | MODULE_DEVICE_TABLE(pnp, ite_ids); | |
1728 | MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver"); | |
1729 | ||
1730 | MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>"); | |
1731 | MODULE_LICENSE("GPL"); | |
1732 | ||
1733 | module_init(ite_init); | |
1734 | module_exit(ite_exit); |