projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 95963cbc DW |
1 | /* |
| 2 | * Driver for Maxim MAX2165 silicon tuner | |
| 3 | * | |
| 4 | * Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com> | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License as published by | |
| 8 | * the Free Software Foundation; either version 2 of the License, or | |
| 9 | * (at your option) any later version. | |
| 10 | * | |
| 11 | * This program is distributed in the hope that it will be useful, | |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | * | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License | |
| 18 | * along with this program; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 20 | */ | |
| 21 | ||
| 22 | #ifndef __MAX2165_PRIV_H__ | |
| 23 | #define __MAX2165_PRIV_H__ | |
| 24 | ||
| 25 | #define REG_NDIV_INT 0x00 | |
| 26 | #define REG_NDIV_FRAC2 0x01 | |
| 27 | #define REG_NDIV_FRAC1 0x02 | |
| 28 | #define REG_NDIV_FRAC0 0x03 | |
| 29 | #define REG_TRACK_FILTER 0x04 | |
| 30 | #define REG_LNA 0x05 | |
| 31 | #define REG_PLL_CFG 0x06 | |
| 32 | #define REG_TEST 0x07 | |
| 33 | #define REG_SHUTDOWN 0x08 | |
| 34 | #define REG_VCO_CTRL 0x09 | |
| 35 | #define REG_BASEBAND_CTRL 0x0A | |
| 36 | #define REG_DC_OFFSET_CTRL 0x0B | |
| 37 | #define REG_DC_OFFSET_DAC 0x0C | |
| 38 | #define REG_ROM_TABLE_ADDR 0x0D | |
| 39 | ||
| 40 | /* Read Only Registers */ | |
| 41 | #define REG_ROM_TABLE_DATA 0x10 | |
| 42 | #define REG_STATUS 0x11 | |
| 43 | #define REG_AUTOTUNE 0x12 | |
| 44 | ||
| 45 | struct max2165_priv { | |
| 46 | struct max2165_config *config; | |
| 47 | struct i2c_adapter *i2c; | |
| 48 | ||
| 49 | u32 frequency; | |
| 50 | u32 bandwidth; | |
| 51 | ||
| 52 | u8 tf_ntch_low_cfg; | |
| 53 | u8 tf_ntch_hi_cfg; | |
| 54 | u8 tf_balun_low_ref; | |
| 55 | u8 tf_balun_hi_ref; | |
| 56 | u8 bb_filter_7mhz_cfg; | |
| 57 | u8 bb_filter_8mhz_cfg; | |
| 58 | }; | |
| 59 | ||
| 60 | #endif |