[deliverable/linux.git] / drivers / media / tuners / msi001.c

/*
 * Mirics MSi001 silicon tuner driver
 *
 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/gcd.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>

static const struct v4l2_frequency_band bands[] = {
	{
		.type = V4L2_TUNER_RF,
		.index = 0,
		.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
		.rangelow   =   49000000,
		.rangehigh  =  263000000,
	}, {
		.type = V4L2_TUNER_RF,
		.index = 1,
		.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
		.rangelow   =  390000000,
		.rangehigh  =  960000000,
	},
};

struct msi001_dev {
	struct spi_device *spi;
	struct v4l2_subdev sd;

	/* Controls */
	struct v4l2_ctrl_handler hdl;
	struct v4l2_ctrl *bandwidth_auto;
	struct v4l2_ctrl *bandwidth;
	struct v4l2_ctrl *lna_gain;
	struct v4l2_ctrl *mixer_gain;
	struct v4l2_ctrl *if_gain;

	unsigned int f_tuner;
};

static inline struct msi001_dev *sd_to_msi001_dev(struct v4l2_subdev *sd)
{
	return container_of(sd, struct msi001_dev, sd);
}

static int msi001_wreg(struct msi001_dev *dev, u32 data)
{
	/* Register format: 4 bits addr + 20 bits value */
	return spi_write(dev->spi, &data, 3);
};

static int msi001_set_gain(struct msi001_dev *dev, int lna_gain, int mixer_gain,
			   int if_gain)
{
	struct spi_device *spi = dev->spi;
	int ret;
	u32 reg;

	dev_dbg(&spi->dev, "lna=%d mixer=%d if=%d\n",
		lna_gain, mixer_gain, if_gain);

	reg = 1 << 0;
	reg |= (59 - if_gain) << 4;
	reg |= 0 << 10;
	reg |= (1 - mixer_gain) << 12;
	reg |= (1 - lna_gain) << 13;
	reg |= 4 << 14;
	reg |= 0 << 17;
	ret = msi001_wreg(dev, reg);
	if (ret)
		goto err;

	return 0;
err:
	dev_dbg(&spi->dev, "failed %d\n", ret);
	return ret;
};

static int msi001_set_tuner(struct msi001_dev *dev)
{
	struct spi_device *spi = dev->spi;
	int ret, i;
	unsigned int uitmp, div_n, k, k_thresh, k_frac, div_lo, f_if1;
	u32 reg;
	u64 f_vco;
	u8 mode, filter_mode;

	static const struct {
		u32 rf;
		u8 mode;
		u8 div_lo;
	} band_lut[] = {
		{ 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */
		{108000000, 0x42, 32}, /* VHF_MODE */
		{330000000, 0x44, 16}, /* B3_MODE */
		{960000000, 0x48,  4}, /* B45_MODE */
		{      ~0U, 0x50,  2}, /* BL_MODE */
	};
	static const struct {
		u32 freq;
		u8 filter_mode;
	} if_freq_lut[] = {
		{      0, 0x03}, /* Zero IF */
		{ 450000, 0x02}, /* 450 kHz IF */
		{1620000, 0x01}, /* 1.62 MHz IF */
		{2048000, 0x00}, /* 2.048 MHz IF */
	};
	static const struct {
		u32 freq;
		u8 val;
	} bandwidth_lut[] = {
		{ 200000, 0x00}, /* 200 kHz */
		{ 300000, 0x01}, /* 300 kHz */
		{ 600000, 0x02}, /* 600 kHz */
		{1536000, 0x03}, /* 1.536 MHz */
		{5000000, 0x04}, /* 5 MHz */
		{6000000, 0x05}, /* 6 MHz */
		{7000000, 0x06}, /* 7 MHz */
		{8000000, 0x07}, /* 8 MHz */
	};

	unsigned int f_rf = dev->f_tuner;

	/*
	 * bandwidth (Hz)
	 * 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000
	 */
	unsigned int bandwidth;

	/*
	 * intermediate frequency (Hz)
	 * 0, 450000, 1620000, 2048000
	 */
	unsigned int f_if = 0;
	#define F_REF 24000000
	#define DIV_PRE_N 4
	#define	F_VCO_STEP div_lo

	dev_dbg(&spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);

	for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
		if (f_rf <= band_lut[i].rf) {
			mode = band_lut[i].mode;
			div_lo = band_lut[i].div_lo;
			break;
		}
	}
	if (i == ARRAY_SIZE(band_lut)) {
		ret = -EINVAL;
		goto err;
	}

	/* AM_MODE is upconverted */
	if ((mode >> 0) & 0x1)
		f_if1 =  5 * F_REF;
	else
		f_if1 =  0;

	for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) {
		if (f_if == if_freq_lut[i].freq) {
			filter_mode = if_freq_lut[i].filter_mode;
			break;
		}
	}
	if (i == ARRAY_SIZE(if_freq_lut)) {
		ret = -EINVAL;
		goto err;
	}

	/* filters */
	bandwidth = dev->bandwidth->val;
	bandwidth = clamp(bandwidth, 200000U, 8000000U);

	for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
		if (bandwidth <= bandwidth_lut[i].freq) {
			bandwidth = bandwidth_lut[i].val;
			break;
		}
	}
	if (i == ARRAY_SIZE(bandwidth_lut)) {
		ret = -EINVAL;
		goto err;
	}

	dev->bandwidth->val = bandwidth_lut[i].freq;

	dev_dbg(&spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);

	/*
	 * Fractional-N synthesizer
	 *
	 *           +---------------------------------------+
	 *           v                                       |
	 *  Fref   +----+     +-------+         +----+     +------+     +---+
	 * ------> | PD | --> |  VCO  | ------> | /4 | --> | /N.F | <-- | K |
	 *         +----+     +-------+         +----+     +------+     +---+
	 *                      |
	 *                      |
	 *                      v
	 *                    +-------+  Fout
	 *                    | /Rout | ------>
	 *                    +-------+
	 */

	/* Calculate PLL integer and fractional control word. */
	f_vco = (u64) (f_rf + f_if + f_if1) * div_lo;
	div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k);
	k_thresh = (DIV_PRE_N * F_REF) / F_VCO_STEP;
	k_frac = div_u64((u64) k * k_thresh, (DIV_PRE_N * F_REF));

	/* Find out greatest common divisor and divide to smaller. */
	uitmp = gcd(k_thresh, k_frac);
	k_thresh /= uitmp;
	k_frac /= uitmp;

	/* Force divide to reg max. Resolution will be reduced. */
	uitmp = DIV_ROUND_UP(k_thresh, 4095);
	k_thresh = DIV_ROUND_CLOSEST(k_thresh, uitmp);
	k_frac = DIV_ROUND_CLOSEST(k_frac, uitmp);

	/* Calculate real RF set. */
	uitmp = (unsigned int) F_REF * DIV_PRE_N * div_n;
	uitmp += (unsigned int) F_REF * DIV_PRE_N * k_frac / k_thresh;
	uitmp /= div_lo;

	dev_dbg(&spi->dev,
		"f_rf=%u:%u f_vco=%llu div_n=%u k_thresh=%u k_frac=%u div_lo=%u\n",
		f_rf, uitmp, f_vco, div_n, k_thresh, k_frac, div_lo);

	ret = msi001_wreg(dev, 0x00000e);
	if (ret)
		goto err;

	ret = msi001_wreg(dev, 0x000003);
	if (ret)
		goto err;

	reg = 0 << 0;
	reg |= mode << 4;
	reg |= filter_mode << 12;
	reg |= bandwidth << 14;
	reg |= 0x02 << 17;
	reg |= 0x00 << 20;
	ret = msi001_wreg(dev, reg);
	if (ret)
		goto err;

	reg = 5 << 0;
	reg |= k_thresh << 4;
	reg |= 1 << 19;
	reg |= 1 << 21;
	ret = msi001_wreg(dev, reg);
	if (ret)
		goto err;

	reg = 2 << 0;
	reg |= k_frac << 4;
	reg |= div_n << 16;
	ret = msi001_wreg(dev, reg);
	if (ret)
		goto err;

	ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
			      dev->mixer_gain->cur.val, dev->if_gain->cur.val);
	if (ret)
		goto err;

	reg = 6 << 0;
	reg |= 63 << 4;
	reg |= 4095 << 10;
	ret = msi001_wreg(dev, reg);
	if (ret)
		goto err;

	return 0;
err:
	dev_dbg(&spi->dev, "failed %d\n", ret);
	return ret;
}

static int msi001_s_power(struct v4l2_subdev *sd, int on)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;
	int ret;

	dev_dbg(&spi->dev, "on=%d\n", on);

	if (on)
		ret = 0;
	else
		ret = msi001_wreg(dev, 0x000000);

	return ret;
}

static const struct v4l2_subdev_core_ops msi001_core_ops = {
	.s_power                  = msi001_s_power,
};

static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;

	dev_dbg(&spi->dev, "index=%d\n", v->index);

	strlcpy(v->name, "Mirics MSi001", sizeof(v->name));
	v->type = V4L2_TUNER_RF;
	v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
	v->rangelow =    49000000;
	v->rangehigh =  960000000;

	return 0;
}

static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;

	dev_dbg(&spi->dev, "index=%d\n", v->index);
	return 0;
}

static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;

	dev_dbg(&spi->dev, "tuner=%d\n", f->tuner);
	f->frequency = dev->f_tuner;
	return 0;
}

static int msi001_s_frequency(struct v4l2_subdev *sd,
			      const struct v4l2_frequency *f)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;
	unsigned int band;

	dev_dbg(&spi->dev, "tuner=%d type=%d frequency=%u\n",
		f->tuner, f->type, f->frequency);

	if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
		band = 0;
	else
		band = 1;
	dev->f_tuner = clamp_t(unsigned int, f->frequency,
			       bands[band].rangelow, bands[band].rangehigh);

	return msi001_set_tuner(dev);
}

static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
				  struct v4l2_frequency_band *band)
{
	struct msi001_dev *dev = sd_to_msi001_dev(sd);
	struct spi_device *spi = dev->spi;

	dev_dbg(&spi->dev, "tuner=%d type=%d index=%d\n",
		band->tuner, band->type, band->index);

	if (band->index >= ARRAY_SIZE(bands))
		return -EINVAL;

	band->capability = bands[band->index].capability;
	band->rangelow = bands[band->index].rangelow;
	band->rangehigh = bands[band->index].rangehigh;

	return 0;
}

static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = {
	.g_tuner                  = msi001_g_tuner,
	.s_tuner                  = msi001_s_tuner,
	.g_frequency              = msi001_g_frequency,
	.s_frequency              = msi001_s_frequency,
	.enum_freq_bands          = msi001_enum_freq_bands,
};

static const struct v4l2_subdev_ops msi001_ops = {
	.core                     = &msi001_core_ops,
	.tuner                    = &msi001_tuner_ops,
};

static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
{
	struct msi001_dev *dev = container_of(ctrl->handler, struct msi001_dev, hdl);
	struct spi_device *spi = dev->spi;

	int ret;

	dev_dbg(&spi->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
		ctrl->id, ctrl->name, ctrl->val, ctrl->minimum, ctrl->maximum,
		ctrl->step);

	switch (ctrl->id) {
	case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
	case V4L2_CID_RF_TUNER_BANDWIDTH:
		ret = msi001_set_tuner(dev);
		break;
	case  V4L2_CID_RF_TUNER_LNA_GAIN:
		ret = msi001_set_gain(dev, dev->lna_gain->val,
				      dev->mixer_gain->cur.val,
				      dev->if_gain->cur.val);
		break;
	case  V4L2_CID_RF_TUNER_MIXER_GAIN:
		ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
				      dev->mixer_gain->val,
				      dev->if_gain->cur.val);
		break;
	case  V4L2_CID_RF_TUNER_IF_GAIN:
		ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
				      dev->mixer_gain->cur.val,
				      dev->if_gain->val);
		break;
	default:
		dev_dbg(&spi->dev, "unknown control %d\n", ctrl->id);
		ret = -EINVAL;
	}

	return ret;
}

static const struct v4l2_ctrl_ops msi001_ctrl_ops = {
	.s_ctrl                   = msi001_s_ctrl,
};

static int msi001_probe(struct spi_device *spi)
{
	struct msi001_dev *dev;
	int ret;

	dev_dbg(&spi->dev, "\n");

	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
	if (!dev) {
		ret = -ENOMEM;
		goto err;
	}

	dev->spi = spi;
	dev->f_tuner = bands[0].rangelow;
	v4l2_spi_subdev_init(&dev->sd, spi, &msi001_ops);

	/* Register controls */
	v4l2_ctrl_handler_init(&dev->hdl, 5);
	dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
			V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
	dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
			V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000);
	v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
	dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
			V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1);
	dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
			V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
	dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
			V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0);
	if (dev->hdl.error) {
		ret = dev->hdl.error;
		dev_err(&spi->dev, "Could not initialize controls\n");
		/* control init failed, free handler */
		goto err_ctrl_handler_free;
	}

	dev->sd.ctrl_handler = &dev->hdl;
	return 0;
err_ctrl_handler_free:
	v4l2_ctrl_handler_free(&dev->hdl);
	kfree(dev);
err:
	return ret;
}

static int msi001_remove(struct spi_device *spi)
{
	struct v4l2_subdev *sd = spi_get_drvdata(spi);
	struct msi001_dev *dev = sd_to_msi001_dev(sd);

	dev_dbg(&spi->dev, "\n");

	/*
	 * Registered by v4l2_spi_new_subdev() from master driver, but we must
	 * unregister it from here. Weird.
	 */
	v4l2_device_unregister_subdev(&dev->sd);
	v4l2_ctrl_handler_free(&dev->hdl);
	kfree(dev);
	return 0;
}

static const struct spi_device_id msi001_id_table[] = {
	{"msi001", 0},
	{}
};
MODULE_DEVICE_TABLE(spi, msi001_id_table);

static struct spi_driver msi001_driver = {
	.driver = {
		.name	= "msi001",
		.suppress_bind_attrs = true,
	},
	.probe		= msi001_probe,
	.remove		= msi001_remove,
	.id_table	= msi001_id_table,
};
module_spi_driver(msi001_driver);

MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
MODULE_DESCRIPTION("Mirics MSi001");
MODULE_LICENSE("GPL");
Commit	Line	Data
93203dd6 AP	1	/*
	2	* Mirics MSi001 silicon tuner driver
	3	*
	4	* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
	5	* Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*/
	17
	18	#include <linux/module.h>
	19	#include <linux/gcd.h>
	20	#include <media/v4l2-device.h>
	21	#include <media/v4l2-ctrls.h>
	22
	23	static const struct v4l2_frequency_band bands[] = {
	24	{
	25	.type = V4L2_TUNER_RF,
	26	.index = 0,
	27	.capability = V4L2_TUNER_CAP_1HZ \| V4L2_TUNER_CAP_FREQ_BANDS,
	28	.rangelow = 49000000,
	29	.rangehigh = 263000000,
	30	}, {
	31	.type = V4L2_TUNER_RF,
	32	.index = 1,
	33	.capability = V4L2_TUNER_CAP_1HZ \| V4L2_TUNER_CAP_FREQ_BANDS,
	34	.rangelow = 390000000,
	35	.rangehigh = 960000000,
	36	},
	37	};
	38
83e64b4d	39	struct msi001_dev {
93203dd6 AP	40	struct spi_device *spi;
	41	struct v4l2_subdev sd;
	42
	43	/* Controls */
	44	struct v4l2_ctrl_handler hdl;
	45	struct v4l2_ctrl *bandwidth_auto;
	46	struct v4l2_ctrl *bandwidth;
	47	struct v4l2_ctrl *lna_gain;
	48	struct v4l2_ctrl *mixer_gain;
	49	struct v4l2_ctrl *if_gain;
	50
	51	unsigned int f_tuner;
	52	};
	53
83e64b4d	54	static inline struct msi001_dev sd_to_msi001_dev(struct v4l2_subdev sd)
93203dd6	55	{
83e64b4d	56	return container_of(sd, struct msi001_dev, sd);
93203dd6 AP	57	}
93203dd6 AP	58
83e64b4d	59	static int msi001_wreg(struct msi001_dev *dev, u32 data)
93203dd6 AP	60	{
93203dd6 AP	61	/* Register format: 4 bits addr + 20 bits value */
83e64b4d	62	return spi_write(dev->spi, &data, 3);
93203dd6 AP	63	};
93203dd6 AP	64
83e64b4d AP	65	static int msi001_set_gain(struct msi001_dev *dev, int lna_gain, int mixer_gain,
83e64b4d AP	66	int if_gain)
93203dd6	67	{
83e64b4d	68	struct spi_device *spi = dev->spi;
93203dd6 AP	69	int ret;
93203dd6 AP	70	u32 reg;
5fa51cc3	71
83e64b4d AP	72	dev_dbg(&spi->dev, "lna=%d mixer=%d if=%d\n",
83e64b4d AP	73	lna_gain, mixer_gain, if_gain);
93203dd6 AP	74
	75	reg = 1 << 0;
	76	reg \|= (59 - if_gain) << 4;
	77	reg \|= 0 << 10;
	78	reg \|= (1 - mixer_gain) << 12;
	79	reg \|= (1 - lna_gain) << 13;
	80	reg \|= 4 << 14;
	81	reg \|= 0 << 17;
83e64b4d	82	ret = msi001_wreg(dev, reg);
93203dd6 AP	83	if (ret)
	84	goto err;
	85
	86	return 0;
	87	err:
83e64b4d	88	dev_dbg(&spi->dev, "failed %d\n", ret);
93203dd6 AP	89	return ret;
	90	};
	91
83e64b4d	92	static int msi001_set_tuner(struct msi001_dev *dev)
93203dd6	93	{
83e64b4d	94	struct spi_device *spi = dev->spi;
93203dd6	95	int ret, i;
9195e5b2	96	unsigned int uitmp, div_n, k, k_thresh, k_frac, div_lo, f_if1;
93203dd6	97	u32 reg;
9195e5b2 AP	98	u64 f_vco;
9195e5b2 AP	99	u8 mode, filter_mode;
5fa51cc3	100
93203dd6 AP	101	static const struct {
	102	u32 rf;
	103	u8 mode;
9195e5b2	104	u8 div_lo;
93203dd6 AP	105	} band_lut[] = {
	106	{ 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */
	107	{108000000, 0x42, 32}, /* VHF_MODE */
	108	{330000000, 0x44, 16}, /* B3_MODE */
	109	{960000000, 0x48, 4}, /* B45_MODE */
	110	{ ~0U, 0x50, 2}, /* BL_MODE */
	111	};
	112	static const struct {
	113	u32 freq;
	114	u8 filter_mode;
	115	} if_freq_lut[] = {
	116	{ 0, 0x03}, /* Zero IF */
	117	{ 450000, 0x02}, /* 450 kHz IF */
	118	{1620000, 0x01}, /* 1.62 MHz IF */
	119	{2048000, 0x00}, /* 2.048 MHz IF */
	120	};
	121	static const struct {
	122	u32 freq;
	123	u8 val;
	124	} bandwidth_lut[] = {
	125	{ 200000, 0x00}, /* 200 kHz */
	126	{ 300000, 0x01}, /* 300 kHz */
	127	{ 600000, 0x02}, /* 600 kHz */
	128	{1536000, 0x03}, /* 1.536 MHz */
	129	{5000000, 0x04}, /* 5 MHz */
	130	{6000000, 0x05}, /* 6 MHz */
	131	{7000000, 0x06}, /* 7 MHz */
	132	{8000000, 0x07}, /* 8 MHz */
	133	};
	134
83e64b4d	135	unsigned int f_rf = dev->f_tuner;
93203dd6 AP	136
	137	/*
	138	* bandwidth (Hz)
	139	* 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000
	140	*/
	141	unsigned int bandwidth;
	142
	143	/*
	144	* intermediate frequency (Hz)
	145	* 0, 450000, 1620000, 2048000
	146	*/
	147	unsigned int f_if = 0;
	148	#define F_REF 24000000
9195e5b2 AP	149	#define DIV_PRE_N 4
9195e5b2 AP	150	#define F_VCO_STEP div_lo
93203dd6	151
83e64b4d	152	dev_dbg(&spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);
93203dd6 AP	153
	154	for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
	155	if (f_rf <= band_lut[i].rf) {
	156	mode = band_lut[i].mode;
9195e5b2	157	div_lo = band_lut[i].div_lo;
93203dd6 AP	158	break;
	159	}
	160	}
93203dd6 AP	161	if (i == ARRAY_SIZE(band_lut)) {
	162	ret = -EINVAL;
	163	goto err;
	164	}
	165
	166	/* AM_MODE is upconverted */
	167	if ((mode >> 0) & 0x1)
	168	f_if1 = 5 * F_REF;
	169	else
	170	f_if1 = 0;
	171
	172	for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) {
	173	if (f_if == if_freq_lut[i].freq) {
	174	filter_mode = if_freq_lut[i].filter_mode;
	175	break;
	176	}
	177	}
93203dd6 AP	178	if (i == ARRAY_SIZE(if_freq_lut)) {
	179	ret = -EINVAL;
	180	goto err;
	181	}
	182
	183	/* filters */
83e64b4d	184	bandwidth = dev->bandwidth->val;
93203dd6 AP	185	bandwidth = clamp(bandwidth, 200000U, 8000000U);
	186
	187	for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
	188	if (bandwidth <= bandwidth_lut[i].freq) {
	189	bandwidth = bandwidth_lut[i].val;
	190	break;
	191	}
	192	}
93203dd6 AP	193	if (i == ARRAY_SIZE(bandwidth_lut)) {
	194	ret = -EINVAL;
	195	goto err;
	196	}
	197
83e64b4d	198	dev->bandwidth->val = bandwidth_lut[i].freq;
93203dd6	199
83e64b4d	200	dev_dbg(&spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
93203dd6	201
9195e5b2 AP	202	/*
	203	* Fractional-N synthesizer
	204	*
	205	* +---------------------------------------+
	206	* v \|
	207	* Fref +----+ +-------+ +----+ +------+ +---+
	208	* ------> \| PD \| --> \| VCO \| ------> \| /4 \| --> \| /N.F \| <-- \| K \|
	209	* +----+ +-------+ +----+ +------+ +---+
	210	* \|
	211	* \|
	212	* v
	213	* +-------+ Fout
	214	* \| /Rout \| ------>
	215	* +-------+
	216	*/
93203dd6	217
9195e5b2 AP	218	/* Calculate PLL integer and fractional control word. */
	219	f_vco = (u64) (f_rf + f_if + f_if1) * div_lo;
	220	div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k);
	221	k_thresh = (DIV_PRE_N * F_REF) / F_VCO_STEP;
	222	k_frac = div_u64((u64) k * k_thresh, (DIV_PRE_N * F_REF));
93203dd6 AP	223
93203dd6 AP	224	/* Find out greatest common divisor and divide to smaller. */
9195e5b2 AP	225	uitmp = gcd(k_thresh, k_frac);
	226	k_thresh /= uitmp;
	227	k_frac /= uitmp;
93203dd6 AP	228
93203dd6 AP	229	/* Force divide to reg max. Resolution will be reduced. */
9195e5b2 AP	230	uitmp = DIV_ROUND_UP(k_thresh, 4095);
	231	k_thresh = DIV_ROUND_CLOSEST(k_thresh, uitmp);
	232	k_frac = DIV_ROUND_CLOSEST(k_frac, uitmp);
93203dd6	233
9195e5b2 AP	234	/* Calculate real RF set. */
	235	uitmp = (unsigned int) F_REF * DIV_PRE_N * div_n;
	236	uitmp += (unsigned int) F_REF * DIV_PRE_N * k_frac / k_thresh;
	237	uitmp /= div_lo;
93203dd6	238
83e64b4d	239	dev_dbg(&spi->dev,
9195e5b2 AP	240	"f_rf=%u:%u f_vco=%llu div_n=%u k_thresh=%u k_frac=%u div_lo=%u\n",
9195e5b2 AP	241	f_rf, uitmp, f_vco, div_n, k_thresh, k_frac, div_lo);
93203dd6	242
83e64b4d	243	ret = msi001_wreg(dev, 0x00000e);
93203dd6 AP	244	if (ret)
	245	goto err;
	246
83e64b4d	247	ret = msi001_wreg(dev, 0x000003);
93203dd6 AP	248	if (ret)
	249	goto err;
	250
	251	reg = 0 << 0;
	252	reg \|= mode << 4;
	253	reg \|= filter_mode << 12;
	254	reg \|= bandwidth << 14;
	255	reg \|= 0x02 << 17;
	256	reg \|= 0x00 << 20;
83e64b4d	257	ret = msi001_wreg(dev, reg);
93203dd6 AP	258	if (ret)
	259	goto err;
	260
	261	reg = 5 << 0;
9195e5b2	262	reg \|= k_thresh << 4;
93203dd6 AP	263	reg \|= 1 << 19;
93203dd6 AP	264	reg \|= 1 << 21;
83e64b4d	265	ret = msi001_wreg(dev, reg);
93203dd6 AP	266	if (ret)
	267	goto err;
	268
	269	reg = 2 << 0;
9195e5b2 AP	270	reg \|= k_frac << 4;
9195e5b2 AP	271	reg \|= div_n << 16;
83e64b4d	272	ret = msi001_wreg(dev, reg);
93203dd6 AP	273	if (ret)
	274	goto err;
	275
83e64b4d AP	276	ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
83e64b4d AP	277	dev->mixer_gain->cur.val, dev->if_gain->cur.val);
93203dd6 AP	278	if (ret)
	279	goto err;
	280
	281	reg = 6 << 0;
	282	reg \|= 63 << 4;
	283	reg \|= 4095 << 10;
83e64b4d	284	ret = msi001_wreg(dev, reg);
93203dd6 AP	285	if (ret)
	286	goto err;
	287
	288	return 0;
	289	err:
83e64b4d	290	dev_dbg(&spi->dev, "failed %d\n", ret);
93203dd6	291	return ret;
9195e5b2	292	}
93203dd6 AP	293
	294	static int msi001_s_power(struct v4l2_subdev *sd, int on)
	295	{
83e64b4d AP	296	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	297	struct spi_device *spi = dev->spi;
93203dd6	298	int ret;
5fa51cc3	299
83e64b4d	300	dev_dbg(&spi->dev, "on=%d\n", on);
93203dd6 AP	301
	302	if (on)
	303	ret = 0;
	304	else
83e64b4d	305	ret = msi001_wreg(dev, 0x000000);
93203dd6 AP	306
	307	return ret;
	308	}
	309
	310	static const struct v4l2_subdev_core_ops msi001_core_ops = {
	311	.s_power = msi001_s_power,
	312	};
	313
	314	static int msi001_g_tuner(struct v4l2_subdev sd, struct v4l2_tuner v)
	315	{
83e64b4d AP	316	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	317	struct spi_device *spi = dev->spi;
5fa51cc3	318
83e64b4d	319	dev_dbg(&spi->dev, "index=%d\n", v->index);
93203dd6 AP	320
	321	strlcpy(v->name, "Mirics MSi001", sizeof(v->name));
	322	v->type = V4L2_TUNER_RF;
	323	v->capability = V4L2_TUNER_CAP_1HZ \| V4L2_TUNER_CAP_FREQ_BANDS;
	324	v->rangelow = 49000000;
	325	v->rangehigh = 960000000;
	326
	327	return 0;
	328	}
	329
	330	static int msi001_s_tuner(struct v4l2_subdev sd, const struct v4l2_tuner v)
	331	{
83e64b4d AP	332	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	333	struct spi_device *spi = dev->spi;
5fa51cc3	334
83e64b4d	335	dev_dbg(&spi->dev, "index=%d\n", v->index);
93203dd6 AP	336	return 0;
	337	}
	338
	339	static int msi001_g_frequency(struct v4l2_subdev sd, struct v4l2_frequency f)
	340	{
83e64b4d AP	341	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	342	struct spi_device *spi = dev->spi;
5fa51cc3	343
83e64b4d AP	344	dev_dbg(&spi->dev, "tuner=%d\n", f->tuner);
83e64b4d AP	345	f->frequency = dev->f_tuner;
93203dd6 AP	346	return 0;
	347	}
	348
	349	static int msi001_s_frequency(struct v4l2_subdev *sd,
83e64b4d	350	const struct v4l2_frequency *f)
93203dd6	351	{
83e64b4d AP	352	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	353	struct spi_device *spi = dev->spi;
93203dd6	354	unsigned int band;
5fa51cc3	355
83e64b4d AP	356	dev_dbg(&spi->dev, "tuner=%d type=%d frequency=%u\n",
83e64b4d AP	357	f->tuner, f->type, f->frequency);
93203dd6 AP	358
	359	if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
	360	band = 0;
	361	else
	362	band = 1;
83e64b4d AP	363	dev->f_tuner = clamp_t(unsigned int, f->frequency,
83e64b4d AP	364	bands[band].rangelow, bands[band].rangehigh);
93203dd6	365
83e64b4d	366	return msi001_set_tuner(dev);
93203dd6 AP	367	}
	368
	369	static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
83e64b4d	370	struct v4l2_frequency_band *band)
93203dd6	371	{
83e64b4d AP	372	struct msi001_dev *dev = sd_to_msi001_dev(sd);
83e64b4d AP	373	struct spi_device *spi = dev->spi;
5fa51cc3	374
83e64b4d AP	375	dev_dbg(&spi->dev, "tuner=%d type=%d index=%d\n",
83e64b4d AP	376	band->tuner, band->type, band->index);
93203dd6 AP	377
	378	if (band->index >= ARRAY_SIZE(bands))
	379	return -EINVAL;
	380
	381	band->capability = bands[band->index].capability;
	382	band->rangelow = bands[band->index].rangelow;
	383	band->rangehigh = bands[band->index].rangehigh;
	384
	385	return 0;
	386	}
	387
	388	static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = {
	389	.g_tuner = msi001_g_tuner,
	390	.s_tuner = msi001_s_tuner,
	391	.g_frequency = msi001_g_frequency,
	392	.s_frequency = msi001_s_frequency,
	393	.enum_freq_bands = msi001_enum_freq_bands,
	394	};
	395
	396	static const struct v4l2_subdev_ops msi001_ops = {
	397	.core = &msi001_core_ops,
	398	.tuner = &msi001_tuner_ops,
	399	};
	400
	401	static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
	402	{
83e64b4d AP	403	struct msi001_dev *dev = container_of(ctrl->handler, struct msi001_dev, hdl);
83e64b4d AP	404	struct spi_device *spi = dev->spi;
93203dd6 AP	405
93203dd6 AP	406	int ret;
5fa51cc3	407
83e64b4d AP	408	dev_dbg(&spi->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
	409	ctrl->id, ctrl->name, ctrl->val, ctrl->minimum, ctrl->maximum,
	410	ctrl->step);
93203dd6 AP	411
	412	switch (ctrl->id) {
	413	case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
	414	case V4L2_CID_RF_TUNER_BANDWIDTH:
83e64b4d	415	ret = msi001_set_tuner(dev);
93203dd6 AP	416	break;
93203dd6 AP	417	case V4L2_CID_RF_TUNER_LNA_GAIN:
83e64b4d AP	418	ret = msi001_set_gain(dev, dev->lna_gain->val,
	419	dev->mixer_gain->cur.val,
	420	dev->if_gain->cur.val);
93203dd6 AP	421	break;
93203dd6 AP	422	case V4L2_CID_RF_TUNER_MIXER_GAIN:
83e64b4d AP	423	ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
	424	dev->mixer_gain->val,
	425	dev->if_gain->cur.val);
93203dd6 AP	426	break;
93203dd6 AP	427	case V4L2_CID_RF_TUNER_IF_GAIN:
83e64b4d AP	428	ret = msi001_set_gain(dev, dev->lna_gain->cur.val,
	429	dev->mixer_gain->cur.val,
	430	dev->if_gain->val);
93203dd6 AP	431	break;
93203dd6 AP	432	default:
83e64b4d	433	dev_dbg(&spi->dev, "unknown control %d\n", ctrl->id);
93203dd6 AP	434	ret = -EINVAL;
	435	}
	436
	437	return ret;
	438	}
	439
	440	static const struct v4l2_ctrl_ops msi001_ctrl_ops = {
	441	.s_ctrl = msi001_s_ctrl,
	442	};
	443
	444	static int msi001_probe(struct spi_device *spi)
	445	{
83e64b4d	446	struct msi001_dev *dev;
93203dd6	447	int ret;
5fa51cc3 AP	448
5fa51cc3 AP	449	dev_dbg(&spi->dev, "\n");
93203dd6	450
83e64b4d AP	451	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
83e64b4d AP	452	if (!dev) {
93203dd6	453	ret = -ENOMEM;
83e64b4d	454	goto err;
93203dd6 AP	455	}
93203dd6 AP	456
83e64b4d AP	457	dev->spi = spi;
	458	dev->f_tuner = bands[0].rangelow;
	459	v4l2_spi_subdev_init(&dev->sd, spi, &msi001_ops);
93203dd6 AP	460
93203dd6 AP	461	/* Register controls */
83e64b4d AP	462	v4l2_ctrl_handler_init(&dev->hdl, 5);
83e64b4d AP	463	dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
93203dd6	464	V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
83e64b4d	465	dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
93203dd6	466	V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000);
83e64b4d AP	467	v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
83e64b4d AP	468	dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
93203dd6	469	V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1);
83e64b4d	470	dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
93203dd6	471	V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
83e64b4d	472	dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops,
93203dd6	473	V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0);
83e64b4d AP	474	if (dev->hdl.error) {
	475	ret = dev->hdl.error;
	476	dev_err(&spi->dev, "Could not initialize controls\n");
93203dd6 AP	477	/* control init failed, free handler */
	478	goto err_ctrl_handler_free;
	479	}
	480
83e64b4d	481	dev->sd.ctrl_handler = &dev->hdl;
93203dd6	482	return 0;
93203dd6	483	err_ctrl_handler_free:
83e64b4d AP	484	v4l2_ctrl_handler_free(&dev->hdl);
	485	kfree(dev);
	486	err:
93203dd6 AP	487	return ret;
	488	}
	489
	490	static int msi001_remove(struct spi_device *spi)
	491	{
	492	struct v4l2_subdev *sd = spi_get_drvdata(spi);
83e64b4d	493	struct msi001_dev *dev = sd_to_msi001_dev(sd);
5fa51cc3 AP	494
5fa51cc3 AP	495	dev_dbg(&spi->dev, "\n");
93203dd6 AP	496
	497	/*
	498	* Registered by v4l2_spi_new_subdev() from master driver, but we must
	499	* unregister it from here. Weird.
	500	*/
83e64b4d AP	501	v4l2_device_unregister_subdev(&dev->sd);
	502	v4l2_ctrl_handler_free(&dev->hdl);
	503	kfree(dev);
93203dd6 AP	504	return 0;
	505	}
	506
83e64b4d	507	static const struct spi_device_id msi001_id_table[] = {
93203dd6 AP	508	{"msi001", 0},
	509	{}
	510	};
83e64b4d	511	MODULE_DEVICE_TABLE(spi, msi001_id_table);
93203dd6 AP	512
	513	static struct spi_driver msi001_driver = {
	514	.driver = {
	515	.name = "msi001",
83e64b4d	516	.suppress_bind_attrs = true,
93203dd6 AP	517	},
	518	.probe = msi001_probe,
	519	.remove = msi001_remove,
83e64b4d	520	.id_table = msi001_id_table,
93203dd6 AP	521	};
	522	module_spi_driver(msi001_driver);
	523
	524	MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
	525	MODULE_DESCRIPTION("Mirics MSi001");
	526	MODULE_LICENSE("GPL");