[deliverable/linux.git] / drivers / media / tuners / tda18218.c

/*
 * NXP TDA18218HN silicon tuner driver
 *
 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include "tda18218_priv.h"

/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE  64

/* write multiple registers */
static int tda18218_wr_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
{
	int ret = 0, len2, remaining;
	u8 buf[MAX_XFER_SIZE];
	struct i2c_msg msg[1] = {
		{
			.addr = priv->cfg->i2c_address,
			.flags = 0,
			.buf = buf,
		}
	};

	if (1 + len > sizeof(buf)) {
		dev_warn(&priv->i2c->dev,
			 "%s: i2c wr reg=%04x: len=%d is too big!\n",
			 KBUILD_MODNAME, reg, len);
		return -EINVAL;
	}

	for (remaining = len; remaining > 0;
			remaining -= (priv->cfg->i2c_wr_max - 1)) {
		len2 = remaining;
		if (len2 > (priv->cfg->i2c_wr_max - 1))
			len2 = (priv->cfg->i2c_wr_max - 1);

		msg[0].len = 1 + len2;
		buf[0] = reg + len - remaining;
		memcpy(&buf[1], &val[len - remaining], len2);

		ret = i2c_transfer(priv->i2c, msg, 1);
		if (ret != 1)
			break;
	}

	if (ret == 1) {
		ret = 0;
	} else {
		dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
				"len=%d\n", KBUILD_MODNAME, ret, reg, len);
		ret = -EREMOTEIO;
	}

	return ret;
}

/* read multiple registers */
static int tda18218_rd_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
{
	int ret;
	u8 buf[MAX_XFER_SIZE]; /* we must start read always from reg 0x00 */
	struct i2c_msg msg[2] = {
		{
			.addr = priv->cfg->i2c_address,
			.flags = 0,
			.len = 1,
			.buf = "\x00",
		}, {
			.addr = priv->cfg->i2c_address,
			.flags = I2C_M_RD,
			.len = reg + len,
			.buf = buf,
		}
	};

	if (reg + len > sizeof(buf)) {
		dev_warn(&priv->i2c->dev,
			 "%s: i2c wr reg=%04x: len=%d is too big!\n",
			 KBUILD_MODNAME, reg, len);
		return -EINVAL;
	}

	ret = i2c_transfer(priv->i2c, msg, 2);
	if (ret == 2) {
		memcpy(val, &buf[reg], len);
		ret = 0;
	} else {
		dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
				"len=%d\n", KBUILD_MODNAME, ret, reg, len);
		ret = -EREMOTEIO;
	}

	return ret;
}

/* write single register */
static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
{
	return tda18218_wr_regs(priv, reg, &val, 1);
}

/* read single register */

static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
{
	return tda18218_rd_regs(priv, reg, val, 1);
}

static int tda18218_set_params(struct dvb_frontend *fe)
{
	struct tda18218_priv *priv = fe->tuner_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	u32 bw = c->bandwidth_hz;
	int ret;
	u8 buf[3], i, BP_Filter, LP_Fc;
	u32 LO_Frac;
	/* TODO: find out correct AGC algorithm */
	u8 agc[][2] = {
		{ R20_AGC11, 0x60 },
		{ R23_AGC21, 0x02 },
		{ R20_AGC11, 0xa0 },
		{ R23_AGC21, 0x09 },
		{ R20_AGC11, 0xe0 },
		{ R23_AGC21, 0x0c },
		{ R20_AGC11, 0x40 },
		{ R23_AGC21, 0x01 },
		{ R20_AGC11, 0x80 },
		{ R23_AGC21, 0x08 },
		{ R20_AGC11, 0xc0 },
		{ R23_AGC21, 0x0b },
		{ R24_AGC22, 0x1c },
		{ R24_AGC22, 0x0c },
	};

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */

	/* low-pass filter cut-off frequency */
	if (bw <= 6000000) {
		LP_Fc = 0;
		priv->if_frequency = 3000000;
	} else if (bw <= 7000000) {
		LP_Fc = 1;
		priv->if_frequency = 3500000;
	} else {
		LP_Fc = 2;
		priv->if_frequency = 4000000;
	}

	LO_Frac = c->frequency + priv->if_frequency;

	/* band-pass filter */
	if (LO_Frac < 188000000)
		BP_Filter = 3;
	else if (LO_Frac < 253000000)
		BP_Filter = 4;
	else if (LO_Frac < 343000000)
		BP_Filter = 5;
	else
		BP_Filter = 6;

	buf[0] = (priv->regs[R1A_IF1] & ~7) | BP_Filter; /* BP_Filter */
	buf[1] = (priv->regs[R1B_IF2] & ~3) | LP_Fc; /* LP_Fc */
	buf[2] = priv->regs[R1C_AGC2B];
	ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
	if (ret)
		goto error;

	buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
	buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
	buf[2] = (LO_Frac / 1000) << 4 |
		(priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
	ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
	if (ret)
		goto error;

	buf[0] = priv->regs[R0F_MD8] | (1 << 6); /* Freq_prog_Start */
	ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
	if (ret)
		goto error;

	buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
	ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
	if (ret)
		goto error;

	/* trigger AGC */
	for (i = 0; i < ARRAY_SIZE(agc); i++) {
		ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
		if (ret)
			goto error;
	}

error:
	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */

	if (ret)
		dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);

	return ret;
}

static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
	struct tda18218_priv *priv = fe->tuner_priv;
	*frequency = priv->if_frequency;
	dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d\n", __func__, *frequency);
	return 0;
}

static int tda18218_sleep(struct dvb_frontend *fe)
{
	struct tda18218_priv *priv = fe->tuner_priv;
	int ret;

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */

	/* standby */
	ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */

	if (ret)
		dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);

	return ret;
}

static int tda18218_init(struct dvb_frontend *fe)
{
	struct tda18218_priv *priv = fe->tuner_priv;
	int ret;

	/* TODO: calibrations */

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */

	ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */

	if (ret)
		dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);

	return ret;
}

static int tda18218_release(struct dvb_frontend *fe)
{
	kfree(fe->tuner_priv);
	fe->tuner_priv = NULL;
	return 0;
}

static const struct dvb_tuner_ops tda18218_tuner_ops = {
	.info = {
		.name           = "NXP TDA18218",

		.frequency_min  = 174000000,
		.frequency_max  = 864000000,
		.frequency_step =      1000,
	},

	.release       = tda18218_release,
	.init          = tda18218_init,
	.sleep         = tda18218_sleep,

	.set_params    = tda18218_set_params,

	.get_if_frequency = tda18218_get_if_frequency,
};

struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
	struct i2c_adapter *i2c, struct tda18218_config *cfg)
{
	struct tda18218_priv *priv = NULL;
	u8 val;
	int ret;
	/* chip default registers values */
	static u8 def_regs[] = {
		0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
		0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
		0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
		0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
		0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
		0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
	};

	priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
	if (priv == NULL)
		return NULL;

	priv->cfg = cfg;
	priv->i2c = i2c;
	fe->tuner_priv = priv;

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */

	/* check if the tuner is there */
	ret = tda18218_rd_reg(priv, R00_ID, &val);
	if (!ret)
		dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val);
	if (ret || val != def_regs[R00_ID]) {
		kfree(priv);
		return NULL;
	}

	dev_info(&priv->i2c->dev,
			"%s: NXP TDA18218HN successfully identified\n",
			KBUILD_MODNAME);

	memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
		sizeof(struct dvb_tuner_ops));
	memcpy(priv->regs, def_regs, sizeof(def_regs));

	/* loop-through enabled chip default register values */
	if (priv->cfg->loop_through) {
		priv->regs[R17_PD1] = 0xb0;
		priv->regs[R18_PD2] = 0x59;
	}

	/* standby */
	ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
	if (ret)
		dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */

	return fe;
}
EXPORT_SYMBOL(tda18218_attach);

MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
MODULE_LICENSE("GPL");
Commit	Line	Data
51ff2e2c AP	1	/*
	2	* NXP TDA18218HN silicon tuner driver
	3	*
	4	* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*/
	20
51ff2e2c AP	21	#include "tda18218_priv.h"
51ff2e2c AP	22
f1baab87 MCC	23	/* Max transfer size done by I2C transfer functions */
	24	#define MAX_XFER_SIZE 64
	25
51ff2e2c AP	26	/* write multiple registers */
	27	static int tda18218_wr_regs(struct tda18218_priv priv, u8 reg, u8 val, u8 len)
	28	{
af3a07ac	29	int ret = 0, len2, remaining;
f1baab87	30	u8 buf[MAX_XFER_SIZE];
51ff2e2c AP	31	struct i2c_msg msg[1] = {
	32	{
	33	.addr = priv->cfg->i2c_address,
	34	.flags = 0,
	35	.buf = buf,
	36	}
	37	};
	38
f1baab87 MCC	39	if (1 + len > sizeof(buf)) {
	40	dev_warn(&priv->i2c->dev,
	41	"%s: i2c wr reg=%04x: len=%d is too big!\n",
	42	KBUILD_MODNAME, reg, len);
	43	return -EINVAL;
	44	}
	45
af3a07ac AP	46	for (remaining = len; remaining > 0;
	47	remaining -= (priv->cfg->i2c_wr_max - 1)) {
	48	len2 = remaining;
	49	if (len2 > (priv->cfg->i2c_wr_max - 1))
	50	len2 = (priv->cfg->i2c_wr_max - 1);
51ff2e2c	51
af3a07ac AP	52	msg[0].len = 1 + len2;
	53	buf[0] = reg + len - remaining;
	54	memcpy(&buf[1], &val[len - remaining], len2);
51ff2e2c AP	55
	56	ret = i2c_transfer(priv->i2c, msg, 1);
	57	if (ret != 1)
	58	break;
	59	}
	60
	61	if (ret == 1) {
	62	ret = 0;
	63	} else {
9edd6987 AP	64	dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
9edd6987 AP	65	"len=%d\n", KBUILD_MODNAME, ret, reg, len);
51ff2e2c AP	66	ret = -EREMOTEIO;
	67	}
	68
	69	return ret;
	70	}
	71
	72	/* read multiple registers */
	73	static int tda18218_rd_regs(struct tda18218_priv priv, u8 reg, u8 val, u8 len)
	74	{
	75	int ret;
f1baab87	76	u8 buf[MAX_XFER_SIZE]; /* we must start read always from reg 0x00 */
51ff2e2c AP	77	struct i2c_msg msg[2] = {
	78	{
	79	.addr = priv->cfg->i2c_address,
	80	.flags = 0,
	81	.len = 1,
	82	.buf = "\x00",
	83	}, {
	84	.addr = priv->cfg->i2c_address,
	85	.flags = I2C_M_RD,
f1baab87	86	.len = reg + len,
51ff2e2c AP	87	.buf = buf,
	88	}
	89	};
	90
f1baab87 MCC	91	if (reg + len > sizeof(buf)) {
	92	dev_warn(&priv->i2c->dev,
	93	"%s: i2c wr reg=%04x: len=%d is too big!\n",
	94	KBUILD_MODNAME, reg, len);
	95	return -EINVAL;
	96	}
	97
51ff2e2c AP	98	ret = i2c_transfer(priv->i2c, msg, 2);
	99	if (ret == 2) {
	100	memcpy(val, &buf[reg], len);
	101	ret = 0;
	102	} else {
9edd6987 AP	103	dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
9edd6987 AP	104	"len=%d\n", KBUILD_MODNAME, ret, reg, len);
51ff2e2c AP	105	ret = -EREMOTEIO;
	106	}
	107
	108	return ret;
	109	}
	110
	111	/* write single register */
	112	static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
	113	{
	114	return tda18218_wr_regs(priv, reg, &val, 1);
	115	}
	116
	117	/* read single register */
	118
	119	static int tda18218_rd_reg(struct tda18218_priv priv, u8 reg, u8 val)
	120	{
	121	return tda18218_rd_regs(priv, reg, val, 1);
	122	}
	123
14d24d14	124	static int tda18218_set_params(struct dvb_frontend *fe)
51ff2e2c AP	125	{
51ff2e2c AP	126	struct tda18218_priv *priv = fe->tuner_priv;
67ccfe3b MCC	127	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
67ccfe3b MCC	128	u32 bw = c->bandwidth_hz;
51ff2e2c AP	129	int ret;
	130	u8 buf[3], i, BP_Filter, LP_Fc;
	131	u32 LO_Frac;
	132	/* TODO: find out correct AGC algorithm */
	133	u8 agc[][2] = {
	134	{ R20_AGC11, 0x60 },
	135	{ R23_AGC21, 0x02 },
	136	{ R20_AGC11, 0xa0 },
	137	{ R23_AGC21, 0x09 },
	138	{ R20_AGC11, 0xe0 },
	139	{ R23_AGC21, 0x0c },
	140	{ R20_AGC11, 0x40 },
	141	{ R23_AGC21, 0x01 },
	142	{ R20_AGC11, 0x80 },
	143	{ R23_AGC21, 0x08 },
	144	{ R20_AGC11, 0xc0 },
	145	{ R23_AGC21, 0x0b },
	146	{ R24_AGC22, 0x1c },
	147	{ R24_AGC22, 0x0c },
	148	};
	149
	150	if (fe->ops.i2c_gate_ctrl)
	151	fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
	152
	153	/* low-pass filter cut-off frequency */
67ccfe3b	154	if (bw <= 6000000) {
51ff2e2c	155	LP_Fc = 0;
b4d48c94	156	priv->if_frequency = 3000000;
67ccfe3b	157	} else if (bw <= 7000000) {
51ff2e2c	158	LP_Fc = 1;
522fdf73	159	priv->if_frequency = 3500000;
67ccfe3b	160	} else {
51ff2e2c	161	LP_Fc = 2;
522fdf73	162	priv->if_frequency = 4000000;
51ff2e2c AP	163	}
51ff2e2c AP	164
67ccfe3b	165	LO_Frac = c->frequency + priv->if_frequency;
522fdf73	166
51ff2e2c AP	167	/* band-pass filter */
	168	if (LO_Frac < 188000000)
	169	BP_Filter = 3;
	170	else if (LO_Frac < 253000000)
	171	BP_Filter = 4;
	172	else if (LO_Frac < 343000000)
	173	BP_Filter = 5;
	174	else
	175	BP_Filter = 6;
	176
	177	buf[0] = (priv->regs[R1A_IF1] & ~7) \| BP_Filter; /* BP_Filter */
	178	buf[1] = (priv->regs[R1B_IF2] & ~3) \| LP_Fc; /* LP_Fc */
	179	buf[2] = priv->regs[R1C_AGC2B];
	180	ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
	181	if (ret)
	182	goto error;
	183
	184	buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
	185	buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
	186	buf[2] = (LO_Frac / 1000) << 4 \|
	187	(priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
	188	ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
	189	if (ret)
	190	goto error;
	191
	192	buf[0] = priv->regs[R0F_MD8] \| (1 << 6); /* Freq_prog_Start */
	193	ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
	194	if (ret)
	195	goto error;
	196
	197	buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
	198	ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
	199	if (ret)
	200	goto error;
	201
	202	/* trigger AGC */
	203	for (i = 0; i < ARRAY_SIZE(agc); i++) {
	204	ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
	205	if (ret)
	206	goto error;
	207	}
	208
	209	error:
	210	if (fe->ops.i2c_gate_ctrl)
	211	fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
	212
	213	if (ret)
9edd6987	214	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
51ff2e2c AP	215
	216	return ret;
	217	}
	218
522fdf73 AP	219	static int tda18218_get_if_frequency(struct dvb_frontend fe, u32 frequency)
	220	{
	221	struct tda18218_priv *priv = fe->tuner_priv;
	222	*frequency = priv->if_frequency;
9edd6987	223	dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d\n", __func__, *frequency);
522fdf73 AP	224	return 0;
	225	}
	226
51ff2e2c AP	227	static int tda18218_sleep(struct dvb_frontend *fe)
	228	{
	229	struct tda18218_priv *priv = fe->tuner_priv;
	230	int ret;
	231
	232	if (fe->ops.i2c_gate_ctrl)
	233	fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
	234
	235	/* standby */
	236	ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] \| (1 << 0));
	237
	238	if (fe->ops.i2c_gate_ctrl)
	239	fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
	240
	241	if (ret)
9edd6987	242	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
51ff2e2c AP	243
	244	return ret;
	245	}
	246
	247	static int tda18218_init(struct dvb_frontend *fe)
	248	{
	249	struct tda18218_priv *priv = fe->tuner_priv;
	250	int ret;
	251
	252	/* TODO: calibrations */
	253
	254	if (fe->ops.i2c_gate_ctrl)
	255	fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
	256
	257	ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);
	258
	259	if (fe->ops.i2c_gate_ctrl)
	260	fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
	261
	262	if (ret)
9edd6987	263	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
51ff2e2c AP	264
	265	return ret;
	266	}
	267
	268	static int tda18218_release(struct dvb_frontend *fe)
	269	{
	270	kfree(fe->tuner_priv);
	271	fe->tuner_priv = NULL;
	272	return 0;
	273	}
	274
	275	static const struct dvb_tuner_ops tda18218_tuner_ops = {
	276	.info = {
	277	.name = "NXP TDA18218",
	278
	279	.frequency_min = 174000000,
	280	.frequency_max = 864000000,
	281	.frequency_step = 1000,
	282	},
	283
	284	.release = tda18218_release,
	285	.init = tda18218_init,
	286	.sleep = tda18218_sleep,
	287
	288	.set_params = tda18218_set_params,
522fdf73 AP	289
522fdf73 AP	290	.get_if_frequency = tda18218_get_if_frequency,
51ff2e2c AP	291	};
	292
	293	struct dvb_frontend tda18218_attach(struct dvb_frontend fe,
	294	struct i2c_adapter i2c, struct tda18218_config cfg)
	295	{
	296	struct tda18218_priv *priv = NULL;
ed2e3301	297	u8 val;
51ff2e2c AP	298	int ret;
	299	/* chip default registers values */
	300	static u8 def_regs[] = {
	301	0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
	302	0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
	303	0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
	304	0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
	305	0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
	306	0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
	307	};
	308
	309	priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
	310	if (priv == NULL)
	311	return NULL;
	312
	313	priv->cfg = cfg;
	314	priv->i2c = i2c;
	315	fe->tuner_priv = priv;
	316
	317	if (fe->ops.i2c_gate_ctrl)
	318	fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
	319
	320	/* check if the tuner is there */
	321	ret = tda18218_rd_reg(priv, R00_ID, &val);
ed2e3301 PB	322	if (!ret)
ed2e3301 PB	323	dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val);
51ff2e2c AP	324	if (ret \|\| val != def_regs[R00_ID]) {
	325	kfree(priv);
	326	return NULL;
	327	}
	328
9edd6987 AP	329	dev_info(&priv->i2c->dev,
	330	"%s: NXP TDA18218HN successfully identified\n",
	331	KBUILD_MODNAME);
51ff2e2c AP	332
	333	memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
	334	sizeof(struct dvb_tuner_ops));
	335	memcpy(priv->regs, def_regs, sizeof(def_regs));
	336
	337	/* loop-through enabled chip default register values */
	338	if (priv->cfg->loop_through) {
	339	priv->regs[R17_PD1] = 0xb0;
	340	priv->regs[R18_PD2] = 0x59;
	341	}
	342
	343	/* standby */
	344	ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] \| (1 << 0));
	345	if (ret)
9edd6987	346	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
51ff2e2c AP	347
	348	if (fe->ops.i2c_gate_ctrl)
	349	fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
	350
	351	return fe;
	352	}
	353	EXPORT_SYMBOL(tda18218_attach);
	354
	355	MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
	356	MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
	357	MODULE_LICENSE("GPL");