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Merge branch 'stacking-fixes' (vfs stacking fixes from Jann)
[deliverable/linux.git] / drivers / media / tuners / tda18271-fe.c
CommitLineData
5bea1cd3 1/*
6ca04de3 2 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
5bea1cd3 3
59067f7e 4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5bea1cd3
MK		 5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
5bea1cd3
MK		 21#include <linux/delay.h>
22#include <linux/videodev2.h>
6ca04de3 23#include "tda18271-priv.h"
1bacb2df 24#include "tda8290.h"
5bea1cd3 25
b5f3e1e1 26int tda18271_debug;
54465b08 27module_param_named(debug, tda18271_debug, int, 0644);
0e1fab90 28MODULE_PARM_DESC(debug, "set debug level "
cf04d29c 29 "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
5bea1cd3 30
81016b49 31static int tda18271_cal_on_startup = -1;
0f96251e
MK		 32module_param_named(cal, tda18271_cal_on_startup, int, 0644);
33MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
34
a4f263b5 35static DEFINE_MUTEX(tda18271_list_mutex);
f9e315a1 36static LIST_HEAD(hybrid_tuner_instance_list);
a4f263b5 37
5bea1cd3
MK		 38/*---------------------------------------------------------------------*/
39
4240b460
MK		 40static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
41{
42 struct tda18271_priv *priv = fe->tuner_priv;
43
44 int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
45 priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
46 priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
47
48 if (tda_fail(ret))
49 goto fail;
50
51 tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n",
52 standby ? "standby" : "active",
53 priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
54 priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
55fail:
56 return ret;
57}
58
59/*---------------------------------------------------------------------*/
60
868f5ccd
MK		 61static inline int charge_pump_source(struct dvb_frontend *fe, int force)
62{
63 struct tda18271_priv *priv = fe->tuner_priv;
64 return tda18271_charge_pump_source(fe,
65 (priv->role == TDA18271_SLAVE) ?
66 TDA18271_CAL_PLL :
67 TDA18271_MAIN_PLL, force);
68}
69
44e645c2
MK		 70static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
71{
72 struct tda18271_priv *priv = fe->tuner_priv;
73 unsigned char *regs = priv->tda18271_regs;
74
75 switch (priv->mode) {
76 case TDA18271_ANALOG:
77 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
78 break;
79 case TDA18271_DIGITAL:
80 regs[R_MPD] |= 0x80; /* IF notch = 1 */
81 break;
82 }
83}
84
255b5113 85static int tda18271_channel_configuration(struct dvb_frontend *fe,
c293d0a7
MK		 86 struct tda18271_std_map_item *map,
87 u32 freq, u32 bw)
255b5113
MK		 88{
89 struct tda18271_priv *priv = fe->tuner_priv;
90 unsigned char *regs = priv->tda18271_regs;
31940e39 91 int ret;
255b5113
MK		 92 u32 N;
93
94 /* update TV broadcast parameters */
95
96 /* set standard */
97 regs[R_EP3] &= ~0x1f; /* clear std bits */
7f7203df 98 regs[R_EP3] |= (map->agc_mode << 3) | map->std;
255b5113 99
51858d13
MK		 100 if (priv->id == TDA18271HDC2) {
101 /* set rfagc to high speed mode */
102 regs[R_EP3] &= ~0x04;
103 }
40194b2b 104
255b5113
MK		 105 /* set cal mode to normal */
106 regs[R_EP4] &= ~0x03;
107
44e645c2 108 /* update IF output level */
255b5113 109 regs[R_EP4] &= ~0x1c; /* clear if level bits */
14c74b23 110 regs[R_EP4] |= (map->if_lvl << 2);
255b5113 111
c293d0a7
MK		 112 /* update FM_RFn */
113 regs[R_EP4] &= ~0x80;
114 regs[R_EP4] |= map->fm_rfn << 7;
255b5113 115
c0dc0c11
MK		 116 /* update rf top / if top */
117 regs[R_EB22] = 0x00;
118 regs[R_EB22] |= map->rfagc_top;
31940e39 119 ret = tda18271_write_regs(fe, R_EB22, 1);
4bd5d107 120 if (tda_fail(ret))
31940e39 121 goto fail;
255b5113
MK		 122
123 /* --------------------------------------------------------------- */
124
125 /* disable Power Level Indicator */
126 regs[R_EP1] |= 0x40;
127
7ae1ac4c
MK		 128 /* make sure thermometer is off */
129 regs[R_TM] &= ~0x10;
130
255b5113
MK		 131 /* frequency dependent parameters */
132
133 tda18271_calc_ir_measure(fe, &freq);
134
135 tda18271_calc_bp_filter(fe, &freq);
136
137 tda18271_calc_rf_band(fe, &freq);
138
139 tda18271_calc_gain_taper(fe, &freq);
140
141 /* --------------------------------------------------------------- */
142
143 /* dual tuner and agc1 extra configuration */
144
868f5ccd
MK		 145 switch (priv->role) {
146 case TDA18271_MASTER:
147 regs[R_EB1] |= 0x04; /* main vco */
148 break;
149 case TDA18271_SLAVE:
150 regs[R_EB1] &= ~0x04; /* cal vco */
151 break;
152 }
255b5113
MK		 153
154 /* agc1 always active */
155 regs[R_EB1] &= ~0x02;
156
157 /* agc1 has priority on agc2 */
158 regs[R_EB1] &= ~0x01;
159
31940e39 160 ret = tda18271_write_regs(fe, R_EB1, 1);
4bd5d107 161 if (tda_fail(ret))
31940e39 162 goto fail;
255b5113
MK		 163
164 /* --------------------------------------------------------------- */
165
c293d0a7 166 N = map->if_freq * 1000 + freq;
255b5113 167
868f5ccd
MK		 168 switch (priv->role) {
169 case TDA18271_MASTER:
170 tda18271_calc_main_pll(fe, N);
44e645c2 171 tda18271_set_if_notch(fe);
868f5ccd
MK		 172 tda18271_write_regs(fe, R_MPD, 4);
173 break;
174 case TDA18271_SLAVE:
175 tda18271_calc_cal_pll(fe, N);
176 tda18271_write_regs(fe, R_CPD, 4);
177
178 regs[R_MPD] = regs[R_CPD] & 0x7f;
44e645c2 179 tda18271_set_if_notch(fe);
868f5ccd
MK		 180 tda18271_write_regs(fe, R_MPD, 1);
181 break;
182 }
255b5113 183
31940e39 184 ret = tda18271_write_regs(fe, R_TM, 7);
4bd5d107 185 if (tda_fail(ret))
31940e39 186 goto fail;
255b5113 187
868f5ccd
MK		 188 /* force charge pump source */
189 charge_pump_source(fe, 1);
255b5113
MK		 190
191 msleep(1);
192
868f5ccd
MK		 193 /* return pll to normal operation */
194 charge_pump_source(fe, 0);
255b5113 195
40194b2b
MK		 196 msleep(20);
197
51858d13
MK		 198 if (priv->id == TDA18271HDC2) {
199 /* set rfagc to normal speed mode */
200 if (map->fm_rfn)
201 regs[R_EP3] &= ~0x04;
202 else
203 regs[R_EP3] |= 0x04;
204 ret = tda18271_write_regs(fe, R_EP3, 1);
205 }
31940e39
MK		 206fail:
207 return ret;
255b5113
MK		 208}
209
210static int tda18271_read_thermometer(struct dvb_frontend *fe)
211{
212 struct tda18271_priv *priv = fe->tuner_priv;
213 unsigned char *regs = priv->tda18271_regs;
214 int tm;
215
216 /* switch thermometer on */
217 regs[R_TM] |= 0x10;
218 tda18271_write_regs(fe, R_TM, 1);
219
220 /* read thermometer info */
221 tda18271_read_regs(fe);
222
223 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
224 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
225
226 if ((regs[R_TM] & 0x20) == 0x20)
227 regs[R_TM] &= ~0x20;
228 else
229 regs[R_TM] |= 0x20;
230
231 tda18271_write_regs(fe, R_TM, 1);
232
233 msleep(10); /* temperature sensing */
234
235 /* read thermometer info */
236 tda18271_read_regs(fe);
237 }
238
239 tm = tda18271_lookup_thermometer(fe);
240
241 /* switch thermometer off */
242 regs[R_TM] &= ~0x10;
243 tda18271_write_regs(fe, R_TM, 1);
244
245 /* set CAL mode to normal */
246 regs[R_EP4] &= ~0x03;
247 tda18271_write_regs(fe, R_EP4, 1);
248
249 return tm;
250}
251
12afe378
MK		 252/* ------------------------------------------------------------------ */
253
d1c53424
MK		 254static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
255 u32 freq)
255b5113
MK		 256{
257 struct tda18271_priv *priv = fe->tuner_priv;
258 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
259 unsigned char *regs = priv->tda18271_regs;
3a6b49fe
MK		 260 int i, ret;
261 u8 tm_current, dc_over_dt, rf_tab;
262 s32 rfcal_comp, approx;
255b5113
MK		 263
264 /* power up */
20f42063 265 ret = tda18271_set_standby_mode(fe, 0, 0, 0);
4bd5d107 266 if (tda_fail(ret))
20f42063 267 goto fail;
255b5113
MK		 268
269 /* read die current temperature */
270 tm_current = tda18271_read_thermometer(fe);
271
272 /* frequency dependent parameters */
273
274 tda18271_calc_rf_cal(fe, &freq);
275 rf_tab = regs[R_EB14];
276
277 i = tda18271_lookup_rf_band(fe, &freq, NULL);
4bd5d107
MK		 278 if (tda_fail(i))
279 return i;
255b5113
MK		 280
281 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
3a6b49fe
MK		 282 approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
283 map[i].rf_b1 + rf_tab;
255b5113 284 } else {
3a6b49fe
MK		 285 approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
286 map[i].rf_b2 + rf_tab;
255b5113
MK		 287 }
288
289 if (approx < 0)
290 approx = 0;
291 if (approx > 255)
292 approx = 255;
293
294 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
295
296 /* calculate temperature compensation */
3a6b49fe 297 rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
255b5113 298
3a6b49fe 299 regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
20f42063
MK		 300 ret = tda18271_write_regs(fe, R_EB14, 1);
301fail:
302 return ret;
255b5113
MK		 303}
304
305static int tda18271_por(struct dvb_frontend *fe)
306{
307 struct tda18271_priv *priv = fe->tuner_priv;
308 unsigned char *regs = priv->tda18271_regs;
24124f78 309 int ret;
255b5113
MK		 310
311 /* power up detector 1 */
312 regs[R_EB12] &= ~0x20;
24124f78 313 ret = tda18271_write_regs(fe, R_EB12, 1);
4bd5d107 314 if (tda_fail(ret))
24124f78 315 goto fail;
255b5113
MK		 316
317 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
318 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
24124f78 319 ret = tda18271_write_regs(fe, R_EB18, 1);
4bd5d107 320 if (tda_fail(ret))
24124f78 321 goto fail;
255b5113
MK		 322
323 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
324
325 /* POR mode */
24124f78 326 ret = tda18271_set_standby_mode(fe, 1, 0, 0);
4bd5d107 327 if (tda_fail(ret))
24124f78 328 goto fail;
255b5113
MK		 329
330 /* disable 1.5 MHz low pass filter */
331 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
332 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
24124f78
MK		 333 ret = tda18271_write_regs(fe, R_EB21, 3);
334fail:
335 return ret;
255b5113
MK		 336}
337
338static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
339{
340 struct tda18271_priv *priv = fe->tuner_priv;
341 unsigned char *regs = priv->tda18271_regs;
342 u32 N;
343
344 /* set CAL mode to normal */
345 regs[R_EP4] &= ~0x03;
346 tda18271_write_regs(fe, R_EP4, 1);
347
348 /* switch off agc1 */
349 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
350
351 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
352 tda18271_write_regs(fe, R_EB18, 1);
353
354 /* frequency dependent parameters */
355
356 tda18271_calc_bp_filter(fe, &freq);
357 tda18271_calc_gain_taper(fe, &freq);
358 tda18271_calc_rf_band(fe, &freq);
359 tda18271_calc_km(fe, &freq);
360
361 tda18271_write_regs(fe, R_EP1, 3);
362 tda18271_write_regs(fe, R_EB13, 1);
363
364 /* main pll charge pump source */
4efb0ca5 365 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
255b5113
MK		 366
367 /* cal pll charge pump source */
4efb0ca5 368 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
255b5113
MK		 369
370 /* force dcdc converter to 0 V */
371 regs[R_EB14] = 0x00;
372 tda18271_write_regs(fe, R_EB14, 1);
373
374 /* disable plls lock */
375 regs[R_EB20] &= ~0x20;
376 tda18271_write_regs(fe, R_EB20, 1);
377
378 /* set CAL mode to RF tracking filter calibration */
379 regs[R_EP4] |= 0x03;
380 tda18271_write_regs(fe, R_EP4, 2);
381
382 /* --------------------------------------------------------------- */
383
384 /* set the internal calibration signal */
385 N = freq;
386
ae07d042
MK		 387 tda18271_calc_cal_pll(fe, N);
388 tda18271_write_regs(fe, R_CPD, 4);
255b5113
MK		 389
390 /* downconvert internal calibration */
391 N += 1000000;
392
393 tda18271_calc_main_pll(fe, N);
394 tda18271_write_regs(fe, R_MPD, 4);
395
396 msleep(5);
397
398 tda18271_write_regs(fe, R_EP2, 1);
399 tda18271_write_regs(fe, R_EP1, 1);
400 tda18271_write_regs(fe, R_EP2, 1);
401 tda18271_write_regs(fe, R_EP1, 1);
402
403 /* --------------------------------------------------------------- */
404
405 /* normal operation for the main pll */
4efb0ca5 406 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
255b5113
MK		 407
408 /* normal operation for the cal pll */
4efb0ca5 409 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
255b5113 410
ae07d042 411 msleep(10); /* plls locking */
255b5113
MK		 412
413 /* launch the rf tracking filters calibration */
414 regs[R_EB20] |= 0x20;
415 tda18271_write_regs(fe, R_EB20, 1);
416
417 msleep(60); /* calibration */
418
419 /* --------------------------------------------------------------- */
420
421 /* set CAL mode to normal */
422 regs[R_EP4] &= ~0x03;
423
424 /* switch on agc1 */
425 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
426
427 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
428 tda18271_write_regs(fe, R_EB18, 1);
429
430 tda18271_write_regs(fe, R_EP3, 2);
431
432 /* synchronization */
433 tda18271_write_regs(fe, R_EP1, 1);
434
435 /* get calibration result */
436 tda18271_read_extended(fe);
437
438 return regs[R_EB14];
439}
440
441static int tda18271_powerscan(struct dvb_frontend *fe,
442 u32 *freq_in, u32 *freq_out)
443{
444 struct tda18271_priv *priv = fe->tuner_priv;
445 unsigned char *regs = priv->tda18271_regs;
24124f78 446 int sgn, bcal, count, wait, ret;
255b5113
MK		 447 u8 cid_target;
448 u16 count_limit;
449 u32 freq;
450
451 freq = *freq_in;
452
453 tda18271_calc_rf_band(fe, &freq);
454 tda18271_calc_rf_cal(fe, &freq);
455 tda18271_calc_gain_taper(fe, &freq);
456 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
457
458 tda18271_write_regs(fe, R_EP2, 1);
459 tda18271_write_regs(fe, R_EB14, 1);
460
461 /* downconvert frequency */
462 freq += 1000000;
463
464 tda18271_calc_main_pll(fe, freq);
465 tda18271_write_regs(fe, R_MPD, 4);
466
467 msleep(5); /* pll locking */
468
469 /* detection mode */
470 regs[R_EP4] &= ~0x03;
471 regs[R_EP4] |= 0x01;
472 tda18271_write_regs(fe, R_EP4, 1);
473
474 /* launch power detection measurement */
475 tda18271_write_regs(fe, R_EP2, 1);
476
477 /* read power detection info, stored in EB10 */
24124f78 478 ret = tda18271_read_extended(fe);
4bd5d107 479 if (tda_fail(ret))
24124f78 480 return ret;
255b5113
MK		 481
482 /* algorithm initialization */
483 sgn = 1;
484 *freq_out = *freq_in;
485 bcal = 0;
486 count = 0;
487 wait = false;
488
489 while ((regs[R_EB10] & 0x3f) < cid_target) {
490 /* downconvert updated freq to 1 MHz */
491 freq = *freq_in + (sgn * count) + 1000000;
492
493 tda18271_calc_main_pll(fe, freq);
494 tda18271_write_regs(fe, R_MPD, 4);
495
496 if (wait) {
497 msleep(5); /* pll locking */
498 wait = false;
499 } else
500 udelay(100); /* pll locking */
501
502 /* launch power detection measurement */
503 tda18271_write_regs(fe, R_EP2, 1);
504
505 /* read power detection info, stored in EB10 */
24124f78 506 ret = tda18271_read_extended(fe);
4bd5d107 507 if (tda_fail(ret))
24124f78 508 return ret;
255b5113
MK		 509
510 count += 200;
511
e7809a07 512 if (count <= count_limit)
255b5113
MK		 513 continue;
514
515 if (sgn <= 0)
516 break;
517
518 sgn = -1 * sgn;
519 count = 200;
520 wait = true;
521 }
522
523 if ((regs[R_EB10] & 0x3f) >= cid_target) {
524 bcal = 1;
525 *freq_out = freq - 1000000;
526 } else
527 bcal = 0;
528
cf04d29c 529 tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
255b5113
MK		 530 bcal, *freq_in, *freq_out, freq);
531
532 return bcal;
533}
534
535static int tda18271_powerscan_init(struct dvb_frontend *fe)
536{
537 struct tda18271_priv *priv = fe->tuner_priv;
538 unsigned char *regs = priv->tda18271_regs;
24124f78 539 int ret;
255b5113
MK		 540
541 /* set standard to digital */
542 regs[R_EP3] &= ~0x1f; /* clear std bits */
543 regs[R_EP3] |= 0x12;
544
545 /* set cal mode to normal */
546 regs[R_EP4] &= ~0x03;
547
44e645c2 548 /* update IF output level */
255b5113
MK		 549 regs[R_EP4] &= ~0x1c; /* clear if level bits */
550
24124f78 551 ret = tda18271_write_regs(fe, R_EP3, 2);
4bd5d107 552 if (tda_fail(ret))
24124f78 553 goto fail;
255b5113
MK		 554
555 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
24124f78 556 ret = tda18271_write_regs(fe, R_EB18, 1);
4bd5d107 557 if (tda_fail(ret))
24124f78 558 goto fail;
255b5113
MK		 559
560 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
561
562 /* 1.5 MHz low pass filter */
563 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
564 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
565
24124f78
MK		 566 ret = tda18271_write_regs(fe, R_EB21, 3);
567fail:
568 return ret;
255b5113
MK		 569}
570
571static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
572{
573 struct tda18271_priv *priv = fe->tuner_priv;
574 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
575 unsigned char *regs = priv->tda18271_regs;
576 int bcal, rf, i;
3986bd11 577 s32 divisor, dividend;
255b5113
MK		 578#define RF1 0
579#define RF2 1
580#define RF3 2
581 u32 rf_default[3];
582 u32 rf_freq[3];
381ad0ea
MK		 583 s32 prog_cal[3];
584 s32 prog_tab[3];
255b5113
MK		 585
586 i = tda18271_lookup_rf_band(fe, &freq, NULL);
587
4bd5d107 588 if (tda_fail(i))
255b5113
MK		 589 return i;
590
591 rf_default[RF1] = 1000 * map[i].rf1_def;
592 rf_default[RF2] = 1000 * map[i].rf2_def;
593 rf_default[RF3] = 1000 * map[i].rf3_def;
594
595 for (rf = RF1; rf <= RF3; rf++) {
596 if (0 == rf_default[rf])
597 return 0;
cf04d29c 598 tda_cal("freq = %d, rf = %d\n", freq, rf);
255b5113
MK		 599
600 /* look for optimized calibration frequency */
601 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
4bd5d107 602 if (tda_fail(bcal))
24124f78 603 return bcal;
255b5113
MK		 604
605 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
381ad0ea 606 prog_tab[rf] = (s32)regs[R_EB14];
255b5113
MK		 607
608 if (1 == bcal)
381ad0ea
MK		 609 prog_cal[rf] =
610 (s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
255b5113
MK		 611 else
612 prog_cal[rf] = prog_tab[rf];
613
614 switch (rf) {
615 case RF1:
616 map[i].rf_a1 = 0;
381ad0ea 617 map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
255b5113
MK		 618 map[i].rf1 = rf_freq[RF1] / 1000;
619 break;
620 case RF2:
381ad0ea
MK		 621 dividend = (prog_cal[RF2] - prog_tab[RF2] -
622 prog_cal[RF1] + prog_tab[RF1]);
3986bd11
MK		 623 divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
624 map[i].rf_a1 = (dividend / divisor);
255b5113
MK		 625 map[i].rf2 = rf_freq[RF2] / 1000;
626 break;
627 case RF3:
381ad0ea
MK		 628 dividend = (prog_cal[RF3] - prog_tab[RF3] -
629 prog_cal[RF2] + prog_tab[RF2]);
3986bd11
MK		 630 divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
631 map[i].rf_a2 = (dividend / divisor);
381ad0ea 632 map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
255b5113
MK		 633 map[i].rf3 = rf_freq[RF3] / 1000;
634 break;
635 default:
636 BUG();
637 }
638 }
639
640 return 0;
641}
642
09f83c4f 643static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
255b5113
MK		 644{
645 struct tda18271_priv *priv = fe->tuner_priv;
646 unsigned int i;
24124f78 647 int ret;
255b5113
MK		 648
649 tda_info("tda18271: performing RF tracking filter calibration\n");
650
651 /* wait for die temperature stabilization */
652 msleep(200);
653
24124f78 654 ret = tda18271_powerscan_init(fe);
4bd5d107 655 if (tda_fail(ret))
24124f78 656 goto fail;
255b5113
MK		 657
658 /* rf band calibration */
c151c32f
MK		 659 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
660 ret =
255b5113
MK		 661 tda18271_rf_tracking_filters_init(fe, 1000 *
662 priv->rf_cal_state[i].rfmax);
4bd5d107 663 if (tda_fail(ret))
c151c32f
MK		 664 goto fail;
665 }
255b5113 666
09f83c4f 667 priv->tm_rfcal = tda18271_read_thermometer(fe);
24124f78
MK		 668fail:
669 return ret;
255b5113
MK		 670}
671
672/* ------------------------------------------------------------------ */
673
12afe378 674static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
255b5113
MK		 675{
676 struct tda18271_priv *priv = fe->tuner_priv;
839c6c96 677 unsigned char *regs = priv->tda18271_regs;
24124f78 678 int ret;
839c6c96
MK		 679
680 /* test RF_CAL_OK to see if we need init */
681 if ((regs[R_EP1] & 0x10) == 0)
682 priv->cal_initialized = false;
255b5113
MK		 683
684 if (priv->cal_initialized)
685 return 0;
686
24124f78 687 ret = tda18271_calc_rf_filter_curve(fe);
4bd5d107 688 if (tda_fail(ret))
24124f78 689 goto fail;
255b5113 690
24124f78 691 ret = tda18271_por(fe);
4bd5d107 692 if (tda_fail(ret))
24124f78 693 goto fail;
255b5113 694
6bfa6657
MK		 695 tda_info("tda18271: RF tracking filter calibration complete\n");
696
255b5113 697 priv->cal_initialized = true;
c151c32f 698 goto end;
24124f78 699fail:
c151c32f
MK		 700 tda_info("tda18271: RF tracking filter calibration failed!\n");
701end:
24124f78 702 return ret;
255b5113
MK		 703}
704
4d2d42bc
MK		 705static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
706 u32 freq, u32 bw)
5bea1cd3
MK		 707{
708 struct tda18271_priv *priv = fe->tuner_priv;
709 unsigned char *regs = priv->tda18271_regs;
10ed0bf4 710 int ret;
fe0bf6d7 711 u32 N = 0;
5bea1cd3 712
255b5113 713 /* calculate bp filter */
b92bf0f6 714 tda18271_calc_bp_filter(fe, &freq);
5bea1cd3
MK		 715 tda18271_write_regs(fe, R_EP1, 1);
716
717 regs[R_EB4] &= 0x07;
718 regs[R_EB4] |= 0x60;
719 tda18271_write_regs(fe, R_EB4, 1);
720
721 regs[R_EB7] = 0x60;
722 tda18271_write_regs(fe, R_EB7, 1);
723
724 regs[R_EB14] = 0x00;
725 tda18271_write_regs(fe, R_EB14, 1);
726
727 regs[R_EB20] = 0xcc;
728 tda18271_write_regs(fe, R_EB20, 1);
729
255b5113 730 /* set cal mode to RF tracking filter calibration */
26501a70 731 regs[R_EP4] |= 0x03;
5bea1cd3 732
255b5113 733 /* calculate cal pll */
5bea1cd3
MK		 734
735 switch (priv->mode) {
736 case TDA18271_ANALOG:
737 N = freq - 1250000;
738 break;
739 case TDA18271_DIGITAL:
740 N = freq + bw / 2;
741 break;
742 }
743
fe0bf6d7 744 tda18271_calc_cal_pll(fe, N);
5bea1cd3 745
255b5113 746 /* calculate main pll */
5bea1cd3
MK		 747
748 switch (priv->mode) {
749 case TDA18271_ANALOG:
750 N = freq - 250000;
751 break;
752 case TDA18271_DIGITAL:
753 N = freq + bw / 2 + 1000000;
754 break;
755 }
756
fe0bf6d7 757 tda18271_calc_main_pll(fe, N);
5bea1cd3 758
10ed0bf4 759 ret = tda18271_write_regs(fe, R_EP3, 11);
4bd5d107 760 if (tda_fail(ret))
10ed0bf4
MK		 761 return ret;
762
5bea1cd3
MK		 763 msleep(5); /* RF tracking filter calibration initialization */
764
255b5113 765 /* search for K,M,CO for RF calibration */
b92bf0f6 766 tda18271_calc_km(fe, &freq);
5bea1cd3
MK		 767 tda18271_write_regs(fe, R_EB13, 1);
768
255b5113 769 /* search for rf band */
b92bf0f6 770 tda18271_calc_rf_band(fe, &freq);
5bea1cd3 771
255b5113 772 /* search for gain taper */
b92bf0f6 773 tda18271_calc_gain_taper(fe, &freq);
5bea1cd3
MK		 774
775 tda18271_write_regs(fe, R_EP2, 1);
776 tda18271_write_regs(fe, R_EP1, 1);
777 tda18271_write_regs(fe, R_EP2, 1);
778 tda18271_write_regs(fe, R_EP1, 1);
779
780 regs[R_EB4] &= 0x07;
781 regs[R_EB4] |= 0x40;
782 tda18271_write_regs(fe, R_EB4, 1);
783
784 regs[R_EB7] = 0x40;
785 tda18271_write_regs(fe, R_EB7, 1);
4d2d42bc 786 msleep(10); /* pll locking */
5bea1cd3
MK		 787
788 regs[R_EB20] = 0xec;
789 tda18271_write_regs(fe, R_EB20, 1);
790 msleep(60); /* RF tracking filter calibration completion */
791
792 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
793 tda18271_write_regs(fe, R_EP4, 1);
794
795 tda18271_write_regs(fe, R_EP1, 1);
796
b92bf0f6
MK		 797 /* RF tracking filter correction for VHF_Low band */
798 if (0 == tda18271_calc_rf_cal(fe, &freq))
5bea1cd3 799 tda18271_write_regs(fe, R_EB14, 1);
5bea1cd3 800
4d2d42bc
MK		 801 return 0;
802}
803
d1c53424
MK		 804/* ------------------------------------------------------------------ */
805
12afe378
MK		 806static int tda18271_ir_cal_init(struct dvb_frontend *fe)
807{
808 struct tda18271_priv *priv = fe->tuner_priv;
809 unsigned char *regs = priv->tda18271_regs;
d35fccaf 810 int ret;
12afe378 811
d35fccaf 812 ret = tda18271_read_regs(fe);
4bd5d107 813 if (tda_fail(ret))
d35fccaf 814 goto fail;
12afe378
MK		 815
816 /* test IR_CAL_OK to see if we need init */
817 if ((regs[R_EP1] & 0x08) == 0)
d35fccaf
MK		 818 ret = tda18271_init_regs(fe);
819fail:
820 return ret;
12afe378
MK		 821}
822
823static int tda18271_init(struct dvb_frontend *fe)
824{
825 struct tda18271_priv *priv = fe->tuner_priv;
d35fccaf 826 int ret;
12afe378
MK		 827
828 mutex_lock(&priv->lock);
829
4240b460 830 /* full power up */
d35fccaf 831 ret = tda18271_set_standby_mode(fe, 0, 0, 0);
4bd5d107 832 if (tda_fail(ret))
d35fccaf 833 goto fail;
12afe378
MK		 834
835 /* initialization */
d35fccaf 836 ret = tda18271_ir_cal_init(fe);
4bd5d107 837 if (tda_fail(ret))
d35fccaf 838 goto fail;
12afe378
MK		 839
840 if (priv->id == TDA18271HDC2)
841 tda18271c2_rf_cal_init(fe);
d35fccaf 842fail:
12afe378
MK		 843 mutex_unlock(&priv->lock);
844
d35fccaf 845 return ret;
12afe378
MK		 846}
847
cc7e26d4
MK		 848static int tda18271_sleep(struct dvb_frontend *fe)
849{
850 struct tda18271_priv *priv = fe->tuner_priv;
851 int ret;
852
853 mutex_lock(&priv->lock);
854
855 /* enter standby mode, with required output features enabled */
856 ret = tda18271_toggle_output(fe, 1);
857
858 mutex_unlock(&priv->lock);
859
860 return ret;
861}
862
adcc4b3e
MK		 863/* ------------------------------------------------------------------ */
864
865static int tda18271_agc(struct dvb_frontend *fe)
866{
867 struct tda18271_priv *priv = fe->tuner_priv;
868 int ret = 0;
869
870 switch (priv->config) {
1bacb2df 871 case TDA8290_LNA_OFF:
ecda4273
MK		 872 /* no external agc configuration required */
873 if (tda18271_debug & DBG_ADV)
874 tda_dbg("no agc configuration provided\n");
adcc4b3e 875 break;
1bacb2df 876 case TDA8290_LNA_ON_BRIDGE:
adcc4b3e
MK		 877 /* switch with GPIO of saa713x */
878 tda_dbg("invoking callback\n");
879 if (fe->callback)
880 ret = fe->callback(priv->i2c_props.adap->algo_data,
881 DVB_FRONTEND_COMPONENT_TUNER,
882 TDA18271_CALLBACK_CMD_AGC_ENABLE,
883 priv->mode);
884 break;
1bacb2df
OZ		 885 case TDA8290_LNA_GP0_HIGH_ON:
886 case TDA8290_LNA_GP0_HIGH_OFF:
adcc4b3e
MK		 887 default:
888 /* n/a - currently not supported */
889 tda_err("unsupported configuration: %d\n", priv->config);
890 ret = -EINVAL;
891 break;
892 }
893 return ret;
894}
895
d1c53424 896static int tda18271_tune(struct dvb_frontend *fe,
c293d0a7 897 struct tda18271_std_map_item *map, u32 freq, u32 bw)
4d2d42bc
MK		 898{
899 struct tda18271_priv *priv = fe->tuner_priv;
d35fccaf 900 int ret;
4d2d42bc 901
7f7203df
MK		 902 tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
903 freq, map->if_freq, bw, map->agc_mode, map->std);
d1c53424 904
adcc4b3e
MK		 905 ret = tda18271_agc(fe);
906 if (tda_fail(ret))
907 tda_warn("failed to configure agc\n");
908
d35fccaf 909 ret = tda18271_init(fe);
4bd5d107 910 if (tda_fail(ret))
d35fccaf 911 goto fail;
4d2d42bc
MK		 912
913 mutex_lock(&priv->lock);
914
ccbac9bb
MK		 915 switch (priv->id) {
916 case TDA18271HDC1:
d1c53424 917 tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
ccbac9bb
MK		 918 break;
919 case TDA18271HDC2:
d1c53424 920 tda18271c2_rf_tracking_filters_correction(fe, freq);
ccbac9bb
MK		 921 break;
922 }
31940e39 923 ret = tda18271_channel_configuration(fe, map, freq, bw);
d1c53424
MK		 924
925 mutex_unlock(&priv->lock);
d35fccaf
MK		 926fail:
927 return ret;
ccbac9bb
MK		 928}
929
5bea1cd3
MK		 930/* ------------------------------------------------------------------ */
931
14d24d14 932static int tda18271_set_params(struct dvb_frontend *fe)
5bea1cd3 933{
5ca1c94d
MCC		 934 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
935 u32 delsys = c->delivery_system;
936 u32 bw = c->bandwidth_hz;
937 u32 freq = c->frequency;
5bea1cd3 938 struct tda18271_priv *priv = fe->tuner_priv;
f21e0d7f 939 struct tda18271_std_map *std_map = &priv->std;
c293d0a7 940 struct tda18271_std_map_item *map;
ccbac9bb 941 int ret;
5bea1cd3
MK		 942
943 priv->mode = TDA18271_DIGITAL;
944
5ca1c94d
MCC		 945 switch (delsys) {
946 case SYS_ATSC:
947 map = &std_map->atsc_6;
5bea1cd3 948 bw = 6000000;
5ca1c94d 949 break;
083b6b8a 950 case SYS_ISDBT:
5ca1c94d
MCC		 951 case SYS_DVBT:
952 case SYS_DVBT2:
953 if (bw <= 6000000) {
c293d0a7 954 map = &std_map->dvbt_6;
5ca1c94d 955 } else if (bw <= 7000000) {
c293d0a7 956 map = &std_map->dvbt_7;
5ca1c94d 957 } else {
c293d0a7 958 map = &std_map->dvbt_8;
5bea1cd3 959 }
5ca1c94d
MCC		 960 break;
961 case SYS_DVBC_ANNEX_B:
962 bw = 6000000;
963 /* falltrough */
964 case SYS_DVBC_ANNEX_A:
965 case SYS_DVBC_ANNEX_C:
966 if (bw <= 6000000) {
967 map = &std_map->qam_6;
968 } else if (bw <= 7000000) {
969 map = &std_map->qam_7;
5ca1c94d
MCC		 970 } else {
971 map = &std_map->qam_8;
5ca1c94d
MCC		 972 }
973 break;
974 default:
182519f4 975 tda_warn("modulation type not supported!\n");
5bea1cd3
MK		 976 return -EINVAL;
977 }
978
ed73683f
MK		 979 /* When tuning digital, the analog demod must be tri-stated */
980 if (fe->ops.analog_ops.standby)
981 fe->ops.analog_ops.standby(fe);
982
c293d0a7 983 ret = tda18271_tune(fe, map, freq, bw);
ccbac9bb 984
4bd5d107 985 if (tda_fail(ret))
ccbac9bb
MK		 986 goto fail;
987
8c8ee113 988 priv->if_freq = map->if_freq;
ccbac9bb 989 priv->frequency = freq;
c6f56e7d 990 priv->bandwidth = bw;
ccbac9bb
MK		 991fail:
992 return ret;
5bea1cd3
MK		 993}
994
995static int tda18271_set_analog_params(struct dvb_frontend *fe,
996 struct analog_parameters *params)
997{
998 struct tda18271_priv *priv = fe->tuner_priv;
f21e0d7f 999 struct tda18271_std_map *std_map = &priv->std;
c293d0a7 1000 struct tda18271_std_map_item *map;
5bea1cd3 1001 char *mode;
c293d0a7 1002 int ret;
4d831787
MK		 1003 u32 freq = params->frequency * 125 *
1004 ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
5bea1cd3
MK		 1005
1006 priv->mode = TDA18271_ANALOG;
1007
c353f42f 1008 if (params->mode == V4L2_TUNER_RADIO) {
c293d0a7 1009 map = &std_map->fm_radio;
c353f42f
MK		 1010 mode = "fm";
1011 } else if (params->std & V4L2_STD_MN) {
c293d0a7 1012 map = &std_map->atv_mn;
5bea1cd3
MK		 1013 mode = "MN";
1014 } else if (params->std & V4L2_STD_B) {
c293d0a7 1015 map = &std_map->atv_b;
5bea1cd3
MK		 1016 mode = "B";
1017 } else if (params->std & V4L2_STD_GH) {
c293d0a7 1018 map = &std_map->atv_gh;
5bea1cd3
MK		 1019 mode = "GH";
1020 } else if (params->std & V4L2_STD_PAL_I) {
c293d0a7 1021 map = &std_map->atv_i;
5bea1cd3
MK		 1022 mode = "I";
1023 } else if (params->std & V4L2_STD_DK) {
c293d0a7 1024 map = &std_map->atv_dk;
5bea1cd3
MK		 1025 mode = "DK";
1026 } else if (params->std & V4L2_STD_SECAM_L) {
c293d0a7 1027 map = &std_map->atv_l;
5bea1cd3
MK		 1028 mode = "L";
1029 } else if (params->std & V4L2_STD_SECAM_LC) {
c293d0a7 1030 map = &std_map->atv_lc;
95af8a26 1031 mode = "L'";
5bea1cd3 1032 } else {
c293d0a7 1033 map = &std_map->atv_i;
5bea1cd3
MK		 1034 mode = "xx";
1035 }
1036
182519f4 1037 tda_dbg("setting tda18271 to system %s\n", mode);
5bea1cd3 1038
c293d0a7 1039 ret = tda18271_tune(fe, map, freq, 0);
ccbac9bb 1040
4bd5d107 1041 if (tda_fail(ret))
ccbac9bb
MK		 1042 goto fail;
1043
8c8ee113 1044 priv->if_freq = map->if_freq;
ccbac9bb
MK		 1045 priv->frequency = freq;
1046 priv->bandwidth = 0;
1047fail:
1048 return ret;
5bea1cd3
MK		 1049}
1050
1051static int tda18271_release(struct dvb_frontend *fe)
1052{
a4f263b5
MK		 1053 struct tda18271_priv *priv = fe->tuner_priv;
1054
1055 mutex_lock(&tda18271_list_mutex);
1056
f9e315a1
MK		 1057 if (priv)
1058 hybrid_tuner_release_state(priv);
a4f263b5 1059
a4f263b5
MK		 1060 mutex_unlock(&tda18271_list_mutex);
1061
5bea1cd3 1062 fe->tuner_priv = NULL;
a4f263b5 1063
5bea1cd3
MK		 1064 return 0;
1065}
1066
1067static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1068{
1069 struct tda18271_priv *priv = fe->tuner_priv;
1070 *frequency = priv->frequency;
1071 return 0;
1072}
1073
1074static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1075{
1076 struct tda18271_priv *priv = fe->tuner_priv;
1077 *bandwidth = priv->bandwidth;
1078 return 0;
1079}
1080
8c8ee113
MK		 1081static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1082{
1083 struct tda18271_priv *priv = fe->tuner_priv;
1084 *frequency = (u32)priv->if_freq * 1000;
1085 return 0;
1086}
1087
f21e0d7f
MK		 1088/* ------------------------------------------------------------------ */
1089
1090#define tda18271_update_std(std_cfg, name) do { \
7f7203df 1091 if (map->std_cfg.if_freq + \
c735372f
MK		 1092 map->std_cfg.agc_mode + map->std_cfg.std + \
1093 map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
f21e0d7f
MK		 1094 tda_dbg("Using custom std config for %s\n", name); \
1095 memcpy(&std->std_cfg, &map->std_cfg, \
1096 sizeof(struct tda18271_std_map_item)); \
1097 } } while (0)
1098
1099#define tda18271_dump_std_item(std_cfg, name) do { \
c735372f
MK		 1100 tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
1101 "if_lvl = %d, rfagc_top = 0x%02x\n", \
7f7203df 1102 name, std->std_cfg.if_freq, \
c735372f
MK		 1103 std->std_cfg.agc_mode, std->std_cfg.std, \
1104 std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
f21e0d7f
MK		 1105 } while (0)
1106
1107static int tda18271_dump_std_map(struct dvb_frontend *fe)
1108{
1109 struct tda18271_priv *priv = fe->tuner_priv;
1110 struct tda18271_std_map *std = &priv->std;
1111
1112 tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
c735372f
MK		 1113 tda18271_dump_std_item(fm_radio, " fm ");
1114 tda18271_dump_std_item(atv_b, "atv b ");
1115 tda18271_dump_std_item(atv_dk, "atv dk");
1116 tda18271_dump_std_item(atv_gh, "atv gh");
1117 tda18271_dump_std_item(atv_i, "atv i ");
1118 tda18271_dump_std_item(atv_l, "atv l ");
1119 tda18271_dump_std_item(atv_lc, "atv l'");
f21e0d7f
MK		 1120 tda18271_dump_std_item(atv_mn, "atv mn");
1121 tda18271_dump_std_item(atsc_6, "atsc 6");
1122 tda18271_dump_std_item(dvbt_6, "dvbt 6");
1123 tda18271_dump_std_item(dvbt_7, "dvbt 7");
1124 tda18271_dump_std_item(dvbt_8, "dvbt 8");
c735372f 1125 tda18271_dump_std_item(qam_6, "qam 6 ");
4e791048 1126 tda18271_dump_std_item(qam_7, "qam 7 ");
c735372f 1127 tda18271_dump_std_item(qam_8, "qam 8 ");
f21e0d7f
MK		 1128
1129 return 0;
1130}
1131
1132static int tda18271_update_std_map(struct dvb_frontend *fe,
1133 struct tda18271_std_map *map)
1134{
1135 struct tda18271_priv *priv = fe->tuner_priv;
1136 struct tda18271_std_map *std = &priv->std;
1137
1138 if (!map)
1139 return -EINVAL;
1140
c353f42f 1141 tda18271_update_std(fm_radio, "fm");
f21e0d7f
MK		 1142 tda18271_update_std(atv_b, "atv b");
1143 tda18271_update_std(atv_dk, "atv dk");
1144 tda18271_update_std(atv_gh, "atv gh");
1145 tda18271_update_std(atv_i, "atv i");
1146 tda18271_update_std(atv_l, "atv l");
1147 tda18271_update_std(atv_lc, "atv l'");
1148 tda18271_update_std(atv_mn, "atv mn");
1149 tda18271_update_std(atsc_6, "atsc 6");
1150 tda18271_update_std(dvbt_6, "dvbt 6");
1151 tda18271_update_std(dvbt_7, "dvbt 7");
1152 tda18271_update_std(dvbt_8, "dvbt 8");
1153 tda18271_update_std(qam_6, "qam 6");
4e791048 1154 tda18271_update_std(qam_7, "qam 7");
f21e0d7f
MK		 1155 tda18271_update_std(qam_8, "qam 8");
1156
1157 return 0;
1158}
1159
49e7aaf0
MK		 1160static int tda18271_get_id(struct dvb_frontend *fe)
1161{
1162 struct tda18271_priv *priv = fe->tuner_priv;
1163 unsigned char *regs = priv->tda18271_regs;
1164 char *name;
351d1878 1165 int ret;
49e7aaf0 1166
8d316bf5 1167 mutex_lock(&priv->lock);
351d1878 1168 ret = tda18271_read_regs(fe);
8d316bf5 1169 mutex_unlock(&priv->lock);
49e7aaf0 1170
351d1878
MK		 1171 if (ret) {
1172 tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
1173 i2c_adapter_id(priv->i2c_props.adap),
1174 priv->i2c_props.addr);
1175 return -EIO;
1176 }
1177
49e7aaf0
MK		 1178 switch (regs[R_ID] & 0x7f) {
1179 case 3:
1180 name = "TDA18271HD/C1";
255b5113 1181 priv->id = TDA18271HDC1;
49e7aaf0
MK		 1182 break;
1183 case 4:
1184 name = "TDA18271HD/C2";
255b5113 1185 priv->id = TDA18271HDC2;
49e7aaf0
MK		 1186 break;
1187 default:
bfc3d57f
MCC		 1188 tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
1189 regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
1190 priv->i2c_props.addr);
1191 return -EINVAL;
49e7aaf0
MK		 1192 }
1193
bfc3d57f
MCC		 1194 tda_info("%s detected @ %d-%04x\n", name,
1195 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
49e7aaf0 1196
bfc3d57f 1197 return 0;
49e7aaf0
MK		 1198}
1199
c54e1dde
MK		 1200static int tda18271_setup_configuration(struct dvb_frontend *fe,
1201 struct tda18271_config *cfg)
42f9a03e
MK		 1202{
1203 struct tda18271_priv *priv = fe->tuner_priv;
42f9a03e
MK		 1204
1205 priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
1206 priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
1207 priv->config = (cfg) ? cfg->config : 0;
1208 priv->small_i2c = (cfg) ?
1209 cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
1210 priv->output_opt = (cfg) ?
1211 cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
1212
42f9a03e
MK		 1213 return 0;
1214}
1215
5881ecfc
MK		 1216static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
1217{
1218 /* tda18271_cal_on_startup == -1 when cal module option is unset */
1219 return ((tda18271_cal_on_startup == -1) ?
1220 /* honor configuration setting */
1221 ((cfg) && (cfg->rf_cal_on_startup)) :
1222 /* module option overrides configuration setting */
1223 (tda18271_cal_on_startup)) ? 1 : 0;
1224}
1225
c54e1dde
MK		 1226static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
1227{
1228 struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
c54e1dde
MK		 1229
1230 tda18271_setup_configuration(fe, cfg);
1231
5881ecfc 1232 if (tda18271_need_cal_on_startup(cfg))
c54e1dde
MK		 1233 tda18271_init(fe);
1234
972aacc2
MK		 1235 /* override default std map with values in config struct */
1236 if ((cfg) && (cfg->std_map))
1237 tda18271_update_std_map(fe, cfg->std_map);
1238
c54e1dde
MK		 1239 return 0;
1240}
1241
0b8bd83c 1242static const struct dvb_tuner_ops tda18271_tuner_ops = {
5bea1cd3
MK		 1243 .info = {
1244 .name = "NXP TDA18271HD",
1245 .frequency_min = 45000000,
1246 .frequency_max = 864000000,
1247 .frequency_step = 62500
1248 },
efce8410 1249 .init = tda18271_init,
518d8739 1250 .sleep = tda18271_sleep,
5bea1cd3
MK		 1251 .set_params = tda18271_set_params,
1252 .set_analog_params = tda18271_set_analog_params,
1253 .release = tda18271_release,
42f9a03e 1254 .set_config = tda18271_set_config,
5bea1cd3
MK		 1255 .get_frequency = tda18271_get_frequency,
1256 .get_bandwidth = tda18271_get_bandwidth,
8c8ee113 1257 .get_if_frequency = tda18271_get_if_frequency,
5bea1cd3
MK		 1258};
1259
1260struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
e435f95c 1261 struct i2c_adapter *i2c,
f21e0d7f 1262 struct tda18271_config *cfg)
5bea1cd3
MK		 1263{
1264 struct tda18271_priv *priv = NULL;
fab9bfbe 1265 int instance, ret;
a4f263b5
MK		 1266
1267 mutex_lock(&tda18271_list_mutex);
1268
f9e315a1
MK		 1269 instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
1270 hybrid_tuner_instance_list,
1271 i2c, addr, "tda18271");
1272 switch (instance) {
1273 case 0:
1274 goto fail;
f9e315a1
MK		 1275 case 1:
1276 /* new tuner instance */
42f9a03e
MK		 1277 fe->tuner_priv = priv;
1278
c54e1dde 1279 tda18271_setup_configuration(fe, cfg);
81016b49 1280
a4f263b5
MK		 1281 priv->cal_initialized = false;
1282 mutex_init(&priv->lock);
5bea1cd3 1283
fab9bfbe
MK		 1284 ret = tda18271_get_id(fe);
1285 if (tda_fail(ret))
a4f263b5 1286 goto fail;
49e7aaf0 1287
fab9bfbe
MK		 1288 ret = tda18271_assign_map_layout(fe);
1289 if (tda_fail(ret))
a4f263b5 1290 goto fail;
255b5113 1291
6b82e0cf
MK		 1292 /* if delay_cal is set, delay IR & RF calibration until init()
1293 * module option 'cal' overrides this delay */
1294 if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
1295 break;
1296
a4f263b5
MK		 1297 mutex_lock(&priv->lock);
1298 tda18271_init_regs(fe);
0f96251e 1299
5881ecfc
MK		 1300 if ((tda18271_need_cal_on_startup(cfg)) &&
1301 (priv->id == TDA18271HDC2))
12afe378 1302 tda18271c2_rf_cal_init(fe);
0f96251e 1303
4cfae675
MK		 1304 /* enter standby mode, with required output features enabled */
1305 ret = tda18271_toggle_output(fe, 1);
1306 tda_fail(ret);
1307
a4f263b5 1308 mutex_unlock(&priv->lock);
f9e315a1
MK		 1309 break;
1310 default:
1311 /* existing tuner instance */
1312 fe->tuner_priv = priv;
1313
d5abef6b
MK		 1314 /* allow dvb driver to override configuration settings */
1315 if (cfg) {
1316 if (cfg->gate != TDA18271_GATE_ANALOG)
1317 priv->gate = cfg->gate;
1318 if (cfg->role)
1319 priv->role = cfg->role;
1320 if (cfg->config)
1321 priv->config = cfg->config;
1322 if (cfg->small_i2c)
1323 priv->small_i2c = cfg->small_i2c;
1324 if (cfg->output_opt)
1325 priv->output_opt = cfg->output_opt;
42f9a03e
MK		 1326 if (cfg->std_map)
1327 tda18271_update_std_map(fe, cfg->std_map);
d5abef6b 1328 }
5881ecfc 1329 if (tda18271_need_cal_on_startup(cfg))
188ea058 1330 tda18271_init(fe);
f9e315a1 1331 break;
a4f263b5 1332 }
5bea1cd3 1333
972aacc2
MK		 1334 /* override default std map with values in config struct */
1335 if ((cfg) && (cfg->std_map))
1336 tda18271_update_std_map(fe, cfg->std_map);
1337
a4f263b5 1338 mutex_unlock(&tda18271_list_mutex);
8d316bf5 1339
a4f263b5
MK		 1340 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1341 sizeof(struct dvb_tuner_ops));
efce8410 1342
c735372f 1343 if (tda18271_debug & (DBG_MAP | DBG_ADV))
a4f263b5 1344 tda18271_dump_std_map(fe);
8d316bf5 1345
5bea1cd3 1346 return fe;
49e7aaf0 1347fail:
a4f263b5
MK		 1348 mutex_unlock(&tda18271_list_mutex);
1349
49e7aaf0
MK		 1350 tda18271_release(fe);
1351 return NULL;
5bea1cd3
MK		 1352}
1353EXPORT_SYMBOL_GPL(tda18271_attach);
1354MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1355MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1356MODULE_LICENSE("GPL");
5abaa530 1357MODULE_VERSION("0.4");
Linux kernel - Deliverables
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