Commit | Line | Data |
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6cb45879 MCC |
1 | /* tuner-xc2028 |
2 | * | |
33e53161 | 3 | * Copyright (c) 2007-2008 Mauro Carvalho Chehab (mchehab@infradead.org) |
983d214e | 4 | * |
701672eb ML |
5 | * Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com) |
6 | * - frontend interface | |
983d214e | 7 | * |
6cb45879 MCC |
8 | * This code is placed under the terms of the GNU General Public License v2 |
9 | */ | |
10 | ||
11 | #include <linux/i2c.h> | |
12 | #include <asm/div64.h> | |
13 | #include <linux/firmware.h> | |
ab0b9fc6 | 14 | #include <linux/videodev2.h> |
6cb45879 | 15 | #include <linux/delay.h> |
701672eb | 16 | #include <media/tuner.h> |
3b20532c | 17 | #include <linux/mutex.h> |
5a0e3ad6 | 18 | #include <linux/slab.h> |
84a9f336 | 19 | #include <asm/unaligned.h> |
215b95ba | 20 | #include "tuner-i2c.h" |
6cb45879 | 21 | #include "tuner-xc2028.h" |
de3fe21b | 22 | #include "tuner-xc2028-types.h" |
6cb45879 | 23 | |
701672eb ML |
24 | #include <linux/dvb/frontend.h> |
25 | #include "dvb_frontend.h" | |
26 | ||
56ac0337 MCC |
27 | /* Max transfer size done by I2C transfer functions */ |
28 | #define MAX_XFER_SIZE 80 | |
29 | ||
304bce41 MS |
30 | /* Registers (Write-only) */ |
31 | #define XREG_INIT 0x00 | |
32 | #define XREG_RF_FREQ 0x02 | |
33 | #define XREG_POWER_DOWN 0x08 | |
34 | ||
35 | /* Registers (Read-only) */ | |
36 | #define XREG_FREQ_ERROR 0x01 | |
37 | #define XREG_LOCK 0x02 | |
38 | #define XREG_VERSION 0x04 | |
39 | #define XREG_PRODUCT_ID 0x08 | |
40 | #define XREG_HSYNC_FREQ 0x10 | |
41 | #define XREG_FRAME_LINES 0x20 | |
42 | #define XREG_SNR 0x40 | |
43 | ||
44 | #define XREG_ADC_ENV 0x0100 | |
ef8c1888 | 45 | |
83fb340b MCC |
46 | static int debug; |
47 | module_param(debug, int, 0644); | |
48 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
49 | ||
74a89b2a MCC |
50 | static int no_poweroff; |
51 | module_param(no_poweroff, int, 0644); | |
4900877b | 52 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" |
74a89b2a MCC |
53 | "1 keep device energized and with tuner ready all the times.\n" |
54 | " Faster, but consumes more power and keeps the device hotter\n"); | |
55 | ||
a82200fb MCC |
56 | static char audio_std[8]; |
57 | module_param_string(audio_std, audio_std, sizeof(audio_std), 0); | |
58 | MODULE_PARM_DESC(audio_std, | |
59 | "Audio standard. XC3028 audio decoder explicitly " | |
60 | "needs to know what audio\n" | |
61 | "standard is needed for some video standards with audio A2 or NICAM.\n" | |
62 | "The valid values are:\n" | |
63 | "A2\n" | |
64 | "A2/A\n" | |
65 | "A2/B\n" | |
66 | "NICAM\n" | |
67 | "NICAM/A\n" | |
68 | "NICAM/B\n"); | |
69 | ||
4327b77e | 70 | static char firmware_name[30]; |
5c913c05 MCC |
71 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); |
72 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " | |
73 | "default firmware name\n"); | |
74 | ||
c663d035 | 75 | static LIST_HEAD(hybrid_tuner_instance_list); |
aa501be9 CP |
76 | static DEFINE_MUTEX(xc2028_list_mutex); |
77 | ||
de3fe21b MCC |
78 | /* struct for storing firmware table */ |
79 | struct firmware_description { | |
80 | unsigned int type; | |
81 | v4l2_std_id id; | |
66c2d53d | 82 | __u16 int_freq; |
de3fe21b MCC |
83 | unsigned char *ptr; |
84 | unsigned int size; | |
85 | }; | |
6cb45879 | 86 | |
e0f0b37a CP |
87 | struct firmware_properties { |
88 | unsigned int type; | |
89 | v4l2_std_id id; | |
90 | v4l2_std_id std_req; | |
66c2d53d | 91 | __u16 int_freq; |
e0f0b37a CP |
92 | unsigned int scode_table; |
93 | int scode_nr; | |
94 | }; | |
95 | ||
61a96113 MCC |
96 | enum xc2028_state { |
97 | XC2028_NO_FIRMWARE = 0, | |
98 | XC2028_WAITING_FIRMWARE, | |
99 | XC2028_ACTIVE, | |
100 | XC2028_SLEEP, | |
101 | XC2028_NODEV, | |
102 | }; | |
103 | ||
6cb45879 | 104 | struct xc2028_data { |
c663d035 | 105 | struct list_head hybrid_tuner_instance_list; |
215b95ba | 106 | struct tuner_i2c_props i2c_props; |
de3fe21b MCC |
107 | __u32 frequency; |
108 | ||
61a96113 MCC |
109 | enum xc2028_state state; |
110 | const char *fname; | |
111 | ||
de3fe21b MCC |
112 | struct firmware_description *firm; |
113 | int firm_size; | |
06fd82dc | 114 | __u16 firm_version; |
de3fe21b | 115 | |
8bf799a6 CP |
116 | __u16 hwmodel; |
117 | __u16 hwvers; | |
118 | ||
de3fe21b | 119 | struct xc2028_ctrl ctrl; |
215b95ba | 120 | |
e0f0b37a | 121 | struct firmware_properties cur_fw; |
215b95ba MCC |
122 | |
123 | struct mutex lock; | |
6cb45879 MCC |
124 | }; |
125 | ||
47cc5b78 CP |
126 | #define i2c_send(priv, buf, size) ({ \ |
127 | int _rc; \ | |
128 | _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \ | |
129 | if (size != _rc) \ | |
130 | tuner_info("i2c output error: rc = %d (should be %d)\n",\ | |
131 | _rc, (int)size); \ | |
70ca3c4b DH |
132 | if (priv->ctrl.msleep) \ |
133 | msleep(priv->ctrl.msleep); \ | |
47cc5b78 CP |
134 | _rc; \ |
135 | }) | |
136 | ||
7d58d111 CP |
137 | #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \ |
138 | int _rc; \ | |
139 | _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \ | |
140 | ibuf, isize); \ | |
141 | if (isize != _rc) \ | |
142 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ | |
143 | _rc, (int)isize); \ | |
70ca3c4b DH |
144 | if (priv->ctrl.msleep) \ |
145 | msleep(priv->ctrl.msleep); \ | |
7d58d111 CP |
146 | _rc; \ |
147 | }) | |
148 | ||
47cc5b78 | 149 | #define send_seq(priv, data...) ({ \ |
215b95ba | 150 | static u8 _val[] = data; \ |
47cc5b78 | 151 | int _rc; \ |
6cb45879 | 152 | if (sizeof(_val) != \ |
47cc5b78 | 153 | (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \ |
215b95ba | 154 | _val, sizeof(_val)))) { \ |
47cc5b78 | 155 | tuner_err("Error on line %d: %d\n", __LINE__, _rc); \ |
70ca3c4b | 156 | } else if (priv->ctrl.msleep) \ |
e5cc2bf4 | 157 | msleep(priv->ctrl.msleep); \ |
47cc5b78 CP |
158 | _rc; \ |
159 | }) | |
6cb45879 | 160 | |
83244025 | 161 | static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val) |
6cb45879 | 162 | { |
b873e1a3 | 163 | unsigned char buf[2]; |
7d58d111 | 164 | unsigned char ibuf[2]; |
215b95ba | 165 | |
7e28adb2 | 166 | tuner_dbg("%s %04x called\n", __func__, reg); |
6cb45879 | 167 | |
7d58d111 | 168 | buf[0] = reg >> 8; |
80b52208 | 169 | buf[1] = (unsigned char) reg; |
6cb45879 | 170 | |
7d58d111 CP |
171 | if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2) |
172 | return -EIO; | |
6cb45879 | 173 | |
7d58d111 CP |
174 | *val = (ibuf[1]) | (ibuf[0] << 8); |
175 | return 0; | |
6cb45879 MCC |
176 | } |
177 | ||
e0262688 | 178 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
29bec0bf | 179 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
43efe702 | 180 | { |
c56019fc | 181 | if (type & BASE) |
43efe702 | 182 | printk("BASE "); |
c56019fc | 183 | if (type & INIT1) |
f380e1d2 | 184 | printk("INIT1 "); |
c56019fc | 185 | if (type & F8MHZ) |
43efe702 | 186 | printk("F8MHZ "); |
c56019fc | 187 | if (type & MTS) |
43efe702 | 188 | printk("MTS "); |
c56019fc | 189 | if (type & D2620) |
43efe702 | 190 | printk("D2620 "); |
c56019fc | 191 | if (type & D2633) |
43efe702 | 192 | printk("D2633 "); |
c56019fc | 193 | if (type & DTV6) |
43efe702 | 194 | printk("DTV6 "); |
c56019fc | 195 | if (type & QAM) |
43efe702 | 196 | printk("QAM "); |
c56019fc | 197 | if (type & DTV7) |
43efe702 | 198 | printk("DTV7 "); |
c56019fc | 199 | if (type & DTV78) |
43efe702 | 200 | printk("DTV78 "); |
c56019fc | 201 | if (type & DTV8) |
43efe702 | 202 | printk("DTV8 "); |
c56019fc | 203 | if (type & FM) |
43efe702 | 204 | printk("FM "); |
c56019fc | 205 | if (type & INPUT1) |
43efe702 | 206 | printk("INPUT1 "); |
c56019fc | 207 | if (type & LCD) |
43efe702 | 208 | printk("LCD "); |
c56019fc | 209 | if (type & NOGD) |
43efe702 | 210 | printk("NOGD "); |
c56019fc | 211 | if (type & MONO) |
43efe702 | 212 | printk("MONO "); |
c56019fc | 213 | if (type & ATSC) |
43efe702 | 214 | printk("ATSC "); |
c56019fc | 215 | if (type & IF) |
43efe702 | 216 | printk("IF "); |
c56019fc | 217 | if (type & LG60) |
43efe702 | 218 | printk("LG60 "); |
c56019fc | 219 | if (type & ATI638) |
43efe702 | 220 | printk("ATI638 "); |
c56019fc | 221 | if (type & OREN538) |
43efe702 | 222 | printk("OREN538 "); |
c56019fc | 223 | if (type & OREN36) |
43efe702 | 224 | printk("OREN36 "); |
c56019fc | 225 | if (type & TOYOTA388) |
43efe702 | 226 | printk("TOYOTA388 "); |
c56019fc | 227 | if (type & TOYOTA794) |
43efe702 | 228 | printk("TOYOTA794 "); |
c56019fc | 229 | if (type & DIBCOM52) |
43efe702 | 230 | printk("DIBCOM52 "); |
c56019fc | 231 | if (type & ZARLINK456) |
43efe702 | 232 | printk("ZARLINK456 "); |
c56019fc | 233 | if (type & CHINA) |
43efe702 | 234 | printk("CHINA "); |
c56019fc | 235 | if (type & F6MHZ) |
43efe702 | 236 | printk("F6MHZ "); |
c56019fc | 237 | if (type & INPUT2) |
43efe702 | 238 | printk("INPUT2 "); |
c56019fc | 239 | if (type & SCODE) |
43efe702 | 240 | printk("SCODE "); |
c56019fc | 241 | if (type & HAS_IF) |
e0262688 | 242 | printk("HAS_IF_%d ", int_freq); |
43efe702 MCC |
243 | } |
244 | ||
ef8c1888 | 245 | static v4l2_std_id parse_audio_std_option(void) |
a82200fb | 246 | { |
e155d908 | 247 | if (strcasecmp(audio_std, "A2") == 0) |
a82200fb | 248 | return V4L2_STD_A2; |
e155d908 | 249 | if (strcasecmp(audio_std, "A2/A") == 0) |
a82200fb | 250 | return V4L2_STD_A2_A; |
e155d908 | 251 | if (strcasecmp(audio_std, "A2/B") == 0) |
a82200fb | 252 | return V4L2_STD_A2_B; |
e155d908 | 253 | if (strcasecmp(audio_std, "NICAM") == 0) |
a82200fb | 254 | return V4L2_STD_NICAM; |
e155d908 | 255 | if (strcasecmp(audio_std, "NICAM/A") == 0) |
a82200fb | 256 | return V4L2_STD_NICAM_A; |
e155d908 | 257 | if (strcasecmp(audio_std, "NICAM/B") == 0) |
a82200fb MCC |
258 | return V4L2_STD_NICAM_B; |
259 | ||
260 | return 0; | |
261 | } | |
262 | ||
61a96113 MCC |
263 | static int check_device_status(struct xc2028_data *priv) |
264 | { | |
265 | switch (priv->state) { | |
266 | case XC2028_NO_FIRMWARE: | |
267 | case XC2028_WAITING_FIRMWARE: | |
268 | return -EAGAIN; | |
269 | case XC2028_ACTIVE: | |
2276bf70 | 270 | return 1; |
61a96113 MCC |
271 | case XC2028_SLEEP: |
272 | return 0; | |
273 | case XC2028_NODEV: | |
274 | return -ENODEV; | |
275 | } | |
276 | return 0; | |
277 | } | |
278 | ||
ab0b9fc6 | 279 | static void free_firmware(struct xc2028_data *priv) |
6cb45879 | 280 | { |
de3fe21b | 281 | int i; |
92b75ab0 | 282 | tuner_dbg("%s called\n", __func__); |
de3fe21b MCC |
283 | |
284 | if (!priv->firm) | |
285 | return; | |
286 | ||
ab0b9fc6 MCC |
287 | for (i = 0; i < priv->firm_size; i++) |
288 | kfree(priv->firm[i].ptr); | |
289 | ||
de3fe21b MCC |
290 | kfree(priv->firm); |
291 | ||
ab0b9fc6 | 292 | priv->firm = NULL; |
06fd82dc | 293 | priv->firm_size = 0; |
61a96113 | 294 | priv->state = XC2028_NO_FIRMWARE; |
e0f0b37a CP |
295 | |
296 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
de3fe21b MCC |
297 | } |
298 | ||
61a96113 MCC |
299 | static int load_all_firmwares(struct dvb_frontend *fe, |
300 | const struct firmware *fw) | |
de3fe21b MCC |
301 | { |
302 | struct xc2028_data *priv = fe->tuner_priv; | |
c63e87e9 | 303 | const unsigned char *p, *endp; |
ab0b9fc6 MCC |
304 | int rc = 0; |
305 | int n, n_array; | |
de3fe21b | 306 | char name[33]; |
6cb45879 | 307 | |
7e28adb2 | 308 | tuner_dbg("%s called\n", __func__); |
215b95ba | 309 | |
ab0b9fc6 MCC |
310 | p = fw->data; |
311 | endp = p + fw->size; | |
6cb45879 | 312 | |
06fd82dc CP |
313 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
314 | tuner_err("Error: firmware file %s has invalid size!\n", | |
61a96113 | 315 | priv->fname); |
06fd82dc | 316 | goto corrupt; |
6cb45879 | 317 | } |
de3fe21b | 318 | |
ab0b9fc6 MCC |
319 | memcpy(name, p, sizeof(name) - 1); |
320 | name[sizeof(name) - 1] = 0; | |
321 | p += sizeof(name) - 1; | |
de3fe21b | 322 | |
84a9f336 | 323 | priv->firm_version = get_unaligned_le16(p); |
de3fe21b MCC |
324 | p += 2; |
325 | ||
84a9f336 | 326 | n_array = get_unaligned_le16(p); |
de3fe21b MCC |
327 | p += 2; |
328 | ||
06fd82dc | 329 | tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
61a96113 | 330 | n_array, priv->fname, name, |
06fd82dc | 331 | priv->firm_version >> 8, priv->firm_version & 0xff); |
de3fe21b | 332 | |
1b7acf0c | 333 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
06fd82dc CP |
334 | if (priv->firm == NULL) { |
335 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 336 | rc = -ENOMEM; |
06fd82dc | 337 | goto err; |
6cb45879 | 338 | } |
de3fe21b | 339 | priv->firm_size = n_array; |
06fd82dc | 340 | |
ab0b9fc6 MCC |
341 | n = -1; |
342 | while (p < endp) { | |
de3fe21b MCC |
343 | __u32 type, size; |
344 | v4l2_std_id id; | |
66c2d53d | 345 | __u16 int_freq = 0; |
de3fe21b MCC |
346 | |
347 | n++; | |
348 | if (n >= n_array) { | |
06fd82dc CP |
349 | tuner_err("More firmware images in file than " |
350 | "were expected!\n"); | |
de3fe21b MCC |
351 | goto corrupt; |
352 | } | |
353 | ||
354 | /* Checks if there's enough bytes to read */ | |
84a9f336 AV |
355 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) |
356 | goto header; | |
de3fe21b | 357 | |
84a9f336 | 358 | type = get_unaligned_le32(p); |
de3fe21b MCC |
359 | p += sizeof(type); |
360 | ||
84a9f336 | 361 | id = get_unaligned_le64(p); |
de3fe21b MCC |
362 | p += sizeof(id); |
363 | ||
66c2d53d | 364 | if (type & HAS_IF) { |
84a9f336 | 365 | int_freq = get_unaligned_le16(p); |
66c2d53d | 366 | p += sizeof(int_freq); |
84a9f336 AV |
367 | if (endp - p < sizeof(size)) |
368 | goto header; | |
66c2d53d MCC |
369 | } |
370 | ||
84a9f336 | 371 | size = get_unaligned_le32(p); |
de3fe21b MCC |
372 | p += sizeof(size); |
373 | ||
84a9f336 | 374 | if (!size || size > endp - p) { |
83fb340b | 375 | tuner_err("Firmware type "); |
43efe702 | 376 | dump_firm_type(type); |
ef8c1888 MCC |
377 | printk("(%x), id %llx is corrupted " |
378 | "(size=%d, expected %d)\n", | |
91240dd9 | 379 | type, (unsigned long long)id, |
ef8c1888 | 380 | (unsigned)(endp - p), size); |
de3fe21b MCC |
381 | goto corrupt; |
382 | } | |
383 | ||
ab0b9fc6 | 384 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); |
06fd82dc CP |
385 | if (priv->firm[n].ptr == NULL) { |
386 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 387 | rc = -ENOMEM; |
de3fe21b MCC |
388 | goto err; |
389 | } | |
06fd82dc CP |
390 | tuner_dbg("Reading firmware type "); |
391 | if (debug) { | |
e0262688 | 392 | dump_firm_type_and_int_freq(type, int_freq); |
06fd82dc | 393 | printk("(%x), id %llx, size=%d.\n", |
e0262688 | 394 | type, (unsigned long long)id, size); |
06fd82dc | 395 | } |
de3fe21b MCC |
396 | |
397 | memcpy(priv->firm[n].ptr, p, size); | |
398 | priv->firm[n].type = type; | |
399 | priv->firm[n].id = id; | |
400 | priv->firm[n].size = size; | |
66c2d53d | 401 | priv->firm[n].int_freq = int_freq; |
de3fe21b MCC |
402 | |
403 | p += size; | |
404 | } | |
405 | ||
ab0b9fc6 | 406 | if (n + 1 != priv->firm_size) { |
83fb340b | 407 | tuner_err("Firmware file is incomplete!\n"); |
de3fe21b MCC |
408 | goto corrupt; |
409 | } | |
410 | ||
411 | goto done; | |
412 | ||
84a9f336 AV |
413 | header: |
414 | tuner_err("Firmware header is incomplete!\n"); | |
de3fe21b | 415 | corrupt: |
ab0b9fc6 | 416 | rc = -EINVAL; |
83fb340b | 417 | tuner_err("Error: firmware file is corrupted!\n"); |
de3fe21b MCC |
418 | |
419 | err: | |
06fd82dc | 420 | tuner_info("Releasing partially loaded firmware file.\n"); |
de3fe21b MCC |
421 | free_firmware(priv); |
422 | ||
423 | done: | |
06fd82dc CP |
424 | if (rc == 0) |
425 | tuner_dbg("Firmware files loaded.\n"); | |
61a96113 MCC |
426 | else |
427 | priv->state = XC2028_NODEV; | |
de3fe21b MCC |
428 | |
429 | return rc; | |
430 | } | |
431 | ||
f380e1d2 MCC |
432 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
433 | v4l2_std_id *id) | |
de3fe21b MCC |
434 | { |
435 | struct xc2028_data *priv = fe->tuner_priv; | |
b1535293 | 436 | int i, best_i = -1, best_nr_matches = 0; |
33e53161 | 437 | unsigned int type_mask = 0; |
de3fe21b | 438 | |
7e28adb2 | 439 | tuner_dbg("%s called, want type=", __func__); |
b1535293 CP |
440 | if (debug) { |
441 | dump_firm_type(type); | |
442 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); | |
443 | } | |
de3fe21b MCC |
444 | |
445 | if (!priv->firm) { | |
83fb340b | 446 | tuner_err("Error! firmware not loaded\n"); |
de3fe21b MCC |
447 | return -EINVAL; |
448 | } | |
449 | ||
f380e1d2 | 450 | if (((type & ~SCODE) == 0) && (*id == 0)) |
ab0b9fc6 | 451 | *id = V4L2_STD_PAL; |
de3fe21b | 452 | |
e0f0b37a | 453 | if (type & BASE) |
33e53161 | 454 | type_mask = BASE_TYPES; |
ef207fed | 455 | else if (type & SCODE) { |
e0f0b37a | 456 | type &= SCODE_TYPES; |
33e53161 | 457 | type_mask = SCODE_TYPES & ~HAS_IF; |
ef207fed | 458 | } else if (type & DTV_TYPES) |
33e53161 | 459 | type_mask = DTV_TYPES; |
11a9eff9 | 460 | else if (type & STD_SPECIFIC_TYPES) |
33e53161 MCC |
461 | type_mask = STD_SPECIFIC_TYPES; |
462 | ||
463 | type &= type_mask; | |
464 | ||
8367fe24 | 465 | if (!(type & SCODE)) |
33e53161 | 466 | type_mask = ~0; |
e0f0b37a | 467 | |
de3fe21b | 468 | /* Seek for exact match */ |
ab0b9fc6 | 469 | for (i = 0; i < priv->firm_size; i++) { |
33e53161 | 470 | if ((type == (priv->firm[i].type & type_mask)) && |
ef207fed | 471 | (*id == priv->firm[i].id)) |
de3fe21b MCC |
472 | goto found; |
473 | } | |
474 | ||
475 | /* Seek for generic video standard match */ | |
ab0b9fc6 | 476 | for (i = 0; i < priv->firm_size; i++) { |
b1535293 CP |
477 | v4l2_std_id match_mask; |
478 | int nr_matches; | |
479 | ||
33e53161 | 480 | if (type != (priv->firm[i].type & type_mask)) |
b1535293 CP |
481 | continue; |
482 | ||
483 | match_mask = *id & priv->firm[i].id; | |
484 | if (!match_mask) | |
485 | continue; | |
486 | ||
487 | if ((*id & match_mask) == *id) | |
488 | goto found; /* Supports all the requested standards */ | |
489 | ||
490 | nr_matches = hweight64(match_mask); | |
491 | if (nr_matches > best_nr_matches) { | |
492 | best_nr_matches = nr_matches; | |
493 | best_i = i; | |
494 | } | |
495 | } | |
496 | ||
497 | if (best_nr_matches > 0) { | |
498 | tuner_dbg("Selecting best matching firmware (%d bits) for " | |
499 | "type=", best_nr_matches); | |
500 | dump_firm_type(type); | |
501 | printk("(%x), id %016llx:\n", type, (unsigned long long)*id); | |
502 | i = best_i; | |
503 | goto found; | |
de3fe21b MCC |
504 | } |
505 | ||
506 | /*FIXME: Would make sense to seek for type "hint" match ? */ | |
507 | ||
b1535293 | 508 | i = -ENOENT; |
f380e1d2 | 509 | goto ret; |
de3fe21b MCC |
510 | |
511 | found: | |
512 | *id = priv->firm[i].id; | |
de3fe21b | 513 | |
f380e1d2 | 514 | ret: |
b1535293 | 515 | tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found"); |
83fb340b MCC |
516 | if (debug) { |
517 | dump_firm_type(type); | |
91240dd9 | 518 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); |
83fb340b | 519 | } |
f380e1d2 MCC |
520 | return i; |
521 | } | |
522 | ||
d7cba043 MK |
523 | static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg) |
524 | { | |
525 | struct xc2028_data *priv = fe->tuner_priv; | |
526 | ||
527 | /* analog side (tuner-core) uses i2c_adap->algo_data. | |
528 | * digital side is not guaranteed to have algo_data defined. | |
529 | * | |
530 | * digital side will always have fe->dvb defined. | |
531 | * analog side (tuner-core) doesn't (yet) define fe->dvb. | |
532 | */ | |
533 | ||
534 | return (!fe->callback) ? -EINVAL : | |
535 | fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
536 | fe->dvb->priv : priv->i2c_props.adap->algo_data, | |
537 | DVB_FRONTEND_COMPONENT_TUNER, cmd, arg); | |
538 | } | |
539 | ||
f380e1d2 MCC |
540 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, |
541 | v4l2_std_id *id) | |
542 | { | |
543 | struct xc2028_data *priv = fe->tuner_priv; | |
544 | int pos, rc; | |
56ac0337 MCC |
545 | unsigned char *p, *endp, buf[MAX_XFER_SIZE]; |
546 | ||
547 | if (priv->ctrl.max_len > sizeof(buf)) | |
548 | priv->ctrl.max_len = sizeof(buf); | |
f380e1d2 | 549 | |
7e28adb2 | 550 | tuner_dbg("%s called\n", __func__); |
f380e1d2 MCC |
551 | |
552 | pos = seek_firmware(fe, type, id); | |
553 | if (pos < 0) | |
554 | return pos; | |
555 | ||
83fb340b | 556 | tuner_info("Loading firmware for type="); |
b1535293 CP |
557 | dump_firm_type(priv->firm[pos].type); |
558 | printk("(%x), id %016llx.\n", priv->firm[pos].type, | |
559 | (unsigned long long)*id); | |
83fb340b | 560 | |
f380e1d2 | 561 | p = priv->firm[pos].ptr; |
f380e1d2 | 562 | endp = p + priv->firm[pos].size; |
6cb45879 | 563 | |
ab0b9fc6 | 564 | while (p < endp) { |
de3fe21b MCC |
565 | __u16 size; |
566 | ||
567 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 568 | if (p + sizeof(size) > endp) { |
83fb340b | 569 | tuner_err("Firmware chunk size is wrong\n"); |
de3fe21b MCC |
570 | return -EINVAL; |
571 | } | |
572 | ||
84eeb0b4 | 573 | size = le16_to_cpu(*(__le16 *) p); |
de3fe21b MCC |
574 | p += sizeof(size); |
575 | ||
576 | if (size == 0xffff) | |
577 | return 0; | |
578 | ||
579 | if (!size) { | |
6cb45879 | 580 | /* Special callback command received */ |
d7cba043 | 581 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
ab0b9fc6 | 582 | if (rc < 0) { |
83fb340b | 583 | tuner_err("Error at RESET code %d\n", |
ab0b9fc6 | 584 | (*p) & 0x7f); |
de3fe21b | 585 | return -EINVAL; |
6cb45879 | 586 | } |
6cb45879 MCC |
587 | continue; |
588 | } | |
5403bbae ML |
589 | if (size >= 0xff00) { |
590 | switch (size) { | |
591 | case 0xff00: | |
d7cba043 | 592 | rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0); |
5403bbae ML |
593 | if (rc < 0) { |
594 | tuner_err("Error at RESET code %d\n", | |
595 | (*p) & 0x7f); | |
596 | return -EINVAL; | |
597 | } | |
b32f9fb9 | 598 | break; |
5403bbae ML |
599 | default: |
600 | tuner_info("Invalid RESET code %d\n", | |
601 | size & 0x7f); | |
602 | return -EINVAL; | |
603 | ||
604 | } | |
2d4c0ac6 | 605 | continue; |
5403bbae | 606 | } |
de3fe21b MCC |
607 | |
608 | /* Checks for a sleep command */ | |
609 | if (size & 0x8000) { | |
ab0b9fc6 | 610 | msleep(size & 0x7fff); |
de3fe21b | 611 | continue; |
6cb45879 MCC |
612 | } |
613 | ||
de3fe21b | 614 | if ((size + p > endp)) { |
83fb340b | 615 | tuner_err("missing bytes: need %d, have %d\n", |
ab0b9fc6 | 616 | size, (int)(endp - p)); |
de3fe21b MCC |
617 | return -EINVAL; |
618 | } | |
6cb45879 | 619 | |
de3fe21b | 620 | buf[0] = *p; |
6cb45879 | 621 | p++; |
de3fe21b | 622 | size--; |
6cb45879 | 623 | |
de3fe21b | 624 | /* Sends message chunks */ |
ab0b9fc6 | 625 | while (size > 0) { |
0a196b6f CP |
626 | int len = (size < priv->ctrl.max_len - 1) ? |
627 | size : priv->ctrl.max_len - 1; | |
6cb45879 | 628 | |
ab0b9fc6 | 629 | memcpy(buf + 1, p, len); |
6cb45879 | 630 | |
47cc5b78 | 631 | rc = i2c_send(priv, buf, len + 1); |
ab0b9fc6 | 632 | if (rc < 0) { |
83fb340b | 633 | tuner_err("%d returned from send\n", rc); |
de3fe21b MCC |
634 | return -EINVAL; |
635 | } | |
636 | ||
637 | p += len; | |
638 | size -= len; | |
639 | } | |
4d37ece7 TR |
640 | |
641 | /* silently fail if the frontend doesn't support I2C flush */ | |
642 | rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0); | |
643 | if ((rc < 0) && (rc != -EINVAL)) { | |
644 | tuner_err("error executing flush: %d\n", rc); | |
645 | return rc; | |
646 | } | |
de3fe21b | 647 | } |
43efe702 | 648 | return 0; |
6cb45879 MCC |
649 | } |
650 | ||
f380e1d2 | 651 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 652 | v4l2_std_id *id, __u16 int_freq, int scode) |
f380e1d2 MCC |
653 | { |
654 | struct xc2028_data *priv = fe->tuner_priv; | |
655 | int pos, rc; | |
656 | unsigned char *p; | |
657 | ||
7e28adb2 | 658 | tuner_dbg("%s called\n", __func__); |
f380e1d2 | 659 | |
66c2d53d MCC |
660 | if (!int_freq) { |
661 | pos = seek_firmware(fe, type, id); | |
662 | if (pos < 0) | |
663 | return pos; | |
664 | } else { | |
665 | for (pos = 0; pos < priv->firm_size; pos++) { | |
666 | if ((priv->firm[pos].int_freq == int_freq) && | |
9ca01e78 | 667 | (priv->firm[pos].type & HAS_IF)) |
66c2d53d MCC |
668 | break; |
669 | } | |
670 | if (pos == priv->firm_size) | |
671 | return -ENOENT; | |
672 | } | |
f380e1d2 MCC |
673 | |
674 | p = priv->firm[pos].ptr; | |
675 | ||
9ca01e78 | 676 | if (priv->firm[pos].type & HAS_IF) { |
66c2d53d MCC |
677 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
678 | return -EINVAL; | |
679 | p += 12 * scode; | |
680 | } else { | |
681 | /* 16 SCODE entries per file; each SCODE entry is 12 bytes and | |
682 | * has a 2-byte size header in the firmware format. */ | |
683 | if (priv->firm[pos].size != 14 * 16 || scode >= 16 || | |
84eeb0b4 | 684 | le16_to_cpu(*(__le16 *)(p + 14 * scode)) != 12) |
66c2d53d MCC |
685 | return -EINVAL; |
686 | p += 14 * scode + 2; | |
687 | } | |
f380e1d2 | 688 | |
d7b22c5c | 689 | tuner_info("Loading SCODE for type="); |
e0262688 CP |
690 | dump_firm_type_and_int_freq(priv->firm[pos].type, |
691 | priv->firm[pos].int_freq); | |
d7b22c5c CP |
692 | printk("(%x), id %016llx.\n", priv->firm[pos].type, |
693 | (unsigned long long)*id); | |
694 | ||
06fd82dc | 695 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
696 | rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00}); |
697 | else | |
698 | rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00}); | |
699 | if (rc < 0) | |
700 | return -EIO; | |
f380e1d2 | 701 | |
66c2d53d | 702 | rc = i2c_send(priv, p, 12); |
47cc5b78 CP |
703 | if (rc < 0) |
704 | return -EIO; | |
f380e1d2 | 705 | |
47cc5b78 CP |
706 | rc = send_seq(priv, {0x00, 0x8c}); |
707 | if (rc < 0) | |
708 | return -EIO; | |
f380e1d2 MCC |
709 | |
710 | return 0; | |
711 | } | |
712 | ||
ebf044f4 MCC |
713 | static int xc2028_sleep(struct dvb_frontend *fe); |
714 | ||
00deff1a | 715 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 716 | v4l2_std_id std, __u16 int_freq) |
6cb45879 | 717 | { |
00deff1a | 718 | struct xc2028_data *priv = fe->tuner_priv; |
e0f0b37a | 719 | struct firmware_properties new_fw; |
61a96113 | 720 | int rc, retry_count = 0; |
00deff1a MCC |
721 | u16 version, hwmodel; |
722 | v4l2_std_id std0; | |
6cb45879 | 723 | |
7e28adb2 | 724 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 725 | |
61a96113 MCC |
726 | rc = check_device_status(priv); |
727 | if (rc < 0) | |
728 | return rc; | |
de3fe21b | 729 | |
0f6dac18 | 730 | if (priv->ctrl.mts && !(type & FM)) |
e0f0b37a | 731 | type |= MTS; |
6cb45879 | 732 | |
8bf799a6 | 733 | retry: |
e0f0b37a CP |
734 | new_fw.type = type; |
735 | new_fw.id = std; | |
736 | new_fw.std_req = std; | |
737 | new_fw.scode_table = SCODE | priv->ctrl.scode_table; | |
738 | new_fw.scode_nr = 0; | |
66c2d53d | 739 | new_fw.int_freq = int_freq; |
e0f0b37a CP |
740 | |
741 | tuner_dbg("checking firmware, user requested type="); | |
742 | if (debug) { | |
743 | dump_firm_type(new_fw.type); | |
e0262688 | 744 | printk("(%x), id %016llx, ", new_fw.type, |
e0f0b37a | 745 | (unsigned long long)new_fw.std_req); |
e0262688 CP |
746 | if (!int_freq) { |
747 | printk("scode_tbl "); | |
748 | dump_firm_type(priv->ctrl.scode_table); | |
749 | printk("(%x), ", priv->ctrl.scode_table); | |
750 | } else | |
751 | printk("int_freq %d, ", new_fw.int_freq); | |
752 | printk("scode_nr %d\n", new_fw.scode_nr); | |
e0f0b37a CP |
753 | } |
754 | ||
61a96113 MCC |
755 | /* |
756 | * No need to reload base firmware if it matches and if the tuner | |
757 | * is not at sleep mode | |
758 | */ | |
3a495ed7 | 759 | if ((priv->state == XC2028_ACTIVE) && |
61a96113 MCC |
760 | (((BASE | new_fw.type) & BASE_TYPES) == |
761 | (priv->cur_fw.type & BASE_TYPES))) { | |
e0f0b37a CP |
762 | tuner_dbg("BASE firmware not changed.\n"); |
763 | goto skip_base; | |
764 | } | |
765 | ||
766 | /* Updating BASE - forget about all currently loaded firmware */ | |
767 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
768 | ||
769 | /* Reset is needed before loading firmware */ | |
d7cba043 | 770 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
e0f0b37a CP |
771 | if (rc < 0) |
772 | goto fail; | |
773 | ||
47bd5bc6 CP |
774 | /* BASE firmwares are all std0 */ |
775 | std0 = 0; | |
776 | rc = load_firmware(fe, BASE | new_fw.type, &std0); | |
e0f0b37a CP |
777 | if (rc < 0) { |
778 | tuner_err("Error %d while loading base firmware\n", | |
779 | rc); | |
780 | goto fail; | |
781 | } | |
5403bbae | 782 | |
de3fe21b | 783 | /* Load INIT1, if needed */ |
83fb340b | 784 | tuner_dbg("Load init1 firmware, if exists\n"); |
de3fe21b | 785 | |
47bd5bc6 | 786 | rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0); |
1ad0b796 CP |
787 | if (rc == -ENOENT) |
788 | rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ, | |
789 | &std0); | |
e0f0b37a CP |
790 | if (rc < 0 && rc != -ENOENT) { |
791 | tuner_err("Error %d while loading init1 firmware\n", | |
792 | rc); | |
793 | goto fail; | |
794 | } | |
de3fe21b | 795 | |
e0f0b37a CP |
796 | skip_base: |
797 | /* | |
798 | * No need to reload standard specific firmware if base firmware | |
799 | * was not reloaded and requested video standards have not changed. | |
de3fe21b | 800 | */ |
e0f0b37a CP |
801 | if (priv->cur_fw.type == (BASE | new_fw.type) && |
802 | priv->cur_fw.std_req == std) { | |
83fb340b | 803 | tuner_dbg("Std-specific firmware already loaded.\n"); |
e0f0b37a | 804 | goto skip_std_specific; |
2e4160ca | 805 | } |
6cb45879 | 806 | |
e0f0b37a CP |
807 | /* Reloading std-specific firmware forces a SCODE update */ |
808 | priv->cur_fw.scode_table = 0; | |
809 | ||
e0f0b37a | 810 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
cca83798 MCC |
811 | if (rc == -ENOENT) |
812 | rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id); | |
813 | ||
ab0b9fc6 | 814 | if (rc < 0) |
e0f0b37a CP |
815 | goto fail; |
816 | ||
817 | skip_std_specific: | |
818 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
819 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
820 | tuner_dbg("SCODE firmware already loaded.\n"); | |
821 | goto check_device; | |
822 | } | |
6cb45879 | 823 | |
40ae91a7 MCC |
824 | if (new_fw.type & FM) |
825 | goto check_device; | |
826 | ||
f380e1d2 | 827 | /* Load SCODE firmware, if exists */ |
e0f0b37a | 828 | tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr); |
f380e1d2 | 829 | |
66c2d53d MCC |
830 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
831 | new_fw.int_freq, new_fw.scode_nr); | |
43efe702 | 832 | |
e0f0b37a | 833 | check_device: |
8bf799a6 CP |
834 | if (xc2028_get_reg(priv, 0x0004, &version) < 0 || |
835 | xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) { | |
836 | tuner_err("Unable to read tuner registers.\n"); | |
837 | goto fail; | |
838 | } | |
80b52208 | 839 | |
b37f2d6a DH |
840 | tuner_dbg("Device is Xceive %d version %d.%d, " |
841 | "firmware version %d.%d\n", | |
842 | hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8, | |
843 | (version & 0xf0) >> 4, version & 0xf); | |
6cb45879 | 844 | |
0fb84ce0 MCC |
845 | |
846 | if (priv->ctrl.read_not_reliable) | |
847 | goto read_not_reliable; | |
848 | ||
8bf799a6 CP |
849 | /* Check firmware version against what we downloaded. */ |
850 | if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) { | |
2d5024a9 MCC |
851 | if (!priv->ctrl.read_not_reliable) { |
852 | tuner_err("Incorrect readback of firmware version.\n"); | |
853 | goto fail; | |
854 | } else { | |
855 | tuner_err("Returned an incorrect version. However, " | |
856 | "read is not reliable enough. Ignoring it.\n"); | |
857 | hwmodel = 3028; | |
858 | } | |
8bf799a6 CP |
859 | } |
860 | ||
861 | /* Check that the tuner hardware model remains consistent over time. */ | |
862 | if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) { | |
863 | priv->hwmodel = hwmodel; | |
864 | priv->hwvers = version & 0xff00; | |
865 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | |
866 | priv->hwvers != (version & 0xff00)) { | |
867 | tuner_err("Read invalid device hardware information - tuner " | |
868 | "hung?\n"); | |
869 | goto fail; | |
870 | } | |
871 | ||
0fb84ce0 | 872 | read_not_reliable: |
03c42001 | 873 | priv->cur_fw = new_fw; |
e0f0b37a CP |
874 | |
875 | /* | |
876 | * By setting BASE in cur_fw.type only after successfully loading all | |
877 | * firmwares, we can: | |
878 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
879 | * 2. Tell whether BASE firmware was just changed the next time through. | |
880 | */ | |
881 | priv->cur_fw.type |= BASE; | |
61a96113 | 882 | priv->state = XC2028_ACTIVE; |
6cb45879 MCC |
883 | |
884 | return 0; | |
e0f0b37a CP |
885 | |
886 | fail: | |
ebf044f4 | 887 | priv->state = XC2028_NO_FIRMWARE; |
61a96113 | 888 | |
e0f0b37a | 889 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); |
b8bc77db | 890 | if (retry_count < 8) { |
8bf799a6 | 891 | msleep(50); |
b8bc77db | 892 | retry_count++; |
8bf799a6 CP |
893 | tuner_dbg("Retrying firmware load\n"); |
894 | goto retry; | |
895 | } | |
896 | ||
ebf044f4 MCC |
897 | /* Firmware didn't load. Put the device to sleep */ |
898 | xc2028_sleep(fe); | |
899 | ||
e0f0b37a CP |
900 | if (rc == -ENOENT) |
901 | rc = -EINVAL; | |
902 | return rc; | |
6cb45879 MCC |
903 | } |
904 | ||
215b95ba | 905 | static int xc2028_signal(struct dvb_frontend *fe, u16 *strength) |
6cb45879 | 906 | { |
215b95ba | 907 | struct xc2028_data *priv = fe->tuner_priv; |
7d58d111 | 908 | u16 frq_lock, signal = 0; |
90acb85f | 909 | int rc, i; |
3b20532c | 910 | |
7e28adb2 | 911 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 912 | |
61a96113 MCC |
913 | rc = check_device_status(priv); |
914 | if (rc < 0) | |
915 | return rc; | |
916 | ||
2276bf70 MCC |
917 | /* If the device is sleeping, no channel is tuned */ |
918 | if (!rc) { | |
919 | *strength = 0; | |
920 | return 0; | |
921 | } | |
922 | ||
215b95ba | 923 | mutex_lock(&priv->lock); |
6cb45879 | 924 | |
80b52208 | 925 | /* Sync Lock Indicator */ |
90acb85f MCC |
926 | for (i = 0; i < 3; i++) { |
927 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
928 | if (rc < 0) | |
929 | goto ret; | |
930 | ||
931 | if (frq_lock) | |
932 | break; | |
933 | msleep(6); | |
934 | } | |
6cb45879 | 935 | |
1d432a3d | 936 | /* Frequency didn't lock */ |
90acb85f MCC |
937 | if (frq_lock == 2) |
938 | goto ret; | |
6cb45879 | 939 | |
80b52208 | 940 | /* Get SNR of the video signal */ |
304bce41 | 941 | rc = xc2028_get_reg(priv, XREG_SNR, &signal); |
7d58d111 | 942 | if (rc < 0) |
b0166ab3 MCC |
943 | goto ret; |
944 | ||
90acb85f MCC |
945 | /* Signal level is 3 bits only */ |
946 | ||
947 | signal = ((1 << 12) - 1) | ((signal & 0x07) << 12); | |
3b20532c MCC |
948 | |
949 | ret: | |
215b95ba MCC |
950 | mutex_unlock(&priv->lock); |
951 | ||
952 | *strength = signal; | |
6cb45879 | 953 | |
b0166ab3 MCC |
954 | tuner_dbg("signal strength is %d\n", signal); |
955 | ||
7d58d111 | 956 | return rc; |
6cb45879 MCC |
957 | } |
958 | ||
1d432a3d MCC |
959 | static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc) |
960 | { | |
961 | struct xc2028_data *priv = fe->tuner_priv; | |
962 | int i, rc; | |
963 | u16 frq_lock = 0; | |
964 | s16 afc_reg = 0; | |
965 | ||
966 | rc = check_device_status(priv); | |
967 | if (rc < 0) | |
968 | return rc; | |
969 | ||
2276bf70 MCC |
970 | /* If the device is sleeping, no channel is tuned */ |
971 | if (!rc) { | |
972 | *afc = 0; | |
973 | return 0; | |
974 | } | |
975 | ||
1d432a3d MCC |
976 | mutex_lock(&priv->lock); |
977 | ||
978 | /* Sync Lock Indicator */ | |
979 | for (i = 0; i < 3; i++) { | |
980 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
981 | if (rc < 0) | |
982 | goto ret; | |
983 | ||
984 | if (frq_lock) | |
985 | break; | |
986 | msleep(6); | |
987 | } | |
988 | ||
989 | /* Frequency didn't lock */ | |
990 | if (frq_lock == 2) | |
991 | goto ret; | |
992 | ||
993 | /* Get AFC */ | |
994 | rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg); | |
995 | if (rc < 0) | |
f088ccd6 | 996 | goto ret; |
1d432a3d MCC |
997 | |
998 | *afc = afc_reg * 15625; /* Hz */ | |
999 | ||
1000 | tuner_dbg("AFC is %d Hz\n", *afc); | |
1001 | ||
1002 | ret: | |
1003 | mutex_unlock(&priv->lock); | |
1004 | ||
1005 | return rc; | |
1006 | } | |
1007 | ||
6cb45879 MCC |
1008 | #define DIV 15625 |
1009 | ||
00deff1a | 1010 | static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */, |
aa40d194 | 1011 | enum v4l2_tuner_type new_type, |
66c2d53d MCC |
1012 | unsigned int type, |
1013 | v4l2_std_id std, | |
1014 | u16 int_freq) | |
6cb45879 | 1015 | { |
215b95ba | 1016 | struct xc2028_data *priv = fe->tuner_priv; |
ab0b9fc6 | 1017 | int rc = -EINVAL; |
2ce4b3aa | 1018 | unsigned char buf[4]; |
ab0b9fc6 | 1019 | u32 div, offset = 0; |
6cb45879 | 1020 | |
7e28adb2 | 1021 | tuner_dbg("%s called\n", __func__); |
215b95ba | 1022 | |
de3fe21b MCC |
1023 | mutex_lock(&priv->lock); |
1024 | ||
2ce4b3aa | 1025 | tuner_dbg("should set frequency %d kHz\n", freq / 1000); |
6cb45879 | 1026 | |
66c2d53d | 1027 | if (check_firmware(fe, type, std, int_freq) < 0) |
3b20532c | 1028 | goto ret; |
2e4160ca | 1029 | |
2800ae9c MCC |
1030 | /* On some cases xc2028 can disable video output, if |
1031 | * very weak signals are received. By sending a soft | |
1032 | * reset, this is re-enabled. So, it is better to always | |
1033 | * send a soft reset before changing channels, to be sure | |
1034 | * that xc2028 will be in a safe state. | |
1035 | * Maybe this might also be needed for DTV. | |
1036 | */ | |
fd34cb08 MCC |
1037 | switch (new_type) { |
1038 | case V4L2_TUNER_ANALOG_TV: | |
2800ae9c | 1039 | rc = send_seq(priv, {0x00, 0x00}); |
0a863975 | 1040 | |
fd34cb08 MCC |
1041 | /* Analog mode requires offset = 0 */ |
1042 | break; | |
1043 | case V4L2_TUNER_RADIO: | |
1044 | /* Radio mode requires offset = 0 */ | |
1045 | break; | |
1046 | case V4L2_TUNER_DIGITAL_TV: | |
7f2199c0 MCC |
1047 | /* |
1048 | * Digital modes require an offset to adjust to the | |
1049 | * proper frequency. The offset depends on what | |
1050 | * firmware version is used. | |
1051 | */ | |
1052 | ||
1053 | /* | |
1054 | * Adjust to the center frequency. This is calculated by the | |
1055 | * formula: offset = 1.25MHz - BW/2 | |
1056 | * For DTV 7/8, the firmware uses BW = 8000, so it needs a | |
1057 | * further adjustment to get the frequency center on VHF | |
1058 | */ | |
98ab8550 GG |
1059 | |
1060 | /* | |
1061 | * The firmware DTV78 used to work fine in UHF band (8 MHz | |
1062 | * bandwidth) but not at all in VHF band (7 MHz bandwidth). | |
1063 | * The real problem was connected to the formula used to | |
1064 | * calculate the center frequency offset in VHF band. | |
1065 | * In fact, removing the 500KHz adjustment fixed the problem. | |
1066 | * This is coherent to what was implemented for the DTV7 | |
1067 | * firmware. | |
1068 | * In the end, now the center frequency is the same for all 3 | |
1069 | * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel | |
1070 | * bandwidth. | |
1071 | */ | |
1072 | ||
0a863975 MCC |
1073 | if (priv->cur_fw.type & DTV6) |
1074 | offset = 1750000; | |
98ab8550 | 1075 | else /* DTV7 or DTV8 or DTV78 */ |
0a863975 MCC |
1076 | offset = 2750000; |
1077 | ||
897b8422 | 1078 | /* |
7f2199c0 MCC |
1079 | * xc3028 additional "magic" |
1080 | * Depending on the firmware version, it needs some adjustments | |
1081 | * to properly centralize the frequency. This seems to be | |
1082 | * needed to compensate the SCODE table adjustments made by | |
1083 | * newer firmwares | |
897b8422 | 1084 | */ |
7f2199c0 | 1085 | |
7f2199c0 MCC |
1086 | /* |
1087 | * The proper adjustment would be to do it at s-code table. | |
1088 | * However, this didn't work, as reported by | |
1089 | * Robert Lowery <rglowery@exemail.com.au> | |
1090 | */ | |
1091 | ||
98ab8550 | 1092 | #if 0 |
7f2199c0 MCC |
1093 | /* |
1094 | * Still need tests for XC3028L (firmware 3.2 or upper) | |
1095 | * So, for now, let's just comment the per-firmware | |
1096 | * version of this change. Reports with xc3028l working | |
5a13e40b | 1097 | * with and without the lines below are welcome |
7f2199c0 MCC |
1098 | */ |
1099 | ||
1100 | if (priv->firm_version < 0x0302) { | |
1101 | if (priv->cur_fw.type & DTV7) | |
1102 | offset += 500000; | |
1103 | } else { | |
1104 | if (priv->cur_fw.type & DTV7) | |
1105 | offset -= 300000; | |
1106 | else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */ | |
1107 | offset += 200000; | |
1108 | } | |
1109 | #endif | |
c6f977ec | 1110 | break; |
96a5b3a8 AP |
1111 | default: |
1112 | tuner_err("Unsupported tuner type %d.\n", new_type); | |
1113 | break; | |
a44f1c43 | 1114 | } |
2e4160ca | 1115 | |
ab0b9fc6 | 1116 | div = (freq - offset + DIV / 2) / DIV; |
2e4160ca | 1117 | |
6cb45879 | 1118 | /* CMD= Set frequency */ |
06fd82dc | 1119 | if (priv->firm_version < 0x0202) |
304bce41 | 1120 | rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 | 1121 | else |
304bce41 | 1122 | rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 CP |
1123 | if (rc < 0) |
1124 | goto ret; | |
de3fe21b | 1125 | |
1fe87369 MCC |
1126 | /* Return code shouldn't be checked. |
1127 | The reset CLK is needed only with tm6000. | |
1128 | Driver should work fine even if this fails. | |
1129 | */ | |
70ca3c4b DH |
1130 | if (priv->ctrl.msleep) |
1131 | msleep(priv->ctrl.msleep); | |
d7cba043 | 1132 | do_tuner_callback(fe, XC2028_RESET_CLK, 1); |
6cb45879 MCC |
1133 | |
1134 | msleep(10); | |
701672eb | 1135 | |
ab0b9fc6 MCC |
1136 | buf[0] = 0xff & (div >> 24); |
1137 | buf[1] = 0xff & (div >> 16); | |
1138 | buf[2] = 0xff & (div >> 8); | |
1139 | buf[3] = 0xff & (div); | |
6cb45879 | 1140 | |
47cc5b78 | 1141 | rc = i2c_send(priv, buf, sizeof(buf)); |
ab0b9fc6 | 1142 | if (rc < 0) |
3b20532c | 1143 | goto ret; |
6cb45879 MCC |
1144 | msleep(100); |
1145 | ||
ab0b9fc6 | 1146 | priv->frequency = freq; |
215b95ba | 1147 | |
c6480ccc | 1148 | tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf, |
2ce4b3aa | 1149 | freq / 1000000, (freq % 1000000) / 1000); |
3b20532c | 1150 | |
ab0b9fc6 | 1151 | rc = 0; |
6cb45879 | 1152 | |
215b95ba MCC |
1153 | ret: |
1154 | mutex_unlock(&priv->lock); | |
6cb45879 | 1155 | |
215b95ba | 1156 | return rc; |
701672eb ML |
1157 | } |
1158 | ||
00deff1a | 1159 | static int xc2028_set_analog_freq(struct dvb_frontend *fe, |
ab0b9fc6 | 1160 | struct analog_parameters *p) |
6cb45879 | 1161 | { |
215b95ba | 1162 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a MCC |
1163 | unsigned int type=0; |
1164 | ||
7e28adb2 | 1165 | tuner_dbg("%s called\n", __func__); |
c71d4bc5 | 1166 | |
d74cb25e MCC |
1167 | if (p->mode == V4L2_TUNER_RADIO) { |
1168 | type |= FM; | |
1169 | if (priv->ctrl.input1) | |
1170 | type |= INPUT1; | |
1171 | return generic_set_freq(fe, (625l * p->frequency) / 10, | |
437f5fa3 | 1172 | V4L2_TUNER_RADIO, type, 0, 0); |
d74cb25e MCC |
1173 | } |
1174 | ||
a5e9fe14 MCC |
1175 | /* if std is not defined, choose one */ |
1176 | if (!p->std) | |
1177 | p->std = V4L2_STD_MN; | |
1178 | ||
1179 | /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */ | |
00deff1a MCC |
1180 | if (!(p->std & V4L2_STD_MN)) |
1181 | type |= F8MHZ; | |
6cb45879 | 1182 | |
00deff1a MCC |
1183 | /* Add audio hack to std mask */ |
1184 | p->std |= parse_audio_std_option(); | |
6cb45879 | 1185 | |
00deff1a | 1186 | return generic_set_freq(fe, 62500l * p->frequency, |
437f5fa3 | 1187 | V4L2_TUNER_ANALOG_TV, type, p->std, 0); |
215b95ba | 1188 | } |
6cb45879 | 1189 | |
14d24d14 | 1190 | static int xc2028_set_params(struct dvb_frontend *fe) |
6cb45879 | 1191 | { |
506cd714 MCC |
1192 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1193 | u32 delsys = c->delivery_system; | |
1194 | u32 bw = c->bandwidth_hz; | |
215b95ba | 1195 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 MCC |
1196 | int rc; |
1197 | unsigned int type = 0; | |
ad35ce9e | 1198 | u16 demod = 0; |
6cb45879 | 1199 | |
7e28adb2 | 1200 | tuner_dbg("%s called\n", __func__); |
701672eb | 1201 | |
61a96113 MCC |
1202 | rc = check_device_status(priv); |
1203 | if (rc < 0) | |
1204 | return rc; | |
1205 | ||
506cd714 MCC |
1206 | switch (delsys) { |
1207 | case SYS_DVBT: | |
1208 | case SYS_DVBT2: | |
a1014d70 MCC |
1209 | /* |
1210 | * The only countries with 6MHz seem to be Taiwan/Uruguay. | |
1211 | * Both seem to require QAM firmware for OFDM decoding | |
1212 | * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com> | |
1213 | */ | |
506cd714 | 1214 | if (bw <= 6000000) |
a1014d70 | 1215 | type |= QAM; |
00deff1a | 1216 | |
0975fc68 MCC |
1217 | switch (priv->ctrl.type) { |
1218 | case XC2028_D2633: | |
1219 | type |= D2633; | |
1220 | break; | |
1221 | case XC2028_D2620: | |
1222 | type |= D2620; | |
1223 | break; | |
1224 | case XC2028_AUTO: | |
1225 | default: | |
1226 | /* Zarlink seems to need D2633 */ | |
1227 | if (priv->ctrl.demod == XC3028_FE_ZARLINK456) | |
1228 | type |= D2633; | |
1229 | else | |
1230 | type |= D2620; | |
1231 | } | |
506cd714 MCC |
1232 | break; |
1233 | case SYS_ATSC: | |
1234 | /* The only ATSC firmware (at least on v2.7) is D2633 */ | |
1235 | type |= ATSC | D2633; | |
1236 | break; | |
1237 | /* DVB-S and pure QAM (FE_QAM) are not supported */ | |
1238 | default: | |
1239 | return -EINVAL; | |
1240 | } | |
1241 | ||
1242 | if (bw <= 6000000) { | |
1243 | type |= DTV6; | |
1244 | priv->ctrl.vhfbw7 = 0; | |
1245 | priv->ctrl.uhfbw8 = 0; | |
1246 | } else if (bw <= 7000000) { | |
1247 | if (c->frequency < 470000000) | |
1248 | priv->ctrl.vhfbw7 = 1; | |
1249 | else | |
1250 | priv->ctrl.uhfbw8 = 0; | |
1251 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7; | |
1252 | type |= F8MHZ; | |
1253 | } else { | |
1254 | if (c->frequency < 470000000) | |
1255 | priv->ctrl.vhfbw7 = 0; | |
1256 | else | |
1257 | priv->ctrl.uhfbw8 = 1; | |
1258 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8; | |
1259 | type |= F8MHZ; | |
0975fc68 MCC |
1260 | } |
1261 | ||
66c2d53d | 1262 | /* All S-code tables need a 200kHz shift */ |
6e707b4c | 1263 | if (priv->ctrl.demod) { |
7d350284 MCC |
1264 | demod = priv->ctrl.demod; |
1265 | ||
7f2199c0 MCC |
1266 | /* |
1267 | * Newer firmwares require a 200 kHz offset only for ATSC | |
1268 | */ | |
1269 | if (type == ATSC || priv->firm_version < 0x0302) | |
7d350284 | 1270 | demod += 200; |
6e707b4c AW |
1271 | /* |
1272 | * The DTV7 S-code table needs a 700 kHz shift. | |
6e707b4c AW |
1273 | * |
1274 | * DTV7 is only used in Australia. Germany or Italy may also | |
1275 | * use this firmware after initialization, but a tune to a UHF | |
1276 | * channel should then cause DTV78 to be used. | |
7f2199c0 MCC |
1277 | * |
1278 | * Unfortunately, on real-field tests, the s-code offset | |
1279 | * didn't work as expected, as reported by | |
1280 | * Robert Lowery <rglowery@exemail.com.au> | |
6e707b4c | 1281 | */ |
6e707b4c | 1282 | } |
b542dfdc | 1283 | |
506cd714 | 1284 | return generic_set_freq(fe, c->frequency, |
437f5fa3 | 1285 | V4L2_TUNER_DIGITAL_TV, type, 0, demod); |
6cb45879 | 1286 | } |
701672eb | 1287 | |
74a89b2a MCC |
1288 | static int xc2028_sleep(struct dvb_frontend *fe) |
1289 | { | |
1290 | struct xc2028_data *priv = fe->tuner_priv; | |
61a96113 MCC |
1291 | int rc; |
1292 | ||
1293 | rc = check_device_status(priv); | |
1294 | if (rc < 0) | |
1295 | return rc; | |
74a89b2a | 1296 | |
2276bf70 MCC |
1297 | /* Device is already in sleep mode */ |
1298 | if (!rc) | |
10f201af | 1299 | return 0; |
74a89b2a | 1300 | |
2276bf70 MCC |
1301 | /* Avoid firmware reload on slow devices or if PM disabled */ |
1302 | if (no_poweroff || priv->ctrl.disable_power_mgmt) | |
ebf044f4 MCC |
1303 | return 0; |
1304 | ||
74a89b2a | 1305 | tuner_dbg("Putting xc2028/3028 into poweroff mode.\n"); |
e278e746 MCC |
1306 | if (debug > 1) { |
1307 | tuner_dbg("Printing sleep stack trace:\n"); | |
1308 | dump_stack(); | |
1309 | } | |
74a89b2a MCC |
1310 | |
1311 | mutex_lock(&priv->lock); | |
1312 | ||
1313 | if (priv->firm_version < 0x0202) | |
304bce41 | 1314 | rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1315 | else |
304bce41 | 1316 | rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1317 | |
ebf044f4 MCC |
1318 | if (rc >= 0) |
1319 | priv->state = XC2028_SLEEP; | |
74a89b2a MCC |
1320 | |
1321 | mutex_unlock(&priv->lock); | |
1322 | ||
1323 | return rc; | |
1324 | } | |
45819c38 | 1325 | |
215b95ba | 1326 | static int xc2028_dvb_release(struct dvb_frontend *fe) |
701672eb | 1327 | { |
215b95ba MCC |
1328 | struct xc2028_data *priv = fe->tuner_priv; |
1329 | ||
7e28adb2 | 1330 | tuner_dbg("%s called\n", __func__); |
701672eb | 1331 | |
aa501be9 CP |
1332 | mutex_lock(&xc2028_list_mutex); |
1333 | ||
c663d035 MK |
1334 | /* only perform final cleanup if this is the last instance */ |
1335 | if (hybrid_tuner_report_instance_count(priv) == 1) { | |
de3fe21b | 1336 | free_firmware(priv); |
61a96113 MCC |
1337 | kfree(priv->ctrl.fname); |
1338 | priv->ctrl.fname = NULL; | |
de3fe21b | 1339 | } |
701672eb | 1340 | |
c663d035 MK |
1341 | if (priv) |
1342 | hybrid_tuner_release_state(priv); | |
1343 | ||
aa501be9 CP |
1344 | mutex_unlock(&xc2028_list_mutex); |
1345 | ||
c663d035 MK |
1346 | fe->tuner_priv = NULL; |
1347 | ||
701672eb ML |
1348 | return 0; |
1349 | } | |
1350 | ||
215b95ba | 1351 | static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
701672eb | 1352 | { |
215b95ba | 1353 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 | 1354 | int rc; |
701672eb | 1355 | |
7e28adb2 | 1356 | tuner_dbg("%s called\n", __func__); |
701672eb | 1357 | |
61a96113 MCC |
1358 | rc = check_device_status(priv); |
1359 | if (rc < 0) | |
1360 | return rc; | |
1361 | ||
215b95ba | 1362 | *frequency = priv->frequency; |
701672eb ML |
1363 | |
1364 | return 0; | |
1365 | } | |
1366 | ||
61a96113 MCC |
1367 | static void load_firmware_cb(const struct firmware *fw, |
1368 | void *context) | |
1369 | { | |
1370 | struct dvb_frontend *fe = context; | |
1371 | struct xc2028_data *priv = fe->tuner_priv; | |
1372 | int rc; | |
1373 | ||
1374 | tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error"); | |
1375 | if (!fw) { | |
1376 | tuner_err("Could not load firmware %s.\n", priv->fname); | |
1377 | priv->state = XC2028_NODEV; | |
1378 | return; | |
1379 | } | |
1380 | ||
1381 | rc = load_all_firmwares(fe, fw); | |
1382 | ||
1383 | release_firmware(fw); | |
1384 | ||
1385 | if (rc < 0) | |
1386 | return; | |
ebf044f4 | 1387 | priv->state = XC2028_ACTIVE; |
61a96113 MCC |
1388 | } |
1389 | ||
ab0b9fc6 | 1390 | static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg) |
de3fe21b MCC |
1391 | { |
1392 | struct xc2028_data *priv = fe->tuner_priv; | |
1393 | struct xc2028_ctrl *p = priv_cfg; | |
0a196b6f | 1394 | int rc = 0; |
de3fe21b | 1395 | |
7e28adb2 | 1396 | tuner_dbg("%s called\n", __func__); |
de3fe21b | 1397 | |
06fd82dc CP |
1398 | mutex_lock(&priv->lock); |
1399 | ||
61a96113 MCC |
1400 | /* |
1401 | * Copy the config data. | |
1402 | * For the firmware name, keep a local copy of the string, | |
1403 | * in order to avoid troubles during device release. | |
1404 | */ | |
f1065c96 | 1405 | kfree(priv->ctrl.fname); |
8dfbcc43 | 1406 | priv->ctrl.fname = NULL; |
0a196b6f | 1407 | memcpy(&priv->ctrl, p, sizeof(priv->ctrl)); |
0a196b6f CP |
1408 | if (p->fname) { |
1409 | priv->ctrl.fname = kstrdup(p->fname, GFP_KERNEL); | |
210bd104 DC |
1410 | if (priv->ctrl.fname == NULL) { |
1411 | rc = -ENOMEM; | |
1412 | goto unlock; | |
1413 | } | |
de3fe21b MCC |
1414 | } |
1415 | ||
61a96113 MCC |
1416 | /* |
1417 | * If firmware name changed, frees firmware. As free_firmware will | |
1418 | * reset the status to NO_FIRMWARE, this forces a new request_firmware | |
1419 | */ | |
1420 | if (!firmware_name[0] && p->fname && | |
1421 | priv->fname && strcmp(p->fname, priv->fname)) | |
1422 | free_firmware(priv); | |
1423 | ||
1424 | if (priv->ctrl.max_len < 9) | |
1425 | priv->ctrl.max_len = 13; | |
1426 | ||
1427 | if (priv->state == XC2028_NO_FIRMWARE) { | |
1428 | if (!firmware_name[0]) | |
1429 | priv->fname = priv->ctrl.fname; | |
1430 | else | |
1431 | priv->fname = firmware_name; | |
1432 | ||
1433 | rc = request_firmware_nowait(THIS_MODULE, 1, | |
1434 | priv->fname, | |
1435 | priv->i2c_props.adap->dev.parent, | |
1436 | GFP_KERNEL, | |
1437 | fe, load_firmware_cb); | |
1438 | if (rc < 0) { | |
1439 | tuner_err("Failed to request firmware %s\n", | |
1440 | priv->fname); | |
1441 | priv->state = XC2028_NODEV; | |
1e9c14f7 HPS |
1442 | } else |
1443 | priv->state = XC2028_WAITING_FIRMWARE; | |
61a96113 | 1444 | } |
210bd104 | 1445 | unlock: |
06fd82dc CP |
1446 | mutex_unlock(&priv->lock); |
1447 | ||
0a196b6f | 1448 | return rc; |
de3fe21b MCC |
1449 | } |
1450 | ||
215b95ba | 1451 | static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = { |
701672eb | 1452 | .info = { |
ab0b9fc6 MCC |
1453 | .name = "Xceive XC3028", |
1454 | .frequency_min = 42000000, | |
1455 | .frequency_max = 864000000, | |
1456 | .frequency_step = 50000, | |
1457 | }, | |
701672eb | 1458 | |
de3fe21b | 1459 | .set_config = xc2028_set_config, |
00deff1a | 1460 | .set_analog_params = xc2028_set_analog_freq, |
215b95ba MCC |
1461 | .release = xc2028_dvb_release, |
1462 | .get_frequency = xc2028_get_frequency, | |
1463 | .get_rf_strength = xc2028_signal, | |
1d432a3d | 1464 | .get_afc = xc2028_get_afc, |
215b95ba | 1465 | .set_params = xc2028_set_params, |
74a89b2a | 1466 | .sleep = xc2028_sleep, |
701672eb ML |
1467 | }; |
1468 | ||
7972f988 MK |
1469 | struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe, |
1470 | struct xc2028_config *cfg) | |
701672eb | 1471 | { |
215b95ba | 1472 | struct xc2028_data *priv; |
c663d035 | 1473 | int instance; |
701672eb | 1474 | |
83fb340b | 1475 | if (debug) |
2756665c | 1476 | printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n"); |
701672eb | 1477 | |
b412ba78 | 1478 | if (NULL == cfg) |
a37b4c9b | 1479 | return NULL; |
215b95ba | 1480 | |
a37b4c9b | 1481 | if (!fe) { |
2756665c | 1482 | printk(KERN_ERR "xc2028: No frontend!\n"); |
a37b4c9b | 1483 | return NULL; |
215b95ba MCC |
1484 | } |
1485 | ||
aa501be9 CP |
1486 | mutex_lock(&xc2028_list_mutex); |
1487 | ||
c663d035 MK |
1488 | instance = hybrid_tuner_request_state(struct xc2028_data, priv, |
1489 | hybrid_tuner_instance_list, | |
1490 | cfg->i2c_adap, cfg->i2c_addr, | |
1491 | "xc2028"); | |
1492 | switch (instance) { | |
1493 | case 0: | |
1494 | /* memory allocation failure */ | |
1495 | goto fail; | |
c663d035 MK |
1496 | case 1: |
1497 | /* new tuner instance */ | |
0a196b6f | 1498 | priv->ctrl.max_len = 13; |
de3fe21b | 1499 | |
215b95ba MCC |
1500 | mutex_init(&priv->lock); |
1501 | ||
c663d035 MK |
1502 | fe->tuner_priv = priv; |
1503 | break; | |
1504 | case 2: | |
1505 | /* existing tuner instance */ | |
1506 | fe->tuner_priv = priv; | |
1507 | break; | |
1508 | } | |
b412ba78 | 1509 | |
215b95ba | 1510 | memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops, |
ab0b9fc6 | 1511 | sizeof(xc2028_dvb_tuner_ops)); |
215b95ba MCC |
1512 | |
1513 | tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner"); | |
1514 | ||
71a2ee37 MCC |
1515 | if (cfg->ctrl) |
1516 | xc2028_set_config(fe, cfg->ctrl); | |
1517 | ||
aa501be9 CP |
1518 | mutex_unlock(&xc2028_list_mutex); |
1519 | ||
a37b4c9b | 1520 | return fe; |
c663d035 MK |
1521 | fail: |
1522 | mutex_unlock(&xc2028_list_mutex); | |
1523 | ||
1524 | xc2028_dvb_release(fe); | |
1525 | return NULL; | |
215b95ba | 1526 | } |
a37b4c9b | 1527 | |
701672eb ML |
1528 | EXPORT_SYMBOL(xc2028_attach); |
1529 | ||
215b95ba | 1530 | MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver"); |
983d214e | 1531 | MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>"); |
215b95ba MCC |
1532 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
1533 | MODULE_LICENSE("GPL"); | |
ab9cbcd3 MCC |
1534 | MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE); |
1535 | MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE); |