Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
[deliverable/linux.git] / drivers / media / tuners / xc5000.c
CommitLineData
aacb9d31
ST
1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Xceive Corporation
6d897616 5 * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
e80858e8 6 * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
aacb9d31
ST
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 *
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/moduleparam.h>
4917019d 26#include <linux/videodev2.h>
aacb9d31 27#include <linux/delay.h>
f7a27ff1 28#include <linux/workqueue.h>
aacb9d31
ST
29#include <linux/dvb/frontend.h>
30#include <linux/i2c.h>
31
32#include "dvb_frontend.h"
33
34#include "xc5000.h"
89fd2854 35#include "tuner-i2c.h"
aacb9d31
ST
36
37static int debug;
38module_param(debug, int, 0644);
39MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
40
b6bd5eb8
DH
41static int no_poweroff;
42module_param(no_poweroff, int, 0644);
43MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
44 "\t\t1 keep device energized and with tuner ready all the times.\n"
45 "\t\tFaster, but consumes more power and keeps the device hotter");
46
89fd2854
MK
47static DEFINE_MUTEX(xc5000_list_mutex);
48static LIST_HEAD(hybrid_tuner_instance_list);
49
8f3cd530 50#define dprintk(level, fmt, arg...) if (debug >= level) \
aacb9d31
ST
51 printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
52
ffb41234 53struct xc5000_priv {
89fd2854
MK
54 struct tuner_i2c_props i2c_props;
55 struct list_head hybrid_tuner_instance_list;
ffb41234 56
2a6003c2 57 u32 if_khz;
409328a4 58 u16 xtal_khz;
ffb41234
MK
59 u32 freq_hz;
60 u32 bandwidth;
61 u8 video_standard;
62 u8 rf_mode;
496e9057 63 u8 radio_input;
76efb0ba 64
6fab81df 65 int chip_id;
de49bc6e 66 u16 pll_register_no;
22d5c6f5
DH
67 u8 init_status_supported;
68 u8 fw_checksum_supported;
f7a27ff1
MCC
69
70 struct dvb_frontend *fe;
71 struct delayed_work timer_sleep;
ffb41234
MK
72};
73
aacb9d31 74/* Misc Defines */
724dcbfa 75#define MAX_TV_STANDARD 24
aacb9d31
ST
76#define XC_MAX_I2C_WRITE_LENGTH 64
77
f7a27ff1
MCC
78/* Time to suspend after the .sleep callback is called */
79#define XC5000_SLEEP_TIME 5000 /* ms */
80
aacb9d31
ST
81/* Signal Types */
82#define XC_RF_MODE_AIR 0
83#define XC_RF_MODE_CABLE 1
84
27c685a4
ST
85/* Product id */
86#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
5015c27b 87#define XC_PRODUCT_ID_FW_LOADED 0x1388
27c685a4 88
aacb9d31
ST
89/* Registers */
90#define XREG_INIT 0x00
91#define XREG_VIDEO_MODE 0x01
92#define XREG_AUDIO_MODE 0x02
93#define XREG_RF_FREQ 0x03
94#define XREG_D_CODE 0x04
95#define XREG_IF_OUT 0x05
96#define XREG_SEEK_MODE 0x07
7f05b530 97#define XREG_POWER_DOWN 0x0A /* Obsolete */
724dcbfa
DB
98/* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
99#define XREG_OUTPUT_AMP 0x0B
aacb9d31
ST
100#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
101#define XREG_SMOOTHEDCVBS 0x0E
102#define XREG_XTALFREQ 0x0F
81c4dfe7 103#define XREG_FINERFREQ 0x10
aacb9d31
ST
104#define XREG_DDIMODE 0x11
105
106#define XREG_ADC_ENV 0x00
107#define XREG_QUALITY 0x01
108#define XREG_FRAME_LINES 0x02
109#define XREG_HSYNC_FREQ 0x03
110#define XREG_LOCK 0x04
111#define XREG_FREQ_ERROR 0x05
112#define XREG_SNR 0x06
113#define XREG_VERSION 0x07
114#define XREG_PRODUCT_ID 0x08
115#define XREG_BUSY 0x09
bae7b7d7 116#define XREG_BUILD 0x0D
7c287f18 117#define XREG_TOTALGAIN 0x0F
22d5c6f5
DH
118#define XREG_FW_CHECKSUM 0x12
119#define XREG_INIT_STATUS 0x13
aacb9d31
ST
120
121/*
122 Basic firmware description. This will remain with
123 the driver for documentation purposes.
124
125 This represents an I2C firmware file encoded as a
126 string of unsigned char. Format is as follows:
127
128 char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
129 char[1 ]=len0_LSB -> length of first write transaction
130 char[2 ]=data0 -> first byte to be sent
131 char[3 ]=data1
132 char[4 ]=data2
133 char[ ]=...
134 char[M ]=dataN -> last byte to be sent
135 char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
136 char[M+2]=len1_LSB -> length of second write transaction
137 char[M+3]=data0
138 char[M+4]=data1
139 ...
140 etc.
141
142 The [len] value should be interpreted as follows:
143
144 len= len_MSB _ len_LSB
145 len=1111_1111_1111_1111 : End of I2C_SEQUENCE
146 len=0000_0000_0000_0000 : Reset command: Do hardware reset
147 len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
148 len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
149
150 For the RESET and WAIT commands, the two following bytes will contain
151 immediately the length of the following transaction.
152
153*/
8f3cd530 154struct XC_TV_STANDARD {
303ddd92
MCC
155 char *name;
156 u16 audio_mode;
157 u16 video_mode;
8f3cd530 158};
aacb9d31
ST
159
160/* Tuner standards */
27c685a4
ST
161#define MN_NTSC_PAL_BTSC 0
162#define MN_NTSC_PAL_A2 1
163#define MN_NTSC_PAL_EIAJ 2
303ddd92 164#define MN_NTSC_PAL_MONO 3
27c685a4
ST
165#define BG_PAL_A2 4
166#define BG_PAL_NICAM 5
167#define BG_PAL_MONO 6
168#define I_PAL_NICAM 7
169#define I_PAL_NICAM_MONO 8
170#define DK_PAL_A2 9
171#define DK_PAL_NICAM 10
172#define DK_PAL_MONO 11
173#define DK_SECAM_A2DK1 12
5015c27b
MCC
174#define DK_SECAM_A2LDK3 13
175#define DK_SECAM_A2MONO 14
27c685a4
ST
176#define L_SECAM_NICAM 15
177#define LC_SECAM_NICAM 16
178#define DTV6 17
179#define DTV8 18
180#define DTV7_8 19
181#define DTV7 20
5015c27b
MCC
182#define FM_RADIO_INPUT2 21
183#define FM_RADIO_INPUT1 22
303ddd92 184#define FM_RADIO_INPUT1_MONO 23
aacb9d31 185
303ddd92 186static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = {
aacb9d31
ST
187 {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
188 {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
189 {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
190 {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
191 {"B/G-PAL-A2", 0x0A00, 0x8049},
192 {"B/G-PAL-NICAM", 0x0C04, 0x8049},
193 {"B/G-PAL-MONO", 0x0878, 0x8059},
194 {"I-PAL-NICAM", 0x1080, 0x8009},
195 {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
196 {"D/K-PAL-A2", 0x1600, 0x8009},
197 {"D/K-PAL-NICAM", 0x0E80, 0x8009},
198 {"D/K-PAL-MONO", 0x1478, 0x8009},
199 {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
8f3cd530 200 {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
aacb9d31
ST
201 {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
202 {"L-SECAM-NICAM", 0x8E82, 0x0009},
203 {"L'-SECAM-NICAM", 0x8E82, 0x4009},
204 {"DTV6", 0x00C0, 0x8002},
205 {"DTV8", 0x00C0, 0x800B},
206 {"DTV7/8", 0x00C0, 0x801B},
207 {"DTV7", 0x00C0, 0x8007},
208 {"FM Radio-INPUT2", 0x9802, 0x9002},
724dcbfa
DB
209 {"FM Radio-INPUT1", 0x0208, 0x9002},
210 {"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
aacb9d31
ST
211};
212
ddea427f
MK
213
214struct xc5000_fw_cfg {
215 char *name;
216 u16 size;
de49bc6e 217 u16 pll_reg;
22d5c6f5
DH
218 u8 init_status_supported;
219 u8 fw_checksum_supported;
ddea427f
MK
220};
221
3422f2a6 222#define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
a3db60bc 223static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
3422f2a6 224 .name = XC5000A_FIRMWARE,
76efb0ba 225 .size = 12401,
de49bc6e 226 .pll_reg = 0x806c,
76efb0ba
MK
227};
228
3de5bffd 229#define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
7d3d0d8d 230static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
3422f2a6 231 .name = XC5000C_FIRMWARE,
7d3d0d8d 232 .size = 16497,
de49bc6e 233 .pll_reg = 0x13,
22d5c6f5
DH
234 .init_status_supported = 1,
235 .fw_checksum_supported = 1,
d8398805
MK
236};
237
a3db60bc 238static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
ddea427f 239{
6fab81df 240 switch (chip_id) {
ddea427f 241 default:
6fab81df 242 case XC5000A:
ddea427f 243 return &xc5000a_1_6_114;
6fab81df 244 case XC5000C:
7d3d0d8d 245 return &xc5000c_41_024_5;
ddea427f
MK
246 }
247}
248
de49bc6e 249static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
91bd625e 250static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
bdd33563 251static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
303ddd92 252static int xc5000_tuner_reset(struct dvb_frontend *fe);
aacb9d31 253
e12671cf 254static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 255{
d7800d4e
DH
256 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
257 .flags = 0, .buf = buf, .len = len };
258
259 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
260 printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
859ae7f0 261 return -EREMOTEIO;
d7800d4e 262 }
859ae7f0 263 return 0;
aacb9d31
ST
264}
265
1cdffda7 266#if 0
bdd33563
DH
267/* This routine is never used because the only time we read data from the
268 i2c bus is when we read registers, and we want that to be an atomic i2c
269 transaction in case we are on a multi-master bus */
e12671cf 270static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 271{
bdd33563
DH
272 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
273 .flags = I2C_M_RD, .buf = buf, .len = len };
274
275 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
276 printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
277 return -EREMOTEIO;
278 }
279 return 0;
aacb9d31 280}
1cdffda7 281#endif
aacb9d31 282
4743319f
DB
283static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
284{
285 u8 buf[2] = { reg >> 8, reg & 0xff };
286 u8 bval[2] = { 0, 0 };
287 struct i2c_msg msg[2] = {
288 { .addr = priv->i2c_props.addr,
289 .flags = 0, .buf = &buf[0], .len = 2 },
290 { .addr = priv->i2c_props.addr,
291 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
292 };
293
294 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
295 printk(KERN_WARNING "xc5000: I2C read failed\n");
296 return -EREMOTEIO;
297 }
298
299 *val = (bval[0] << 8) | bval[1];
859ae7f0 300 return 0;
4743319f
DB
301}
302
303ddd92 303static int xc5000_tuner_reset(struct dvb_frontend *fe)
aacb9d31
ST
304{
305 struct xc5000_priv *priv = fe->tuner_priv;
306 int ret;
307
271ddbf7 308 dprintk(1, "%s()\n", __func__);
aacb9d31 309
d7cba043
MK
310 if (fe->callback) {
311 ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
30650961
MK
312 fe->dvb->priv :
313 priv->i2c_props.adap->algo_data,
d7cba043 314 DVB_FRONTEND_COMPONENT_TUNER,
30650961 315 XC5000_TUNER_RESET, 0);
91bd625e 316 if (ret) {
aacb9d31 317 printk(KERN_ERR "xc5000: reset failed\n");
859ae7f0 318 return ret;
91bd625e
DH
319 }
320 } else {
27c685a4 321 printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
859ae7f0 322 return -EINVAL;
91bd625e 323 }
859ae7f0 324 return 0;
aacb9d31
ST
325}
326
303ddd92 327static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data)
aacb9d31 328{
e12671cf 329 u8 buf[4];
303ddd92 330 int watch_dog_timer = 100;
aacb9d31
ST
331 int result;
332
303ddd92
MCC
333 buf[0] = (reg_addr >> 8) & 0xFF;
334 buf[1] = reg_addr & 0xFF;
335 buf[2] = (i2c_data >> 8) & 0xFF;
336 buf[3] = i2c_data & 0xFF;
aacb9d31 337 result = xc_send_i2c_data(priv, buf, 4);
859ae7f0 338 if (result == 0) {
aacb9d31 339 /* wait for busy flag to clear */
303ddd92 340 while ((watch_dog_timer > 0) && (result == 0)) {
1cdffda7 341 result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
859ae7f0 342 if (result == 0) {
4743319f
DB
343 if ((buf[0] == 0) && (buf[1] == 0)) {
344 /* busy flag cleared */
aacb9d31 345 break;
4743319f 346 } else {
e5bf4a11 347 msleep(5); /* wait 5 ms */
303ddd92 348 watch_dog_timer--;
aacb9d31
ST
349 }
350 }
351 }
352 }
303ddd92 353 if (watch_dog_timer <= 0)
859ae7f0 354 result = -EREMOTEIO;
aacb9d31
ST
355
356 return result;
357}
358
c63e87e9 359static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
aacb9d31
ST
360{
361 struct xc5000_priv *priv = fe->tuner_priv;
362
363 int i, nbytes_to_send, result;
364 unsigned int len, pos, index;
e12671cf 365 u8 buf[XC_MAX_I2C_WRITE_LENGTH];
aacb9d31 366
8f3cd530
ST
367 index = 0;
368 while ((i2c_sequence[index] != 0xFF) ||
369 (i2c_sequence[index + 1] != 0xFF)) {
370 len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
e12671cf 371 if (len == 0x0000) {
aacb9d31 372 /* RESET command */
303ddd92 373 result = xc5000_tuner_reset(fe);
aacb9d31 374 index += 2;
859ae7f0 375 if (result != 0)
aacb9d31
ST
376 return result;
377 } else if (len & 0x8000) {
378 /* WAIT command */
e5bf4a11 379 msleep(len & 0x7FFF);
aacb9d31
ST
380 index += 2;
381 } else {
382 /* Send i2c data whilst ensuring individual transactions
383 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
384 */
385 index += 2;
386 buf[0] = i2c_sequence[index];
387 buf[1] = i2c_sequence[index + 1];
388 pos = 2;
389 while (pos < len) {
8f3cd530
ST
390 if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
391 nbytes_to_send =
392 XC_MAX_I2C_WRITE_LENGTH;
393 else
aacb9d31 394 nbytes_to_send = (len - pos + 2);
8f3cd530
ST
395 for (i = 2; i < nbytes_to_send; i++) {
396 buf[i] = i2c_sequence[index + pos +
397 i - 2];
aacb9d31 398 }
8f3cd530
ST
399 result = xc_send_i2c_data(priv, buf,
400 nbytes_to_send);
aacb9d31 401
859ae7f0 402 if (result != 0)
aacb9d31
ST
403 return result;
404
405 pos += nbytes_to_send - 2;
406 }
407 index += len;
408 }
409 }
859ae7f0 410 return 0;
aacb9d31
ST
411}
412
e12671cf 413static int xc_initialize(struct xc5000_priv *priv)
aacb9d31 414{
271ddbf7 415 dprintk(1, "%s()\n", __func__);
aacb9d31
ST
416 return xc_write_reg(priv, XREG_INIT, 0);
417}
418
303ddd92
MCC
419static int xc_set_tv_standard(struct xc5000_priv *priv,
420 u16 video_mode, u16 audio_mode, u8 radio_mode)
aacb9d31
ST
421{
422 int ret;
303ddd92
MCC
423 dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
424 if (radio_mode) {
01ae7286
DB
425 dprintk(1, "%s() Standard = %s\n",
426 __func__,
303ddd92 427 xc5000_standard[radio_mode].name);
01ae7286
DB
428 } else {
429 dprintk(1, "%s() Standard = %s\n",
430 __func__,
303ddd92 431 xc5000_standard[priv->video_standard].name);
01ae7286 432 }
aacb9d31 433
303ddd92 434 ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
859ae7f0 435 if (ret == 0)
303ddd92 436 ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
aacb9d31
ST
437
438 return ret;
439}
440
303ddd92 441static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode)
aacb9d31 442{
271ddbf7 443 dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
aacb9d31
ST
444 rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
445
8f3cd530 446 if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
aacb9d31
ST
447 rf_mode = XC_RF_MODE_CABLE;
448 printk(KERN_ERR
449 "%s(), Invalid mode, defaulting to CABLE",
271ddbf7 450 __func__);
aacb9d31
ST
451 }
452 return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
453}
454
e12671cf 455static const struct dvb_tuner_ops xc5000_tuner_ops;
aacb9d31 456
303ddd92 457static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz)
e12671cf
ST
458{
459 u16 freq_code;
aacb9d31 460
271ddbf7 461 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 462
e12671cf
ST
463 if ((freq_hz > xc5000_tuner_ops.info.frequency_max) ||
464 (freq_hz < xc5000_tuner_ops.info.frequency_min))
859ae7f0 465 return -EINVAL;
aacb9d31 466
e12671cf
ST
467 freq_code = (u16)(freq_hz / 15625);
468
81c4dfe7
DH
469 /* Starting in firmware version 1.1.44, Xceive recommends using the
470 FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
471 only be used for fast scanning for channel lock) */
472 return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
aacb9d31
ST
473}
474
aacb9d31 475
e12671cf
ST
476static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
477{
478 u32 freq_code = (freq_khz * 1024)/1000;
479 dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
271ddbf7 480 __func__, freq_khz, freq_code);
aacb9d31 481
e12671cf 482 return xc_write_reg(priv, XREG_IF_OUT, freq_code);
aacb9d31
ST
483}
484
aacb9d31 485
303ddd92 486static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope)
aacb9d31 487{
bdd33563 488 return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
aacb9d31
ST
489}
490
e12671cf 491static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
aacb9d31
ST
492{
493 int result;
303ddd92 494 u16 reg_data;
aacb9d31
ST
495 u32 tmp;
496
303ddd92 497 result = xc5000_readreg(priv, XREG_FREQ_ERROR, &reg_data);
859ae7f0 498 if (result != 0)
aacb9d31
ST
499 return result;
500
303ddd92 501 tmp = (u32)reg_data;
e12671cf 502 (*freq_error_hz) = (tmp * 15625) / 1000;
aacb9d31
ST
503 return result;
504}
505
e12671cf 506static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
aacb9d31 507{
bdd33563 508 return xc5000_readreg(priv, XREG_LOCK, lock_status);
aacb9d31
ST
509}
510
e12671cf
ST
511static int xc_get_version(struct xc5000_priv *priv,
512 u8 *hw_majorversion, u8 *hw_minorversion,
513 u8 *fw_majorversion, u8 *fw_minorversion)
aacb9d31 514{
e12671cf 515 u16 data;
aacb9d31
ST
516 int result;
517
bdd33563 518 result = xc5000_readreg(priv, XREG_VERSION, &data);
859ae7f0 519 if (result != 0)
aacb9d31
ST
520 return result;
521
e12671cf
ST
522 (*hw_majorversion) = (data >> 12) & 0x0F;
523 (*hw_minorversion) = (data >> 8) & 0x0F;
524 (*fw_majorversion) = (data >> 4) & 0x0F;
525 (*fw_minorversion) = data & 0x0F;
aacb9d31
ST
526
527 return 0;
528}
529
bae7b7d7
DH
530static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
531{
532 return xc5000_readreg(priv, XREG_BUILD, buildrev);
533}
534
e12671cf 535static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
aacb9d31 536{
303ddd92 537 u16 reg_data;
aacb9d31
ST
538 int result;
539
303ddd92 540 result = xc5000_readreg(priv, XREG_HSYNC_FREQ, &reg_data);
859ae7f0 541 if (result != 0)
aacb9d31
ST
542 return result;
543
303ddd92 544 (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
aacb9d31
ST
545 return result;
546}
547
e12671cf 548static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
aacb9d31 549{
bdd33563 550 return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
aacb9d31
ST
551}
552
e12671cf 553static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
aacb9d31 554{
bdd33563 555 return xc5000_readreg(priv, XREG_QUALITY, quality);
aacb9d31
ST
556}
557
7c287f18
DH
558static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
559{
560 return xc5000_readreg(priv, XREG_SNR, snr);
561}
562
563static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
564{
565 return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
566}
567
303ddd92 568static u16 wait_for_lock(struct xc5000_priv *priv)
aacb9d31 569{
303ddd92
MCC
570 u16 lock_state = 0;
571 int watch_dog_count = 40;
e12671cf 572
303ddd92
MCC
573 while ((lock_state == 0) && (watch_dog_count > 0)) {
574 xc_get_lock_status(priv, &lock_state);
575 if (lock_state != 1) {
e5bf4a11 576 msleep(5);
303ddd92 577 watch_dog_count--;
aacb9d31
ST
578 }
579 }
303ddd92 580 return lock_state;
aacb9d31
ST
581}
582
a78baacf
DH
583#define XC_TUNE_ANALOG 0
584#define XC_TUNE_DIGITAL 1
585static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
aacb9d31
ST
586{
587 int found = 0;
588
271ddbf7 589 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 590
303ddd92 591 if (xc_set_rf_frequency(priv, freq_hz) != 0)
aacb9d31
ST
592 return 0;
593
a78baacf 594 if (mode == XC_TUNE_ANALOG) {
303ddd92 595 if (wait_for_lock(priv) == 1)
a78baacf
DH
596 found = 1;
597 }
aacb9d31
ST
598
599 return found;
600}
601
7d3d0d8d
MK
602static int xc_set_xtal(struct dvb_frontend *fe)
603{
604 struct xc5000_priv *priv = fe->tuner_priv;
859ae7f0 605 int ret = 0;
7d3d0d8d
MK
606
607 switch (priv->chip_id) {
608 default:
609 case XC5000A:
610 /* 32.000 MHz xtal is default */
611 break;
612 case XC5000C:
613 switch (priv->xtal_khz) {
614 default:
615 case 32000:
616 /* 32.000 MHz xtal is default */
617 break;
618 case 31875:
619 /* 31.875 MHz xtal configuration */
620 ret = xc_write_reg(priv, 0x000f, 0x8081);
621 break;
622 }
623 break;
624 }
625 return ret;
626}
aacb9d31 627
8f3cd530 628static int xc5000_fwupload(struct dvb_frontend *fe)
aacb9d31
ST
629{
630 struct xc5000_priv *priv = fe->tuner_priv;
631 const struct firmware *fw;
632 int ret;
a3db60bc
MK
633 const struct xc5000_fw_cfg *desired_fw =
634 xc5000_assign_firmware(priv->chip_id);
de49bc6e 635 priv->pll_register_no = desired_fw->pll_reg;
22d5c6f5
DH
636 priv->init_status_supported = desired_fw->init_status_supported;
637 priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
aacb9d31 638
e12671cf
ST
639 /* request the firmware, this will block and timeout */
640 printk(KERN_INFO "xc5000: waiting for firmware upload (%s)...\n",
6fab81df 641 desired_fw->name);
e12671cf 642
6fab81df 643 ret = request_firmware(&fw, desired_fw->name,
e9785250 644 priv->i2c_props.adap->dev.parent);
aacb9d31
ST
645 if (ret) {
646 printk(KERN_ERR "xc5000: Upload failed. (file not found?)\n");
5ea60531 647 goto out;
aacb9d31 648 } else {
34a0db92 649 printk(KERN_DEBUG "xc5000: firmware read %Zu bytes.\n",
3f51451b 650 fw->size);
859ae7f0 651 ret = 0;
aacb9d31
ST
652 }
653
6fab81df 654 if (fw->size != desired_fw->size) {
aacb9d31 655 printk(KERN_ERR "xc5000: firmware incorrect size\n");
859ae7f0 656 ret = -EINVAL;
aacb9d31 657 } else {
34a0db92 658 printk(KERN_INFO "xc5000: firmware uploading...\n");
8f3cd530 659 ret = xc_load_i2c_sequence(fe, fw->data);
859ae7f0 660 if (0 == ret)
7d3d0d8d 661 ret = xc_set_xtal(fe);
859ae7f0 662 if (0 == ret)
35320676
MK
663 printk(KERN_INFO "xc5000: firmware upload complete...\n");
664 else
665 printk(KERN_ERR "xc5000: firmware upload failed...\n");
aacb9d31
ST
666 }
667
5ea60531 668out:
aacb9d31
ST
669 release_firmware(fw);
670 return ret;
671}
672
e12671cf 673static void xc_debug_dump(struct xc5000_priv *priv)
aacb9d31 674{
e12671cf
ST
675 u16 adc_envelope;
676 u32 freq_error_hz = 0;
677 u16 lock_status;
678 u32 hsync_freq_hz = 0;
679 u16 frame_lines;
680 u16 quality;
7c287f18
DH
681 u16 snr;
682 u16 totalgain;
e12671cf
ST
683 u8 hw_majorversion = 0, hw_minorversion = 0;
684 u8 fw_majorversion = 0, fw_minorversion = 0;
bae7b7d7 685 u16 fw_buildversion = 0;
de49bc6e 686 u16 regval;
aacb9d31
ST
687
688 /* Wait for stats to stabilize.
689 * Frame Lines needs two frame times after initial lock
690 * before it is valid.
691 */
e5bf4a11 692 msleep(100);
aacb9d31 693
303ddd92 694 xc_get_adc_envelope(priv, &adc_envelope);
e12671cf 695 dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
aacb9d31 696
e12671cf
ST
697 xc_get_frequency_error(priv, &freq_error_hz);
698 dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
aacb9d31 699
e12671cf
ST
700 xc_get_lock_status(priv, &lock_status);
701 dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
aacb9d31
ST
702 lock_status);
703
704 xc_get_version(priv, &hw_majorversion, &hw_minorversion,
e12671cf 705 &fw_majorversion, &fw_minorversion);
bae7b7d7 706 xc_get_buildversion(priv, &fw_buildversion);
ca60a45d 707 dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
aacb9d31 708 hw_majorversion, hw_minorversion,
bae7b7d7 709 fw_majorversion, fw_minorversion, fw_buildversion);
aacb9d31 710
e12671cf
ST
711 xc_get_hsync_freq(priv, &hsync_freq_hz);
712 dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
aacb9d31 713
e12671cf
ST
714 xc_get_frame_lines(priv, &frame_lines);
715 dprintk(1, "*** Frame lines = %d\n", frame_lines);
aacb9d31 716
e12671cf 717 xc_get_quality(priv, &quality);
1aa9c487 718 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
7c287f18
DH
719
720 xc_get_analogsnr(priv, &snr);
721 dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
722
723 xc_get_totalgain(priv, &totalgain);
724 dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
725 (totalgain % 256) * 100 / 256);
de49bc6e
DH
726
727 if (priv->pll_register_no) {
728 xc5000_readreg(priv, priv->pll_register_no, &regval);
729 dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
730 }
aacb9d31
ST
731}
732
14d24d14 733static int xc5000_set_params(struct dvb_frontend *fe)
aacb9d31 734{
fd66c45d 735 int ret, b;
aacb9d31 736 struct xc5000_priv *priv = fe->tuner_priv;
fd66c45d
MCC
737 u32 bw = fe->dtv_property_cache.bandwidth_hz;
738 u32 freq = fe->dtv_property_cache.frequency;
739 u32 delsys = fe->dtv_property_cache.delivery_system;
aacb9d31 740
859ae7f0 741 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
fc7a74ba
DH
742 dprintk(1, "Unable to load firmware and init tuner\n");
743 return -EINVAL;
760c466c 744 }
8e4c6797 745
fd66c45d 746 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
aacb9d31 747
fd66c45d
MCC
748 switch (delsys) {
749 case SYS_ATSC:
750 dprintk(1, "%s() VSB modulation\n", __func__);
751 priv->rf_mode = XC_RF_MODE_AIR;
752 priv->freq_hz = freq - 1750000;
fd66c45d
MCC
753 priv->video_standard = DTV6;
754 break;
755 case SYS_DVBC_ANNEX_B:
756 dprintk(1, "%s() QAM modulation\n", __func__);
757 priv->rf_mode = XC_RF_MODE_CABLE;
758 priv->freq_hz = freq - 1750000;
fd66c45d
MCC
759 priv->video_standard = DTV6;
760 break;
5cf73ce1
MCC
761 case SYS_ISDBT:
762 /* All ISDB-T are currently for 6 MHz bw */
763 if (!bw)
764 bw = 6000000;
765 /* fall to OFDM handling */
766 case SYS_DMBTH:
fd66c45d
MCC
767 case SYS_DVBT:
768 case SYS_DVBT2:
6c99080d 769 dprintk(1, "%s() OFDM\n", __func__);
fd66c45d
MCC
770 switch (bw) {
771 case 6000000:
6c99080d 772 priv->video_standard = DTV6;
fd66c45d 773 priv->freq_hz = freq - 1750000;
6c99080d 774 break;
fd66c45d 775 case 7000000:
0433cd28 776 priv->video_standard = DTV7;
fd66c45d 777 priv->freq_hz = freq - 2250000;
0433cd28 778 break;
fd66c45d 779 case 8000000:
6c99080d 780 priv->video_standard = DTV8;
fd66c45d 781 priv->freq_hz = freq - 2750000;
6c99080d
DW
782 break;
783 default:
784 printk(KERN_ERR "xc5000 bandwidth not set!\n");
785 return -EINVAL;
786 }
aacb9d31 787 priv->rf_mode = XC_RF_MODE_AIR;
cf1364b1 788 break;
fd66c45d
MCC
789 case SYS_DVBC_ANNEX_A:
790 case SYS_DVBC_ANNEX_C:
791 dprintk(1, "%s() QAM modulation\n", __func__);
792 priv->rf_mode = XC_RF_MODE_CABLE;
793 if (bw <= 6000000) {
fd66c45d
MCC
794 priv->video_standard = DTV6;
795 priv->freq_hz = freq - 1750000;
796 b = 6;
797 } else if (bw <= 7000000) {
fd66c45d
MCC
798 priv->video_standard = DTV7;
799 priv->freq_hz = freq - 2250000;
800 b = 7;
801 } else {
fd66c45d
MCC
802 priv->video_standard = DTV7_8;
803 priv->freq_hz = freq - 2750000;
804 b = 8;
e80edce1 805 }
fd66c45d
MCC
806 dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
807 b, bw);
808 break;
809 default:
810 printk(KERN_ERR "xc5000: delivery system is not supported!\n");
aacb9d31
ST
811 return -EINVAL;
812 }
813
fd66c45d
MCC
814 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
815 __func__, freq, priv->freq_hz);
aacb9d31 816
303ddd92 817 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 818 if (ret != 0) {
e12671cf 819 printk(KERN_ERR
303ddd92 820 "xc5000: xc_set_signal_source(%d) failed\n",
e12671cf
ST
821 priv->rf_mode);
822 return -EREMOTEIO;
823 }
aacb9d31 824
303ddd92
MCC
825 ret = xc_set_tv_standard(priv,
826 xc5000_standard[priv->video_standard].video_mode,
827 xc5000_standard[priv->video_standard].audio_mode, 0);
859ae7f0 828 if (ret != 0) {
303ddd92 829 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
e12671cf
ST
830 return -EREMOTEIO;
831 }
832
2a6003c2 833 ret = xc_set_IF_frequency(priv, priv->if_khz);
859ae7f0 834 if (ret != 0) {
e12671cf 835 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
2a6003c2 836 priv->if_khz);
e12671cf
ST
837 return -EIO;
838 }
839
724dcbfa
DB
840 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x8a);
841
a78baacf 842 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
aacb9d31 843
e12671cf
ST
844 if (debug)
845 xc_debug_dump(priv);
aacb9d31 846
c6f56e7d
MCC
847 priv->bandwidth = bw;
848
aacb9d31
ST
849 return 0;
850}
851
e470d817
ST
852static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
853{
854 struct xc5000_priv *priv = fe->tuner_priv;
855 int ret;
856 u16 id;
857
858 ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
859ae7f0 859 if (ret == 0) {
e470d817 860 if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
859ae7f0 861 ret = -ENOENT;
e470d817 862 else
859ae7f0 863 ret = 0;
e470d817
ST
864 }
865
866 dprintk(1, "%s() returns %s id = 0x%x\n", __func__,
859ae7f0 867 ret == 0 ? "True" : "False", id);
e470d817
ST
868 return ret;
869}
870
d7009cdc 871static int xc5000_set_tv_freq(struct dvb_frontend *fe,
27c685a4
ST
872 struct analog_parameters *params)
873{
874 struct xc5000_priv *priv = fe->tuner_priv;
de49bc6e 875 u16 pll_lock_status;
27c685a4
ST
876 int ret;
877
27c685a4 878 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
271ddbf7 879 __func__, params->frequency);
27c685a4 880
1fab14ed
MCC
881 /* Fix me: it could be air. */
882 priv->rf_mode = params->mode;
883 if (params->mode > XC_RF_MODE_CABLE)
884 priv->rf_mode = XC_RF_MODE_CABLE;
27c685a4
ST
885
886 /* params->frequency is in units of 62.5khz */
887 priv->freq_hz = params->frequency * 62500;
888
889 /* FIX ME: Some video standards may have several possible audio
890 standards. We simply default to one of them here.
891 */
8f3cd530 892 if (params->std & V4L2_STD_MN) {
27c685a4
ST
893 /* default to BTSC audio standard */
894 priv->video_standard = MN_NTSC_PAL_BTSC;
895 goto tune_channel;
896 }
897
8f3cd530 898 if (params->std & V4L2_STD_PAL_BG) {
27c685a4
ST
899 /* default to NICAM audio standard */
900 priv->video_standard = BG_PAL_NICAM;
901 goto tune_channel;
902 }
903
8f3cd530 904 if (params->std & V4L2_STD_PAL_I) {
27c685a4
ST
905 /* default to NICAM audio standard */
906 priv->video_standard = I_PAL_NICAM;
907 goto tune_channel;
908 }
909
8f3cd530 910 if (params->std & V4L2_STD_PAL_DK) {
27c685a4
ST
911 /* default to NICAM audio standard */
912 priv->video_standard = DK_PAL_NICAM;
913 goto tune_channel;
914 }
915
8f3cd530 916 if (params->std & V4L2_STD_SECAM_DK) {
27c685a4
ST
917 /* default to A2 DK1 audio standard */
918 priv->video_standard = DK_SECAM_A2DK1;
919 goto tune_channel;
920 }
921
8f3cd530 922 if (params->std & V4L2_STD_SECAM_L) {
27c685a4
ST
923 priv->video_standard = L_SECAM_NICAM;
924 goto tune_channel;
925 }
926
8f3cd530 927 if (params->std & V4L2_STD_SECAM_LC) {
27c685a4
ST
928 priv->video_standard = LC_SECAM_NICAM;
929 goto tune_channel;
930 }
931
932tune_channel:
303ddd92 933 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 934 if (ret != 0) {
8f3cd530 935 printk(KERN_ERR
303ddd92 936 "xc5000: xc_set_signal_source(%d) failed\n",
27c685a4
ST
937 priv->rf_mode);
938 return -EREMOTEIO;
939 }
940
303ddd92
MCC
941 ret = xc_set_tv_standard(priv,
942 xc5000_standard[priv->video_standard].video_mode,
943 xc5000_standard[priv->video_standard].audio_mode, 0);
859ae7f0 944 if (ret != 0) {
303ddd92 945 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
27c685a4
ST
946 return -EREMOTEIO;
947 }
948
724dcbfa
DB
949 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
950
a78baacf 951 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
27c685a4
ST
952
953 if (debug)
954 xc_debug_dump(priv);
955
de49bc6e
DH
956 if (priv->pll_register_no != 0) {
957 msleep(20);
958 xc5000_readreg(priv, priv->pll_register_no, &pll_lock_status);
959 if (pll_lock_status > 63) {
960 /* PLL is unlocked, force reload of the firmware */
961 dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
962 pll_lock_status);
859ae7f0 963 if (xc_load_fw_and_init_tuner(fe, 1) != 0) {
de49bc6e
DH
964 printk(KERN_ERR "xc5000: Unable to reload fw\n");
965 return -EREMOTEIO;
966 }
967 goto tune_channel;
968 }
969 }
970
27c685a4
ST
971 return 0;
972}
973
d7009cdc
BILDB
974static int xc5000_set_radio_freq(struct dvb_frontend *fe,
975 struct analog_parameters *params)
976{
977 struct xc5000_priv *priv = fe->tuner_priv;
978 int ret = -EINVAL;
496e9057 979 u8 radio_input;
d7009cdc
BILDB
980
981 dprintk(1, "%s() frequency=%d (in units of khz)\n",
982 __func__, params->frequency);
983
496e9057
DH
984 if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
985 dprintk(1, "%s() radio input not configured\n", __func__);
986 return -EINVAL;
987 }
988
989 if (priv->radio_input == XC5000_RADIO_FM1)
303ddd92 990 radio_input = FM_RADIO_INPUT1;
496e9057 991 else if (priv->radio_input == XC5000_RADIO_FM2)
303ddd92 992 radio_input = FM_RADIO_INPUT2;
724dcbfa 993 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
303ddd92 994 radio_input = FM_RADIO_INPUT1_MONO;
496e9057
DH
995 else {
996 dprintk(1, "%s() unknown radio input %d\n", __func__,
997 priv->radio_input);
998 return -EINVAL;
999 }
1000
d7009cdc
BILDB
1001 priv->freq_hz = params->frequency * 125 / 2;
1002
1003 priv->rf_mode = XC_RF_MODE_AIR;
1004
303ddd92
MCC
1005 ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
1006 xc5000_standard[radio_input].audio_mode, radio_input);
d7009cdc 1007
859ae7f0 1008 if (ret != 0) {
303ddd92 1009 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
d7009cdc
BILDB
1010 return -EREMOTEIO;
1011 }
1012
303ddd92 1013 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 1014 if (ret != 0) {
d7009cdc 1015 printk(KERN_ERR
303ddd92 1016 "xc5000: xc_set_signal_source(%d) failed\n",
d7009cdc
BILDB
1017 priv->rf_mode);
1018 return -EREMOTEIO;
1019 }
1020
724dcbfa
DB
1021 if ((priv->radio_input == XC5000_RADIO_FM1) ||
1022 (priv->radio_input == XC5000_RADIO_FM2))
1023 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
1024 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1025 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
1026
d7009cdc
BILDB
1027 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
1028
1029 return 0;
1030}
1031
1032static int xc5000_set_analog_params(struct dvb_frontend *fe,
1033 struct analog_parameters *params)
1034{
1035 struct xc5000_priv *priv = fe->tuner_priv;
1036 int ret = -EINVAL;
1037
1038 if (priv->i2c_props.adap == NULL)
1039 return -EINVAL;
1040
859ae7f0 1041 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
fc7a74ba
DH
1042 dprintk(1, "Unable to load firmware and init tuner\n");
1043 return -EINVAL;
760c466c 1044 }
d7009cdc
BILDB
1045
1046 switch (params->mode) {
1047 case V4L2_TUNER_RADIO:
1048 ret = xc5000_set_radio_freq(fe, params);
1049 break;
1050 case V4L2_TUNER_ANALOG_TV:
1051 case V4L2_TUNER_DIGITAL_TV:
1052 ret = xc5000_set_tv_freq(fe, params);
1053 break;
1054 }
1055
1056 return ret;
1057}
1058
1059
aacb9d31
ST
1060static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1061{
1062 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1063 dprintk(1, "%s()\n", __func__);
e12671cf 1064 *freq = priv->freq_hz;
aacb9d31
ST
1065 return 0;
1066}
1067
35621030
MCC
1068static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
1069{
1070 struct xc5000_priv *priv = fe->tuner_priv;
1071 dprintk(1, "%s()\n", __func__);
1072 *freq = priv->if_khz * 1000;
1073 return 0;
1074}
1075
aacb9d31
ST
1076static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1077{
1078 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1079 dprintk(1, "%s()\n", __func__);
27c685a4 1080
aacb9d31
ST
1081 *bw = priv->bandwidth;
1082 return 0;
1083}
1084
1085static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
1086{
1087 struct xc5000_priv *priv = fe->tuner_priv;
e12671cf 1088 u16 lock_status = 0;
aacb9d31
ST
1089
1090 xc_get_lock_status(priv, &lock_status);
1091
271ddbf7 1092 dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
aacb9d31
ST
1093
1094 *status = lock_status;
1095
1096 return 0;
1097}
1098
de49bc6e 1099static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
aacb9d31
ST
1100{
1101 struct xc5000_priv *priv = fe->tuner_priv;
859ae7f0 1102 int ret = 0;
de49bc6e 1103 u16 pll_lock_status;
22d5c6f5 1104 u16 fw_ck;
de49bc6e 1105
f7a27ff1
MCC
1106 cancel_delayed_work(&priv->timer_sleep);
1107
859ae7f0 1108 if (force || xc5000_is_firmware_loaded(fe) != 0) {
de49bc6e
DH
1109
1110fw_retry:
aacb9d31 1111
aacb9d31 1112 ret = xc5000_fwupload(fe);
859ae7f0 1113 if (ret != 0)
e12671cf 1114 return ret;
aacb9d31 1115
de49bc6e
DH
1116 msleep(20);
1117
22d5c6f5
DH
1118 if (priv->fw_checksum_supported) {
1119 if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)
859ae7f0 1120 != 0) {
22d5c6f5
DH
1121 dprintk(1, "%s() FW checksum reading failed.\n",
1122 __func__);
1123 goto fw_retry;
1124 }
1125
1126 if (fw_ck == 0) {
1127 dprintk(1, "%s() FW checksum failed = 0x%04x\n",
1128 __func__, fw_ck);
1129 goto fw_retry;
1130 }
1131 }
1132
fc7a74ba
DH
1133 /* Start the tuner self-calibration process */
1134 ret |= xc_initialize(priv);
aacb9d31 1135
859ae7f0 1136 if (ret != 0)
de49bc6e
DH
1137 goto fw_retry;
1138
fc7a74ba
DH
1139 /* Wait for calibration to complete.
1140 * We could continue but XC5000 will clock stretch subsequent
1141 * I2C transactions until calibration is complete. This way we
1142 * don't have to rely on clock stretching working.
1143 */
e5bf4a11 1144 msleep(100);
aacb9d31 1145
22d5c6f5 1146 if (priv->init_status_supported) {
859ae7f0 1147 if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck) != 0) {
22d5c6f5
DH
1148 dprintk(1, "%s() FW failed reading init status.\n",
1149 __func__);
1150 goto fw_retry;
1151 }
1152
1153 if (fw_ck == 0) {
1154 dprintk(1, "%s() FW init status failed = 0x%04x\n", __func__, fw_ck);
1155 goto fw_retry;
1156 }
1157 }
1158
de49bc6e
DH
1159 if (priv->pll_register_no) {
1160 xc5000_readreg(priv, priv->pll_register_no,
1161 &pll_lock_status);
1162 if (pll_lock_status > 63) {
1163 /* PLL is unlocked, force reload of the firmware */
1164 printk(KERN_ERR "xc5000: PLL not running after fwload.\n");
1165 goto fw_retry;
1166 }
1167 }
1168
fc7a74ba
DH
1169 /* Default to "CABLE" mode */
1170 ret |= xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
1171 }
aacb9d31
ST
1172
1173 return ret;
1174}
1175
f7a27ff1 1176static void xc5000_do_timer_sleep(struct work_struct *timer_sleep)
e12671cf 1177{
f7a27ff1
MCC
1178 struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv,
1179 timer_sleep.work);
1180 struct dvb_frontend *fe = priv->fe;
27c685a4
ST
1181 int ret;
1182
271ddbf7 1183 dprintk(1, "%s()\n", __func__);
e12671cf 1184
7f05b530
DH
1185 /* According to Xceive technical support, the "powerdown" register
1186 was removed in newer versions of the firmware. The "supported"
1187 way to sleep the tuner is to pull the reset pin low for 10ms */
303ddd92 1188 ret = xc5000_tuner_reset(fe);
f7a27ff1 1189 if (ret != 0)
27c685a4
ST
1190 printk(KERN_ERR
1191 "xc5000: %s() unable to shutdown tuner\n",
271ddbf7 1192 __func__);
f7a27ff1
MCC
1193}
1194
1195static int xc5000_sleep(struct dvb_frontend *fe)
1196{
1197 struct xc5000_priv *priv = fe->tuner_priv;
1198
1199 dprintk(1, "%s()\n", __func__);
1200
1201 /* Avoid firmware reload on slow devices */
1202 if (no_poweroff)
859ae7f0 1203 return 0;
f7a27ff1
MCC
1204
1205 schedule_delayed_work(&priv->timer_sleep,
1206 msecs_to_jiffies(XC5000_SLEEP_TIME));
1207
1208 return 0;
e12671cf
ST
1209}
1210
aacb9d31
ST
1211static int xc5000_init(struct dvb_frontend *fe)
1212{
1213 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1214 dprintk(1, "%s()\n", __func__);
aacb9d31 1215
859ae7f0 1216 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
e12671cf
ST
1217 printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
1218 return -EREMOTEIO;
1219 }
1220
1221 if (debug)
1222 xc_debug_dump(priv);
aacb9d31
ST
1223
1224 return 0;
1225}
1226
1227static int xc5000_release(struct dvb_frontend *fe)
1228{
89fd2854
MK
1229 struct xc5000_priv *priv = fe->tuner_priv;
1230
271ddbf7 1231 dprintk(1, "%s()\n", __func__);
89fd2854
MK
1232
1233 mutex_lock(&xc5000_list_mutex);
1234
f7a27ff1
MCC
1235 if (priv) {
1236 cancel_delayed_work(&priv->timer_sleep);
89fd2854 1237 hybrid_tuner_release_state(priv);
f7a27ff1 1238 }
89fd2854
MK
1239
1240 mutex_unlock(&xc5000_list_mutex);
1241
aacb9d31 1242 fe->tuner_priv = NULL;
89fd2854 1243
aacb9d31
ST
1244 return 0;
1245}
1246
724dcbfa
DB
1247static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
1248{
1249 struct xc5000_priv *priv = fe->tuner_priv;
1250 struct xc5000_config *p = priv_cfg;
1251
1252 dprintk(1, "%s()\n", __func__);
1253
1254 if (p->if_khz)
1255 priv->if_khz = p->if_khz;
1256
1257 if (p->radio_input)
1258 priv->radio_input = p->radio_input;
1259
1260 return 0;
1261}
1262
1263
aacb9d31
ST
1264static const struct dvb_tuner_ops xc5000_tuner_ops = {
1265 .info = {
1266 .name = "Xceive XC5000",
1267 .frequency_min = 1000000,
1268 .frequency_max = 1023000000,
1269 .frequency_step = 50000,
1270 },
1271
27c685a4
ST
1272 .release = xc5000_release,
1273 .init = xc5000_init,
1274 .sleep = xc5000_sleep,
aacb9d31 1275
724dcbfa 1276 .set_config = xc5000_set_config,
27c685a4
ST
1277 .set_params = xc5000_set_params,
1278 .set_analog_params = xc5000_set_analog_params,
1279 .get_frequency = xc5000_get_frequency,
35621030 1280 .get_if_frequency = xc5000_get_if_frequency,
27c685a4
ST
1281 .get_bandwidth = xc5000_get_bandwidth,
1282 .get_status = xc5000_get_status
aacb9d31
ST
1283};
1284
48723543
MK
1285struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1286 struct i2c_adapter *i2c,
2e4e98e7 1287 const struct xc5000_config *cfg)
aacb9d31
ST
1288{
1289 struct xc5000_priv *priv = NULL;
89fd2854 1290 int instance;
aacb9d31
ST
1291 u16 id = 0;
1292
89fd2854
MK
1293 dprintk(1, "%s(%d-%04x)\n", __func__,
1294 i2c ? i2c_adapter_id(i2c) : -1,
1295 cfg ? cfg->i2c_address : -1);
aacb9d31 1296
89fd2854 1297 mutex_lock(&xc5000_list_mutex);
aacb9d31 1298
89fd2854
MK
1299 instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
1300 hybrid_tuner_instance_list,
1301 i2c, cfg->i2c_address, "xc5000");
1302 switch (instance) {
1303 case 0:
1304 goto fail;
1305 break;
1306 case 1:
1307 /* new tuner instance */
c6f56e7d 1308 priv->bandwidth = 6000000;
89fd2854 1309 fe->tuner_priv = priv;
f7a27ff1
MCC
1310 priv->fe = fe;
1311 INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep);
89fd2854
MK
1312 break;
1313 default:
1314 /* existing tuner instance */
1315 fe->tuner_priv = priv;
1316 break;
1317 }
aacb9d31 1318
ea227863
DH
1319 if (priv->if_khz == 0) {
1320 /* If the IF hasn't been set yet, use the value provided by
1321 the caller (occurs in hybrid devices where the analog
1322 call to xc5000_attach occurs before the digital side) */
1323 priv->if_khz = cfg->if_khz;
1324 }
1325
7d3d0d8d
MK
1326 if (priv->xtal_khz == 0)
1327 priv->xtal_khz = cfg->xtal_khz;
1328
496e9057
DH
1329 if (priv->radio_input == 0)
1330 priv->radio_input = cfg->radio_input;
1331
6fab81df 1332 /* don't override chip id if it's already been set
76efb0ba 1333 unless explicitly specified */
6fab81df
MK
1334 if ((priv->chip_id == 0) || (cfg->chip_id))
1335 /* use default chip id if none specified, set to 0 so
1336 it can be overridden if this is a hybrid driver */
1337 priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
76efb0ba 1338
27c685a4
ST
1339 /* Check if firmware has been loaded. It is possible that another
1340 instance of the driver has loaded the firmware.
1341 */
859ae7f0 1342 if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
89fd2854 1343 goto fail;
aacb9d31 1344
8f3cd530 1345 switch (id) {
27c685a4
ST
1346 case XC_PRODUCT_ID_FW_LOADED:
1347 printk(KERN_INFO
1348 "xc5000: Successfully identified at address 0x%02x\n",
1349 cfg->i2c_address);
1350 printk(KERN_INFO
1351 "xc5000: Firmware has been loaded previously\n");
27c685a4
ST
1352 break;
1353 case XC_PRODUCT_ID_FW_NOT_LOADED:
1354 printk(KERN_INFO
1355 "xc5000: Successfully identified at address 0x%02x\n",
1356 cfg->i2c_address);
1357 printk(KERN_INFO
1358 "xc5000: Firmware has not been loaded previously\n");
27c685a4
ST
1359 break;
1360 default:
aacb9d31
ST
1361 printk(KERN_ERR
1362 "xc5000: Device not found at addr 0x%02x (0x%x)\n",
1363 cfg->i2c_address, id);
89fd2854 1364 goto fail;
aacb9d31
ST
1365 }
1366
89fd2854
MK
1367 mutex_unlock(&xc5000_list_mutex);
1368
aacb9d31
ST
1369 memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
1370 sizeof(struct dvb_tuner_ops));
1371
aacb9d31 1372 return fe;
89fd2854
MK
1373fail:
1374 mutex_unlock(&xc5000_list_mutex);
1375
1376 xc5000_release(fe);
1377 return NULL;
aacb9d31
ST
1378}
1379EXPORT_SYMBOL(xc5000_attach);
1380
1381MODULE_AUTHOR("Steven Toth");
e12671cf 1382MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
aacb9d31 1383MODULE_LICENSE("GPL");
3422f2a6
TG
1384MODULE_FIRMWARE(XC5000A_FIRMWARE);
1385MODULE_FIRMWARE(XC5000C_FIRMWARE);
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