projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus
[deliverable/linux.git] / drivers / media / usb / cx231xx / cx231xx-core.c
CommitLineData
e0d3bafd 1/*
b9255176
SD		 2 cx231xx-core.c - driver for Conexant Cx23100/101/102
3 USB video capture devices
e0d3bafd
SD		 4
5 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
b9255176 6 Based on em28xx driver
e0d3bafd
SD		 7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
589dadf2 23#include "cx231xx.h"
e0d3bafd
SD		 24#include <linux/init.h>
25#include <linux/list.h>
26#include <linux/module.h>
5a0e3ad6 27#include <linux/slab.h>
e0d3bafd
SD		 28#include <linux/vmalloc.h>
29#include <media/v4l2-common.h>
64fbf444 30#include <media/tuner.h>
e0d3bafd 31
e0d3bafd
SD		 32#include "cx231xx-reg.h"
33
34/* #define ENABLE_DEBUG_ISOC_FRAMES */
35
36static unsigned int core_debug;
84b5dbf3
MCC		 37module_param(core_debug, int, 0644);
38MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
e0d3bafd
SD		 39
40#define cx231xx_coredbg(fmt, arg...) do {\
41 if (core_debug) \
42 printk(KERN_INFO "%s %s :"fmt, \
43 dev->name, __func__ , ##arg); } while (0)
44
45static unsigned int reg_debug;
84b5dbf3
MCC		 46module_param(reg_debug, int, 0644);
47MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
e0d3bafd 48
e0d3bafd
SD		 49static int alt = CX231XX_PINOUT;
50module_param(alt, int, 0644);
51MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
52
e0d3bafd
SD		 53#define cx231xx_isocdbg(fmt, arg...) do {\
54 if (core_debug) \
55 printk(KERN_INFO "%s %s :"fmt, \
56 dev->name, __func__ , ##arg); } while (0)
57
b9255176
SD		 58/*****************************************************************
59* Device control list functions *
60******************************************************************/
e0d3bafd 61
64fbf444 62LIST_HEAD(cx231xx_devlist);
e0d3bafd
SD		 63static DEFINE_MUTEX(cx231xx_devlist_mutex);
64
e0d3bafd
SD		 65/*
66 * cx231xx_realease_resources()
67 * unregisters the v4l2,i2c and usb devices
68 * called when the device gets disconected or at module unload
69*/
70void cx231xx_remove_from_devlist(struct cx231xx *dev)
71{
64fbf444
PB		 72 if (dev == NULL)
73 return;
74 if (dev->udev == NULL)
75 return;
76
77 if (atomic_read(&dev->devlist_count) > 0) {
78 mutex_lock(&cx231xx_devlist_mutex);
79 list_del(&dev->devlist);
80 atomic_dec(&dev->devlist_count);
81 mutex_unlock(&cx231xx_devlist_mutex);
82 }
e0d3bafd
SD		 83};
84
85void cx231xx_add_into_devlist(struct cx231xx *dev)
86{
87 mutex_lock(&cx231xx_devlist_mutex);
88 list_add_tail(&dev->devlist, &cx231xx_devlist);
64fbf444 89 atomic_inc(&dev->devlist_count);
e0d3bafd
SD		 90 mutex_unlock(&cx231xx_devlist_mutex);
91};
92
e0d3bafd 93static LIST_HEAD(cx231xx_extension_devlist);
e0d3bafd
SD		 94
95int cx231xx_register_extension(struct cx231xx_ops *ops)
96{
97 struct cx231xx *dev = NULL;
98
99 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd 100 list_add_tail(&ops->next, &cx231xx_extension_devlist);
fb1817e4 101 list_for_each_entry(dev, &cx231xx_devlist, devlist) {
a9fac6b1 102 ops->init(dev);
336fea92 103 dev_info(dev->dev, "%s initialized\n", ops->name);
fb1817e4 104 }
e0d3bafd
SD		 105 mutex_unlock(&cx231xx_devlist_mutex);
106 return 0;
107}
108EXPORT_SYMBOL(cx231xx_register_extension);
109
110void cx231xx_unregister_extension(struct cx231xx_ops *ops)
111{
112 struct cx231xx *dev = NULL;
113
114 mutex_lock(&cx231xx_devlist_mutex);
fb1817e4 115 list_for_each_entry(dev, &cx231xx_devlist, devlist) {
a9fac6b1 116 ops->fini(dev);
336fea92 117 dev_info(dev->dev, "%s removed\n", ops->name);
fb1817e4 118 }
e0d3bafd 119
e0d3bafd 120 list_del(&ops->next);
e0d3bafd
SD		 121 mutex_unlock(&cx231xx_devlist_mutex);
122}
84b5dbf3 123EXPORT_SYMBOL(cx231xx_unregister_extension);
e0d3bafd
SD		 124
125void cx231xx_init_extension(struct cx231xx *dev)
126{
127 struct cx231xx_ops *ops = NULL;
128
761f6cf6 129 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 130 if (!list_empty(&cx231xx_extension_devlist)) {
131 list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
132 if (ops->init)
133 ops->init(dev);
134 }
135 }
761f6cf6 136 mutex_unlock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 137}
138
139void cx231xx_close_extension(struct cx231xx *dev)
140{
141 struct cx231xx_ops *ops = NULL;
142
761f6cf6 143 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 144 if (!list_empty(&cx231xx_extension_devlist)) {
145 list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
146 if (ops->fini)
147 ops->fini(dev);
148 }
149 }
761f6cf6 150 mutex_unlock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 151}
152
b9255176
SD		 153/****************************************************************
154* U S B related functions *
155*****************************************************************/
e0d3bafd 156int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
84b5dbf3 157 struct cx231xx_i2c_xfer_data *req_data)
e0d3bafd 158{
84b5dbf3
MCC		 159 int status = 0;
160 struct cx231xx *dev = i2c_bus->dev;
b9255176 161 struct VENDOR_REQUEST_IN ven_req;
84b5dbf3
MCC		 162
163 u8 saddr_len = 0;
164 u8 _i2c_period = 0;
165 u8 _i2c_nostop = 0;
166 u8 _i2c_reserve = 0;
167
7528cd27
MCC		 168 if (dev->state & DEV_DISCONNECTED)
169 return -ENODEV;
170
84b5dbf3
MCC		 171 /* Get the I2C period, nostop and reserve parameters */
172 _i2c_period = i2c_bus->i2c_period;
173 _i2c_nostop = i2c_bus->i2c_nostop;
174 _i2c_reserve = i2c_bus->i2c_reserve;
175
176 saddr_len = req_data->saddr_len;
177
178 /* Set wValue */
9713883b
NMG		 179 ven_req.wValue = (req_data->dev_addr << 9 | _i2c_period << 4 |
180 saddr_len << 2 | _i2c_nostop << 1 | I2C_SYNC |
181 _i2c_reserve << 6);
84b5dbf3
MCC		 182
183 /* set channel number */
b9255176
SD		 184 if (req_data->direction & I2C_M_RD) {
185 /* channel number, for read,spec required channel_num +4 */
186 ven_req.bRequest = i2c_bus->nr + 4;
187 } else
84b5dbf3
MCC		 188 ven_req.bRequest = i2c_bus->nr; /* channel number, */
189
190 /* set index value */
191 switch (saddr_len) {
192 case 0:
193 ven_req.wIndex = 0; /* need check */
194 break;
195 case 1:
196 ven_req.wIndex = (req_data->saddr_dat & 0xff);
197 break;
198 case 2:
199 ven_req.wIndex = req_data->saddr_dat;
200 break;
201 }
202
203 /* set wLength value */
204 ven_req.wLength = req_data->buf_size;
205
206 /* set bData value */
207 ven_req.bData = 0;
208
209 /* set the direction */
210 if (req_data->direction) {
211 ven_req.direction = USB_DIR_IN;
212 memset(req_data->p_buffer, 0x00, ven_req.wLength);
213 } else
214 ven_req.direction = USB_DIR_OUT;
215
216 /* set the buffer for read / write */
217 ven_req.pBuff = req_data->p_buffer;
218
219
220 /* call common vendor command request */
221 status = cx231xx_send_vendor_cmd(dev, &ven_req);
77e97ba2 222 if (status < 0 && !dev->i2c_scan_running) {
336fea92 223 dev_err(dev->dev, "%s: failed with status -%d\n",
ed0e3729 224 __func__, status);
84b5dbf3
MCC		 225 }
226
227 return status;
e0d3bafd 228}
e0d3bafd 229EXPORT_SYMBOL_GPL(cx231xx_send_usb_command);
b9255176 230
24c80b65
MCC		 231/*
232 * Sends/Receives URB control messages, assuring to use a kalloced buffer
233 * for all operations (dev->urb_buf), to avoid using stacked buffers, as
234 * they aren't safe for usage with USB, due to DMA restrictions.
235 * Also implements the debug code for control URB's.
236 */
237static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe,
238 __u8 request, __u8 requesttype, __u16 value, __u16 index,
239 void *data, __u16 size, int timeout)
240{
241 int rc, i;
242
243 if (reg_debug) {
244 printk(KERN_DEBUG "%s: (pipe 0x%08x): "
245 "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
246 dev->name,
247 pipe,
248 (requesttype & USB_DIR_IN) ? "IN" : "OUT",
249 requesttype,
250 request,
251 value & 0xff, value >> 8,
252 index & 0xff, index >> 8,
253 size & 0xff, size >> 8);
254 if (!(requesttype & USB_DIR_IN)) {
255 printk(KERN_CONT ">>>");
256 for (i = 0; i < size; i++)
257 printk(KERN_CONT " %02x",
258 ((unsigned char *)data)[i]);
259 }
260 }
261
262 /* Do the real call to usb_control_msg */
263 mutex_lock(&dev->ctrl_urb_lock);
264 if (!(requesttype & USB_DIR_IN) && size)
265 memcpy(dev->urb_buf, data, size);
266 rc = usb_control_msg(dev->udev, pipe, request, requesttype, value,
267 index, dev->urb_buf, size, timeout);
268 if ((requesttype & USB_DIR_IN) && size)
269 memcpy(data, dev->urb_buf, size);
270 mutex_unlock(&dev->ctrl_urb_lock);
271
272 if (reg_debug) {
273 if (unlikely(rc < 0)) {
274 printk(KERN_CONT "FAILED!\n");
275 return rc;
276 }
277
278 if ((requesttype & USB_DIR_IN)) {
279 printk(KERN_CONT "<<<");
280 for (i = 0; i < size; i++)
281 printk(KERN_CONT " %02x",
282 ((unsigned char *)data)[i]);
283 }
284 printk(KERN_CONT "\n");
285 }
286
287 return rc;
288}
289
290
e0d3bafd
SD		 291/*
292 * cx231xx_read_ctrl_reg()
293 * reads data from the usb device specifying bRequest and wValue
294 */
295int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 296 char *buf, int len)
e0d3bafd 297{
84b5dbf3 298 u8 val = 0;
e0d3bafd
SD		 299 int ret;
300 int pipe = usb_rcvctrlpipe(dev->udev, 0);
301
302 if (dev->state & DEV_DISCONNECTED)
303 return -ENODEV;
304
305 if (len > URB_MAX_CTRL_SIZE)
306 return -EINVAL;
307
84b5dbf3
MCC		 308 switch (len) {
309 case 1:
310 val = ENABLE_ONE_BYTE;
311 break;
312 case 2:
313 val = ENABLE_TWE_BYTE;
314 break;
315 case 3:
316 val = ENABLE_THREE_BYTE;
317 break;
318 case 4:
319 val = ENABLE_FOUR_BYTE;
320 break;
321 default:
322 val = 0xFF; /* invalid option */
323 }
324
325 if (val == 0xFF)
326 return -EINVAL;
e0d3bafd 327
24c80b65 328 ret = __usb_control_msg(dev, pipe, req,
e0d3bafd 329 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
24c80b65 330 val, reg, buf, len, HZ);
e0d3bafd
SD		 331 return ret;
332}
333
b9255176
SD		 334int cx231xx_send_vendor_cmd(struct cx231xx *dev,
335 struct VENDOR_REQUEST_IN *ven_req)
e0d3bafd 336{
84b5dbf3 337 int ret;
e0d3bafd 338 int pipe = 0;
64fbf444
PB		 339 int unsend_size = 0;
340 u8 *pdata;
e0d3bafd
SD		 341
342 if (dev->state & DEV_DISCONNECTED)
343 return -ENODEV;
344
345 if ((ven_req->wLength > URB_MAX_CTRL_SIZE))
346 return -EINVAL;
347
84b5dbf3
MCC		 348 if (ven_req->direction)
349 pipe = usb_rcvctrlpipe(dev->udev, 0);
350 else
351 pipe = usb_sndctrlpipe(dev->udev, 0);
e0d3bafd 352
24c80b65
MCC		 353 /*
354 * If the cx23102 read more than 4 bytes with i2c bus,
355 * need chop to 4 byte per request
356 */
64fbf444
PB		 357 if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) ||
358 (ven_req->bRequest == 0x5) ||
359 (ven_req->bRequest == 0x6))) {
360 unsend_size = 0;
361 pdata = ven_req->pBuff;
362
363
364 unsend_size = ven_req->wLength;
365
24c80b65 366 /* the first package */
64fbf444
PB		 367 ven_req->wValue = ven_req->wValue & 0xFFFB;
368 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2;
24c80b65
MCC		 369 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
370 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 371 ven_req->wValue, ven_req->wIndex, pdata,
372 0x0004, HZ);
373 unsend_size = unsend_size - 4;
64fbf444 374
24c80b65 375 /* the middle package */
64fbf444
PB		 376 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42;
377 while (unsend_size - 4 > 0) {
378 pdata = pdata + 4;
24c80b65 379 ret = __usb_control_msg(dev, pipe,
64fbf444 380 ven_req->bRequest,
24c80b65 381 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 382 ven_req->wValue, ven_req->wIndex, pdata,
383 0x0004, HZ);
64fbf444
PB		 384 unsend_size = unsend_size - 4;
385 }
386
24c80b65 387 /* the last package */
64fbf444
PB		 388 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40;
389 pdata = pdata + 4;
24c80b65
MCC		 390 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
391 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 392 ven_req->wValue, ven_req->wIndex, pdata,
393 unsend_size, HZ);
64fbf444 394 } else {
24c80b65
MCC		 395 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
396 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444 397 ven_req->wValue, ven_req->wIndex,
24c80b65 398 ven_req->pBuff, ven_req->wLength, HZ);
64fbf444 399 }
e0d3bafd
SD		 400
401 return ret;
402}
403
404/*
405 * cx231xx_write_ctrl_reg()
406 * sends data to the usb device, specifying bRequest
407 */
408int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
84b5dbf3 409 int len)
e0d3bafd 410{
84b5dbf3 411 u8 val = 0;
e0d3bafd
SD		 412 int ret;
413 int pipe = usb_sndctrlpipe(dev->udev, 0);
414
415 if (dev->state & DEV_DISCONNECTED)
416 return -ENODEV;
417
418 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
419 return -EINVAL;
420
84b5dbf3
MCC		 421 switch (len) {
422 case 1:
423 val = ENABLE_ONE_BYTE;
424 break;
425 case 2:
426 val = ENABLE_TWE_BYTE;
427 break;
428 case 3:
429 val = ENABLE_THREE_BYTE;
430 break;
431 case 4:
432 val = ENABLE_FOUR_BYTE;
433 break;
434 default:
435 val = 0xFF; /* invalid option */
436 }
437
438 if (val == 0xFF)
439 return -EINVAL;
e0d3bafd
SD		 440
441 if (reg_debug) {
442 int byte;
443
444 cx231xx_isocdbg("(pipe 0x%08x): "
b9255176
SD		 445 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
446 pipe,
447 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
448 req, 0, val, reg & 0xff,
449 reg >> 8, len & 0xff, len >> 8);
e0d3bafd
SD		 450
451 for (byte = 0; byte < len; byte++)
452 cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]);
453 cx231xx_isocdbg("\n");
454 }
455
24c80b65 456 ret = __usb_control_msg(dev, pipe, req,
e0d3bafd 457 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
24c80b65 458 val, reg, buf, len, HZ);
e0d3bafd
SD		 459
460 return ret;
461}
462
b9255176
SD		 463/****************************************************************
464* USB Alternate Setting functions *
465*****************************************************************/
e0d3bafd
SD		 466
467int cx231xx_set_video_alternate(struct cx231xx *dev)
468{
469 int errCode, prev_alt = dev->video_mode.alt;
470 unsigned int min_pkt_size = dev->width * 2 + 4;
84b5dbf3 471 u32 usb_interface_index = 0;
e0d3bafd
SD		 472
473 /* When image size is bigger than a certain value,
474 the frame size should be increased, otherwise, only
475 green screen will be received.
476 */
477 if (dev->width * 2 * dev->height > 720 * 240 * 2)
478 min_pkt_size *= 2;
479
84b5dbf3
MCC		 480 if (dev->width > 360) {
481 /* resolutions: 720,704,640 */
482 dev->video_mode.alt = 3;
483 } else if (dev->width > 180) {
484 /* resolutions: 360,352,320,240 */
485 dev->video_mode.alt = 2;
486 } else if (dev->width > 0) {
487 /* resolutions: 180,176,160,128,88 */
488 dev->video_mode.alt = 1;
489 } else {
490 /* Change to alt0 BULK to release USB bandwidth */
491 dev->video_mode.alt = 0;
492 }
493
64fbf444
PB		 494 if (dev->USE_ISO == 0)
495 dev->video_mode.alt = 0;
496
d5a1754d 497 cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt);
64fbf444 498
84b5dbf3
MCC		 499 /* Get the correct video interface Index */
500 usb_interface_index =
501 dev->current_pcb_config.hs_config_info[0].interface_info.
502 video_index + 1;
e0d3bafd
SD		 503
504 if (dev->video_mode.alt != prev_alt) {
505 cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
506 min_pkt_size, dev->video_mode.alt);
64fbf444
PB		 507
508 if (dev->video_mode.alt_max_pkt_size != NULL)
509 dev->video_mode.max_pkt_size =
510 dev->video_mode.alt_max_pkt_size[dev->video_mode.alt];
e0d3bafd 511 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
84b5dbf3
MCC		 512 dev->video_mode.alt,
513 dev->video_mode.max_pkt_size);
84b5dbf3
MCC		 514 errCode =
515 usb_set_interface(dev->udev, usb_interface_index,
516 dev->video_mode.alt);
e0d3bafd 517 if (errCode < 0) {
336fea92 518 dev_err(dev->dev,
b7085c08 519 "cannot change alt number to %d (error=%i)\n",
ed0e3729 520 dev->video_mode.alt, errCode);
e0d3bafd
SD		 521 return errCode;
522 }
523 }
524 return 0;
525}
526
527int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt)
528{
84b5dbf3
MCC		 529 int status = 0;
530 u32 usb_interface_index = 0;
531 u32 max_pkt_size = 0;
532
533 switch (index) {
534 case INDEX_TS1:
535 usb_interface_index =
536 dev->current_pcb_config.hs_config_info[0].interface_info.
537 ts1_index + 1;
64fbf444 538 dev->ts1_mode.alt = alt;
84b5dbf3
MCC		 539 if (dev->ts1_mode.alt_max_pkt_size != NULL)
540 max_pkt_size = dev->ts1_mode.max_pkt_size =
541 dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt];
542 break;
543 case INDEX_TS2:
544 usb_interface_index =
545 dev->current_pcb_config.hs_config_info[0].interface_info.
546 ts2_index + 1;
547 break;
548 case INDEX_AUDIO:
549 usb_interface_index =
550 dev->current_pcb_config.hs_config_info[0].interface_info.
551 audio_index + 1;
552 dev->adev.alt = alt;
553 if (dev->adev.alt_max_pkt_size != NULL)
554 max_pkt_size = dev->adev.max_pkt_size =
555 dev->adev.alt_max_pkt_size[dev->adev.alt];
556 break;
557 case INDEX_VIDEO:
558 usb_interface_index =
559 dev->current_pcb_config.hs_config_info[0].interface_info.
560 video_index + 1;
561 dev->video_mode.alt = alt;
562 if (dev->video_mode.alt_max_pkt_size != NULL)
563 max_pkt_size = dev->video_mode.max_pkt_size =
564 dev->video_mode.alt_max_pkt_size[dev->video_mode.
565 alt];
566 break;
567 case INDEX_VANC:
2f861387
MCC		 568 if (dev->board.no_alt_vanc)
569 return 0;
84b5dbf3
MCC		 570 usb_interface_index =
571 dev->current_pcb_config.hs_config_info[0].interface_info.
572 vanc_index + 1;
573 dev->vbi_mode.alt = alt;
574 if (dev->vbi_mode.alt_max_pkt_size != NULL)
575 max_pkt_size = dev->vbi_mode.max_pkt_size =
576 dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt];
577 break;
578 case INDEX_HANC:
579 usb_interface_index =
580 dev->current_pcb_config.hs_config_info[0].interface_info.
581 hanc_index + 1;
582 dev->sliced_cc_mode.alt = alt;
583 if (dev->sliced_cc_mode.alt_max_pkt_size != NULL)
584 max_pkt_size = dev->sliced_cc_mode.max_pkt_size =
585 dev->sliced_cc_mode.alt_max_pkt_size[dev->
586 sliced_cc_mode.
587 alt];
588 break;
589 default:
590 break;
591 }
592
593 if (alt > 0 && max_pkt_size == 0) {
336fea92 594 dev_err(dev->dev,
b7085c08 595 "can't change interface %d alt no. to %d: Max. Pkt size = 0\n",
ed0e3729 596 usb_interface_index, alt);
64fbf444
PB		 597 /*To workaround error number=-71 on EP0 for videograbber,
598 need add following codes.*/
2f861387 599 if (dev->board.no_alt_vanc)
64fbf444 600 return -1;
84b5dbf3
MCC		 601 }
602
d5a1754d
DH		 603 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u,"
604 "Interface = %d\n", alt, max_pkt_size,
605 usb_interface_index);
84b5dbf3
MCC		 606
607 if (usb_interface_index > 0) {
608 status = usb_set_interface(dev->udev, usb_interface_index, alt);
e0d3bafd 609 if (status < 0) {
336fea92 610 dev_err(dev->dev,
b7085c08 611 "can't change interface %d alt no. to %d (err=%i)\n",
ed0e3729 612 usb_interface_index, alt, status);
e0d3bafd
SD		 613 return status;
614 }
84b5dbf3 615 }
e0d3bafd 616
84b5dbf3 617 return status;
e0d3bafd
SD		 618}
619EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting);
620
621int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio)
622{
623 int rc = 0;
624
625 if (!gpio)
626 return rc;
627
628 /* Send GPIO reset sequences specified at board entry */
629 while (gpio->sleep >= 0) {
84b5dbf3
MCC		 630 rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val);
631 if (rc < 0)
632 return rc;
e0d3bafd
SD		 633
634 if (gpio->sleep > 0)
635 msleep(gpio->sleep);
636
637 gpio++;
638 }
639 return rc;
640}
641
64fbf444
PB		 642int cx231xx_demod_reset(struct cx231xx *dev)
643{
644
645 u8 status = 0;
646 u8 value[4] = { 0, 0, 0, 0 };
647
648 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
649 value, 4);
64fbf444 650
d5a1754d
DH		 651 cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
652 value[0], value[1], value[2], value[3]);
653
654 cx231xx_coredbg("Enter cx231xx_demod_reset()\n");
655
69626853
MCC		 656 value[1] = (u8) 0x3;
657 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
658 PWR_CTL_EN, value, 4);
659 msleep(10);
660
661 value[1] = (u8) 0x0;
662 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
663 PWR_CTL_EN, value, 4);
664 msleep(10);
665
666 value[1] = (u8) 0x3;
667 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
668 PWR_CTL_EN, value, 4);
669 msleep(10);
64fbf444
PB		 670
671 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
672 value, 4);
d5a1754d
DH		 673
674 cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
675 value[0], value[1], value[2], value[3]);
64fbf444
PB		 676
677 return status;
678}
679EXPORT_SYMBOL_GPL(cx231xx_demod_reset);
680int is_fw_load(struct cx231xx *dev)
681{
682 return cx231xx_check_fw(dev);
683}
684EXPORT_SYMBOL_GPL(is_fw_load);
685
e0d3bafd
SD		 686int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)
687{
64fbf444
PB		 688 int errCode = 0;
689
e0d3bafd
SD		 690 if (dev->mode == set_mode)
691 return 0;
692
693 if (set_mode == CX231XX_SUSPEND) {
84b5dbf3 694 /* Set the chip in power saving mode */
e0d3bafd
SD		 695 dev->mode = set_mode;
696 }
697
698 /* Resource is locked */
699 if (dev->mode != CX231XX_SUSPEND)
700 return -EINVAL;
701
702 dev->mode = set_mode;
703
64fbf444
PB		 704 if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ {
705 /* set AGC mode to Digital */
706 switch (dev->model) {
707 case CX231XX_BOARD_CNXT_CARRAERA:
708 case CX231XX_BOARD_CNXT_RDE_250:
709 case CX231XX_BOARD_CNXT_SHELBY:
710 case CX231XX_BOARD_CNXT_RDU_250:
711 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
712 break;
713 case CX231XX_BOARD_CNXT_RDE_253S:
714 case CX231XX_BOARD_CNXT_RDU_253S:
b88ba619
DH		 715 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
716 break;
1a50fdde 717 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 718 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
b88ba619
DH		 719 errCode = cx231xx_set_power_mode(dev,
720 POLARIS_AVMODE_DIGITAL);
64fbf444
PB		 721 break;
722 default:
723 break;
724 }
725 } else/* Set Analog Power mode */ {
726 /* set AGC mode to Analog */
727 switch (dev->model) {
728 case CX231XX_BOARD_CNXT_CARRAERA:
729 case CX231XX_BOARD_CNXT_RDE_250:
730 case CX231XX_BOARD_CNXT_SHELBY:
731 case CX231XX_BOARD_CNXT_RDU_250:
732 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
733 break;
734 case CX231XX_BOARD_CNXT_RDE_253S:
735 case CX231XX_BOARD_CNXT_RDU_253S:
1a50fdde 736 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 737 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
9417bc6d 738 case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
de8ae0d5
PM		 739 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
740 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
64fbf444
PB		 741 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
742 break;
743 default:
744 break;
745 }
746 }
b9255176 747
da983503 748 return errCode ? -EINVAL : 0;
e0d3bafd
SD		 749}
750EXPORT_SYMBOL_GPL(cx231xx_set_mode);
751
64fbf444
PB		 752int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size)
753{
754 int errCode = 0;
755 int actlen, ret = -ENOMEM;
756 u32 *buffer;
757
da983503 758 buffer = kzalloc(4096, GFP_KERNEL);
ed0e3729 759 if (buffer == NULL)
64fbf444 760 return -ENOMEM;
64fbf444
PB		 761 memcpy(&buffer[0], firmware, 4096);
762
763 ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5),
da983503 764 buffer, 4096, &actlen, 2000);
64fbf444
PB		 765
766 if (ret)
336fea92 767 dev_err(dev->dev,
b7085c08
MCC		 768 "bulk message failed: %d (%d/%d)", ret,
769 size, actlen);
64fbf444
PB		 770 else {
771 errCode = actlen != size ? -1 : 0;
772 }
da983503
HV		 773 kfree(buffer);
774 return errCode;
64fbf444
PB		 775}
776
b9255176
SD		 777/*****************************************************************
778* URB Streaming functions *
779******************************************************************/
e0d3bafd
SD		 780
781/*
782 * IRQ callback, called by URB callback
783 */
64fbf444 784static void cx231xx_isoc_irq_callback(struct urb *urb)
e0d3bafd 785{
84b5dbf3
MCC		 786 struct cx231xx_dmaqueue *dma_q = urb->context;
787 struct cx231xx_video_mode *vmode =
788 container_of(dma_q, struct cx231xx_video_mode, vidq);
789 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
da983503 790 int i;
e0d3bafd 791
84b5dbf3
MCC		 792 switch (urb->status) {
793 case 0: /* success */
794 case -ETIMEDOUT: /* NAK */
795 break;
796 case -ECONNRESET: /* kill */
797 case -ENOENT:
798 case -ESHUTDOWN:
799 return;
800 default: /* error */
801 cx231xx_isocdbg("urb completition error %d.\n", urb->status);
802 break;
e0d3bafd
SD		 803 }
804
805 /* Copy data from URB */
806 spin_lock(&dev->video_mode.slock);
da983503 807 dev->video_mode.isoc_ctl.isoc_copy(dev, urb);
e0d3bafd
SD		 808 spin_unlock(&dev->video_mode.slock);
809
810 /* Reset urb buffers */
811 for (i = 0; i < urb->number_of_packets; i++) {
812 urb->iso_frame_desc[i].status = 0;
813 urb->iso_frame_desc[i].actual_length = 0;
814 }
e0d3bafd
SD		 815
816 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
817 if (urb->status) {
818 cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
84b5dbf3 819 urb->status);
e0d3bafd
SD		 820 }
821}
64fbf444
PB		 822/*****************************************************************
823* URB Streaming functions *
824******************************************************************/
825
826/*
827 * IRQ callback, called by URB callback
828 */
829static void cx231xx_bulk_irq_callback(struct urb *urb)
830{
831 struct cx231xx_dmaqueue *dma_q = urb->context;
832 struct cx231xx_video_mode *vmode =
833 container_of(dma_q, struct cx231xx_video_mode, vidq);
834 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
64fbf444
PB		 835
836 switch (urb->status) {
837 case 0: /* success */
838 case -ETIMEDOUT: /* NAK */
839 break;
840 case -ECONNRESET: /* kill */
841 case -ENOENT:
842 case -ESHUTDOWN:
843 return;
844 default: /* error */
845 cx231xx_isocdbg("urb completition error %d.\n", urb->status);
846 break;
847 }
848
849 /* Copy data from URB */
850 spin_lock(&dev->video_mode.slock);
da983503 851 dev->video_mode.bulk_ctl.bulk_copy(dev, urb);
64fbf444 852 spin_unlock(&dev->video_mode.slock);
e0d3bafd 853
64fbf444 854 /* Reset urb buffers */
64fbf444
PB		 855 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
856 if (urb->status) {
857 cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
858 urb->status);
859 }
860}
e0d3bafd
SD		 861/*
862 * Stop and Deallocate URBs
863 */
864void cx231xx_uninit_isoc(struct cx231xx *dev)
865{
64fbf444 866 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
e0d3bafd
SD		 867 struct urb *urb;
868 int i;
869
870 cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n");
871
872 dev->video_mode.isoc_ctl.nfields = -1;
873 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
874 urb = dev->video_mode.isoc_ctl.urb[i];
875 if (urb) {
84b5dbf3
MCC		 876 if (!irqs_disabled())
877 usb_kill_urb(urb);
878 else
879 usb_unlink_urb(urb);
e0d3bafd
SD		 880
881 if (dev->video_mode.isoc_ctl.transfer_buffer[i]) {
997ea58e
DM		 882 usb_free_coherent(dev->udev,
883 urb->transfer_buffer_length,
884 dev->video_mode.isoc_ctl.
885 transfer_buffer[i],
886 urb->transfer_dma);
e0d3bafd
SD		 887 }
888 usb_free_urb(urb);
889 dev->video_mode.isoc_ctl.urb[i] = NULL;
890 }
891 dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL;
892 }
893
894 kfree(dev->video_mode.isoc_ctl.urb);
895 kfree(dev->video_mode.isoc_ctl.transfer_buffer);
64fbf444 896 kfree(dma_q->p_left_data);
e0d3bafd
SD		 897
898 dev->video_mode.isoc_ctl.urb = NULL;
899 dev->video_mode.isoc_ctl.transfer_buffer = NULL;
900 dev->video_mode.isoc_ctl.num_bufs = 0;
64fbf444
PB		 901 dma_q->p_left_data = NULL;
902
903 if (dev->mode_tv == 0)
904 cx231xx_capture_start(dev, 0, Raw_Video);
905 else
906 cx231xx_capture_start(dev, 0, TS1_serial_mode);
907
e0d3bafd 908
e0d3bafd
SD		 909}
910EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc);
911
64fbf444
PB		 912/*
913 * Stop and Deallocate URBs
914 */
915void cx231xx_uninit_bulk(struct cx231xx *dev)
916{
ce3556bd 917 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
64fbf444
PB		 918 struct urb *urb;
919 int i;
920
921 cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n");
922
923 dev->video_mode.bulk_ctl.nfields = -1;
924 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
925 urb = dev->video_mode.bulk_ctl.urb[i];
926 if (urb) {
927 if (!irqs_disabled())
928 usb_kill_urb(urb);
929 else
930 usb_unlink_urb(urb);
931
932 if (dev->video_mode.bulk_ctl.transfer_buffer[i]) {
933 usb_free_coherent(dev->udev,
934 urb->transfer_buffer_length,
ce3556bd 935 dev->video_mode.bulk_ctl.
64fbf444
PB		 936 transfer_buffer[i],
937 urb->transfer_dma);
938 }
939 usb_free_urb(urb);
940 dev->video_mode.bulk_ctl.urb[i] = NULL;
941 }
942 dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL;
943 }
944
945 kfree(dev->video_mode.bulk_ctl.urb);
946 kfree(dev->video_mode.bulk_ctl.transfer_buffer);
ce3556bd 947 kfree(dma_q->p_left_data);
64fbf444
PB		 948
949 dev->video_mode.bulk_ctl.urb = NULL;
950 dev->video_mode.bulk_ctl.transfer_buffer = NULL;
951 dev->video_mode.bulk_ctl.num_bufs = 0;
ce3556bd 952 dma_q->p_left_data = NULL;
64fbf444
PB		 953
954 if (dev->mode_tv == 0)
955 cx231xx_capture_start(dev, 0, Raw_Video);
956 else
957 cx231xx_capture_start(dev, 0, TS1_serial_mode);
958
959
960}
961EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk);
962
e0d3bafd
SD		 963/*
964 * Allocate URBs and start IRQ
965 */
966int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 967 int num_bufs, int max_pkt_size,
b9255176 968 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb))
e0d3bafd
SD		 969{
970 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
971 int i;
972 int sb_size, pipe;
973 struct urb *urb;
974 int j, k;
975 int rc;
976
e0d3bafd
SD		 977 /* De-allocates all pending stuff */
978 cx231xx_uninit_isoc(dev);
979
64fbf444 980 dma_q->p_left_data = kzalloc(4096, GFP_KERNEL);
ed0e3729 981 if (dma_q->p_left_data == NULL)
64fbf444 982 return -ENOMEM;
64fbf444 983
e0d3bafd
SD		 984 dev->video_mode.isoc_ctl.isoc_copy = isoc_copy;
985 dev->video_mode.isoc_ctl.num_bufs = num_bufs;
84b5dbf3
MCC		 986 dma_q->pos = 0;
987 dma_q->is_partial_line = 0;
988 dma_q->last_sav = 0;
989 dma_q->current_field = -1;
990 dma_q->field1_done = 0;
991 dma_q->lines_per_field = dev->height / 2;
992 dma_q->bytes_left_in_line = dev->width << 1;
993 dma_q->lines_completed = 0;
64fbf444
PB		 994 dma_q->mpeg_buffer_done = 0;
995 dma_q->left_data_count = 0;
996 dma_q->mpeg_buffer_completed = 0;
997 dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD;
998 dma_q->ps_head[0] = 0x00;
999 dma_q->ps_head[1] = 0x00;
1000 dma_q->ps_head[2] = 0x01;
1001 dma_q->ps_head[3] = 0xBA;
84b5dbf3
MCC		 1002 for (i = 0; i < 8; i++)
1003 dma_q->partial_buf[i] = 0;
1004
1005 dev->video_mode.isoc_ctl.urb =
1006 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
e0d3bafd 1007 if (!dev->video_mode.isoc_ctl.urb) {
336fea92 1008 dev_err(dev->dev,
b7085c08 1009 "cannot alloc memory for usb buffers\n");
e0d3bafd
SD		 1010 return -ENOMEM;
1011 }
1012
84b5dbf3
MCC		 1013 dev->video_mode.isoc_ctl.transfer_buffer =
1014 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
e0d3bafd 1015 if (!dev->video_mode.isoc_ctl.transfer_buffer) {
336fea92 1016 dev_err(dev->dev,
b7085c08 1017 "cannot allocate memory for usbtransfer\n");
e0d3bafd
SD		 1018 kfree(dev->video_mode.isoc_ctl.urb);
1019 return -ENOMEM;
1020 }
1021
1022 dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size;
1023 dev->video_mode.isoc_ctl.buf = NULL;
1024
1025 sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size;
1026
64fbf444
PB		 1027 if (dev->mode_tv == 1)
1028 dev->video_mode.end_point_addr = 0x81;
1029 else
1030 dev->video_mode.end_point_addr = 0x84;
1031
1032
e0d3bafd
SD		 1033 /* allocate urbs and transfer buffers */
1034 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
1035 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1036 if (!urb) {
336fea92 1037 dev_err(dev->dev,
b7085c08 1038 "cannot alloc isoc_ctl.urb %i\n", i);
e0d3bafd
SD		 1039 cx231xx_uninit_isoc(dev);
1040 return -ENOMEM;
1041 }
1042 dev->video_mode.isoc_ctl.urb[i] = urb;
1043
84b5dbf3 1044 dev->video_mode.isoc_ctl.transfer_buffer[i] =
997ea58e
DM		 1045 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
1046 &urb->transfer_dma);
e0d3bafd 1047 if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) {
336fea92 1048 dev_err(dev->dev,
b7085c08 1049 "unable to allocate %i bytes for transfer buffer %i%s\n",
ed0e3729
MCC		 1050 sb_size, i,
1051 in_interrupt() ? " while in int" : "");
e0d3bafd
SD		 1052 cx231xx_uninit_isoc(dev);
1053 return -ENOMEM;
1054 }
1055 memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size);
1056
84b5dbf3
MCC		 1057 pipe =
1058 usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr);
e0d3bafd
SD		 1059
1060 usb_fill_int_urb(urb, dev->udev, pipe,
84b5dbf3 1061 dev->video_mode.isoc_ctl.transfer_buffer[i],
64fbf444 1062 sb_size, cx231xx_isoc_irq_callback, dma_q, 1);
e0d3bafd
SD		 1063
1064 urb->number_of_packets = max_packets;
7a6f6c29 1065 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
e0d3bafd
SD		 1066
1067 k = 0;
1068 for (j = 0; j < max_packets; j++) {
1069 urb->iso_frame_desc[j].offset = k;
1070 urb->iso_frame_desc[j].length =
84b5dbf3 1071 dev->video_mode.isoc_ctl.max_pkt_size;
e0d3bafd
SD		 1072 k += dev->video_mode.isoc_ctl.max_pkt_size;
1073 }
1074 }
1075
1076 init_waitqueue_head(&dma_q->wq);
1077
e0d3bafd
SD		 1078 /* submit urbs and enables IRQ */
1079 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
84b5dbf3
MCC		 1080 rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i],
1081 GFP_ATOMIC);
e0d3bafd 1082 if (rc) {
336fea92 1083 dev_err(dev->dev,
b7085c08 1084 "submit of urb %i failed (error=%i)\n", i,
ed0e3729 1085 rc);
e0d3bafd
SD		 1086 cx231xx_uninit_isoc(dev);
1087 return rc;
1088 }
1089 }
1090
64fbf444
PB		 1091 if (dev->mode_tv == 0)
1092 cx231xx_capture_start(dev, 1, Raw_Video);
1093 else
1094 cx231xx_capture_start(dev, 1, TS1_serial_mode);
e0d3bafd
SD		 1095
1096 return 0;
1097}
1098EXPORT_SYMBOL_GPL(cx231xx_init_isoc);
1099
64fbf444
PB		 1100/*
1101 * Allocate URBs and start IRQ
1102 */
1103int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
1104 int num_bufs, int max_pkt_size,
1105 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb))
1106{
1107 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
1108 int i;
1109 int sb_size, pipe;
1110 struct urb *urb;
1111 int rc;
1112
1113 dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
1114
d5a1754d
DH		 1115 cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input);
1116
64fbf444
PB		 1117 video_mux(dev, dev->video_input);
1118
1119 /* De-allocates all pending stuff */
1120 cx231xx_uninit_bulk(dev);
1121
1122 dev->video_mode.bulk_ctl.bulk_copy = bulk_copy;
1123 dev->video_mode.bulk_ctl.num_bufs = num_bufs;
1124 dma_q->pos = 0;
1125 dma_q->is_partial_line = 0;
1126 dma_q->last_sav = 0;
1127 dma_q->current_field = -1;
1128 dma_q->field1_done = 0;
1129 dma_q->lines_per_field = dev->height / 2;
1130 dma_q->bytes_left_in_line = dev->width << 1;
1131 dma_q->lines_completed = 0;
1132 dma_q->mpeg_buffer_done = 0;
1133 dma_q->left_data_count = 0;
1134 dma_q->mpeg_buffer_completed = 0;
1135 dma_q->ps_head[0] = 0x00;
1136 dma_q->ps_head[1] = 0x00;
1137 dma_q->ps_head[2] = 0x01;
1138 dma_q->ps_head[3] = 0xBA;
1139 for (i = 0; i < 8; i++)
1140 dma_q->partial_buf[i] = 0;
1141
1142 dev->video_mode.bulk_ctl.urb =
1143 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
1144 if (!dev->video_mode.bulk_ctl.urb) {
336fea92 1145 dev_err(dev->dev,
b7085c08 1146 "cannot alloc memory for usb buffers\n");
64fbf444
PB		 1147 return -ENOMEM;
1148 }
1149
1150 dev->video_mode.bulk_ctl.transfer_buffer =
1151 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
1152 if (!dev->video_mode.bulk_ctl.transfer_buffer) {
336fea92 1153 dev_err(dev->dev,
b7085c08 1154 "cannot allocate memory for usbtransfer\n");
64fbf444
PB		 1155 kfree(dev->video_mode.bulk_ctl.urb);
1156 return -ENOMEM;
1157 }
1158
1159 dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size;
1160 dev->video_mode.bulk_ctl.buf = NULL;
1161
1162 sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size;
1163
1164 if (dev->mode_tv == 1)
1165 dev->video_mode.end_point_addr = 0x81;
1166 else
1167 dev->video_mode.end_point_addr = 0x84;
1168
1169
1170 /* allocate urbs and transfer buffers */
1171 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
1172 urb = usb_alloc_urb(0, GFP_KERNEL);
1173 if (!urb) {
336fea92 1174 dev_err(dev->dev,
b7085c08 1175 "cannot alloc bulk_ctl.urb %i\n", i);
64fbf444
PB		 1176 cx231xx_uninit_bulk(dev);
1177 return -ENOMEM;
1178 }
1179 dev->video_mode.bulk_ctl.urb[i] = urb;
7a6f6c29 1180 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
64fbf444
PB		 1181
1182 dev->video_mode.bulk_ctl.transfer_buffer[i] =
1183 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
1184 &urb->transfer_dma);
1185 if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) {
336fea92 1186 dev_err(dev->dev,
b7085c08 1187 "unable to allocate %i bytes for transfer buffer %i%s\n",
ed0e3729
MCC		 1188 sb_size, i,
1189 in_interrupt() ? " while in int" : "");
64fbf444
PB		 1190 cx231xx_uninit_bulk(dev);
1191 return -ENOMEM;
1192 }
1193 memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size);
1194
1195 pipe = usb_rcvbulkpipe(dev->udev,
1196 dev->video_mode.end_point_addr);
1197 usb_fill_bulk_urb(urb, dev->udev, pipe,
1198 dev->video_mode.bulk_ctl.transfer_buffer[i],
1199 sb_size, cx231xx_bulk_irq_callback, dma_q);
1200 }
1201
ce3556bd
TH		 1202 /* clear halt */
1203 rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe);
1204 if (rc < 0) {
1205 dev_err(dev->dev,
1206 "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
1207 rc);
1208 cx231xx_uninit_bulk(dev);
1209 return rc;
1210 }
1211
64fbf444
PB		 1212 init_waitqueue_head(&dma_q->wq);
1213
1214 /* submit urbs and enables IRQ */
1215 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
1216 rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i],
1217 GFP_ATOMIC);
1218 if (rc) {
336fea92 1219 dev_err(dev->dev,
b7085c08 1220 "submit of urb %i failed (error=%i)\n", i, rc);
64fbf444
PB		 1221 cx231xx_uninit_bulk(dev);
1222 return rc;
1223 }
1224 }
1225
1226 if (dev->mode_tv == 0)
1227 cx231xx_capture_start(dev, 1, Raw_Video);
1228 else
1229 cx231xx_capture_start(dev, 1, TS1_serial_mode);
1230
1231 return 0;
1232}
1233EXPORT_SYMBOL_GPL(cx231xx_init_bulk);
1234void cx231xx_stop_TS1(struct cx231xx *dev)
1235{
64fbf444
PB		 1236 u8 val[4] = { 0, 0, 0, 0 };
1237
da983503
HV		 1238 val[0] = 0x00;
1239 val[1] = 0x03;
1240 val[2] = 0x00;
1241 val[3] = 0x00;
1242 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1243 TS_MODE_REG, val, 4);
1244
1245 val[0] = 0x00;
1246 val[1] = 0x70;
1247 val[2] = 0x04;
1248 val[3] = 0x00;
1249 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1250 TS1_CFG_REG, val, 4);
64fbf444
PB		 1251}
1252/* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */
1253void cx231xx_start_TS1(struct cx231xx *dev)
1254{
64fbf444
PB		 1255 u8 val[4] = { 0, 0, 0, 0 };
1256
da983503
HV		 1257 val[0] = 0x03;
1258 val[1] = 0x03;
1259 val[2] = 0x00;
1260 val[3] = 0x00;
1261 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1262 TS_MODE_REG, val, 4);
1263
1264 val[0] = 0x04;
1265 val[1] = 0xA3;
1266 val[2] = 0x3B;
1267 val[3] = 0x00;
1268 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1269 TS1_CFG_REG, val, 4);
64fbf444
PB		 1270}
1271/* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */
b9255176
SD		 1272/*****************************************************************
1273* Device Init/UnInit functions *
1274******************************************************************/
e0d3bafd
SD		 1275int cx231xx_dev_init(struct cx231xx *dev)
1276{
84b5dbf3 1277 int errCode = 0;
e0d3bafd 1278
84b5dbf3 1279 /* Initialize I2C bus */
e0d3bafd
SD		 1280
1281 /* External Master 1 Bus */
1282 dev->i2c_bus[0].nr = 0;
1283 dev->i2c_bus[0].dev = dev;
1a50fdde 1284 dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */
84b5dbf3
MCC		 1285 dev->i2c_bus[0].i2c_nostop = 0;
1286 dev->i2c_bus[0].i2c_reserve = 0;
e0d3bafd
SD		 1287
1288 /* External Master 2 Bus */
1289 dev->i2c_bus[1].nr = 1;
1290 dev->i2c_bus[1].dev = dev;
1a50fdde 1291 dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */
84b5dbf3
MCC		 1292 dev->i2c_bus[1].i2c_nostop = 0;
1293 dev->i2c_bus[1].i2c_reserve = 0;
e0d3bafd
SD		 1294
1295 /* Internal Master 3 Bus */
1296 dev->i2c_bus[2].nr = 2;
1297 dev->i2c_bus[2].dev = dev;
9ab66912 1298 dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */
84b5dbf3
MCC		 1299 dev->i2c_bus[2].i2c_nostop = 0;
1300 dev->i2c_bus[2].i2c_reserve = 0;
e0d3bafd 1301
84b5dbf3 1302 /* register I2C buses */
e0d3bafd
SD		 1303 cx231xx_i2c_register(&dev->i2c_bus[0]);
1304 cx231xx_i2c_register(&dev->i2c_bus[1]);
1305 cx231xx_i2c_register(&dev->i2c_bus[2]);
1306
15c212dd
MS		 1307 cx231xx_i2c_mux_register(dev, 0);
1308 cx231xx_i2c_mux_register(dev, 1);
1309
e4de03f2
MS		 1310 /* scan the real bus segments in the order of physical port numbers */
1311 cx231xx_do_i2c_scan(dev, I2C_0);
1312 cx231xx_do_i2c_scan(dev, I2C_1_MUX_1);
1313 cx231xx_do_i2c_scan(dev, I2C_2);
1314 cx231xx_do_i2c_scan(dev, I2C_1_MUX_3);
1315
84b5dbf3 1316 /* init hardware */
b9255176 1317 /* Note : with out calling set power mode function,
ecc67d10 1318 afe can not be set up correctly */
2f861387 1319 if (dev->board.external_av) {
64fbf444
PB		 1320 errCode = cx231xx_set_power_mode(dev,
1321 POLARIS_AVMODE_ENXTERNAL_AV);
1322 if (errCode < 0) {
336fea92 1323 dev_err(dev->dev,
b7085c08 1324 "%s: Failed to set Power - errCode [%d]!\n",
ed0e3729 1325 __func__, errCode);
64fbf444
PB		 1326 return errCode;
1327 }
1328 } else {
1329 errCode = cx231xx_set_power_mode(dev,
1330 POLARIS_AVMODE_ANALOGT_TV);
1331 if (errCode < 0) {
336fea92 1332 dev_err(dev->dev,
b7085c08 1333 "%s: Failed to set Power - errCode [%d]!\n",
ed0e3729 1334 __func__, errCode);
64fbf444
PB		 1335 return errCode;
1336 }
e0d3bafd
SD		 1337 }
1338
2f861387
MCC		 1339 /* reset the Tuner, if it is a Xceive tuner */
1340 if ((dev->board.tuner_type == TUNER_XC5000) ||
1341 (dev->board.tuner_type == TUNER_XC2028))
64fbf444
PB		 1342 cx231xx_gpio_set(dev, dev->board.tuner_gpio);
1343
84b5dbf3 1344 /* initialize Colibri block */
ecc67d10 1345 errCode = cx231xx_afe_init_super_block(dev, 0x23c);
e0d3bafd 1346 if (errCode < 0) {
336fea92 1347 dev_err(dev->dev,
b7085c08 1348 "%s: cx231xx_afe init super block - errCode [%d]!\n",
ed0e3729 1349 __func__, errCode);
e0d3bafd
SD		 1350 return errCode;
1351 }
ecc67d10 1352 errCode = cx231xx_afe_init_channels(dev);
84b5dbf3 1353 if (errCode < 0) {
336fea92 1354 dev_err(dev->dev,
b7085c08 1355 "%s: cx231xx_afe init channels - errCode [%d]!\n",
ed0e3729 1356 __func__, errCode);
e0d3bafd
SD		 1357 return errCode;
1358 }
1359
84b5dbf3
MCC		 1360 /* Set DIF in By pass mode */
1361 errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
1362 if (errCode < 0) {
336fea92 1363 dev_err(dev->dev,
b7085c08 1364 "%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
ed0e3729 1365 __func__, errCode);
e0d3bafd
SD		 1366 return errCode;
1367 }
1368
ecc67d10
SD		 1369 /* I2S block related functions */
1370 errCode = cx231xx_i2s_blk_initialize(dev);
84b5dbf3 1371 if (errCode < 0) {
336fea92 1372 dev_err(dev->dev,
b7085c08 1373 "%s: cx231xx_i2s block initialize - errCode [%d]!\n",
ed0e3729 1374 __func__, errCode);
e0d3bafd
SD		 1375 return errCode;
1376 }
1377
84b5dbf3
MCC		 1378 /* init control pins */
1379 errCode = cx231xx_init_ctrl_pin_status(dev);
1380 if (errCode < 0) {
336fea92 1381 dev_err(dev->dev,
b7085c08 1382 "%s: cx231xx_init ctrl pins - errCode [%d]!\n",
ed0e3729 1383 __func__, errCode);
e0d3bafd
SD		 1384 return errCode;
1385 }
1386
84b5dbf3 1387 /* set AGC mode to Analog */
64fbf444
PB		 1388 switch (dev->model) {
1389 case CX231XX_BOARD_CNXT_CARRAERA:
1390 case CX231XX_BOARD_CNXT_RDE_250:
1391 case CX231XX_BOARD_CNXT_SHELBY:
1392 case CX231XX_BOARD_CNXT_RDU_250:
84b5dbf3 1393 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
64fbf444
PB		 1394 break;
1395 case CX231XX_BOARD_CNXT_RDE_253S:
1396 case CX231XX_BOARD_CNXT_RDU_253S:
1a50fdde 1397 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 1398 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
9417bc6d 1399 case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
de8ae0d5
PM		 1400 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
1401 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
64fbf444
PB		 1402 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
1403 break;
1404 default:
1405 break;
1406 }
84b5dbf3 1407 if (errCode < 0) {
336fea92 1408 dev_err(dev->dev,
b7085c08 1409 "%s: cx231xx_AGC mode to Analog - errCode [%d]!\n",
ed0e3729 1410 __func__, errCode);
e0d3bafd
SD		 1411 return errCode;
1412 }
1413
84b5dbf3
MCC		 1414 /* set all alternate settings to zero initially */
1415 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
1416 cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
1417 cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
1418 if (dev->board.has_dvb)
1419 cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
e0d3bafd 1420
660acd54 1421 errCode = 0;
e0d3bafd
SD		 1422 return errCode;
1423}
1424EXPORT_SYMBOL_GPL(cx231xx_dev_init);
1425
1426void cx231xx_dev_uninit(struct cx231xx *dev)
1427{
84b5dbf3 1428 /* Un Initialize I2C bus */
15c212dd
MS		 1429 cx231xx_i2c_mux_unregister(dev, 1);
1430 cx231xx_i2c_mux_unregister(dev, 0);
e0d3bafd
SD		 1431 cx231xx_i2c_unregister(&dev->i2c_bus[2]);
1432 cx231xx_i2c_unregister(&dev->i2c_bus[1]);
1433 cx231xx_i2c_unregister(&dev->i2c_bus[0]);
1434}
84b5dbf3 1435EXPORT_SYMBOL_GPL(cx231xx_dev_uninit);
e0d3bafd 1436
b9255176
SD		 1437/*****************************************************************
1438* G P I O related functions *
1439******************************************************************/
64fbf444 1440int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 1441 u8 len, u8 request, u8 direction)
e0d3bafd 1442{
84b5dbf3 1443 int status = 0;
b9255176 1444 struct VENDOR_REQUEST_IN ven_req;
84b5dbf3
MCC		 1445
1446 /* Set wValue */
1447 ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff);
1448
1449 /* set request */
1450 if (!request) {
1451 if (direction)
1452 ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */
1453 else
1454 ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */
1455 } else {
1456 if (direction)
1457 ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */
1458 else
1459 ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */
1460 }
e0d3bafd 1461
84b5dbf3
MCC		 1462 /* set index value */
1463 ven_req.wIndex = (u16) (gpio_bit & 0xffff);
e0d3bafd 1464
84b5dbf3
MCC		 1465 /* set wLength value */
1466 ven_req.wLength = len;
e0d3bafd 1467
84b5dbf3
MCC		 1468 /* set bData value */
1469 ven_req.bData = 0;
e0d3bafd 1470
84b5dbf3
MCC		 1471 /* set the buffer for read / write */
1472 ven_req.pBuff = gpio_val;
1473
1474 /* set the direction */
1475 if (direction) {
1476 ven_req.direction = USB_DIR_IN;
1477 memset(ven_req.pBuff, 0x00, ven_req.wLength);
1478 } else
1479 ven_req.direction = USB_DIR_OUT;
1480
1481
1482 /* call common vendor command request */
1483 status = cx231xx_send_vendor_cmd(dev, &ven_req);
1484 if (status < 0) {
336fea92 1485 dev_err(dev->dev, "%s: failed with status -%d\n",
ed0e3729 1486 __func__, status);
84b5dbf3 1487 }
e0d3bafd 1488
84b5dbf3 1489 return status;
e0d3bafd 1490}
e0d3bafd
SD		 1491EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd);
1492
b9255176
SD		 1493/*****************************************************************
1494 * C O N T R O L - Register R E A D / W R I T E functions *
1495 *****************************************************************/
e0d3bafd
SD		 1496int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode)
1497{
84b5dbf3
MCC		 1498 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
1499 u32 tmp = 0;
1500 int status = 0;
e0d3bafd 1501
84b5dbf3
MCC		 1502 status =
1503 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4);
1504 if (status < 0)
1505 return status;
e0d3bafd 1506
3f9280a8 1507 tmp = le32_to_cpu(*((__le32 *) value));
84b5dbf3 1508 tmp |= mode;
e0d3bafd 1509
84b5dbf3
MCC		 1510 value[0] = (u8) tmp;
1511 value[1] = (u8) (tmp >> 8);
1512 value[2] = (u8) (tmp >> 16);
1513 value[3] = (u8) (tmp >> 24);
e0d3bafd 1514
84b5dbf3
MCC		 1515 status =
1516 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4);
e0d3bafd 1517
84b5dbf3 1518 return status;
e0d3bafd
SD		 1519}
1520
b9255176
SD		 1521/*****************************************************************
1522 * I 2 C Internal C O N T R O L functions *
1523 *****************************************************************/
64fbf444
PB		 1524int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1525 u8 saddr_len, u32 *data, u8 data_len, int master)
1526{
1527 int status = 0;
1528 struct cx231xx_i2c_xfer_data req_data;
1529 u8 value[64] = "0";
1530
1531 if (saddr_len == 0)
1532 saddr = 0;
fe041646 1533 else if (saddr_len == 1)
64fbf444
PB		 1534 saddr &= 0xff;
1535
1536 /* prepare xfer_data struct */
1537 req_data.dev_addr = dev_addr >> 1;
1538 req_data.direction = I2C_M_RD;
1539 req_data.saddr_len = saddr_len;
1540 req_data.saddr_dat = saddr;
1541 req_data.buf_size = data_len;
1542 req_data.p_buffer = (u8 *) value;
1543
1544 /* usb send command */
1545 if (master == 0)
1546 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
1547 &req_data);
1548 else if (master == 1)
1549 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
1550 &req_data);
1551 else if (master == 2)
1552 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
1553 &req_data);
1554
1555 if (status >= 0) {
1556 /* Copy the data read back to main buffer */
1557 if (data_len == 1)
1558 *data = value[0];
1559 else if (data_len == 4)
1560 *data =
1561 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1562 << 24;
1563 else if (data_len > 4)
1564 *data = value[saddr];
1565 }
1566
1567 return status;
1568}
1569
1570int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1571 u8 saddr_len, u32 data, u8 data_len, int master)
1572{
1573 int status = 0;
1574 u8 value[4] = { 0, 0, 0, 0 };
1575 struct cx231xx_i2c_xfer_data req_data;
1576
1577 value[0] = (u8) data;
1578 value[1] = (u8) (data >> 8);
1579 value[2] = (u8) (data >> 16);
1580 value[3] = (u8) (data >> 24);
1581
1582 if (saddr_len == 0)
1583 saddr = 0;
fe041646 1584 else if (saddr_len == 1)
64fbf444
PB		 1585 saddr &= 0xff;
1586
1587 /* prepare xfer_data struct */
1588 req_data.dev_addr = dev_addr >> 1;
1589 req_data.direction = 0;
1590 req_data.saddr_len = saddr_len;
1591 req_data.saddr_dat = saddr;
1592 req_data.buf_size = data_len;
1593 req_data.p_buffer = value;
1594
1595 /* usb send command */
1596 if (master == 0)
1597 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
1598 &req_data);
1599 else if (master == 1)
1600 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
1601 &req_data);
1602 else if (master == 2)
1603 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
1604 &req_data);
1605
1606 return status;
1607}
1608
e0d3bafd 1609int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
b9255176 1610 u8 saddr_len, u32 *data, u8 data_len)
e0d3bafd 1611{
84b5dbf3
MCC		 1612 int status = 0;
1613 struct cx231xx_i2c_xfer_data req_data;
1614 u8 value[4] = { 0, 0, 0, 0 };
1615
1616 if (saddr_len == 0)
1617 saddr = 0;
fe041646 1618 else if (saddr_len == 1)
84b5dbf3
MCC		 1619 saddr &= 0xff;
1620
1621 /* prepare xfer_data struct */
1622 req_data.dev_addr = dev_addr >> 1;
1623 req_data.direction = I2C_M_RD;
1624 req_data.saddr_len = saddr_len;
1625 req_data.saddr_dat = saddr;
1626 req_data.buf_size = data_len;
1627 req_data.p_buffer = (u8 *) value;
1628
1629 /* usb send command */
1630 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1631
1632 if (status >= 0) {
1633 /* Copy the data read back to main buffer */
1634 if (data_len == 1)
1635 *data = value[0];
1636 else
1637 *data =
1638 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1639 << 24;
1640 }
1641
1642 return status;
e0d3bafd
SD		 1643}
1644
1645int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
84b5dbf3 1646 u8 saddr_len, u32 data, u8 data_len)
e0d3bafd 1647{
84b5dbf3
MCC		 1648 int status = 0;
1649 u8 value[4] = { 0, 0, 0, 0 };
1650 struct cx231xx_i2c_xfer_data req_data;
1651
1652 value[0] = (u8) data;
1653 value[1] = (u8) (data >> 8);
1654 value[2] = (u8) (data >> 16);
1655 value[3] = (u8) (data >> 24);
1656
1657 if (saddr_len == 0)
1658 saddr = 0;
fe041646 1659 else if (saddr_len == 1)
84b5dbf3
MCC		 1660 saddr &= 0xff;
1661
1662 /* prepare xfer_data struct */
1663 req_data.dev_addr = dev_addr >> 1;
1664 req_data.direction = 0;
1665 req_data.saddr_len = saddr_len;
1666 req_data.saddr_dat = saddr;
1667 req_data.buf_size = data_len;
1668 req_data.p_buffer = value;
1669
1670 /* usb send command */
1671 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1672
1673 return status;
e0d3bafd
SD		 1674}
1675
84b5dbf3
MCC		 1676int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
1677 u16 register_address, u8 bit_start, u8 bit_end,
1678 u32 value)
e0d3bafd 1679{
84b5dbf3
MCC		 1680 int status = 0;
1681 u32 tmp;
1682 u32 mask = 0;
1683 int i;
1684
b9255176 1685 if (bit_start > (size - 1) || bit_end > (size - 1))
84b5dbf3 1686 return -1;
e0d3bafd 1687
84b5dbf3
MCC		 1688 if (size == 8) {
1689 status =
1690 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1691 &tmp, 1);
1692 } else {
1693 status =
1694 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1695 &tmp, 4);
1696 }
e0d3bafd 1697
b9255176 1698 if (status < 0)
84b5dbf3 1699 return status;
84b5dbf3
MCC		 1700
1701 mask = 1 << bit_end;
b9255176 1702 for (i = bit_end; i > bit_start && i > 0; i--)
84b5dbf3 1703 mask = mask + (1 << (i - 1));
84b5dbf3
MCC		 1704
1705 value <<= bit_start;
1706
1707 if (size == 8) {
1708 tmp &= ~mask;
1709 tmp |= value;
1710 tmp &= 0xff;
1711 status =
1712 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1713 tmp, 1);
1714 } else {
1715 tmp &= ~mask;
1716 tmp |= value;
1717 status =
1718 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1719 tmp, 4);
1720 }
1721
1722 return status;
1723}
e0d3bafd
SD		 1724
1725int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 1726 u16 saddr, u32 mask, u32 value)
e0d3bafd 1727{
84b5dbf3
MCC		 1728 u32 temp;
1729 int status = 0;
e0d3bafd 1730
84b5dbf3 1731 status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4);
e0d3bafd 1732
84b5dbf3
MCC		 1733 if (status < 0)
1734 return status;
e0d3bafd 1735
84b5dbf3
MCC		 1736 temp &= ~mask;
1737 temp |= value;
e0d3bafd 1738
84b5dbf3 1739 status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4);
e0d3bafd 1740
84b5dbf3 1741 return status;
e0d3bafd
SD		 1742}
1743
1744u32 cx231xx_set_field(u32 field_mask, u32 data)
1745{
84b5dbf3 1746 u32 temp;
e0d3bafd 1747
b9255176 1748 for (temp = field_mask; (temp & 1) == 0; temp >>= 1)
84b5dbf3 1749 data <<= 1;
e0d3bafd 1750
84b5dbf3 1751 return data;
e0d3bafd 1752}
Linux kernel - Deliverables
This page took 0.525537 seconds and 5 git commands to generate.