Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus
[deliverable/linux.git] / drivers / media / usb / cx231xx / cx231xx.h
CommitLineData
e0d3bafd
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1/*
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
84b5dbf3 5 Based on em28xx driver
e0d3bafd
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6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX231XX_H
23#define _CX231XX_H
24
25#include <linux/videodev2.h>
b1196126
SD
26#include <linux/types.h>
27#include <linux/ioctl.h>
e0d3bafd 28#include <linux/i2c.h>
61b04cb2 29#include <linux/workqueue.h>
e0d3bafd 30#include <linux/mutex.h>
b7085c08 31#include <linux/usb.h>
b1196126 32
d647f0b7 33#include <media/drv-intf/cx2341x.h>
b1196126
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34
35#include <media/videobuf-vmalloc.h>
36#include <media/v4l2-device.h>
d2370f8e 37#include <media/v4l2-ctrls.h>
1d08a4fa 38#include <media/v4l2-fh.h>
6bda9644 39#include <media/rc-core.h>
b5dcee22 40#include <media/i2c/ir-kbd-i2c.h>
e0d3bafd 41#include <media/videobuf-dvb.h>
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42
43#include "cx231xx-reg.h"
6e4f574b 44#include "cx231xx-pcb-cfg.h"
e0d3bafd
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45#include "cx231xx-conf-reg.h"
46
e0d3bafd 47#define DRIVER_NAME "cx231xx"
44ecf1df 48#define PWR_SLEEP_INTERVAL 10
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49
50/* I2C addresses for control block in Cx231xx */
ecc67d10
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51#define AFE_DEVICE_ADDRESS 0x60
52#define I2S_BLK_DEVICE_ADDRESS 0x98
53#define VID_BLK_I2C_ADDRESS 0x88
64fbf444 54#define VERVE_I2C_ADDRESS 0x40
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55#define DIF_USE_BASEBAND 0xFFFFFFFF
56
57/* Boards supported by driver */
58#define CX231XX_BOARD_UNKNOWN 0
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59#define CX231XX_BOARD_CNXT_CARRAERA 1
60#define CX231XX_BOARD_CNXT_SHELBY 2
61#define CX231XX_BOARD_CNXT_RDE_253S 3
62#define CX231XX_BOARD_CNXT_RDU_253S 4
64fbf444 63#define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5
955e6ed8
MCC
64#define CX231XX_BOARD_CNXT_RDE_250 6
65#define CX231XX_BOARD_CNXT_RDU_250 7
1a50fdde 66#define CX231XX_BOARD_HAUPPAUGE_EXETER 8
4270c3ca 67#define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
9417bc6d 68#define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
4e105039 69#define CX231XX_BOARD_PV_XCAPTURE_USB 11
eeaaf817 70#define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
2a7b6a40 71#define CX231XX_BOARD_ICONBIT_U100 13
de8ae0d5
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72#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
73#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
68c97bf3 74#define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
3ead1ba3 75#define CX231XX_BOARD_OTG102 17
8b1255a2 76#define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18
dd2e7dd2 77#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19
9e49f7c3 78#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20
809abdbf 79#define CX231XX_BOARD_HAUPPAUGE_955Q 21
eee1d06d 80#define CX231XX_BOARD_TERRATEC_GRABBY 22
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81
82/* Limits minimum and default number of buffers */
83#define CX231XX_MIN_BUF 4
84#define CX231XX_DEF_BUF 12
85#define CX231XX_DEF_VBI_BUF 6
86
87#define VBI_LINE_COUNT 17
88#define VBI_LINE_LENGTH 1440
89
90/*Limits the max URB message size */
91#define URB_MAX_CTRL_SIZE 80
92
93/* Params for validated field */
94#define CX231XX_BOARD_NOT_VALIDATED 1
84b5dbf3 95#define CX231XX_BOARD_VALIDATED 0
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96
97/* maximum number of cx231xx boards */
98#define CX231XX_MAXBOARDS 8
99
100/* maximum number of frames that can be queued */
101#define CX231XX_NUM_FRAMES 5
102
103/* number of buffers for isoc transfers */
104#define CX231XX_NUM_BUFS 8
105
106/* number of packets for each buffer
107 windows requests only 40 packets .. so we better do the same
108 this is what I found out for all alternate numbers there!
109 */
110#define CX231XX_NUM_PACKETS 40
111
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112/* default alternate; 0 means choose the best */
113#define CX231XX_PINOUT 0
114
115#define CX231XX_INTERLACED_DEFAULT 1
116
e0d3bafd 117/* time to wait when stopping the isoc transfer */
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118#define CX231XX_URB_TIMEOUT \
119 msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
e0d3bafd 120
64fbf444
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121#define CX231xx_NORMS (\
122 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
123 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
124 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
125 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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PB
126
127#define SLEEP_S5H1432 30
128#define CX23417_OSC_EN 8
129#define CX23417_RESET 9
130
131struct cx23417_fmt {
132 char *name;
133 u32 fourcc; /* v4l2 format id */
134 int depth;
135 int flags;
136 u32 cxformat;
137};
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138enum cx231xx_mode {
139 CX231XX_SUSPEND,
140 CX231XX_ANALOG_MODE,
141 CX231XX_DIGITAL_MODE,
142};
143
144enum cx231xx_std_mode {
145 CX231XX_TV_AIR = 0,
146 CX231XX_TV_CABLE
147};
148
149enum cx231xx_stream_state {
150 STREAM_OFF,
151 STREAM_INTERRUPT,
152 STREAM_ON,
153};
154
155struct cx231xx;
156
64fbf444 157struct cx231xx_isoc_ctl {
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158 /* max packet size of isoc transaction */
159 int max_pkt_size;
e0d3bafd 160
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161 /* number of allocated urbs */
162 int num_bufs;
e0d3bafd 163
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164 /* urb for isoc transfers */
165 struct urb **urb;
e0d3bafd 166
84b5dbf3
MCC
167 /* transfer buffers for isoc transfer */
168 char **transfer_buffer;
e0d3bafd 169
84b5dbf3
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170 /* Last buffer command and region */
171 u8 cmd;
172 int pos, size, pktsize;
e0d3bafd 173
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174 /* Last field: ODD or EVEN? */
175 int field;
e0d3bafd 176
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177 /* Stores incomplete commands */
178 u32 tmp_buf;
179 int tmp_buf_len;
e0d3bafd 180
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181 /* Stores already requested buffers */
182 struct cx231xx_buffer *buf;
e0d3bafd 183
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184 /* Stores the number of received fields */
185 int nfields;
e0d3bafd 186
84b5dbf3 187 /* isoc urb callback */
cde4362f 188 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
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189};
190
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PB
191struct cx231xx_bulk_ctl {
192 /* max packet size of bulk transaction */
193 int max_pkt_size;
194
195 /* number of allocated urbs */
196 int num_bufs;
197
198 /* urb for bulk transfers */
199 struct urb **urb;
200
201 /* transfer buffers for bulk transfer */
202 char **transfer_buffer;
203
204 /* Last buffer command and region */
205 u8 cmd;
206 int pos, size, pktsize;
207
208 /* Last field: ODD or EVEN? */
209 int field;
210
211 /* Stores incomplete commands */
212 u32 tmp_buf;
213 int tmp_buf_len;
214
215 /* Stores already requested buffers */
216 struct cx231xx_buffer *buf;
217
218 /* Stores the number of received fields */
219 int nfields;
220
221 /* bulk urb callback */
222 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
223};
224
e0d3bafd 225struct cx231xx_fmt {
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226 char *name;
227 u32 fourcc; /* v4l2 format id */
228 int depth;
229 int reg;
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SD
230};
231
232/* buffer for one video frame */
233struct cx231xx_buffer {
234 /* common v4l buffer stuff -- must be first */
235 struct videobuf_buffer vb;
236
237 struct list_head frame;
238 int top_field;
239 int receiving;
240};
241
64fbf444
PB
242enum ps_package_head {
243 CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
244 CX231XX_NONEED_PS_PACKAGE_HEAD
245};
246
e0d3bafd 247struct cx231xx_dmaqueue {
84b5dbf3
MCC
248 struct list_head active;
249 struct list_head queued;
e0d3bafd 250
84b5dbf3 251 wait_queue_head_t wq;
e0d3bafd
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252
253 /* Counters to control buffer fill */
84b5dbf3
MCC
254 int pos;
255 u8 is_partial_line;
256 u8 partial_buf[8];
257 u8 last_sav;
258 int current_field;
259 u32 bytes_left_in_line;
260 u32 lines_completed;
261 u8 field1_done;
262 u32 lines_per_field;
64fbf444
PB
263
264 /*Mpeg2 control buffer*/
265 u8 *p_left_data;
266 u32 left_data_count;
267 u8 mpeg_buffer_done;
268 u32 mpeg_buffer_completed;
269 enum ps_package_head add_ps_package_head;
270 char ps_head[10];
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271};
272
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273/* inputs */
274
275#define MAX_CX231XX_INPUT 4
276
277enum cx231xx_itype {
278 CX231XX_VMUX_COMPOSITE1 = 1,
279 CX231XX_VMUX_SVIDEO,
280 CX231XX_VMUX_TELEVISION,
84b5dbf3
MCC
281 CX231XX_VMUX_CABLE,
282 CX231XX_RADIO,
283 CX231XX_VMUX_DVB,
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SD
284};
285
286enum cx231xx_v_input {
84b5dbf3
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287 CX231XX_VIN_1_1 = 0x1,
288 CX231XX_VIN_2_1,
289 CX231XX_VIN_3_1,
290 CX231XX_VIN_4_1,
291 CX231XX_VIN_1_2 = 0x01,
292 CX231XX_VIN_2_2,
293 CX231XX_VIN_3_2,
294 CX231XX_VIN_1_3 = 0x1,
295 CX231XX_VIN_2_3,
296 CX231XX_VIN_3_3,
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297};
298
299/* cx231xx has two audio inputs: tuner and line in */
300enum cx231xx_amux {
301 /* This is the only entry for cx231xx tuner input */
84b5dbf3 302 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
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303 CX231XX_AMUX_LINE_IN, /* Line In */
304};
305
306struct cx231xx_reg_seq {
307 unsigned char bit;
84b5dbf3 308 unsigned char val;
e0d3bafd
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309 int sleep;
310};
311
312struct cx231xx_input {
313 enum cx231xx_itype type;
314 unsigned int vmux;
315 enum cx231xx_amux amux;
316 struct cx231xx_reg_seq *gpio;
317};
318
319#define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
320
321enum cx231xx_decoder {
322 CX231XX_NODECODER,
323 CX231XX_AVDECODER
324};
325
b9255176 326enum CX231XX_I2C_MASTER_PORT {
9abe3b89
MS
327 I2C_0 = 0, /* master 0 - internal connection */
328 I2C_1 = 1, /* master 1 - used with mux */
329 I2C_2 = 2, /* master 2 */
330 I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */
331 I2C_1_MUX_3 = 4 /* master 1 - port 3 (I2C_DEMOD_EN = 1) */
b9255176 332};
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333
334struct cx231xx_board {
335 char *name;
336 int vchannels;
337 int tuner_type;
338 int tuner_addr;
84b5dbf3 339 v4l2_std_id norm; /* tv norm */
e0d3bafd 340
84b5dbf3
MCC
341 /* demod related */
342 int demod_addr;
343 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
e0d3bafd
SD
344
345 /* GPIO Pins */
346 struct cx231xx_reg_seq *dvb_gpio;
347 struct cx231xx_reg_seq *suspend_gpio;
348 struct cx231xx_reg_seq *tuner_gpio;
78bb6df6
MCC
349 /* Negative means don't use it */
350 s8 tuner_sif_gpio;
351 s8 tuner_scl_gpio;
352 s8 tuner_sda_gpio;
e0d3bafd 353
84b5dbf3
MCC
354 /* PIN ctrl */
355 u32 ctl_pin_status_mask;
356 u8 agc_analog_digital_select_gpio;
357 u32 gpio_pin_status_mask;
e0d3bafd 358
84b5dbf3
MCC
359 /* i2c masters */
360 u8 tuner_i2c_master;
361 u8 demod_i2c_master;
9ab66912
MCC
362 u8 ir_i2c_master;
363
364 /* for devices with I2C chips for IR */
29e3ec19 365 char *rc_map_name;
e0d3bafd
SD
366
367 unsigned int max_range_640_480:1;
368 unsigned int has_dvb:1;
2f861387 369 unsigned int has_417:1;
e0d3bafd 370 unsigned int valid:1;
2f861387
MCC
371 unsigned int no_alt_vanc:1;
372 unsigned int external_av:1;
e0d3bafd
SD
373
374 unsigned char xclk, i2c_speed;
375
376 enum cx231xx_decoder decoder;
88806218 377 int output_mode;
e0d3bafd 378
84b5dbf3
MCC
379 struct cx231xx_input input[MAX_CX231XX_INPUT];
380 struct cx231xx_input radio;
b088ba65 381 struct rc_map *ir_codes;
e0d3bafd
SD
382};
383
384/* device states */
385enum cx231xx_dev_state {
386 DEV_INITIALIZED = 0x01,
387 DEV_DISCONNECTED = 0x02,
e0d3bafd
SD
388};
389
84b5dbf3
MCC
390enum AFE_MODE {
391 AFE_MODE_LOW_IF,
392 AFE_MODE_BASEBAND,
393 AFE_MODE_EU_HI_IF,
394 AFE_MODE_US_HI_IF,
395 AFE_MODE_JAPAN_HI_IF
e0d3bafd
SD
396};
397
84b5dbf3
MCC
398enum AUDIO_INPUT {
399 AUDIO_INPUT_MUTE,
400 AUDIO_INPUT_LINE,
401 AUDIO_INPUT_TUNER_TV,
402 AUDIO_INPUT_SPDIF,
403 AUDIO_INPUT_TUNER_FM
e0d3bafd
SD
404};
405
406#define CX231XX_AUDIO_BUFS 5
64fbf444
PB
407#define CX231XX_NUM_AUDIO_PACKETS 16
408#define CX231XX_ISO_NUM_AUDIO_PACKETS 64
e0d3bafd 409
e0d3bafd
SD
410/* cx231xx extensions */
411#define CX231XX_AUDIO 0x10
412#define CX231XX_DVB 0x20
413
414struct cx231xx_audio {
415 char name[50];
416 char *transfer_buffer[CX231XX_AUDIO_BUFS];
417 struct urb *urb[CX231XX_AUDIO_BUFS];
418 struct usb_device *udev;
419 unsigned int capture_transfer_done;
84b5dbf3 420 struct snd_pcm_substream *capture_pcm_substream;
e0d3bafd
SD
421
422 unsigned int hwptr_done_capture;
84b5dbf3 423 struct snd_card *sndcard;
e0d3bafd
SD
424
425 int users, shutdown;
64fbf444 426 /* locks */
e0d3bafd
SD
427 spinlock_t slock;
428
84b5dbf3
MCC
429 int alt; /* alternate */
430 int max_pkt_size; /* max packet size of isoc transaction */
431 int num_alt; /* Number of alternative settings */
e0d3bafd 432 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 433 u16 end_point_addr;
e0d3bafd
SD
434};
435
436struct cx231xx;
437
438struct cx231xx_fh {
1d08a4fa 439 struct v4l2_fh fh;
e0d3bafd 440 struct cx231xx *dev;
84b5dbf3 441 unsigned int stream_on:1; /* Locks streams */
84b5dbf3 442 enum v4l2_buf_type type;
64fbf444 443
71590765 444 struct videobuf_queue vb_vidq;
64fbf444
PB
445
446 /* vbi capture */
447 struct videobuf_queue vidq;
448 struct videobuf_queue vbiq;
449
450 /* MPEG Encoder specifics ONLY */
451
452 atomic_t v4l_reading;
e0d3bafd
SD
453};
454
b9255176 455/*****************************************************************/
e0d3bafd 456/* set/get i2c */
b9255176
SD
457/* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
458#define I2C_SPEED_1M 0x0
459#define I2C_SPEED_400K 0x1
460#define I2C_SPEED_100K 0x2
461#define I2C_SPEED_5M 0x3
462
463/* 0-- STOP transaction */
464#define I2C_STOP 0x0
465/* 1-- do not transmit STOP at end of transaction */
466#define I2C_NOSTOP 0x1
b251e618 467/* 1--allow slave to insert clock wait states */
b9255176 468#define I2C_SYNC 0x1
e0d3bafd
SD
469
470struct cx231xx_i2c {
84b5dbf3 471 struct cx231xx *dev;
e0d3bafd 472
84b5dbf3 473 int nr;
e0d3bafd
SD
474
475 /* i2c i/o */
84b5dbf3 476 struct i2c_adapter i2c_adap;
84b5dbf3 477 u32 i2c_rc;
e0d3bafd
SD
478
479 /* different settings for each bus */
84b5dbf3
MCC
480 u8 i2c_period;
481 u8 i2c_nostop;
482 u8 i2c_reserve;
e0d3bafd
SD
483};
484
84b5dbf3
MCC
485struct cx231xx_i2c_xfer_data {
486 u8 dev_addr;
487 u8 direction; /* 1 - IN, 0 - OUT */
488 u8 saddr_len; /* sub address len */
489 u16 saddr_dat; /* sub addr data */
490 u8 buf_size; /* buffer size */
491 u8 *p_buffer; /* pointer to the buffer */
e0d3bafd
SD
492};
493
6e4f574b 494struct VENDOR_REQUEST_IN {
84b5dbf3
MCC
495 u8 bRequest;
496 u16 wValue;
497 u16 wIndex;
498 u16 wLength;
499 u8 direction;
500 u8 bData;
501 u8 *pBuff;
b9255176 502};
e0d3bafd 503
64fbf444
PB
504struct cx231xx_tvnorm {
505 char *name;
506 v4l2_std_id id;
507 u32 cxiformat;
508 u32 cxoformat;
509};
510
6e4f574b 511enum TRANSFER_TYPE {
84b5dbf3
MCC
512 Raw_Video = 0,
513 Audio,
514 Vbi, /* VANC */
515 Sliced_cc, /* HANC */
516 TS1_serial_mode,
517 TS2,
518 TS1_parallel_mode
b9255176 519} ;
e0d3bafd
SD
520
521struct cx231xx_video_mode {
84b5dbf3 522 /* Isoc control struct */
e0d3bafd 523 struct cx231xx_dmaqueue vidq;
64fbf444
PB
524 struct cx231xx_isoc_ctl isoc_ctl;
525 struct cx231xx_bulk_ctl bulk_ctl;
526 /* locks */
e0d3bafd
SD
527 spinlock_t slock;
528
529 /* usb transfer */
84b5dbf3
MCC
530 int alt; /* alternate */
531 int max_pkt_size; /* max packet size of isoc transaction */
532 int num_alt; /* Number of alternative settings */
e0d3bafd 533 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 534 u16 end_point_addr;
e0d3bafd 535};
1e451808 536
64fbf444
PB
537struct cx231xx_tsport {
538 struct cx231xx *dev;
539
540 int nr;
541 int sram_chno;
542
543 struct videobuf_dvb_frontends frontends;
544
545 /* dma queues */
546
547 u32 ts_packet_size;
548 u32 ts_packet_count;
549
550 int width;
551 int height;
552
553 /* locks */
554 spinlock_t slock;
555
556 /* registers */
557 u32 reg_gpcnt;
558 u32 reg_gpcnt_ctl;
559 u32 reg_dma_ctl;
560 u32 reg_lngth;
561 u32 reg_hw_sop_ctrl;
562 u32 reg_gen_ctrl;
563 u32 reg_bd_pkt_status;
564 u32 reg_sop_status;
565 u32 reg_fifo_ovfl_stat;
566 u32 reg_vld_misc;
567 u32 reg_ts_clk_en;
568 u32 reg_ts_int_msk;
569 u32 reg_ts_int_stat;
570 u32 reg_src_sel;
571
572 /* Default register vals */
573 int pci_irqmask;
574 u32 dma_ctl_val;
575 u32 ts_int_msk_val;
576 u32 gen_ctrl_val;
577 u32 ts_clk_en_val;
578 u32 src_sel_val;
579 u32 vld_misc_val;
580 u32 hw_sop_ctrl_val;
581
582 /* Allow a single tsport to have multiple frontends */
583 u32 num_frontends;
584 void *port_priv;
585};
e0d3bafd 586
e0d3bafd
SD
587/* main device struct */
588struct cx231xx {
589 /* generic device properties */
84b5dbf3
MCC
590 char name[30]; /* name (including minor) of the device */
591 int model; /* index in the device_data struct */
592 int devno; /* marks the number of this device */
336fea92 593 struct device *dev; /* pointer to USB interface's dev */
e0d3bafd
SD
594
595 struct cx231xx_board board;
596
9ab66912 597 /* For I2C IR support */
141bb0dc 598 struct IR_i2c_init_data init_data;
7528cd27 599 struct i2c_client *ir_i2c_client;
9ab66912 600
84b5dbf3
MCC
601 unsigned int stream_on:1; /* Locks streams */
602 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
e0d3bafd
SD
603 unsigned int has_audio_class:1;
604 unsigned int has_alsa_audio:1;
605
77e97ba2
MCC
606 unsigned int i2c_scan_running:1; /* true only during i2c_scan */
607
84b5dbf3 608 struct cx231xx_fmt *format;
e0d3bafd 609
b1196126
SD
610 struct v4l2_device v4l2_dev;
611 struct v4l2_subdev *sd_cx25840;
612 struct v4l2_subdev *sd_tuner;
d2370f8e
HV
613 struct v4l2_ctrl_handler ctrl_handler;
614 struct v4l2_ctrl_handler radio_ctrl_handler;
88b6ffed 615 struct cx2341x_handler mpeg_ctrl_handler;
b1196126 616
61b04cb2
MCC
617 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
618 atomic_t stream_started; /* stream should be running if true */
619
84b5dbf3 620 struct list_head devlist;
e0d3bafd 621
84b5dbf3
MCC
622 int tuner_type; /* type of the tuner */
623 int tuner_addr; /* tuner address */
e0d3bafd 624
84b5dbf3
MCC
625 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
626 struct cx231xx_i2c i2c_bus[3];
15c212dd
MS
627 struct i2c_adapter *i2c_mux_adap[2];
628
84b5dbf3 629 unsigned int xc_fw_load_done:1;
a1f26765 630 unsigned int port_3_switch_enabled:1;
64fbf444 631 /* locks */
84b5dbf3 632 struct mutex gpio_i2c_lock;
64fbf444 633 struct mutex i2c_lock;
e0d3bafd
SD
634
635 /* video for linux */
84b5dbf3 636 int users; /* user count for exclusive use */
60acf187 637 struct video_device vdev; /* video for linux device struct */
84b5dbf3
MCC
638 v4l2_std_id norm; /* selected tv norm */
639 int ctl_freq; /* selected frequency */
640 unsigned int ctl_ainput; /* selected audio input */
e0d3bafd
SD
641
642 /* frame properties */
84b5dbf3
MCC
643 int width; /* current frame width */
644 int height; /* current frame height */
84b5dbf3 645 int interlaced; /* 1=interlace fileds, 0=just top fileds */
e0d3bafd
SD
646
647 struct cx231xx_audio adev;
648
649 /* states */
650 enum cx231xx_dev_state state;
651
84b5dbf3 652 struct work_struct request_module_wk;
e0d3bafd
SD
653
654 /* locks */
655 struct mutex lock;
84b5dbf3 656 struct mutex ctrl_urb_lock; /* protects urb_buf */
e0d3bafd
SD
657 struct list_head inqueue, outqueue;
658 wait_queue_head_t open, wait_frame, wait_stream;
60acf187
HV
659 struct video_device vbi_dev;
660 struct video_device radio_dev;
e0d3bafd 661
1d058bdc
MCC
662#if defined(CONFIG_MEDIA_CONTROLLER)
663 struct media_device *media_dev;
b6a40e72 664 struct media_pad video_pad, vbi_pad;
6168309a
MCC
665 struct media_entity input_ent[MAX_CX231XX_INPUT];
666 struct media_pad input_pad[MAX_CX231XX_INPUT];
1d058bdc
MCC
667#endif
668
e0d3bafd
SD
669 unsigned char eedata[256];
670
84b5dbf3
MCC
671 struct cx231xx_video_mode video_mode;
672 struct cx231xx_video_mode vbi_mode;
673 struct cx231xx_video_mode sliced_cc_mode;
674 struct cx231xx_video_mode ts1_mode;
e0d3bafd 675
64fbf444
PB
676 atomic_t devlist_count;
677
84b5dbf3
MCC
678 struct usb_device *udev; /* the usb device */
679 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
e0d3bafd
SD
680
681 /* helper funcs that call usb_control_msg */
cde4362f 682 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
e0d3bafd 683 char *buf, int len);
cde4362f 684 int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 685 char *buf, int len);
cde4362f 686 int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
b9255176 687 struct cx231xx_i2c_xfer_data *req_data);
cde4362f
MCC
688 int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
689 u8 *buf, u8 len);
690 int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
691 u8 *buf, u8 len);
84b5dbf3 692
cde4362f
MCC
693 int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
694 int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
e0d3bafd
SD
695
696 enum cx231xx_mode mode;
697
698 struct cx231xx_dvb *dvb;
699
84b5dbf3
MCC
700 /* Cx231xx supported PCB config's */
701 struct pcb_config current_pcb_config;
702 u8 current_scenario_idx;
703 u8 interface_count;
704 u8 max_iad_interface_count;
e0d3bafd 705
84b5dbf3
MCC
706 /* GPIO related register direction and values */
707 u32 gpio_dir;
708 u32 gpio_val;
e0d3bafd 709
84b5dbf3
MCC
710 /* Power Modes */
711 int power_mode;
e0d3bafd 712
ecc67d10
SD
713 /* afe parameters */
714 enum AFE_MODE afe_mode;
715 u32 afe_ref_count;
e0d3bafd 716
84b5dbf3
MCC
717 /* video related parameters */
718 u32 video_input;
719 u32 active_mode;
720 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
721 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
e0d3bafd 722
64fbf444
PB
723 /*mode: digital=1 or analog=0*/
724 u8 mode_tv;
725
726 u8 USE_ISO;
727 struct cx231xx_tvnorm encodernorm;
728 struct cx231xx_tsport ts1, ts2;
60acf187 729 struct video_device v4l_device;
64fbf444
PB
730 atomic_t v4l_reader_count;
731 u32 freq;
732 unsigned int input;
733 u32 cx23417_mailbox;
734 u32 __iomem *lmmio;
735 u8 __iomem *bmmio;
e0d3bafd
SD
736};
737
64fbf444
PB
738extern struct list_head cx231xx_devlist;
739
b1196126
SD
740#define cx25840_call(cx231xx, o, f, args...) \
741 v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
742#define tuner_call(cx231xx, o, f, args...) \
743 v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
744#define call_all(dev, o, f, args...) \
745 v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
746
e0d3bafd
SD
747struct cx231xx_ops {
748 struct list_head next;
749 char *name;
750 int id;
84b5dbf3
MCC
751 int (*init) (struct cx231xx *);
752 int (*fini) (struct cx231xx *);
e0d3bafd
SD
753};
754
755/* call back functions in dvb module */
84b5dbf3
MCC
756int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
757int cx231xx_reset_analog_tuner(struct cx231xx *dev);
e0d3bafd
SD
758
759/* Provided by cx231xx-i2c.c */
7c894a3b 760void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
761int cx231xx_i2c_register(struct cx231xx_i2c *bus);
762int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
15c212dd
MS
763int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no);
764void cx231xx_i2c_mux_unregister(struct cx231xx *dev, int mux_no);
c3c3f1ae 765struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
766
767/* Internal block control functions */
64fbf444
PB
768int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
769 u8 saddr_len, u32 *data, u8 data_len, int master);
770int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
771 u8 saddr_len, u32 data, u8 data_len, int master);
e0d3bafd 772int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
cde4362f 773 u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
e0d3bafd 774int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
84b5dbf3
MCC
775 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
776int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
777 u16 register_address, u8 bit_start, u8 bit_end,
778 u32 value);
e0d3bafd 779int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 780 u16 saddr, u32 mask, u32 value);
e0d3bafd
SD
781u32 cx231xx_set_field(u32 field_mask, u32 data);
782
64fbf444
PB
783/*verve r/w*/
784void initGPIO(struct cx231xx *dev);
785void uninitGPIO(struct cx231xx *dev);
ecc67d10
SD
786/* afe related functions */
787int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
788int cx231xx_afe_init_channels(struct cx231xx *dev);
789int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
790int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
791int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
792int cx231xx_afe_update_power_control(struct cx231xx *dev,
6e4f574b 793 enum AV_MODE avmode);
ecc67d10 794int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
e0d3bafd 795
ecc67d10
SD
796/* i2s block related functions */
797int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
798int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
6e4f574b 799 enum AV_MODE avmode);
ecc67d10 800int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
e0d3bafd
SD
801
802/* DIF related functions */
803int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
84b5dbf3 804 u32 function_mode, u32 standard);
64fbf444
PB
805void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
806 u8 spectral_invert, u32 mode);
807u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
808void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
809 u8 spectral_invert, u32 mode);
810void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
811void reset_s5h1432_demod(struct cx231xx *dev);
812void cx231xx_dump_HH_reg(struct cx231xx *dev);
813void update_HH_register_after_set_DIF(struct cx231xx *dev);
64fbf444
PB
814
815
816
e0d3bafd
SD
817int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
818int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
819int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
820
821/* video parser functions */
cde4362f
MCC
822u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
823 u32 *p_bytes_used);
824u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
825 u32 *p_bytes_used);
e0d3bafd 826int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 827 u8 *p_buffer, u32 bytes_to_copy);
84b5dbf3
MCC
828void cx231xx_reset_video_buffer(struct cx231xx *dev,
829 struct cx231xx_dmaqueue *dma_q);
830u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
831u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 832 u8 *p_line, u32 length, int field_number);
84b5dbf3 833u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f
MCC
834 u8 sav_eav, u8 *p_buffer, u32 buffer_size);
835void cx231xx_swab(u16 *from, u16 *to, u16 len);
e0d3bafd
SD
836
837/* Provided by cx231xx-core.c */
838
839u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
840void cx231xx_queue_unusedframes(struct cx231xx *dev);
841void cx231xx_release_buffers(struct cx231xx *dev);
842
843/* read from control pipe */
844int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 845 char *buf, int len);
e0d3bafd
SD
846
847/* write to control pipe */
848int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 849 char *buf, int len);
e0d3bafd
SD
850int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
851
b9255176
SD
852int cx231xx_send_vendor_cmd(struct cx231xx *dev,
853 struct VENDOR_REQUEST_IN *ven_req);
e0d3bafd 854int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
b9255176 855 struct cx231xx_i2c_xfer_data *req_data);
e0d3bafd
SD
856
857/* Gpio related functions */
cde4362f 858int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 859 u8 len, u8 request, u8 direction);
e0d3bafd 860int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84b5dbf3
MCC
861int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
862 int pin_value);
e0d3bafd
SD
863
864int cx231xx_gpio_i2c_start(struct cx231xx *dev);
865int cx231xx_gpio_i2c_end(struct cx231xx *dev);
866int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
cde4362f 867int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
e0d3bafd
SD
868int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
869int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
870int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
871
cde4362f
MCC
872int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
873int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
e0d3bafd
SD
874
875/* audio related functions */
84b5dbf3
MCC
876int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
877 enum AUDIO_INPUT audio_input);
e0d3bafd
SD
878
879int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
e0d3bafd
SD
880int cx231xx_set_video_alternate(struct cx231xx *dev);
881int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
64fbf444
PB
882int is_fw_load(struct cx231xx *dev);
883int cx231xx_check_fw(struct cx231xx *dev);
e0d3bafd 884int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 885 int num_bufs, int max_pkt_size,
cde4362f
MCC
886 int (*isoc_copy) (struct cx231xx *dev,
887 struct urb *urb));
64fbf444
PB
888int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
889 int num_bufs, int max_pkt_size,
890 int (*bulk_copy) (struct cx231xx *dev,
891 struct urb *urb));
892void cx231xx_stop_TS1(struct cx231xx *dev);
893void cx231xx_start_TS1(struct cx231xx *dev);
e0d3bafd 894void cx231xx_uninit_isoc(struct cx231xx *dev);
64fbf444 895void cx231xx_uninit_bulk(struct cx231xx *dev);
e0d3bafd 896int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
64fbf444
PB
897int cx231xx_unmute_audio(struct cx231xx *dev);
898int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
899void cx231xx_disable656(struct cx231xx *dev);
900void cx231xx_enable656(struct cx231xx *dev);
901int cx231xx_demod_reset(struct cx231xx *dev);
e0d3bafd
SD
902int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
903
904/* Device list functions */
905void cx231xx_release_resources(struct cx231xx *dev);
906void cx231xx_release_analog_resources(struct cx231xx *dev);
907int cx231xx_register_analog_devices(struct cx231xx *dev);
908void cx231xx_remove_from_devlist(struct cx231xx *dev);
909void cx231xx_add_into_devlist(struct cx231xx *dev);
e0d3bafd
SD
910void cx231xx_init_extension(struct cx231xx *dev);
911void cx231xx_close_extension(struct cx231xx *dev);
912
913/* hardware init functions */
914int cx231xx_dev_init(struct cx231xx *dev);
915void cx231xx_dev_uninit(struct cx231xx *dev);
916void cx231xx_config_i2c(struct cx231xx *dev);
917int cx231xx_config(struct cx231xx *dev);
918
919/* Stream control functions */
920int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
921int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
922
923int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
924
925/* Power control functions */
6e4f574b 926int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
e0d3bafd
SD
927int cx231xx_power_suspend(struct cx231xx *dev);
928
929/* chip specific control functions */
930int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
84b5dbf3
MCC
931int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
932 u8 analog_or_digital);
a6f6fb9c 933int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
e0d3bafd
SD
934
935/* video audio decoder related functions */
936void video_mux(struct cx231xx *dev, int index);
937int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
938int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
939int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
940int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
e0d3bafd
SD
941
942/* Provided by cx231xx-video.c */
943int cx231xx_register_extension(struct cx231xx_ops *dev);
944void cx231xx_unregister_extension(struct cx231xx_ops *dev);
945void cx231xx_init_extension(struct cx231xx *dev);
946void cx231xx_close_extension(struct cx231xx *dev);
6168309a 947void cx231xx_v4l2_create_entities(struct cx231xx *dev);
bc08734c
HV
948int cx231xx_querycap(struct file *file, void *priv,
949 struct v4l2_capability *cap);
b86d1544 950int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
2f73c7c5 951int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
b86d1544
HV
952int cx231xx_g_frequency(struct file *file, void *priv,
953 struct v4l2_frequency *f);
954int cx231xx_s_frequency(struct file *file, void *priv,
b530a447 955 const struct v4l2_frequency *f);
b86d1544
HV
956int cx231xx_enum_input(struct file *file, void *priv,
957 struct v4l2_input *i);
958int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
959int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
08fe9f7d 960int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
b86d1544
HV
961int cx231xx_g_register(struct file *file, void *priv,
962 struct v4l2_dbg_register *reg);
963int cx231xx_s_register(struct file *file, void *priv,
977ba3b1 964 const struct v4l2_dbg_register *reg);
e0d3bafd
SD
965
966/* Provided by cx231xx-cards.c */
967extern void cx231xx_pre_card_setup(struct cx231xx *dev);
968extern void cx231xx_card_setup(struct cx231xx *dev);
969extern struct cx231xx_board cx231xx_boards[];
970extern struct usb_device_id cx231xx_id_table[];
971extern const unsigned int cx231xx_bcount;
e0d3bafd
SD
972int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
973
64fbf444
PB
974/* cx23885-417.c */
975extern int cx231xx_417_register(struct cx231xx *dev);
976extern void cx231xx_417_unregister(struct cx231xx *dev);
977
9ab66912
MCC
978/* cx23885-input.c */
979
980#if defined(CONFIG_VIDEO_CX231XX_RC)
981int cx231xx_ir_init(struct cx231xx *dev);
982void cx231xx_ir_exit(struct cx231xx *dev);
983#else
27eb5e24
HV
984static inline int cx231xx_ir_init(struct cx231xx *dev)
985{
986 return 0;
987}
988static inline void cx231xx_ir_exit(struct cx231xx *dev) {}
9ab66912
MCC
989#endif
990
e0d3bafd
SD
991static inline unsigned int norm_maxw(struct cx231xx *dev)
992{
993 if (dev->board.max_range_640_480)
994 return 640;
995 else
996 return 720;
997}
998
999static inline unsigned int norm_maxh(struct cx231xx *dev)
1000{
1001 if (dev->board.max_range_640_480)
1002 return 480;
1003 else
1004 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
1005}
1006#endif
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