[media] cx231xx: convert from pr_foo to dev_foo
[deliverable/linux.git] / drivers / media / usb / cx231xx / cx231xx.h
CommitLineData
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1/*
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
84b5dbf3 5 Based on em28xx driver
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6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX231XX_H
23#define _CX231XX_H
24
25#include <linux/videodev2.h>
b1196126
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26#include <linux/types.h>
27#include <linux/ioctl.h>
e0d3bafd 28#include <linux/i2c.h>
61b04cb2 29#include <linux/workqueue.h>
e0d3bafd 30#include <linux/mutex.h>
b7085c08 31#include <linux/usb.h>
b1196126 32
64fbf444 33#include <media/cx2341x.h>
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34
35#include <media/videobuf-vmalloc.h>
36#include <media/v4l2-device.h>
d2370f8e 37#include <media/v4l2-ctrls.h>
1d08a4fa 38#include <media/v4l2-fh.h>
6bda9644 39#include <media/rc-core.h>
9ab66912 40#include <media/ir-kbd-i2c.h>
e0d3bafd 41#include <media/videobuf-dvb.h>
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42
43#include "cx231xx-reg.h"
6e4f574b 44#include "cx231xx-pcb-cfg.h"
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45#include "cx231xx-conf-reg.h"
46
e0d3bafd 47#define DRIVER_NAME "cx231xx"
44ecf1df 48#define PWR_SLEEP_INTERVAL 10
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49
50/* I2C addresses for control block in Cx231xx */
ecc67d10
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51#define AFE_DEVICE_ADDRESS 0x60
52#define I2S_BLK_DEVICE_ADDRESS 0x98
53#define VID_BLK_I2C_ADDRESS 0x88
64fbf444 54#define VERVE_I2C_ADDRESS 0x40
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55#define DIF_USE_BASEBAND 0xFFFFFFFF
56
57/* Boards supported by driver */
58#define CX231XX_BOARD_UNKNOWN 0
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59#define CX231XX_BOARD_CNXT_CARRAERA 1
60#define CX231XX_BOARD_CNXT_SHELBY 2
61#define CX231XX_BOARD_CNXT_RDE_253S 3
62#define CX231XX_BOARD_CNXT_RDU_253S 4
64fbf444 63#define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5
955e6ed8
MCC
64#define CX231XX_BOARD_CNXT_RDE_250 6
65#define CX231XX_BOARD_CNXT_RDU_250 7
1a50fdde 66#define CX231XX_BOARD_HAUPPAUGE_EXETER 8
4270c3ca 67#define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
9417bc6d 68#define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
4e105039 69#define CX231XX_BOARD_PV_XCAPTURE_USB 11
eeaaf817 70#define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
2a7b6a40 71#define CX231XX_BOARD_ICONBIT_U100 13
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72#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
73#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
68c97bf3 74#define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
3ead1ba3 75#define CX231XX_BOARD_OTG102 17
8b1255a2 76#define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18
dd2e7dd2 77#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19
9e49f7c3 78#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20
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79
80/* Limits minimum and default number of buffers */
81#define CX231XX_MIN_BUF 4
82#define CX231XX_DEF_BUF 12
83#define CX231XX_DEF_VBI_BUF 6
84
85#define VBI_LINE_COUNT 17
86#define VBI_LINE_LENGTH 1440
87
88/*Limits the max URB message size */
89#define URB_MAX_CTRL_SIZE 80
90
91/* Params for validated field */
92#define CX231XX_BOARD_NOT_VALIDATED 1
84b5dbf3 93#define CX231XX_BOARD_VALIDATED 0
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94
95/* maximum number of cx231xx boards */
96#define CX231XX_MAXBOARDS 8
97
98/* maximum number of frames that can be queued */
99#define CX231XX_NUM_FRAMES 5
100
101/* number of buffers for isoc transfers */
102#define CX231XX_NUM_BUFS 8
103
104/* number of packets for each buffer
105 windows requests only 40 packets .. so we better do the same
106 this is what I found out for all alternate numbers there!
107 */
108#define CX231XX_NUM_PACKETS 40
109
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110/* default alternate; 0 means choose the best */
111#define CX231XX_PINOUT 0
112
113#define CX231XX_INTERLACED_DEFAULT 1
114
e0d3bafd 115/* time to wait when stopping the isoc transfer */
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116#define CX231XX_URB_TIMEOUT \
117 msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
e0d3bafd 118
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119#define CX231xx_NORMS (\
120 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
121 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
122 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
123 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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124
125#define SLEEP_S5H1432 30
126#define CX23417_OSC_EN 8
127#define CX23417_RESET 9
128
129struct cx23417_fmt {
130 char *name;
131 u32 fourcc; /* v4l2 format id */
132 int depth;
133 int flags;
134 u32 cxformat;
135};
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136enum cx231xx_mode {
137 CX231XX_SUSPEND,
138 CX231XX_ANALOG_MODE,
139 CX231XX_DIGITAL_MODE,
140};
141
142enum cx231xx_std_mode {
143 CX231XX_TV_AIR = 0,
144 CX231XX_TV_CABLE
145};
146
147enum cx231xx_stream_state {
148 STREAM_OFF,
149 STREAM_INTERRUPT,
150 STREAM_ON,
151};
152
153struct cx231xx;
154
64fbf444 155struct cx231xx_isoc_ctl {
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156 /* max packet size of isoc transaction */
157 int max_pkt_size;
e0d3bafd 158
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159 /* number of allocated urbs */
160 int num_bufs;
e0d3bafd 161
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162 /* urb for isoc transfers */
163 struct urb **urb;
e0d3bafd 164
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165 /* transfer buffers for isoc transfer */
166 char **transfer_buffer;
e0d3bafd 167
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168 /* Last buffer command and region */
169 u8 cmd;
170 int pos, size, pktsize;
e0d3bafd 171
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172 /* Last field: ODD or EVEN? */
173 int field;
e0d3bafd 174
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175 /* Stores incomplete commands */
176 u32 tmp_buf;
177 int tmp_buf_len;
e0d3bafd 178
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179 /* Stores already requested buffers */
180 struct cx231xx_buffer *buf;
e0d3bafd 181
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182 /* Stores the number of received fields */
183 int nfields;
e0d3bafd 184
84b5dbf3 185 /* isoc urb callback */
cde4362f 186 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
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187};
188
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189struct cx231xx_bulk_ctl {
190 /* max packet size of bulk transaction */
191 int max_pkt_size;
192
193 /* number of allocated urbs */
194 int num_bufs;
195
196 /* urb for bulk transfers */
197 struct urb **urb;
198
199 /* transfer buffers for bulk transfer */
200 char **transfer_buffer;
201
202 /* Last buffer command and region */
203 u8 cmd;
204 int pos, size, pktsize;
205
206 /* Last field: ODD or EVEN? */
207 int field;
208
209 /* Stores incomplete commands */
210 u32 tmp_buf;
211 int tmp_buf_len;
212
213 /* Stores already requested buffers */
214 struct cx231xx_buffer *buf;
215
216 /* Stores the number of received fields */
217 int nfields;
218
219 /* bulk urb callback */
220 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
221};
222
e0d3bafd 223struct cx231xx_fmt {
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224 char *name;
225 u32 fourcc; /* v4l2 format id */
226 int depth;
227 int reg;
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228};
229
230/* buffer for one video frame */
231struct cx231xx_buffer {
232 /* common v4l buffer stuff -- must be first */
233 struct videobuf_buffer vb;
234
235 struct list_head frame;
236 int top_field;
237 int receiving;
238};
239
64fbf444
PB
240enum ps_package_head {
241 CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
242 CX231XX_NONEED_PS_PACKAGE_HEAD
243};
244
e0d3bafd 245struct cx231xx_dmaqueue {
84b5dbf3
MCC
246 struct list_head active;
247 struct list_head queued;
e0d3bafd 248
84b5dbf3 249 wait_queue_head_t wq;
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250
251 /* Counters to control buffer fill */
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252 int pos;
253 u8 is_partial_line;
254 u8 partial_buf[8];
255 u8 last_sav;
256 int current_field;
257 u32 bytes_left_in_line;
258 u32 lines_completed;
259 u8 field1_done;
260 u32 lines_per_field;
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261
262 /*Mpeg2 control buffer*/
263 u8 *p_left_data;
264 u32 left_data_count;
265 u8 mpeg_buffer_done;
266 u32 mpeg_buffer_completed;
267 enum ps_package_head add_ps_package_head;
268 char ps_head[10];
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269};
270
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271/* inputs */
272
273#define MAX_CX231XX_INPUT 4
274
275enum cx231xx_itype {
276 CX231XX_VMUX_COMPOSITE1 = 1,
277 CX231XX_VMUX_SVIDEO,
278 CX231XX_VMUX_TELEVISION,
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279 CX231XX_VMUX_CABLE,
280 CX231XX_RADIO,
281 CX231XX_VMUX_DVB,
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282 CX231XX_VMUX_DEBUG
283};
284
285enum cx231xx_v_input {
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286 CX231XX_VIN_1_1 = 0x1,
287 CX231XX_VIN_2_1,
288 CX231XX_VIN_3_1,
289 CX231XX_VIN_4_1,
290 CX231XX_VIN_1_2 = 0x01,
291 CX231XX_VIN_2_2,
292 CX231XX_VIN_3_2,
293 CX231XX_VIN_1_3 = 0x1,
294 CX231XX_VIN_2_3,
295 CX231XX_VIN_3_3,
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296};
297
298/* cx231xx has two audio inputs: tuner and line in */
299enum cx231xx_amux {
300 /* This is the only entry for cx231xx tuner input */
84b5dbf3 301 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
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302 CX231XX_AMUX_LINE_IN, /* Line In */
303};
304
305struct cx231xx_reg_seq {
306 unsigned char bit;
84b5dbf3 307 unsigned char val;
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308 int sleep;
309};
310
311struct cx231xx_input {
312 enum cx231xx_itype type;
313 unsigned int vmux;
314 enum cx231xx_amux amux;
315 struct cx231xx_reg_seq *gpio;
316};
317
318#define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
319
320enum cx231xx_decoder {
321 CX231XX_NODECODER,
322 CX231XX_AVDECODER
323};
324
b9255176 325enum CX231XX_I2C_MASTER_PORT {
9abe3b89
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326 I2C_0 = 0, /* master 0 - internal connection */
327 I2C_1 = 1, /* master 1 - used with mux */
328 I2C_2 = 2, /* master 2 */
329 I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */
330 I2C_1_MUX_3 = 4 /* master 1 - port 3 (I2C_DEMOD_EN = 1) */
b9255176 331};
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332
333struct cx231xx_board {
334 char *name;
335 int vchannels;
336 int tuner_type;
337 int tuner_addr;
84b5dbf3 338 v4l2_std_id norm; /* tv norm */
e0d3bafd 339
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340 /* demod related */
341 int demod_addr;
342 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
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343
344 /* GPIO Pins */
345 struct cx231xx_reg_seq *dvb_gpio;
346 struct cx231xx_reg_seq *suspend_gpio;
347 struct cx231xx_reg_seq *tuner_gpio;
78bb6df6
MCC
348 /* Negative means don't use it */
349 s8 tuner_sif_gpio;
350 s8 tuner_scl_gpio;
351 s8 tuner_sda_gpio;
e0d3bafd 352
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353 /* PIN ctrl */
354 u32 ctl_pin_status_mask;
355 u8 agc_analog_digital_select_gpio;
356 u32 gpio_pin_status_mask;
e0d3bafd 357
84b5dbf3
MCC
358 /* i2c masters */
359 u8 tuner_i2c_master;
360 u8 demod_i2c_master;
9ab66912
MCC
361 u8 ir_i2c_master;
362
363 /* for devices with I2C chips for IR */
29e3ec19 364 char *rc_map_name;
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SD
365
366 unsigned int max_range_640_480:1;
367 unsigned int has_dvb:1;
2f861387 368 unsigned int has_417:1;
e0d3bafd 369 unsigned int valid:1;
2f861387
MCC
370 unsigned int no_alt_vanc:1;
371 unsigned int external_av:1;
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372
373 unsigned char xclk, i2c_speed;
374
375 enum cx231xx_decoder decoder;
88806218 376 int output_mode;
e0d3bafd 377
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MCC
378 struct cx231xx_input input[MAX_CX231XX_INPUT];
379 struct cx231xx_input radio;
b088ba65 380 struct rc_map *ir_codes;
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381};
382
383/* device states */
384enum cx231xx_dev_state {
385 DEV_INITIALIZED = 0x01,
386 DEV_DISCONNECTED = 0x02,
e0d3bafd
SD
387};
388
84b5dbf3
MCC
389enum AFE_MODE {
390 AFE_MODE_LOW_IF,
391 AFE_MODE_BASEBAND,
392 AFE_MODE_EU_HI_IF,
393 AFE_MODE_US_HI_IF,
394 AFE_MODE_JAPAN_HI_IF
e0d3bafd
SD
395};
396
84b5dbf3
MCC
397enum AUDIO_INPUT {
398 AUDIO_INPUT_MUTE,
399 AUDIO_INPUT_LINE,
400 AUDIO_INPUT_TUNER_TV,
401 AUDIO_INPUT_SPDIF,
402 AUDIO_INPUT_TUNER_FM
e0d3bafd
SD
403};
404
405#define CX231XX_AUDIO_BUFS 5
64fbf444
PB
406#define CX231XX_NUM_AUDIO_PACKETS 16
407#define CX231XX_ISO_NUM_AUDIO_PACKETS 64
e0d3bafd 408
e0d3bafd
SD
409/* cx231xx extensions */
410#define CX231XX_AUDIO 0x10
411#define CX231XX_DVB 0x20
412
413struct cx231xx_audio {
414 char name[50];
415 char *transfer_buffer[CX231XX_AUDIO_BUFS];
416 struct urb *urb[CX231XX_AUDIO_BUFS];
417 struct usb_device *udev;
418 unsigned int capture_transfer_done;
84b5dbf3 419 struct snd_pcm_substream *capture_pcm_substream;
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420
421 unsigned int hwptr_done_capture;
84b5dbf3 422 struct snd_card *sndcard;
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423
424 int users, shutdown;
64fbf444 425 /* locks */
e0d3bafd
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426 spinlock_t slock;
427
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MCC
428 int alt; /* alternate */
429 int max_pkt_size; /* max packet size of isoc transaction */
430 int num_alt; /* Number of alternative settings */
e0d3bafd 431 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 432 u16 end_point_addr;
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433};
434
435struct cx231xx;
436
437struct cx231xx_fh {
1d08a4fa 438 struct v4l2_fh fh;
e0d3bafd 439 struct cx231xx *dev;
84b5dbf3 440 unsigned int stream_on:1; /* Locks streams */
84b5dbf3 441 enum v4l2_buf_type type;
64fbf444 442
71590765 443 struct videobuf_queue vb_vidq;
64fbf444
PB
444
445 /* vbi capture */
446 struct videobuf_queue vidq;
447 struct videobuf_queue vbiq;
448
449 /* MPEG Encoder specifics ONLY */
450
451 atomic_t v4l_reading;
e0d3bafd
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452};
453
b9255176 454/*****************************************************************/
e0d3bafd 455/* set/get i2c */
b9255176
SD
456/* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
457#define I2C_SPEED_1M 0x0
458#define I2C_SPEED_400K 0x1
459#define I2C_SPEED_100K 0x2
460#define I2C_SPEED_5M 0x3
461
462/* 0-- STOP transaction */
463#define I2C_STOP 0x0
464/* 1-- do not transmit STOP at end of transaction */
465#define I2C_NOSTOP 0x1
b251e618 466/* 1--allow slave to insert clock wait states */
b9255176 467#define I2C_SYNC 0x1
e0d3bafd
SD
468
469struct cx231xx_i2c {
84b5dbf3 470 struct cx231xx *dev;
e0d3bafd 471
84b5dbf3 472 int nr;
e0d3bafd
SD
473
474 /* i2c i/o */
84b5dbf3 475 struct i2c_adapter i2c_adap;
84b5dbf3 476 u32 i2c_rc;
e0d3bafd
SD
477
478 /* different settings for each bus */
84b5dbf3
MCC
479 u8 i2c_period;
480 u8 i2c_nostop;
481 u8 i2c_reserve;
e0d3bafd
SD
482};
483
84b5dbf3
MCC
484struct cx231xx_i2c_xfer_data {
485 u8 dev_addr;
486 u8 direction; /* 1 - IN, 0 - OUT */
487 u8 saddr_len; /* sub address len */
488 u16 saddr_dat; /* sub addr data */
489 u8 buf_size; /* buffer size */
490 u8 *p_buffer; /* pointer to the buffer */
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SD
491};
492
6e4f574b 493struct VENDOR_REQUEST_IN {
84b5dbf3
MCC
494 u8 bRequest;
495 u16 wValue;
496 u16 wIndex;
497 u16 wLength;
498 u8 direction;
499 u8 bData;
500 u8 *pBuff;
b9255176 501};
e0d3bafd 502
64fbf444
PB
503struct cx231xx_tvnorm {
504 char *name;
505 v4l2_std_id id;
506 u32 cxiformat;
507 u32 cxoformat;
508};
509
6e4f574b 510enum TRANSFER_TYPE {
84b5dbf3
MCC
511 Raw_Video = 0,
512 Audio,
513 Vbi, /* VANC */
514 Sliced_cc, /* HANC */
515 TS1_serial_mode,
516 TS2,
517 TS1_parallel_mode
b9255176 518} ;
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SD
519
520struct cx231xx_video_mode {
84b5dbf3 521 /* Isoc control struct */
e0d3bafd 522 struct cx231xx_dmaqueue vidq;
64fbf444
PB
523 struct cx231xx_isoc_ctl isoc_ctl;
524 struct cx231xx_bulk_ctl bulk_ctl;
525 /* locks */
e0d3bafd
SD
526 spinlock_t slock;
527
528 /* usb transfer */
84b5dbf3
MCC
529 int alt; /* alternate */
530 int max_pkt_size; /* max packet size of isoc transaction */
531 int num_alt; /* Number of alternative settings */
e0d3bafd 532 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 533 u16 end_point_addr;
e0d3bafd 534};
64fbf444
PB
535/*
536struct cx23885_dmaqueue {
537 struct list_head active;
538 struct list_head queued;
539 struct timer_list timeout;
540 struct btcx_riscmem stopper;
541 u32 count;
542};
543*/
544struct cx231xx_tsport {
545 struct cx231xx *dev;
546
547 int nr;
548 int sram_chno;
549
550 struct videobuf_dvb_frontends frontends;
551
552 /* dma queues */
553
554 u32 ts_packet_size;
555 u32 ts_packet_count;
556
557 int width;
558 int height;
559
560 /* locks */
561 spinlock_t slock;
562
563 /* registers */
564 u32 reg_gpcnt;
565 u32 reg_gpcnt_ctl;
566 u32 reg_dma_ctl;
567 u32 reg_lngth;
568 u32 reg_hw_sop_ctrl;
569 u32 reg_gen_ctrl;
570 u32 reg_bd_pkt_status;
571 u32 reg_sop_status;
572 u32 reg_fifo_ovfl_stat;
573 u32 reg_vld_misc;
574 u32 reg_ts_clk_en;
575 u32 reg_ts_int_msk;
576 u32 reg_ts_int_stat;
577 u32 reg_src_sel;
578
579 /* Default register vals */
580 int pci_irqmask;
581 u32 dma_ctl_val;
582 u32 ts_int_msk_val;
583 u32 gen_ctrl_val;
584 u32 ts_clk_en_val;
585 u32 src_sel_val;
586 u32 vld_misc_val;
587 u32 hw_sop_ctrl_val;
588
589 /* Allow a single tsport to have multiple frontends */
590 u32 num_frontends;
591 void *port_priv;
592};
e0d3bafd 593
e0d3bafd
SD
594/* main device struct */
595struct cx231xx {
596 /* generic device properties */
84b5dbf3
MCC
597 char name[30]; /* name (including minor) of the device */
598 int model; /* index in the device_data struct */
599 int devno; /* marks the number of this device */
e0d3bafd
SD
600
601 struct cx231xx_board board;
602
9ab66912 603 /* For I2C IR support */
141bb0dc 604 struct IR_i2c_init_data init_data;
7528cd27 605 struct i2c_client *ir_i2c_client;
9ab66912 606
84b5dbf3
MCC
607 unsigned int stream_on:1; /* Locks streams */
608 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
e0d3bafd
SD
609 unsigned int has_audio_class:1;
610 unsigned int has_alsa_audio:1;
611
77e97ba2
MCC
612 unsigned int i2c_scan_running:1; /* true only during i2c_scan */
613
84b5dbf3 614 struct cx231xx_fmt *format;
e0d3bafd 615
b1196126
SD
616 struct v4l2_device v4l2_dev;
617 struct v4l2_subdev *sd_cx25840;
618 struct v4l2_subdev *sd_tuner;
d2370f8e
HV
619 struct v4l2_ctrl_handler ctrl_handler;
620 struct v4l2_ctrl_handler radio_ctrl_handler;
88b6ffed 621 struct cx2341x_handler mpeg_ctrl_handler;
b1196126 622
61b04cb2
MCC
623 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
624 atomic_t stream_started; /* stream should be running if true */
625
84b5dbf3 626 struct list_head devlist;
e0d3bafd 627
84b5dbf3
MCC
628 int tuner_type; /* type of the tuner */
629 int tuner_addr; /* tuner address */
e0d3bafd 630
84b5dbf3
MCC
631 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
632 struct cx231xx_i2c i2c_bus[3];
15c212dd
MS
633 struct i2c_adapter *i2c_mux_adap[2];
634
84b5dbf3 635 unsigned int xc_fw_load_done:1;
a1f26765 636 unsigned int port_3_switch_enabled:1;
64fbf444 637 /* locks */
84b5dbf3 638 struct mutex gpio_i2c_lock;
64fbf444 639 struct mutex i2c_lock;
e0d3bafd
SD
640
641 /* video for linux */
84b5dbf3
MCC
642 int users; /* user count for exclusive use */
643 struct video_device *vdev; /* video for linux device struct */
644 v4l2_std_id norm; /* selected tv norm */
645 int ctl_freq; /* selected frequency */
646 unsigned int ctl_ainput; /* selected audio input */
e0d3bafd
SD
647
648 /* frame properties */
84b5dbf3
MCC
649 int width; /* current frame width */
650 int height; /* current frame height */
84b5dbf3 651 int interlaced; /* 1=interlace fileds, 0=just top fileds */
e0d3bafd
SD
652
653 struct cx231xx_audio adev;
654
655 /* states */
656 enum cx231xx_dev_state state;
657
84b5dbf3 658 struct work_struct request_module_wk;
e0d3bafd
SD
659
660 /* locks */
661 struct mutex lock;
84b5dbf3 662 struct mutex ctrl_urb_lock; /* protects urb_buf */
e0d3bafd
SD
663 struct list_head inqueue, outqueue;
664 wait_queue_head_t open, wait_frame, wait_stream;
665 struct video_device *vbi_dev;
666 struct video_device *radio_dev;
667
668 unsigned char eedata[256];
669
84b5dbf3
MCC
670 struct cx231xx_video_mode video_mode;
671 struct cx231xx_video_mode vbi_mode;
672 struct cx231xx_video_mode sliced_cc_mode;
673 struct cx231xx_video_mode ts1_mode;
e0d3bafd 674
64fbf444
PB
675 atomic_t devlist_count;
676
84b5dbf3
MCC
677 struct usb_device *udev; /* the usb device */
678 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
e0d3bafd
SD
679
680 /* helper funcs that call usb_control_msg */
cde4362f 681 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
e0d3bafd 682 char *buf, int len);
cde4362f 683 int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 684 char *buf, int len);
cde4362f 685 int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
b9255176 686 struct cx231xx_i2c_xfer_data *req_data);
cde4362f
MCC
687 int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
688 u8 *buf, u8 len);
689 int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
690 u8 *buf, u8 len);
84b5dbf3 691
cde4362f
MCC
692 int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
693 int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
e0d3bafd
SD
694
695 enum cx231xx_mode mode;
696
697 struct cx231xx_dvb *dvb;
698
84b5dbf3
MCC
699 /* Cx231xx supported PCB config's */
700 struct pcb_config current_pcb_config;
701 u8 current_scenario_idx;
702 u8 interface_count;
703 u8 max_iad_interface_count;
e0d3bafd 704
84b5dbf3
MCC
705 /* GPIO related register direction and values */
706 u32 gpio_dir;
707 u32 gpio_val;
e0d3bafd 708
84b5dbf3
MCC
709 /* Power Modes */
710 int power_mode;
e0d3bafd 711
ecc67d10
SD
712 /* afe parameters */
713 enum AFE_MODE afe_mode;
714 u32 afe_ref_count;
e0d3bafd 715
84b5dbf3
MCC
716 /* video related parameters */
717 u32 video_input;
718 u32 active_mode;
719 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
720 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
e0d3bafd 721
64fbf444
PB
722 /*mode: digital=1 or analog=0*/
723 u8 mode_tv;
724
725 u8 USE_ISO;
726 struct cx231xx_tvnorm encodernorm;
727 struct cx231xx_tsport ts1, ts2;
64fbf444
PB
728 struct video_device *v4l_device;
729 atomic_t v4l_reader_count;
730 u32 freq;
731 unsigned int input;
732 u32 cx23417_mailbox;
733 u32 __iomem *lmmio;
734 u8 __iomem *bmmio;
e0d3bafd
SD
735};
736
64fbf444
PB
737extern struct list_head cx231xx_devlist;
738
b1196126
SD
739#define cx25840_call(cx231xx, o, f, args...) \
740 v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
741#define tuner_call(cx231xx, o, f, args...) \
742 v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
743#define call_all(dev, o, f, args...) \
744 v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
745
e0d3bafd
SD
746struct cx231xx_ops {
747 struct list_head next;
748 char *name;
749 int id;
84b5dbf3
MCC
750 int (*init) (struct cx231xx *);
751 int (*fini) (struct cx231xx *);
e0d3bafd
SD
752};
753
754/* call back functions in dvb module */
84b5dbf3
MCC
755int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
756int cx231xx_reset_analog_tuner(struct cx231xx *dev);
e0d3bafd
SD
757
758/* Provided by cx231xx-i2c.c */
7c894a3b 759void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
760int cx231xx_i2c_register(struct cx231xx_i2c *bus);
761int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
15c212dd
MS
762int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no);
763void cx231xx_i2c_mux_unregister(struct cx231xx *dev, int mux_no);
c3c3f1ae 764struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
765
766/* Internal block control functions */
64fbf444
PB
767int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
768 u8 saddr_len, u32 *data, u8 data_len, int master);
769int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
770 u8 saddr_len, u32 data, u8 data_len, int master);
e0d3bafd 771int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
cde4362f 772 u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
e0d3bafd 773int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
84b5dbf3
MCC
774 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
775int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
776 u16 register_address, u8 bit_start, u8 bit_end,
777 u32 value);
e0d3bafd 778int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 779 u16 saddr, u32 mask, u32 value);
e0d3bafd
SD
780u32 cx231xx_set_field(u32 field_mask, u32 data);
781
64fbf444
PB
782/*verve r/w*/
783void initGPIO(struct cx231xx *dev);
784void uninitGPIO(struct cx231xx *dev);
ecc67d10
SD
785/* afe related functions */
786int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
787int cx231xx_afe_init_channels(struct cx231xx *dev);
788int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
789int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
790int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
791int cx231xx_afe_update_power_control(struct cx231xx *dev,
6e4f574b 792 enum AV_MODE avmode);
ecc67d10 793int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
e0d3bafd 794
ecc67d10
SD
795/* i2s block related functions */
796int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
797int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
6e4f574b 798 enum AV_MODE avmode);
ecc67d10 799int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
e0d3bafd
SD
800
801/* DIF related functions */
802int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
84b5dbf3 803 u32 function_mode, u32 standard);
64fbf444
PB
804void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
805 u8 spectral_invert, u32 mode);
806u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
807void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
808 u8 spectral_invert, u32 mode);
809void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
810void reset_s5h1432_demod(struct cx231xx *dev);
811void cx231xx_dump_HH_reg(struct cx231xx *dev);
812void update_HH_register_after_set_DIF(struct cx231xx *dev);
64fbf444
PB
813
814
815
e0d3bafd
SD
816int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
817int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
818int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
819
820/* video parser functions */
cde4362f
MCC
821u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
822 u32 *p_bytes_used);
823u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
824 u32 *p_bytes_used);
e0d3bafd 825int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 826 u8 *p_buffer, u32 bytes_to_copy);
84b5dbf3
MCC
827void cx231xx_reset_video_buffer(struct cx231xx *dev,
828 struct cx231xx_dmaqueue *dma_q);
829u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
830u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 831 u8 *p_line, u32 length, int field_number);
84b5dbf3 832u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f
MCC
833 u8 sav_eav, u8 *p_buffer, u32 buffer_size);
834void cx231xx_swab(u16 *from, u16 *to, u16 len);
e0d3bafd
SD
835
836/* Provided by cx231xx-core.c */
837
838u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
839void cx231xx_queue_unusedframes(struct cx231xx *dev);
840void cx231xx_release_buffers(struct cx231xx *dev);
841
842/* read from control pipe */
843int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 844 char *buf, int len);
e0d3bafd
SD
845
846/* write to control pipe */
847int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 848 char *buf, int len);
e0d3bafd
SD
849int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
850
b9255176
SD
851int cx231xx_send_vendor_cmd(struct cx231xx *dev,
852 struct VENDOR_REQUEST_IN *ven_req);
e0d3bafd 853int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
b9255176 854 struct cx231xx_i2c_xfer_data *req_data);
e0d3bafd
SD
855
856/* Gpio related functions */
cde4362f 857int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 858 u8 len, u8 request, u8 direction);
e0d3bafd 859int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84b5dbf3
MCC
860int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
861 int pin_value);
e0d3bafd
SD
862
863int cx231xx_gpio_i2c_start(struct cx231xx *dev);
864int cx231xx_gpio_i2c_end(struct cx231xx *dev);
865int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
cde4362f 866int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
e0d3bafd
SD
867int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
868int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
869int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
870
cde4362f
MCC
871int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
872int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
e0d3bafd
SD
873
874/* audio related functions */
84b5dbf3
MCC
875int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
876 enum AUDIO_INPUT audio_input);
e0d3bafd
SD
877
878int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
e0d3bafd
SD
879int cx231xx_set_video_alternate(struct cx231xx *dev);
880int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
64fbf444
PB
881int is_fw_load(struct cx231xx *dev);
882int cx231xx_check_fw(struct cx231xx *dev);
e0d3bafd 883int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 884 int num_bufs, int max_pkt_size,
cde4362f
MCC
885 int (*isoc_copy) (struct cx231xx *dev,
886 struct urb *urb));
64fbf444
PB
887int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
888 int num_bufs, int max_pkt_size,
889 int (*bulk_copy) (struct cx231xx *dev,
890 struct urb *urb));
891void cx231xx_stop_TS1(struct cx231xx *dev);
892void cx231xx_start_TS1(struct cx231xx *dev);
e0d3bafd 893void cx231xx_uninit_isoc(struct cx231xx *dev);
64fbf444 894void cx231xx_uninit_bulk(struct cx231xx *dev);
e0d3bafd 895int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
64fbf444
PB
896int cx231xx_unmute_audio(struct cx231xx *dev);
897int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
898void cx231xx_disable656(struct cx231xx *dev);
899void cx231xx_enable656(struct cx231xx *dev);
900int cx231xx_demod_reset(struct cx231xx *dev);
e0d3bafd
SD
901int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
902
903/* Device list functions */
904void cx231xx_release_resources(struct cx231xx *dev);
905void cx231xx_release_analog_resources(struct cx231xx *dev);
906int cx231xx_register_analog_devices(struct cx231xx *dev);
907void cx231xx_remove_from_devlist(struct cx231xx *dev);
908void cx231xx_add_into_devlist(struct cx231xx *dev);
e0d3bafd
SD
909void cx231xx_init_extension(struct cx231xx *dev);
910void cx231xx_close_extension(struct cx231xx *dev);
911
912/* hardware init functions */
913int cx231xx_dev_init(struct cx231xx *dev);
914void cx231xx_dev_uninit(struct cx231xx *dev);
915void cx231xx_config_i2c(struct cx231xx *dev);
916int cx231xx_config(struct cx231xx *dev);
917
918/* Stream control functions */
919int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
920int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
921
922int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
923
924/* Power control functions */
6e4f574b 925int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
e0d3bafd
SD
926int cx231xx_power_suspend(struct cx231xx *dev);
927
928/* chip specific control functions */
929int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
84b5dbf3
MCC
930int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
931 u8 analog_or_digital);
a6f6fb9c 932int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
e0d3bafd
SD
933
934/* video audio decoder related functions */
935void video_mux(struct cx231xx *dev, int index);
936int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
937int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
938int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
939int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
e0d3bafd
SD
940
941/* Provided by cx231xx-video.c */
942int cx231xx_register_extension(struct cx231xx_ops *dev);
943void cx231xx_unregister_extension(struct cx231xx_ops *dev);
944void cx231xx_init_extension(struct cx231xx *dev);
945void cx231xx_close_extension(struct cx231xx *dev);
bc08734c
HV
946int cx231xx_querycap(struct file *file, void *priv,
947 struct v4l2_capability *cap);
b86d1544 948int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
2f73c7c5 949int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
b86d1544
HV
950int cx231xx_g_frequency(struct file *file, void *priv,
951 struct v4l2_frequency *f);
952int cx231xx_s_frequency(struct file *file, void *priv,
b530a447 953 const struct v4l2_frequency *f);
b86d1544
HV
954int cx231xx_enum_input(struct file *file, void *priv,
955 struct v4l2_input *i);
956int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
957int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
08fe9f7d 958int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
b86d1544
HV
959int cx231xx_g_register(struct file *file, void *priv,
960 struct v4l2_dbg_register *reg);
961int cx231xx_s_register(struct file *file, void *priv,
977ba3b1 962 const struct v4l2_dbg_register *reg);
e0d3bafd
SD
963
964/* Provided by cx231xx-cards.c */
965extern void cx231xx_pre_card_setup(struct cx231xx *dev);
966extern void cx231xx_card_setup(struct cx231xx *dev);
967extern struct cx231xx_board cx231xx_boards[];
968extern struct usb_device_id cx231xx_id_table[];
969extern const unsigned int cx231xx_bcount;
e0d3bafd
SD
970int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
971
64fbf444
PB
972/* cx23885-417.c */
973extern int cx231xx_417_register(struct cx231xx *dev);
974extern void cx231xx_417_unregister(struct cx231xx *dev);
975
9ab66912
MCC
976/* cx23885-input.c */
977
978#if defined(CONFIG_VIDEO_CX231XX_RC)
979int cx231xx_ir_init(struct cx231xx *dev);
980void cx231xx_ir_exit(struct cx231xx *dev);
981#else
982#define cx231xx_ir_init(dev) (0)
983#define cx231xx_ir_exit(dev) (0)
984#endif
985
e0d3bafd
SD
986static inline unsigned int norm_maxw(struct cx231xx *dev)
987{
988 if (dev->board.max_range_640_480)
989 return 640;
990 else
991 return 720;
992}
993
994static inline unsigned int norm_maxh(struct cx231xx *dev)
995{
996 if (dev->board.max_range_640_480)
997 return 480;
998 else
999 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
1000}
1001#endif
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