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Merge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
b7f54910
PB		 1/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2.
6 *
ba3fe3a9 7 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 8 */
9#include "dib0700.h"
10
11#include "dib3000mc.h"
91bb9be6 12#include "dib7000m.h"
a75763ff 13#include "dib7000p.h"
ba3fe3a9 14#include "dib8000.h"
be9bae10 15#include "dib9000.h"
b7f54910 16#include "mt2060.h"
54d75eba 17#include "mt2266.h"
6ca8f0b9 18#include "tuner-xc2028.h"
cb22cb52 19#include "xc5000.h"
8d009a0c 20#include "xc4000.h"
cb22cb52 21#include "s5h1411.h"
01373a5c 22#include "dib0070.h"
03245a5e 23#include "dib0090.h"
ce904bcb
MK		 24#include "lgdt3305.h"
25#include "mxl5007t.h"
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), "
30 "if applicable for the device (default: 0=automatic/off).");
31
01373a5c 32struct dib0700_adapter_state {
14d24d14 33 int (*set_param_save) (struct dvb_frontend *);
be9bae10 34 const struct firmware *frontend_firmware;
8abe4a0a 35 struct dib7000p_ops dib7000p_ops;
d44913c1 36 struct dib8000_ops dib8000_ops;
01373a5c
PB		 37};
38
39/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 40 * has a LNA on GPIO0 which is enabled by setting 1 */
41static struct mt2060_config bristol_mt2060_config[2] = {
42 {
43 .i2c_address = 0x60,
303cbeaa 44 .clock_out = 3,
b7f54910
PB		 45 }, {
46 .i2c_address = 0x61,
47 }
48};
49
99afb989 50
b7f54910
PB		 51static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
52 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 53 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 54
6958effe
PB		 55 .agc1_max = 42598,
56 .agc1_min = 17694,
57 .agc2_max = 45875,
58 .agc2_min = 0,
b7f54910 59
6958effe
PB		 60 .agc1_pt1 = 0,
61 .agc1_pt2 = 59,
b7f54910 62
6958effe
PB		 63 .agc1_slope1 = 0,
64 .agc1_slope2 = 69,
b7f54910
PB		 65
66 .agc2_pt1 = 0,
6958effe 67 .agc2_pt2 = 59,
b7f54910 68
6958effe
PB		 69 .agc2_slope1 = 111,
70 .agc2_slope2 = 28,
b7f54910
PB		 71};
72
73static struct dib3000mc_config bristol_dib3000mc_config[2] = {
74 { .agc = &bristol_dib3000p_mt2060_agc_config,
75 .max_time = 0x196,
76 .ln_adc_level = 0x1cc7,
77 .output_mpeg2_in_188_bytes = 1,
78 },
79 { .agc = &bristol_dib3000p_mt2060_agc_config,
80 .max_time = 0x196,
81 .ln_adc_level = 0x1cc7,
82 .output_mpeg2_in_188_bytes = 1,
83 }
84};
85
86static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
87{
6958effe 88 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 89 if (adap->id == 0) {
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
93 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
94
7fb3fc0c
PB		 95 if (force_lna_activation)
96 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
97 else
98 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 99
b7f54910
PB		 100 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
101 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
102 return -ENODEV;
103 }
104 }
6958effe 105 st->mt2060_if1[adap->id] = 1220;
77eed219 106 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 107 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 108}
109
4a2b1083 110static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 111{
112 struct i2c_msg msg[2] = {
113 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
114 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
115 };
116 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
117 return 0;
118}
119
b7f54910
PB		 120static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
121{
c52344fd 122 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 123 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 124 s8 a;
125 int if1=1220;
da5ee486
AV		 126 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
127 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 128 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
129 }
9a9677af
MK		 130 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
131 &bristol_mt2060_config[adap->id], if1) == NULL ?
132 -ENODEV : 0;
b7f54910
PB		 133}
134
01373a5c 135/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 136
b6884a17
PB		 137/* MT226x */
138static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
139 {
9c783036 140 BAND_UHF,
b6884a17
PB		 141
142 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
143 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 144 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
145 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
146
147 1130,
148 21,
149
150 0,
151 118,
152
153 0,
154 3530,
155 1,
156 0,
157
158 65535,
159 33770,
160 65535,
161 23592,
162
163 0,
164 62,
165 255,
166 64,
167 64,
168 132,
169 192,
170 80,
171 80,
172
173 17,
174 27,
175 23,
176 51,
177
178 1,
b6884a17 179 }, {
9c783036 180 BAND_VHF | BAND_LBAND,
b6884a17
PB		 181
182 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
183 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 184 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
185 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
186
187 2372,
188 21,
189
190 0,
191 118,
192
193 0,
194 3530,
195 1,
196 0,
197
198 65535,
199 0,
200 65535,
201 23592,
202
203 0,
204 128,
205 128,
206 128,
207 0,
208 128,
209 253,
210 81,
211 0,
212
213 17,
214 27,
215 23,
216 51,
217
218 1,
b6884a17 219 }
54d75eba
OD		 220};
221
222static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 223 .internal = 60000,
224 .sampling = 30000,
225 .pll_prediv = 1,
226 .pll_ratio = 8,
227 .pll_range = 3,
228 .pll_reset = 1,
229 .pll_bypass = 0,
230 .enable_refdiv = 0,
231 .bypclk_div = 0,
232 .IO_CLK_en_core = 1,
233 .ADClkSrc = 1,
234 .modulo = 2,
235 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
236 .ifreq = 0,
237 .timf = 20452225,
54d75eba
OD		 238};
239
240static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
241 { .output_mpeg2_in_188_bytes = 1,
242 .hostbus_diversity = 1,
243 .tuner_is_baseband = 1,
244
b6884a17
PB		 245 .agc_config_count = 2,
246 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 247 .bw = &stk7700d_mt2266_pll_config,
248
b6884a17
PB		 249 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
250 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
251 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 252 },
253 { .output_mpeg2_in_188_bytes = 1,
254 .hostbus_diversity = 1,
255 .tuner_is_baseband = 1,
256
b6884a17
PB		 257 .agc_config_count = 2,
258 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 259 .bw = &stk7700d_mt2266_pll_config,
260
b6884a17
PB		 261 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
262 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
263 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 264 }
265};
266
267static struct mt2266_config stk7700d_mt2266_config[2] = {
268 { .i2c_address = 0x60
269 },
270 { .i2c_address = 0x60
271 }
272};
273
132c3188
DG		 274static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
275{
8abe4a0a
MCC		 276 struct dib0700_adapter_state *state = adap->priv;
277
278 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
279 return -ENODEV;
280
132c3188
DG		 281 if (adap->id == 0) {
282 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
283 msleep(10);
284 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
285 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
286 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
287 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
288 msleep(10);
289 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
290 msleep(10);
8abe4a0a 291 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 292 stk7700d_dib7000p_mt2266_config)
293 != 0) {
8abe4a0a
MCC		 294 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
295 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 296 return -ENODEV;
297 }
132c3188
DG		 298 }
299
8abe4a0a 300 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 301 0x80 + (adap->id << 1),
302 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 303
77eed219 304 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 305}
306
54d75eba
OD		 307static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
308{
8abe4a0a
MCC		 309 struct dib0700_adapter_state *state = adap->priv;
310
311 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
312 return -ENODEV;
313
54d75eba
OD		 314 if (adap->id == 0) {
315 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
316 msleep(10);
317 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
318 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
319 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
320 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
321 msleep(10);
322 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
323 msleep(10);
324 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 325 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 326 stk7700d_dib7000p_mt2266_config)
327 != 0) {
8abe4a0a
MCC		 328 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
329 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 330 return -ENODEV;
331 }
54d75eba
OD		 332 }
333
8abe4a0a 334 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 335 0x80 + (adap->id << 1),
336 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 337
77eed219 338 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 339}
340
341static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
342{
343 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 344 struct dib0700_adapter_state *state = adap->priv;
345
346 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
347 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 348 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 349 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 350}
351
6ca8f0b9 352/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 353static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 354 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 355 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
356 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
357 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 358 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
359 .inv_gain = 712,
360 .time_stabiliz = 21,
361 .alpha_level = 0,
362 .thlock = 118,
363 .wbd_inv = 0,
364 .wbd_ref = 2867,
365 .wbd_sel = 0,
366 .wbd_alpha = 2,
367 .agc1_max = 0,
368 .agc1_min = 0,
369 .agc2_max = 39718,
370 .agc2_min = 9930,
371 .agc1_pt1 = 0,
372 .agc1_pt2 = 0,
373 .agc1_pt3 = 0,
374 .agc1_slope1 = 0,
375 .agc1_slope2 = 0,
376 .agc2_pt1 = 0,
377 .agc2_pt2 = 128,
378 .agc2_slope1 = 29,
379 .agc2_slope2 = 29,
380 .alpha_mant = 17,
381 .alpha_exp = 27,
382 .beta_mant = 23,
383 .beta_exp = 51,
384 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 385};
386
387/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 388static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 389 .internal = 60000,
390 .sampling = 30000,
391 .pll_prediv = 1,
392 .pll_ratio = 8,
393 .pll_range = 3,
394 .pll_reset = 1,
395 .pll_bypass = 0,
396 .enable_refdiv = 0,
397 .bypclk_div = 0,
398 .IO_CLK_en_core = 1,
399 .ADClkSrc = 1,
400 .modulo = 0,
401 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
402 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
403 .timf = 20452225,
404 .xtal_hz = 30000000,
6ca8f0b9
AC		 405};
406
407static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
408 .output_mpeg2_in_188_bytes = 1,
409 .tuner_is_baseband = 1,
410
411 .agc_config_count = 1,
412 .agc = &xc3028_agc_config,
413 .bw = &xc3028_bw_config,
414
415 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
416 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
417 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
418};
419
d7cba043
MK		 420static int stk7700ph_xc3028_callback(void *ptr, int component,
421 int command, int arg)
6ca8f0b9
AC		 422{
423 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 424 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 425
426 switch (command) {
427 case XC2028_TUNER_RESET:
428 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 429 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
430 msleep(10);
431 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 432 break;
433 case XC2028_RESET_CLK:
434 break;
435 default:
436 err("%s: unknown command %d, arg %d\n", __func__,
437 command, arg);
438 return -EINVAL;
439 }
440 return 0;
441}
442
443static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
444 .fname = XC2028_DEFAULT_FIRMWARE,
445 .max_len = 64,
446 .demod = XC3028_FE_DIBCOM52,
447};
448
449static struct xc2028_config stk7700ph_xc3028_config = {
450 .i2c_addr = 0x61,
6ca8f0b9
AC		 451 .ctrl = &stk7700ph_xc3028_ctrl,
452};
453
454static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
455{
456 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 457 struct dib0700_adapter_state *state = adap->priv;
458
459 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
460 return -ENODEV;
6ca8f0b9 461
da5ee486
AV		 462 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
463 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 464 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 465 else
8abe4a0a 466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 467 msleep(20);
468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
472 msleep(10);
473 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
474 msleep(20);
475 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
476 msleep(10);
477
8abe4a0a 478 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 479 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 480 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 481 __func__);
8abe4a0a 482 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 483 return -ENODEV;
484 }
6ca8f0b9 485
8abe4a0a 486 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 487 &stk7700ph_dib7700_xc3028_config);
488
77eed219 489 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 490}
491
492static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
493{
494 struct i2c_adapter *tun_i2c;
8abe4a0a 495 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 496
8abe4a0a 497 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 498 DIBX000_I2C_INTERFACE_TUNER, 1);
499
500 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 501
502 /* FIXME: generalize & move to common area */
77eed219 503 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 504
77eed219 505 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 506 == NULL ? -ENODEV : 0;
507}
508
4b330bee 509#define DEFAULT_RC_INTERVAL 50
54d75eba
OD		 510
511static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
512
72b39310
MCC		 513/*
514 * This function is used only when firmware is < 1.20 version. Newer
515 * firmwares use bulk mode, with functions implemented at dib0700_core,
516 * at dib0700_rc_urb_completion()
517 */
518static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba
OD		 519{
520 u8 key[4];
120703f9
DH		 521 enum rc_type protocol;
522 u32 scancode;
72b39310 523 u8 toggle;
54d75eba 524 int i;
54d75eba 525 struct dib0700_state *st = d->priv;
6a207100 526
6a207100
DH		 527 if (st->fw_version >= 0x10200) {
528 /* For 1.20 firmware , We need to keep the RC polling
529 callback so we can reuse the input device setup in
530 dvb-usb-remote.c. However, the actual work is being done
531 in the bulk URB completion handler. */
532 return 0;
533 }
534
72b39310
MCC		 535 i = dib0700_ctrl_rd(d, rc_request, 2, key, 4);
536 if (i <= 0) {
034d65ed 537 err("RC Query Failed");
89f4267d 538 return -1;
54d75eba 539 }
58e6f95e
PB		 540
541 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
72b39310
MCC		 542 if (key[0] == 0 && key[1] == 0 && key[2] == 0 && key[3] == 0)
543 return 0;
58e6f95e
PB		 544
545 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */
546
c4018fa2 547 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 548
0ffd1ab3 549 switch (d->props.rc.core.protocol) {
c003ab1b 550 case RC_BIT_NEC:
58e6f95e
PB		 551 /* NEC protocol sends repeat code as 0 0 0 FF */
552 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) &&
120703f9
DH		 553 (key[3] == 0xff)) {
554 rc_repeat(d->rc_dev);
555 return 0;
58e6f95e 556 }
72b39310 557
120703f9
DH		 558 protocol = RC_TYPE_NEC;
559 scancode = RC_SCANCODE_NEC(key[3-2], key[3-3]);
560 toggle = 0;
58e6f95e 561 break;
120703f9 562
72b39310 563 default:
58e6f95e 564 /* RC-5 protocol changes toggle bit on new keypress */
120703f9
DH		 565 protocol = RC_TYPE_RC5;
566 scancode = RC_SCANCODE_RC5(key[3-2], key[3-3]);
72b39310 567 toggle = key[3-1];
58e6f95e
PB		 568 break;
569 }
120703f9
DH		 570
571 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 572 return 0;
573}
574
b7f54910 575/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 576static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 577 BAND_UHF | BAND_VHF,
69ea31e7
PB		 578
579 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
580 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 581 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
582 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
583
584 712,
585 41,
586
587 0,
588 118,
589
590 0,
591 4095,
592 0,
593 0,
594
595 42598,
596 17694,
597 45875,
598 2621,
599 0,
600 76,
601 139,
602 52,
603 59,
604 107,
605 172,
606 57,
607 70,
608
609 21,
610 25,
611 28,
612 48,
613
614 1,
615 { 0,
616 107,
617 51800,
618 24700
69ea31e7
PB		 619 },
620};
621
a75763ff 622static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 623 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 624 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
625 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 626 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
627 .inv_gain = 712,
628 .time_stabiliz = 41,
629 .alpha_level = 0,
630 .thlock = 118,
631 .wbd_inv = 0,
632 .wbd_ref = 4095,
633 .wbd_sel = 0,
634 .wbd_alpha = 0,
635 .agc1_max = 42598,
636 .agc1_min = 16384,
637 .agc2_max = 42598,
638 .agc2_min = 0,
639 .agc1_pt1 = 0,
640 .agc1_pt2 = 137,
641 .agc1_pt3 = 255,
642 .agc1_slope1 = 0,
643 .agc1_slope2 = 255,
644 .agc2_pt1 = 0,
645 .agc2_pt2 = 0,
646 .agc2_slope1 = 0,
647 .agc2_slope2 = 41,
648 .alpha_mant = 15,
649 .alpha_exp = 25,
650 .beta_mant = 28,
651 .beta_exp = 48,
652 .perform_agc_softsplit = 0,
a75763ff
PB		 653};
654
655static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 656 .internal = 60000,
657 .sampling = 30000,
658 .pll_prediv = 1,
659 .pll_ratio = 8,
660 .pll_range = 3,
661 .pll_reset = 1,
662 .pll_bypass = 0,
663 .enable_refdiv = 0,
664 .bypclk_div = 0,
665 .IO_CLK_en_core = 1,
666 .ADClkSrc = 1,
667 .modulo = 0,
668 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
669 .ifreq = 60258167,
670 .timf = 20452225,
671 .xtal_hz = 30000000,
69ea31e7
PB		 672};
673
674static struct dib7000m_config stk7700p_dib7000m_config = {
675 .dvbt_mode = 1,
676 .output_mpeg2_in_188_bytes = 1,
677 .quartz_direct = 1,
678
679 .agc_config_count = 1,
a75763ff
PB		 680 .agc = &stk7700p_7000m_mt2060_agc_config,
681 .bw = &stk7700p_pll_config,
682
683 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
684 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
685 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
686};
687
688static struct dib7000p_config stk7700p_dib7000p_config = {
689 .output_mpeg2_in_188_bytes = 1,
690
b6884a17 691 .agc_config_count = 1,
a75763ff
PB		 692 .agc = &stk7700p_7000p_mt2060_agc_config,
693 .bw = &stk7700p_pll_config,
69ea31e7
PB		 694
695 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
696 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
697 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 698};
699
700static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
701{
69ea31e7 702 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 703 struct dib0700_adapter_state *state = adap->priv;
704
705 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
706 return -ENODEV;
707
b7f54910 708 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 709
710 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
711 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
712
69ea31e7 713 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 714 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
715
b7f54910 716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 717 dib0700_ctrl_clock(adap->dev, 72, 1);
718 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
719
720 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 721
69ea31e7 722 st->mt2060_if1[0] = 1220;
a75763ff 723
8abe4a0a
MCC		 724 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
725 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 726 st->is_dib7000pc = 1;
8abe4a0a 727 } else {
8abe4a0a 728 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 729 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 730 }
a75763ff 731
77eed219 732 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 733}
734
69ea31e7
PB		 735static struct mt2060_config stk7700p_mt2060_config = {
736 0x60
737};
738
b7f54910
PB		 739static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
740{
c52344fd 741 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 742 struct dib0700_state *st = adap->dev->priv;
a75763ff 743 struct i2c_adapter *tun_i2c;
8abe4a0a 744 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 745 s8 a;
746 int if1=1220;
8abe4a0a 747
da5ee486
AV		 748 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
749 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 750 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
751 }
a75763ff 752 if (st->is_dib7000pc)
8abe4a0a 753 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 754 else
77eed219 755 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 756
77eed219 757 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 758 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 759}
760
01373a5c
PB		 761/* DIB7070 generic */
762static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 763 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 764 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
765 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 766 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
767 .inv_gain = 600,
768 .time_stabiliz = 10,
769 .alpha_level = 0,
770 .thlock = 118,
771 .wbd_inv = 0,
772 .wbd_ref = 3530,
773 .wbd_sel = 1,
774 .wbd_alpha = 5,
775 .agc1_max = 65535,
776 .agc1_min = 0,
777 .agc2_max = 65535,
778 .agc2_min = 0,
779 .agc1_pt1 = 0,
780 .agc1_pt2 = 40,
781 .agc1_pt3 = 183,
782 .agc1_slope1 = 206,
783 .agc1_slope2 = 255,
784 .agc2_pt1 = 72,
785 .agc2_pt2 = 152,
786 .agc2_slope1 = 88,
787 .agc2_slope2 = 90,
788 .alpha_mant = 17,
789 .alpha_exp = 27,
790 .beta_mant = 23,
791 .beta_exp = 51,
792 .perform_agc_softsplit = 0,
01373a5c
PB		 793};
794
795static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
796{
8abe4a0a
MCC		 797 struct dvb_usb_adapter *adap = fe->dvb->priv;
798 struct dib0700_adapter_state *state = adap->priv;
799
7e5ce651 800 deb_info("reset: %d", onoff);
8abe4a0a 801 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 802}
803
804static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
805{
8abe4a0a
MCC		 806 struct dvb_usb_adapter *adap = fe->dvb->priv;
807 struct dib0700_adapter_state *state = adap->priv;
808
7e5ce651 809 deb_info("sleep: %d", onoff);
8abe4a0a 810 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 811}
812
813static struct dib0070_config dib7070p_dib0070_config[2] = {
814 {
815 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
816 .reset = dib7070_tuner_reset,
817 .sleep = dib7070_tuner_sleep,
818 .clock_khz = 12000,
7e5ce651
PB		 819 .clock_pad_drive = 4,
820 .charge_pump = 2,
01373a5c
PB		 821 }, {
822 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
823 .reset = dib7070_tuner_reset,
824 .sleep = dib7070_tuner_sleep,
825 .clock_khz = 12000,
7e5ce651 826 .charge_pump = 2,
01373a5c
PB		 827 }
828};
829
d300bd69
OG		 830static struct dib0070_config dib7770p_dib0070_config = {
831 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
832 .reset = dib7070_tuner_reset,
833 .sleep = dib7070_tuner_sleep,
834 .clock_khz = 12000,
835 .clock_pad_drive = 0,
836 .flip_chip = 1,
eac1fe10 837 .charge_pump = 2,
d300bd69
OG		 838};
839
14d24d14 840static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 841{
47b163af 842 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 843 struct dvb_usb_adapter *adap = fe->dvb->priv;
844 struct dib0700_adapter_state *state = adap->priv;
845
846 u16 offset;
47b163af 847 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 848 switch (band) {
849 case BAND_VHF: offset = 950; break;
850 case BAND_UHF:
851 default: offset = 550; break;
852 }
853 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 854 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 855 return state->set_param_save(fe);
01373a5c
PB		 856}
857
14d24d14 858static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 859{
47b163af
MCC		 860 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
861 struct dvb_usb_adapter *adap = fe->dvb->priv;
862 struct dib0700_adapter_state *state = adap->priv;
d300bd69 863
316c46b8
MCC		 864 u16 offset;
865 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
866 switch (band) {
867 case BAND_VHF:
868 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
869 offset = 850;
870 break;
871 case BAND_UHF:
872 default:
873 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
874 offset = 250;
875 break;
876 }
877 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
878 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
879 return state->set_param_save(fe);
d300bd69
OG		 880}
881
882static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
883{
8abe4a0a
MCC		 884 struct dib0700_adapter_state *st = adap->priv;
885 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 886 DIBX000_I2C_INTERFACE_TUNER, 1);
887
8abe4a0a
MCC		 888 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
889 &dib7770p_dib0070_config) == NULL)
890 return -ENODEV;
d300bd69 891
8abe4a0a
MCC		 892 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
893 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
894 return 0;
d300bd69
OG		 895}
896
01373a5c
PB		 897static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
898{
899 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 900 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 901
902 if (adap->id == 0) {
77eed219 903 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 904 return -ENODEV;
905 } else {
77eed219 906 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 907 return -ENODEV;
908 }
909
77eed219
MK		 910 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
911 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 912 return 0;
913}
914
e192a7cf
OG		 915static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
916 u16 pid, int onoff)
917{
8abe4a0a 918 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 919 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 920
e192a7cf 921 if (st->is_dib7000pc)
8abe4a0a 922 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 923 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 924}
925
926static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
927{
928 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 929 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 930 if (st->is_dib7000pc)
8abe4a0a 931 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 932 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 933}
934
f8731f4d
OG		 935static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
936{
8abe4a0a
MCC		 937 struct dib0700_adapter_state *state = adapter->priv;
938 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 939}
940
941static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
942{
8abe4a0a
MCC		 943 struct dib0700_adapter_state *state = adapter->priv;
944 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 945}
946
01373a5c 947static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 948 .internal = 60000,
949 .sampling = 15000,
950 .pll_prediv = 1,
951 .pll_ratio = 20,
952 .pll_range = 3,
953 .pll_reset = 1,
954 .pll_bypass = 0,
955 .enable_refdiv = 0,
956 .bypclk_div = 0,
957 .IO_CLK_en_core = 1,
958 .ADClkSrc = 1,
959 .modulo = 2,
960 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
961 .ifreq = (0 << 25) | 0,
962 .timf = 20452225,
963 .xtal_hz = 12000000,
01373a5c
PB		 964};
965
966static struct dib7000p_config dib7070p_dib7000p_config = {
967 .output_mpeg2_in_188_bytes = 1,
968
969 .agc_config_count = 1,
970 .agc = &dib7070_agc_config,
971 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 972 .tuner_is_baseband = 1,
973 .spur_protect = 1,
01373a5c
PB		 974
975 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
976 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
977 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
978
979 .hostbus_diversity = 1,
980};
981
982/* STK7070P */
983static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
984{
da5ee486 985 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 986 struct dib0700_adapter_state *state = adap->priv;
987
988 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
989 return -ENODEV;
990
da5ee486
AV		 991 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
992 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
993 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 994 else
da5ee486 995 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 996 msleep(10);
997 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
998 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1000 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1001
1002 dib0700_ctrl_clock(adap->dev, 72, 1);
1003
1004 msleep(10);
1005 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1006 msleep(10);
1007 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1008
8abe4a0a 1009 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1010 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1011 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1012 __func__);
8abe4a0a 1013 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 1014 return -ENODEV;
1015 }
01373a5c 1016
8abe4a0a 1017 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1018 &dib7070p_dib7000p_config);
77eed219 1019 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1020}
1021
90e12cec
OG		 1022/* STK7770P */
1023static struct dib7000p_config dib7770p_dib7000p_config = {
1024 .output_mpeg2_in_188_bytes = 1,
1025
1026 .agc_config_count = 1,
1027 .agc = &dib7070_agc_config,
1028 .bw = &dib7070_bw_config_12_mhz,
1029 .tuner_is_baseband = 1,
1030 .spur_protect = 1,
1031
1032 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1033 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1034 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1035
1036 .hostbus_diversity = 1,
1037 .enable_current_mirror = 1,
970d14c6 1038 .disable_sample_and_hold = 0,
90e12cec
OG		 1039};
1040
1041static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1042{
1043 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1044 struct dib0700_adapter_state *state = adap->priv;
1045
1046 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1047 return -ENODEV;
1048
90e12cec
OG		 1049 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1050 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1051 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1052 else
1053 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1054 msleep(10);
1055 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1056 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1059
1060 dib0700_ctrl_clock(adap->dev, 72, 1);
1061
1062 msleep(10);
1063 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1064 msleep(10);
1065 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1066
8abe4a0a 1067 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1068 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1069 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1070 __func__);
8abe4a0a 1071 dvb_detach(&state->dib7000p_ops);
90e12cec
OG		 1072 return -ENODEV;
1073 }
1074
8abe4a0a 1075 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1076 &dib7770p_dib7000p_config);
77eed219 1077 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1078}
1079
ba3fe3a9
PB		 1080/* DIB807x generic */
1081static struct dibx000_agc_config dib807x_agc_config[2] = {
1082 {
1083 BAND_VHF,
1084 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1085 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1086 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1087 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1088 * P_agc_write=0 */
1089 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1090 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1091 (0 << 0), /* setup*/
1092
1093 600, /* inv_gain*/
1094 10, /* time_stabiliz*/
1095
1096 0, /* alpha_level*/
1097 118, /* thlock*/
1098
1099 0, /* wbd_inv*/
1100 3530, /* wbd_ref*/
1101 1, /* wbd_sel*/
1102 5, /* wbd_alpha*/
1103
1104 65535, /* agc1_max*/
1105 0, /* agc1_min*/
1106
1107 65535, /* agc2_max*/
1108 0, /* agc2_min*/
1109
1110 0, /* agc1_pt1*/
1111 40, /* agc1_pt2*/
1112 183, /* agc1_pt3*/
1113 206, /* agc1_slope1*/
1114 255, /* agc1_slope2*/
1115 72, /* agc2_pt1*/
1116 152, /* agc2_pt2*/
1117 88, /* agc2_slope1*/
1118 90, /* agc2_slope2*/
1119
1120 17, /* alpha_mant*/
1121 27, /* alpha_exp*/
1122 23, /* beta_mant*/
1123 51, /* beta_exp*/
1124
1125 0, /* perform_agc_softsplit*/
1126 }, {
1127 BAND_UHF,
1128 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1129 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1130 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1131 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1132 * P_agc_write=0 */
1133 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1134 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1135 (0 << 0), /* setup */
1136
1137 600, /* inv_gain*/
1138 10, /* time_stabiliz*/
1139
1140 0, /* alpha_level*/
1141 118, /* thlock*/
1142
1143 0, /* wbd_inv*/
1144 3530, /* wbd_ref*/
1145 1, /* wbd_sel*/
1146 5, /* wbd_alpha*/
1147
1148 65535, /* agc1_max*/
1149 0, /* agc1_min*/
1150
1151 65535, /* agc2_max*/
1152 0, /* agc2_min*/
1153
1154 0, /* agc1_pt1*/
1155 40, /* agc1_pt2*/
1156 183, /* agc1_pt3*/
1157 206, /* agc1_slope1*/
1158 255, /* agc1_slope2*/
1159 72, /* agc2_pt1*/
1160 152, /* agc2_pt2*/
1161 88, /* agc2_slope1*/
1162 90, /* agc2_slope2*/
1163
1164 17, /* alpha_mant*/
1165 27, /* alpha_exp*/
1166 23, /* beta_mant*/
1167 51, /* beta_exp*/
1168
1169 0, /* perform_agc_softsplit*/
1170 }
1171};
1172
1173static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1174 .internal = 60000,
1175 .sampling = 15000,
1176 .pll_prediv = 1,
1177 .pll_ratio = 20,
1178 .pll_range = 3,
1179 .pll_reset = 1,
1180 .pll_bypass = 0,
1181 .enable_refdiv = 0,
1182 .bypclk_div = 0,
1183 .IO_CLK_en_core = 1,
1184 .ADClkSrc = 1,
1185 .modulo = 2,
1186 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1187 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1188 .timf = 18179755,
1189 .xtal_hz = 12000000,
ba3fe3a9
PB		 1190};
1191
1192static struct dib8000_config dib807x_dib8000_config[2] = {
1193 {
1194 .output_mpeg2_in_188_bytes = 1,
1195
1196 .agc_config_count = 2,
1197 .agc = dib807x_agc_config,
1198 .pll = &dib807x_bw_config_12_mhz,
1199 .tuner_is_baseband = 1,
1200
1201 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1202 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1203 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1204
1205 .hostbus_diversity = 1,
1206 .div_cfg = 1,
1207 .agc_control = &dib0070_ctrl_agc_filter,
1208 .output_mode = OUTMODE_MPEG2_FIFO,
1209 .drives = 0x2d98,
1210 }, {
1211 .output_mpeg2_in_188_bytes = 1,
1212
1213 .agc_config_count = 2,
1214 .agc = dib807x_agc_config,
1215 .pll = &dib807x_bw_config_12_mhz,
1216 .tuner_is_baseband = 1,
1217
1218 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1219 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1220 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1221
1222 .hostbus_diversity = 1,
1223 .agc_control = &dib0070_ctrl_agc_filter,
1224 .output_mode = OUTMODE_MPEG2_FIFO,
1225 .drives = 0x2d98,
1226 }
1227};
1228
03245a5e 1229static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1230{
d44913c1
MCC		 1231 struct dvb_usb_adapter *adap = fe->dvb->priv;
1232 struct dib0700_adapter_state *state = adap->priv;
1233
1234 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1235}
1236
03245a5e 1237static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1238{
d44913c1
MCC		 1239 struct dvb_usb_adapter *adap = fe->dvb->priv;
1240 struct dib0700_adapter_state *state = adap->priv;
1241
1242 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1243}
1244
1245static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1246 { 240, 7},
1247 { 0xffff, 6},
1248};
1249
1250static struct dib0070_config dib807x_dib0070_config[2] = {
1251 {
1252 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1253 .reset = dib80xx_tuner_reset,
1254 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1255 .clock_khz = 12000,
1256 .clock_pad_drive = 4,
1257 .vga_filter = 1,
1258 .force_crystal_mode = 1,
1259 .enable_third_order_filter = 1,
1260 .charge_pump = 0,
1261 .wbd_gain = dib8070_wbd_gain_cfg,
1262 .osc_buffer_state = 0,
1263 .freq_offset_khz_uhf = -100,
1264 .freq_offset_khz_vhf = -100,
1265 }, {
1266 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1267 .reset = dib80xx_tuner_reset,
1268 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1269 .clock_khz = 12000,
1270 .clock_pad_drive = 2,
1271 .vga_filter = 1,
1272 .force_crystal_mode = 1,
1273 .enable_third_order_filter = 1,
1274 .charge_pump = 0,
1275 .wbd_gain = dib8070_wbd_gain_cfg,
1276 .osc_buffer_state = 0,
1277 .freq_offset_khz_uhf = -25,
1278 .freq_offset_khz_vhf = -25,
1279 }
1280};
1281
14d24d14 1282static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1283{
47b163af 1284 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1285 struct dvb_usb_adapter *adap = fe->dvb->priv;
1286 struct dib0700_adapter_state *state = adap->priv;
1287
1288 u16 offset = dib0070_wbd_offset(fe);
47b163af 1289 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1290 switch (band) {
1291 case BAND_VHF:
1292 offset += 750;
1293 break;
1294 case BAND_UHF: /* fall-thru wanted */
1295 default:
1296 offset += 250; break;
1297 }
1298 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1299 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1300
14d24d14 1301 return state->set_param_save(fe);
ba3fe3a9
PB		 1302}
1303
1304static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1305{
1306 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1307 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1308 DIBX000_I2C_INTERFACE_TUNER, 1);
1309
1310 if (adap->id == 0) {
77eed219 1311 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1312 &dib807x_dib0070_config[0]) == NULL)
1313 return -ENODEV;
1314 } else {
77eed219 1315 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1316 &dib807x_dib0070_config[1]) == NULL)
1317 return -ENODEV;
1318 }
1319
77eed219
MK		 1320 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1321 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1322 return 0;
1323}
1324
9c783036
OG		 1325static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1326 u16 pid, int onoff)
f8731f4d 1327{
d44913c1
MCC		 1328 struct dib0700_adapter_state *state = adapter->priv;
1329
1330 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1331}
1332
9c783036 1333static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1334 int onoff)
f8731f4d 1335{
d44913c1
MCC		 1336 struct dib0700_adapter_state *state = adapter->priv;
1337
1338 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1339}
ba3fe3a9
PB		 1340
1341/* STK807x */
1342static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1343{
d44913c1
MCC		 1344 struct dib0700_adapter_state *state = adap->priv;
1345
1346 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1347 return -ENODEV;
1348
ba3fe3a9
PB		 1349 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1350 msleep(10);
1351 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1352 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1353 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1354
1355 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1356
1357 dib0700_ctrl_clock(adap->dev, 72, 1);
1358
1359 msleep(10);
1360 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1361 msleep(10);
1362 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1363
d44913c1 1364 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1365 0x80, 0);
ba3fe3a9 1366
d44913c1 1367 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1368 &dib807x_dib8000_config[0]);
1369
77eed219 1370 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1371}
1372
1373/* STK807xPVR */
1374static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1375{
d44913c1
MCC		 1376 struct dib0700_adapter_state *state = adap->priv;
1377
1378 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1379 return -ENODEV;
1380
ba3fe3a9
PB		 1381 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1382 msleep(30);
1383 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1384 msleep(500);
1385 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1386 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1387 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1388
1389 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1390
1391 dib0700_ctrl_clock(adap->dev, 72, 1);
1392
1393 msleep(10);
1394 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1395 msleep(10);
1396 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1397
1398 /* initialize IC 0 */
d44913c1 1399 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1400
d44913c1 1401 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1402 &dib807x_dib8000_config[0]);
1403
77eed219 1404 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1405}
1406
1407static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1408{
d44913c1
MCC		 1409 struct dib0700_adapter_state *state = adap->priv;
1410
1411 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1412 return -ENODEV;
1413
ba3fe3a9 1414 /* initialize IC 1 */
d44913c1 1415 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1416
d44913c1 1417 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1418 &dib807x_dib8000_config[1]);
1419
77eed219 1420 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1421}
1422
03245a5e 1423/* STK8096GP */
a685dbbc 1424static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1425 {
40d1a7c3 1426 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1427 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1428 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1429 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1430 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1431 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1432
40d1a7c3
MCC		 1433 .inv_gain = 787,
1434 .time_stabiliz = 10,
9c783036 1435
40d1a7c3
MCC		 1436 .alpha_level = 0,
1437 .thlock = 118,
9c783036 1438
40d1a7c3
MCC		 1439 .wbd_inv = 0,
1440 .wbd_ref = 3530,
1441 .wbd_sel = 1,
1442 .wbd_alpha = 5,
9c783036 1443
40d1a7c3
MCC		 1444 .agc1_max = 65535,
1445 .agc1_min = 0,
9c783036 1446
40d1a7c3
MCC		 1447 .agc2_max = 65535,
1448 .agc2_min = 0,
9c783036 1449
40d1a7c3
MCC		 1450 .agc1_pt1 = 0,
1451 .agc1_pt2 = 32,
1452 .agc1_pt3 = 114,
1453 .agc1_slope1 = 143,
1454 .agc1_slope2 = 144,
1455 .agc2_pt1 = 114,
1456 .agc2_pt2 = 227,
1457 .agc2_slope1 = 116,
1458 .agc2_slope2 = 117,
1459
1460 .alpha_mant = 28,
1461 .alpha_exp = 26,
1462 .beta_mant = 31,
1463 .beta_exp = 51,
1464
1465 .perform_agc_softsplit = 0,
be9bae10
OG		 1466 },
1467 {
40d1a7c3 1468 .band_caps = BAND_CBAND,
9c783036 1469 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1470 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1471 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1472 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1473 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1474
40d1a7c3
MCC		 1475 .inv_gain = 787,
1476 .time_stabiliz = 10,
9c783036 1477
40d1a7c3
MCC		 1478 .alpha_level = 0,
1479 .thlock = 118,
9c783036 1480
40d1a7c3
MCC		 1481 .wbd_inv = 0,
1482 .wbd_ref = 3530,
1483 .wbd_sel = 1,
1484 .wbd_alpha = 5,
9c783036 1485
40d1a7c3
MCC		 1486 .agc1_max = 0,
1487 .agc1_min = 0,
9c783036 1488
40d1a7c3
MCC		 1489 .agc2_max = 65535,
1490 .agc2_min = 0,
9c783036 1491
40d1a7c3
MCC		 1492 .agc1_pt1 = 0,
1493 .agc1_pt2 = 32,
1494 .agc1_pt3 = 114,
1495 .agc1_slope1 = 143,
1496 .agc1_slope2 = 144,
1497 .agc2_pt1 = 114,
1498 .agc2_pt2 = 227,
1499 .agc2_slope1 = 116,
1500 .agc2_slope2 = 117,
1501
1502 .alpha_mant = 28,
1503 .alpha_exp = 26,
1504 .beta_mant = 31,
1505 .beta_exp = 51,
1506
1507 .perform_agc_softsplit = 0,
be9bae10 1508 }
03245a5e
OG		 1509};
1510
1511static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1512 .internal = 54000,
1513 .sampling = 13500,
1514
1515 .pll_prediv = 1,
1516 .pll_ratio = 18,
1517 .pll_range = 3,
1518 .pll_reset = 1,
1519 .pll_bypass = 0,
1520
1521 .enable_refdiv = 0,
1522 .bypclk_div = 0,
1523 .IO_CLK_en_core = 1,
1524 .ADClkSrc = 1,
1525 .modulo = 2,
1526
1527 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1528
1529 .ifreq = (0 << 25) | 0,
1530 .timf = 20199727,
1531
1532 .xtal_hz = 12000000,
03245a5e
OG		 1533};
1534
1535static int dib8090_get_adc_power(struct dvb_frontend *fe)
1536{
d44913c1
MCC		 1537 struct dvb_usb_adapter *adap = fe->dvb->priv;
1538 struct dib0700_adapter_state *state = adap->priv;
1539
1540 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1541}
1542
5e9c85d9
OG		 1543static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1544{
1545 deb_info("AGC control callback: %i\n", restart);
1546 dib0090_dcc_freq(fe, restart);
1547
1548 if (restart == 0) /* before AGC startup */
1549 dib0090_set_dc_servo(fe, 1);
1550}
1551
be9bae10
OG		 1552static struct dib8000_config dib809x_dib8000_config[2] = {
1553 {
1554 .output_mpeg2_in_188_bytes = 1,
1555
1556 .agc_config_count = 2,
1557 .agc = dib8090_agc_config,
5e9c85d9 1558 .agc_control = dib8090_agc_control,
be9bae10
OG		 1559 .pll = &dib8090_pll_config_12mhz,
1560 .tuner_is_baseband = 1,
1561
1562 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1563 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1564 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1565
1566 .hostbus_diversity = 1,
1567 .div_cfg = 0x31,
1568 .output_mode = OUTMODE_MPEG2_FIFO,
1569 .drives = 0x2d98,
1570 .diversity_delay = 48,
1571 .refclksel = 3,
b4d6046e 1572 }, {
be9bae10
OG		 1573 .output_mpeg2_in_188_bytes = 1,
1574
1575 .agc_config_count = 2,
1576 .agc = dib8090_agc_config,
5e9c85d9 1577 .agc_control = dib8090_agc_control,
be9bae10
OG		 1578 .pll = &dib8090_pll_config_12mhz,
1579 .tuner_is_baseband = 1,
1580
1581 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1582 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1583 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1584
1585 .hostbus_diversity = 1,
1586 .div_cfg = 0x31,
1587 .output_mode = OUTMODE_DIVERSITY,
1588 .drives = 0x2d08,
1589 .diversity_delay = 1,
1590 .refclksel = 3,
1591 }
1592};
1593
1594static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1595 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1596 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1597 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1598 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1599 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1600 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1601};
1602
1603static struct dib0090_config dib809x_dib0090_config = {
1604 .io.pll_bypass = 1,
1605 .io.pll_range = 1,
1606 .io.pll_prediv = 1,
1607 .io.pll_loopdiv = 20,
1608 .io.adc_clock_ratio = 8,
1609 .io.pll_int_loop_filt = 0,
1610 .io.clock_khz = 12000,
1611 .reset = dib80xx_tuner_reset,
1612 .sleep = dib80xx_tuner_sleep,
1613 .clkouttobamse = 1,
1614 .analog_output = 1,
1615 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1616 .use_pwm_agc = 1,
1617 .clkoutdrive = 1,
1618 .get_adc_power = dib8090_get_adc_power,
1619 .freq_offset_khz_uhf = -63,
1620 .freq_offset_khz_vhf = -143,
1621 .wbd = dib8090_wbd_table,
1622 .fref_clock_ratio = 6,
1623};
1624
5e9c85d9
OG		 1625static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1626{
1627 u8 optimal_pll_ratio = 20;
1628 u32 freq_adc, ratio, rest, max = 0;
1629 u8 pll_ratio;
1630
1631 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1632 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1633 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1634 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1635
1636 if (rest > freq_adc / 2)
1637 rest = freq_adc - rest;
1638 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1639 if ((rest > max) && (rest > 717)) {
1640 optimal_pll_ratio = pll_ratio;
1641 max = rest;
1642 }
1643 }
1644 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1645
1646 return optimal_pll_ratio;
1647}
1648
14d24d14 1649static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1650{
1651 struct dvb_usb_adapter *adap = fe->dvb->priv;
1652 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1653 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1654 u16 target, ltgain, rf_gain_limit;
1655 u32 timf;
be9bae10
OG		 1656 int ret = 0;
1657 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1658
1659 switch (band) {
1660 default:
1661 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
1662 case BAND_VHF:
d44913c1 1663 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
5e9c85d9
OG		 1664 break;
1665 case BAND_UHF:
d44913c1 1666 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
5e9c85d9
OG		 1667 break;
1668 }
be9bae10 1669
14d24d14 1670 ret = state->set_param_save(fe);
be9bae10
OG		 1671 if (ret < 0)
1672 return ret;
1673
5e9c85d9
OG		 1674 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1675 deb_info("only 6MHz bandwidth is supported\n");
1676 return -EINVAL;
1677 }
1678
1679 /** Update PLL if needed ratio **/
d44913c1 1680 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9
OG		 1681
1682 /** Get optimize PLL ratio to remove spurious **/
1683 pll_ratio = dib8090_compute_pll_parameters(fe);
1684 if (pll_ratio == 17)
1685 timf = 21387946;
1686 else if (pll_ratio == 18)
1687 timf = 20199727;
1688 else if (pll_ratio == 19)
1689 timf = 19136583;
1690 else
1691 timf = 18179756;
be9bae10 1692
5e9c85d9 1693 /** Update ratio **/
d44913c1 1694 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1695
d44913c1 1696 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1697
1698 if (band != BAND_CBAND) {
1699 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1700 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1701 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1702 }
be9bae10
OG		 1703
1704 if (band == BAND_CBAND) {
b4d6046e
OG		 1705 deb_info("tuning in CBAND - soft-AGC startup\n");
1706 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1707
b4d6046e
OG		 1708 do {
1709 ret = dib0090_gain_control(fe);
1710 msleep(ret);
1711 tune_state = dib0090_get_tune_state(fe);
1712 if (tune_state == CT_AGC_STEP_0)
d44913c1 1713 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1714 else if (tune_state == CT_AGC_STEP_1) {
1715 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1716 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1717 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1718 }
1719 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1720
1721 deb_info("switching to PWM AGC\n");
b4d6046e 1722 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1723 state->dib8000_ops.pwm_agc_reset(fe);
1724 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1725 } else {
5e9c85d9 1726 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1727 deb_info("not tuning in CBAND - standard AGC startup\n");
1728 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1729 }
1730
1731 return 0;
1732}
1733
1734static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1735{
1736 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1737 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1738
91be260f
NS		 1739 if (adap->id == 0) {
1740 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1741 return -ENODEV;
1742 } else {
1743 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1744 return -ENODEV;
1745 }
be9bae10 1746
77eed219
MK		 1747 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1748 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1749 return 0;
1750}
1751
1752static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1753{
d44913c1
MCC		 1754 struct dib0700_adapter_state *state = adap->priv;
1755
1756 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1757 return -ENODEV;
1758
be9bae10
OG		 1759 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1760 msleep(10);
1761 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1762 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1763 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1764
1765 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1766
1767 dib0700_ctrl_clock(adap->dev, 72, 1);
1768
1769 msleep(10);
1770 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1771 msleep(10);
1772 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1773
d44913c1 1774 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1775
d44913c1 1776 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1777
77eed219 1778 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1779}
1780
91be260f
NS		 1781static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1782{
1783 struct dib0700_adapter_state *state = adap->priv;
1784
1785 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1786 return -ENODEV;
1787
1788 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1789
1790 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1791
1792 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1793}
1794
be9bae10
OG		 1795static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1796{
1797 struct dib0700_adapter_state *st = adap->priv;
1798 struct i2c_adapter *tun_i2c;
d44913c1 1799 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1800
1801 if (fe_slave) {
d44913c1 1802 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1803 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1804 return -ENODEV;
77eed219 1805 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1806 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1807 }
d44913c1 1808 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1809 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1810 return -ENODEV;
1811
77eed219
MK		 1812 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1813 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1814
1815 return 0;
1816}
1817
1818static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1819{
1820 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1821 struct dib0700_adapter_state *state = adap->priv;
1822
1823 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1824 return -ENODEV;
be9bae10
OG		 1825
1826 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1827 msleep(20);
be9bae10
OG		 1828 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1829 msleep(1000);
1830 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1831 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1832 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1833
1834 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1835
1836 dib0700_ctrl_clock(adap->dev, 72, 1);
1837
b4d6046e 1838 msleep(20);
be9bae10 1839 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1840 msleep(20);
be9bae10
OG		 1841 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1842
d44913c1 1843 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1844
d44913c1 1845 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1846 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1847 return -ENODEV;
1848
d44913c1
MCC		 1849 /* Needed to increment refcount */
1850 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1851 return -ENODEV;
1852
1853 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1854 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1855
1856 return fe_slave == NULL ? -ENODEV : 0;
1857}
1858
88f3a358
OG		 1859/* TFE8096P */
1860static struct dibx000_agc_config dib8096p_agc_config[2] = {
1861 {
1862 .band_caps = BAND_UHF,
1863 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1864 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1865 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1866 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1867 P_agc_write=0 */
1868 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1869 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1870 | (0 << 4) | (5 << 1) | (0 << 0),
1871
1872 .inv_gain = 684,
1873 .time_stabiliz = 10,
1874
1875 .alpha_level = 0,
1876 .thlock = 118,
1877
1878 .wbd_inv = 0,
1879 .wbd_ref = 1200,
1880 .wbd_sel = 3,
1881 .wbd_alpha = 5,
1882
1883 .agc1_max = 65535,
1884 .agc1_min = 0,
1885
1886 .agc2_max = 32767,
1887 .agc2_min = 0,
1888
1889 .agc1_pt1 = 0,
1890 .agc1_pt2 = 0,
1891 .agc1_pt3 = 105,
1892 .agc1_slope1 = 0,
1893 .agc1_slope2 = 156,
1894 .agc2_pt1 = 105,
1895 .agc2_pt2 = 255,
1896 .agc2_slope1 = 54,
1897 .agc2_slope2 = 0,
1898
1899 .alpha_mant = 28,
1900 .alpha_exp = 26,
1901 .beta_mant = 31,
1902 .beta_exp = 51,
1903
1904 .perform_agc_softsplit = 0,
1905 } , {
1906 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1907 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1908 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1909 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1910 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1911 P_agc_write=0 */
1912 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1913 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1914 | (0 << 4) | (5 << 1) | (0 << 0),
1915
1916 .inv_gain = 732,
1917 .time_stabiliz = 10,
1918
1919 .alpha_level = 0,
1920 .thlock = 118,
1921
1922 .wbd_inv = 0,
1923 .wbd_ref = 1200,
1924 .wbd_sel = 3,
1925 .wbd_alpha = 5,
1926
1927 .agc1_max = 65535,
1928 .agc1_min = 0,
1929
1930 .agc2_max = 32767,
1931 .agc2_min = 0,
1932
1933 .agc1_pt1 = 0,
1934 .agc1_pt2 = 0,
1935 .agc1_pt3 = 98,
1936 .agc1_slope1 = 0,
1937 .agc1_slope2 = 167,
1938 .agc2_pt1 = 98,
1939 .agc2_pt2 = 255,
1940 .agc2_slope1 = 52,
1941 .agc2_slope2 = 0,
1942
1943 .alpha_mant = 28,
1944 .alpha_exp = 26,
1945 .beta_mant = 31,
1946 .beta_exp = 51,
1947
1948 .perform_agc_softsplit = 0,
1949 }
1950};
1951
1952static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1953 .internal = 108000,
1954 .sampling = 13500,
1955 .pll_prediv = 1,
1956 .pll_ratio = 9,
1957 .pll_range = 1,
1958 .pll_reset = 0,
1959 .pll_bypass = 0,
1960 .enable_refdiv = 0,
1961 .bypclk_div = 0,
1962 .IO_CLK_en_core = 0,
1963 .ADClkSrc = 0,
1964 .modulo = 2,
1965 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1966 .ifreq = (0 << 25) | 0,
1967 .timf = 20199729,
1968 .xtal_hz = 12000000,
88f3a358
OG		 1969};
1970
1971static struct dib8000_config tfe8096p_dib8000_config = {
1972 .output_mpeg2_in_188_bytes = 1,
1973 .hostbus_diversity = 1,
1974 .update_lna = NULL,
1975
1976 .agc_config_count = 2,
1977 .agc = dib8096p_agc_config,
1978 .pll = &dib8096p_clock_config_12_mhz,
1979
1980 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1981 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1982 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1983
1984 .agc_control = NULL,
1985 .diversity_delay = 48,
1986 .output_mode = OUTMODE_MPEG2_FIFO,
1987 .enMpegOutput = 1,
1988};
1989
1990static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1991 { 380, 81, 850, 64, 540, 4},
1992 { 860, 51, 866, 21, 375, 4},
1993 {1700, 0, 250, 0, 100, 6},
1994 {2600, 0, 250, 0, 100, 6},
1995 { 0xFFFF, 0, 0, 0, 0, 0},
1996};
1997
d44913c1 1998static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 1999 .io.clock_khz = 12000,
2000 .io.pll_bypass = 0,
2001 .io.pll_range = 0,
2002 .io.pll_prediv = 3,
2003 .io.pll_loopdiv = 6,
2004 .io.adc_clock_ratio = 0,
2005 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2006
2007 .freq_offset_khz_uhf = -143,
2008 .freq_offset_khz_vhf = -143,
2009
2010 .get_adc_power = dib8090_get_adc_power,
2011
2012 .clkouttobamse = 1,
2013 .analog_output = 0,
2014
2015 .wbd_vhf_offset = 0,
2016 .wbd_cband_offset = 0,
2017 .use_pwm_agc = 1,
2018 .clkoutdrive = 0,
2019
2020 .fref_clock_ratio = 1,
2021
88f3a358
OG		 2022 .ls_cfg_pad_drv = 0,
2023 .data_tx_drv = 0,
2024 .low_if = NULL,
2025 .in_soc = 1,
2026 .force_cband_input = 0,
2027};
2028
2029struct dibx090p_adc {
2030 u32 freq; /* RF freq MHz */
2031 u32 timf; /* New Timf */
2032 u32 pll_loopdiv; /* New prediv */
2033 u32 pll_prediv; /* New loopdiv */
2034};
2035
5e9c85d9
OG		 2036struct dibx090p_best_adc {
2037 u32 timf;
2038 u32 pll_loopdiv;
2039 u32 pll_prediv;
88f3a358
OG		 2040};
2041
5e9c85d9
OG		 2042static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2043{
2044 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2045 u16 xtal = 12000;
2046 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2047 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2048 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2049 u32 fdem_min = 66000;
2050 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2051 u32 harmonic_id = 0;
2052
2053 adc->timf = 0;
2054 adc->pll_loopdiv = loopdiv;
2055 adc->pll_prediv = prediv;
2056
2057 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2058
2059 /* Find Min and Max prediv */
2060 while ((xtal / max_prediv) >= fcp_min)
2061 max_prediv++;
2062
2063 max_prediv--;
2064 min_prediv = max_prediv;
2065 while ((xtal / min_prediv) <= fcp_max) {
2066 min_prediv--;
2067 if (min_prediv == 1)
2068 break;
2069 }
2070 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2071
2072 min_prediv = 1;
2073
2074 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2075 fcp = xtal / prediv;
2076 if (fcp > fcp_min && fcp < fcp_max) {
2077 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2078 fmem = ((xtal/prediv) * loopdiv);
2079 fdem = fmem / 2;
2080 fs = fdem / 4;
2081
2082 /* test min/max system restrictions */
2083 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2084 spur = 0;
2085 /* test fs harmonics positions */
2086 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2087 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2088 spur = 1;
2089 break;
2090 }
2091 }
2092
2093 if (!spur) {
2094 adc->pll_loopdiv = loopdiv;
2095 adc->pll_prediv = prediv;
2096 adc->timf = (4260880253U / fdem) * (1 << 8);
2097 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2098
2099 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2100 break;
2101 }
2102 }
2103 }
2104 }
2105 if (!spur)
2106 break;
2107 }
2108
2109 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2110 return -EINVAL;
2111 return 0;
2112}
2113
14d24d14 2114static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2115{
2116 struct dvb_usb_adapter *adap = fe->dvb->priv;
2117 struct dib0700_adapter_state *state = adap->priv;
2118 struct dibx000_bandwidth_config pll;
5e9c85d9 2119 struct dibx090p_best_adc adc;
88f3a358 2120 u16 target;
5e9c85d9 2121 int ret;
88f3a358 2122
14d24d14 2123 ret = state->set_param_save(fe);
88f3a358
OG		 2124 if (ret < 0)
2125 return ret;
2126 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2127
2128 dib0090_pwm_gain_reset(fe);
2129 /* dib0090_get_wbd_target is returning any possible
2130 temperature compensated wbd-target */
2131 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2132 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2133
5e9c85d9
OG		 2134 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2135 pll.pll_ratio = adc.pll_loopdiv;
2136 pll.pll_prediv = adc.pll_prediv;
88f3a358 2137
5e9c85d9 2138 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2139 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2140 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2141 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2142 }
2143 return 0;
2144}
2145
2146static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2147{
5e9c85d9
OG		 2148 struct dib0700_state *st = adap->dev->priv;
2149 u32 fw_version;
d44913c1
MCC		 2150 struct dib0700_adapter_state *state = adap->priv;
2151
2152 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2153 return -ENODEV;
5e9c85d9
OG		 2154
2155 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2156 if (fw_version >= 0x10200)
2157 st->fw_use_new_i2c_api = 1;
2158
88f3a358
OG		 2159 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2160 msleep(20);
2161 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2162 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2163 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2164
2165 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2166
2167 dib0700_ctrl_clock(adap->dev, 72, 1);
2168
2169 msleep(20);
2170 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2171 msleep(20);
2172 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2173
d44913c1 2174 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2175
d44913c1
MCC		 2176 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2177 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2178
2179 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2180}
2181
2182static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2183{
2184 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2185 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2186
2187 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2188 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2189 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2190
2191 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2192 &tfe8096p_dib0090_config) == NULL)
2193 return -ENODEV;
2194
d44913c1 2195 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2196
2197 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2198 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2199 return 0;
2200}
2201
be9bae10
OG		 2202/* STK9090M */
2203static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2204{
77eed219 2205 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2206}
2207
2208static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2209{
77eed219 2210 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2211}
2212
2213static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2214{
2215 return dib9000_set_gpio(fe, 5, 0, !onoff);
2216}
2217
2218static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2219{
2220 return dib9000_set_gpio(fe, 0, 0, onoff);
2221}
2222
2223static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2224{
2225 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2226 u8 rb[2];
2227 struct i2c_msg msg[2] = {
b4d6046e
OG		 2228 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2229 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2230 };
2231 u8 index_data;
2232
2233 dibx000_i2c_set_speed(i2c, 250);
2234
2235 if (i2c_transfer(i2c, msg, 2) != 2)
2236 return -EIO;
2237
2238 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2239 case 0:
be9bae10
OG		 2240 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2241 return -EIO;
b4d6046e 2242 case 1:
be9bae10
OG		 2243 deb_info("Found DiB0170 rev2");
2244 break;
b4d6046e 2245 case 2:
be9bae10
OG		 2246 deb_info("Found DiB0190 rev2");
2247 break;
b4d6046e 2248 default:
be9bae10
OG		 2249 deb_info("DiB01x0 not found");
2250 return -EIO;
b4d6046e 2251 }
be9bae10
OG		 2252
2253 for (index_data = 0; index_data < len; index_data += 2) {
2254 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2255 wb[3] = (data[index_data + 1]) & 0xff;
2256
2257 if (data[index_data] == 0) {
2258 wb[0] = (data[index_data] >> 8) & 0xff;
2259 wb[1] = (data[index_data]) & 0xff;
2260 msg[0].len = 2;
2261 if (i2c_transfer(i2c, msg, 2) != 2)
2262 return -EIO;
2263 wb[2] |= rb[0];
2264 wb[3] |= rb[1] & ~(3 << 4);
2265 }
2266
b4d6046e
OG		 2267 wb[0] = (data[index_data] >> 8)&0xff;
2268 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2269 msg[0].len = 4;
2270 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2271 return -EIO;
2272 }
2273 return 0;
2274}
2275
2276static struct dib9000_config stk9090m_config = {
2277 .output_mpeg2_in_188_bytes = 1,
2278 .output_mode = OUTMODE_MPEG2_FIFO,
2279 .vcxo_timer = 279620,
2280 .timing_frequency = 20452225,
2281 .demod_clock_khz = 60000,
2282 .xtal_clock_khz = 30000,
2283 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2284 .subband = {
2285 2,
2286 {
2287 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2288 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2289 { 0 },
2290 },
2291 },
2292 .gpio_function = {
2293 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2294 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2295 },
2296};
2297
2298static struct dib9000_config nim9090md_config[2] = {
2299 {
2300 .output_mpeg2_in_188_bytes = 1,
2301 .output_mode = OUTMODE_MPEG2_FIFO,
2302 .vcxo_timer = 279620,
2303 .timing_frequency = 20452225,
2304 .demod_clock_khz = 60000,
2305 .xtal_clock_khz = 30000,
2306 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2307 }, {
2308 .output_mpeg2_in_188_bytes = 1,
2309 .output_mode = OUTMODE_DIVERSITY,
2310 .vcxo_timer = 279620,
2311 .timing_frequency = 20452225,
2312 .demod_clock_khz = 60000,
2313 .xtal_clock_khz = 30000,
2314 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2315 .subband = {
2316 2,
2317 {
2318 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2319 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2320 { 0 },
2321 },
2322 },
2323 .gpio_function = {
2324 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2325 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2326 },
2327 }
2328};
2329
2330static struct dib0090_config dib9090_dib0090_config = {
2331 .io.pll_bypass = 0,
2332 .io.pll_range = 1,
2333 .io.pll_prediv = 1,
2334 .io.pll_loopdiv = 8,
2335 .io.adc_clock_ratio = 8,
2336 .io.pll_int_loop_filt = 0,
2337 .io.clock_khz = 30000,
2338 .reset = dib90x0_tuner_reset,
2339 .sleep = dib90x0_tuner_sleep,
2340 .clkouttobamse = 0,
2341 .analog_output = 0,
2342 .use_pwm_agc = 0,
2343 .clkoutdrive = 0,
2344 .freq_offset_khz_uhf = 0,
2345 .freq_offset_khz_vhf = 0,
2346};
2347
2348static struct dib0090_config nim9090md_dib0090_config[2] = {
2349 {
2350 .io.pll_bypass = 0,
2351 .io.pll_range = 1,
2352 .io.pll_prediv = 1,
2353 .io.pll_loopdiv = 8,
2354 .io.adc_clock_ratio = 8,
2355 .io.pll_int_loop_filt = 0,
2356 .io.clock_khz = 30000,
2357 .reset = dib90x0_tuner_reset,
2358 .sleep = dib90x0_tuner_sleep,
2359 .clkouttobamse = 1,
2360 .analog_output = 0,
2361 .use_pwm_agc = 0,
2362 .clkoutdrive = 0,
2363 .freq_offset_khz_uhf = 0,
2364 .freq_offset_khz_vhf = 0,
b4d6046e 2365 }, {
be9bae10
OG		 2366 .io.pll_bypass = 0,
2367 .io.pll_range = 1,
2368 .io.pll_prediv = 1,
2369 .io.pll_loopdiv = 8,
2370 .io.adc_clock_ratio = 8,
2371 .io.pll_int_loop_filt = 0,
2372 .io.clock_khz = 30000,
2373 .reset = dib90x0_tuner_reset,
2374 .sleep = dib90x0_tuner_sleep,
2375 .clkouttobamse = 0,
2376 .analog_output = 0,
2377 .use_pwm_agc = 0,
2378 .clkoutdrive = 0,
2379 .freq_offset_khz_uhf = 0,
2380 .freq_offset_khz_vhf = 0,
2381 }
2382};
2383
2384
2385static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2386{
2387 struct dib0700_adapter_state *state = adap->priv;
2388 struct dib0700_state *st = adap->dev->priv;
2389 u32 fw_version;
2390
2391 /* Make use of the new i2c functions from FW 1.20 */
2392 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2393 if (fw_version >= 0x10200)
2394 st->fw_use_new_i2c_api = 1;
2395 dib0700_set_i2c_speed(adap->dev, 340);
2396
2397 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2398 msleep(20);
be9bae10
OG		 2399 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2400 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2401 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2402 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2403
2404 dib0700_ctrl_clock(adap->dev, 72, 1);
2405
b4d6046e 2406 msleep(20);
be9bae10 2407 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2408 msleep(20);
be9bae10
OG		 2409 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2410
2411 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2412
2413 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2414 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2415 return -ENODEV;
2416 } else {
2417 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
2418 }
2419 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2420 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2421
77eed219 2422 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2423
77eed219 2424 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2425}
2426
2427static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2428{
2429 struct dib0700_adapter_state *state = adap->priv;
77eed219 2430 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2431 u16 data_dib190[10] = {
2432 1, 0x1374,
2433 2, 0x01a2,
2434 7, 0x0020,
2435 0, 0x00ef,
2436 8, 0x0486,
2437 };
2438
77eed219 2439 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2440 return -ENODEV;
77eed219 2441 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2442 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2443 return -ENODEV;
d1190024 2444 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2445 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2446 return -ENODEV;
b4d6046e 2447 release_firmware(state->frontend_firmware);
be9bae10
OG		 2448 return 0;
2449}
2450
2451static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2452{
2453 struct dib0700_adapter_state *state = adap->priv;
2454 struct dib0700_state *st = adap->dev->priv;
2455 struct i2c_adapter *i2c;
2456 struct dvb_frontend *fe_slave;
2457 u32 fw_version;
2458
2459 /* Make use of the new i2c functions from FW 1.20 */
2460 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2461 if (fw_version >= 0x10200)
2462 st->fw_use_new_i2c_api = 1;
2463 dib0700_set_i2c_speed(adap->dev, 340);
2464
2465 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2466 msleep(20);
be9bae10
OG		 2467 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2468 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2469 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2471
2472 dib0700_ctrl_clock(adap->dev, 72, 1);
2473
b4d6046e 2474 msleep(20);
be9bae10 2475 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2476 msleep(20);
be9bae10
OG		 2477 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2478
2479 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2480 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2481 return -EIO;
2482 } else {
2483 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
2484 }
2485 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2486 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2487 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2488 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2489
2490 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2491 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2492
77eed219 2493 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2494 return -ENODEV;
2495
77eed219 2496 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2497 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2498
2499 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2500 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2501
2502 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2503}
2504
be9bae10
OG		 2505static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2506{
2507 struct dib0700_adapter_state *state = adap->priv;
2508 struct i2c_adapter *i2c;
2509 struct dvb_frontend *fe_slave;
2510 u16 data_dib190[10] = {
2511 1, 0x5374,
2512 2, 0x01ae,
2513 7, 0x0020,
2514 0, 0x00ef,
2515 8, 0x0406,
2516 };
77eed219
MK		 2517 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2518 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2519 return -ENODEV;
77eed219 2520 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2521 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2522 return -ENODEV;
d1190024
OG		 2523
2524 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2525 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2526 return -ENODEV;
2527
77eed219 2528 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2529 if (fe_slave != NULL) {
77eed219 2530 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2531 dib9000_set_i2c_adapter(fe_slave, i2c);
2532
2533 i2c = dib9000_get_tuner_interface(fe_slave);
2534 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2535 return -ENODEV;
77eed219 2536 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2537 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2538 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2539 return -ENODEV;
2540 }
b4d6046e 2541 release_firmware(state->frontend_firmware);
be9bae10
OG		 2542
2543 return 0;
2544}
2545
2546/* NIM7090 */
5e9c85d9 2547static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2548{
2549 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2550
2551 u16 xtal = 12000;
2552 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2553 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2554 u32 fdem_max = 76000;
2555 u32 fdem_min = 69500;
2556 u32 fcp = 0, fs = 0, fdem = 0;
2557 u32 harmonic_id = 0;
2558
2559 adc->pll_loopdiv = loopdiv;
2560 adc->pll_prediv = prediv;
2561 adc->timf = 0;
2562
2563 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2564
2565 /* Find Min and Max prediv */
b4d6046e 2566 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2567 max_prediv++;
2568
2569 max_prediv--;
2570 min_prediv = max_prediv;
b4d6046e 2571 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2572 min_prediv--;
b4d6046e 2573 if (min_prediv == 1)
be9bae10
OG		 2574 break;
2575 }
2576 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2577
2578 min_prediv = 2;
2579
b4d6046e 2580 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2581 fcp = xtal / prediv;
b4d6046e
OG		 2582 if (fcp > fcp_min && fcp < fcp_max) {
2583 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2584 fdem = ((xtal/prediv) * loopdiv);
2585 fs = fdem / 4;
2586 /* test min/max system restrictions */
2587
b4d6046e 2588 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2589 spur = 0;
2590 /* test fs harmonics positions */
b4d6046e
OG		 2591 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2592 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2593 spur = 1;
2594 break;
2595 }
2596 }
2597
b4d6046e 2598 if (!spur) {
be9bae10
OG		 2599 adc->pll_loopdiv = loopdiv;
2600 adc->pll_prediv = prediv;
b4d6046e
OG		 2601 adc->timf = 2396745143UL/fdem*(1 << 9);
2602 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2603 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2604 break;
2605 }
2606 }
2607 }
2608 }
2609 if (!spur)
2610 break;
2611 }
2612
2613
b4d6046e 2614 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2615 return -EINVAL;
b4d6046e 2616 else
be9bae10
OG		 2617 return 0;
2618}
2619
14d24d14 2620static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2621{
2622 struct dvb_usb_adapter *adap = fe->dvb->priv;
2623 struct dib0700_adapter_state *state = adap->priv;
2624 struct dibx000_bandwidth_config pll;
2625 u16 target;
5e9c85d9 2626 struct dibx090p_best_adc adc;
be9bae10
OG		 2627 int ret;
2628
14d24d14 2629 ret = state->set_param_save(fe);
be9bae10
OG		 2630 if (ret < 0)
2631 return ret;
2632
2633 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2634 dib0090_pwm_gain_reset(fe);
6724a2f4 2635 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2636 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2637
b4d6046e 2638 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2639 pll.pll_ratio = adc.pll_loopdiv;
2640 pll.pll_prediv = adc.pll_prediv;
2641
8abe4a0a
MCC		 2642 state->dib7000p_ops.update_pll(fe, &pll);
2643 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2644 }
2645 return 0;
2646}
2647
2e802861
OG		 2648static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2649{
2650 deb_info("AGC restart callback: %d", restart);
2651 if (restart == 0) /* before AGC startup */
2652 dib0090_set_dc_servo(fe, 1);
2653 return 0;
2654}
2655
f45f513a 2656static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2657{
8abe4a0a
MCC		 2658 struct dvb_usb_adapter *adap = fe->dvb->priv;
2659 struct dib0700_adapter_state *state = adap->priv;
2660
f45f513a 2661 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2662
f45f513a 2663 if (agc_global < 25000) {
8abe4a0a
MCC		 2664 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2665 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2666 } else {
8abe4a0a
MCC		 2667 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2668 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2669 }
2670
2671 return 0;
2672}
2673
be9bae10 2674static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2675 { 380, 81, 850, 64, 540, 4},
2676 { 860, 51, 866, 21, 375, 4},
2677 {1700, 0, 250, 0, 100, 6},
2678 {2600, 0, 250, 0, 100, 6},
2679 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2680};
2681
a685dbbc 2682static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2683 {
2684 .band_caps = BAND_UHF,
2685 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2686 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2687 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2688
b4d6046e
OG		 2689 .inv_gain = 687,
2690 .time_stabiliz = 10,
be9bae10 2691
b4d6046e
OG		 2692 .alpha_level = 0,
2693 .thlock = 118,
be9bae10 2694
b4d6046e
OG		 2695 .wbd_inv = 0,
2696 .wbd_ref = 1200,
2697 .wbd_sel = 3,
2698 .wbd_alpha = 5,
be9bae10 2699
b4d6046e 2700 .agc1_max = 65535,
59501bb7 2701 .agc1_min = 32768,
be9bae10 2702
b4d6046e
OG		 2703 .agc2_max = 65535,
2704 .agc2_min = 0,
be9bae10 2705
b4d6046e
OG		 2706 .agc1_pt1 = 0,
2707 .agc1_pt2 = 32,
2708 .agc1_pt3 = 114,
2709 .agc1_slope1 = 143,
2710 .agc1_slope2 = 144,
2711 .agc2_pt1 = 114,
2712 .agc2_pt2 = 227,
2713 .agc2_slope1 = 116,
2714 .agc2_slope2 = 117,
be9bae10 2715
b4d6046e
OG		 2716 .alpha_mant = 18,
2717 .alpha_exp = 0,
2718 .beta_mant = 20,
2719 .beta_exp = 59,
be9bae10 2720
b4d6046e 2721 .perform_agc_softsplit = 0,
be9bae10
OG		 2722 } , {
2723 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2724 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2725 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2726 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2727
b4d6046e
OG		 2728 .inv_gain = 732,
2729 .time_stabiliz = 10,
be9bae10 2730
b4d6046e
OG		 2731 .alpha_level = 0,
2732 .thlock = 118,
be9bae10 2733
b4d6046e
OG		 2734 .wbd_inv = 0,
2735 .wbd_ref = 1200,
2736 .wbd_sel = 3,
2737 .wbd_alpha = 5,
be9bae10 2738
b4d6046e
OG		 2739 .agc1_max = 65535,
2740 .agc1_min = 0,
be9bae10 2741
b4d6046e
OG		 2742 .agc2_max = 65535,
2743 .agc2_min = 0,
be9bae10 2744
b4d6046e
OG		 2745 .agc1_pt1 = 0,
2746 .agc1_pt2 = 0,
2747 .agc1_pt3 = 98,
2748 .agc1_slope1 = 0,
2749 .agc1_slope2 = 167,
7f4d527f 2750 .agc2_pt1 = 98,
b4d6046e
OG		 2751 .agc2_pt2 = 255,
2752 .agc2_slope1 = 104,
2753 .agc2_slope2 = 0,
be9bae10 2754
b4d6046e
OG		 2755 .alpha_mant = 18,
2756 .alpha_exp = 0,
2757 .beta_mant = 20,
2758 .beta_exp = 59,
be9bae10 2759
b4d6046e 2760 .perform_agc_softsplit = 0,
be9bae10
OG		 2761 }
2762};
2763
2764static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2765 .internal = 60000,
2766 .sampling = 15000,
2767 .pll_prediv = 1,
2768 .pll_ratio = 5,
2769 .pll_range = 0,
2770 .pll_reset = 0,
2771 .pll_bypass = 0,
2772 .enable_refdiv = 0,
2773 .bypclk_div = 0,
2774 .IO_CLK_en_core = 1,
2775 .ADClkSrc = 1,
2776 .modulo = 2,
2777 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2778 .ifreq = (0 << 25) | 0,
2779 .timf = 20452225,
2780 .xtal_hz = 15000000,
be9bae10
OG		 2781};
2782
2783static struct dib7000p_config nim7090_dib7000p_config = {
2784 .output_mpeg2_in_188_bytes = 1,
2785 .hostbus_diversity = 1,
2786 .tuner_is_baseband = 1,
59501bb7 2787 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2788
2789 .agc_config_count = 2,
2790 .agc = dib7090_agc_config,
2791
2792 .bw = &dib7090_clock_config_12_mhz,
2793
2794 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2795 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2796 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2797
2798 .pwm_freq_div = 0,
2799
2800 .agc_control = dib7090_agc_restart,
2801
2802 .spur_protect = 0,
2803 .disable_sample_and_hold = 0,
2804 .enable_current_mirror = 0,
2805 .diversity_delay = 0,
2806
2807 .output_mode = OUTMODE_MPEG2_FIFO,
2808 .enMpegOutput = 1,
2809};
2810
59501bb7
OG		 2811static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2812{
8abe4a0a
MCC		 2813 struct dvb_usb_adapter *adap = fe->dvb->priv;
2814 struct dib0700_adapter_state *state = adap->priv;
2815
59501bb7
OG		 2816 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2817 if (agc_global < 25000) {
8abe4a0a
MCC		 2818 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2819 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2820 } else {
8abe4a0a
MCC		 2821 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2822 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2823 }
2824
2825 return 0;
2826}
2827
be9bae10
OG		 2828static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2829 {
2830 .output_mpeg2_in_188_bytes = 1,
2831 .hostbus_diversity = 1,
2832 .tuner_is_baseband = 1,
59501bb7 2833 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2834
2835 .agc_config_count = 2,
2836 .agc = dib7090_agc_config,
2837
2838 .bw = &dib7090_clock_config_12_mhz,
2839
2840 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2841 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2842 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2843
2844 .pwm_freq_div = 0,
2845
2846 .agc_control = dib7090_agc_restart,
2847
2848 .spur_protect = 0,
2849 .disable_sample_and_hold = 0,
2850 .enable_current_mirror = 0,
2851 .diversity_delay = 0,
2852
2853 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2854 .default_i2c_addr = 0x90,
2855 .enMpegOutput = 1,
b4d6046e 2856 }, {
be9bae10
OG		 2857 .output_mpeg2_in_188_bytes = 1,
2858 .hostbus_diversity = 1,
2859 .tuner_is_baseband = 1,
59501bb7 2860 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2861
2862 .agc_config_count = 2,
2863 .agc = dib7090_agc_config,
2864
2865 .bw = &dib7090_clock_config_12_mhz,
2866
2867 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2868 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2869 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2870
2871 .pwm_freq_div = 0,
2872
2873 .agc_control = dib7090_agc_restart,
2874
2875 .spur_protect = 0,
2876 .disable_sample_and_hold = 0,
2877 .enable_current_mirror = 0,
2878 .diversity_delay = 0,
2879
2880 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2881 .default_i2c_addr = 0x92,
2882 .enMpegOutput = 0,
2883 }
2884};
2885
8abe4a0a 2886static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2887 .io.clock_khz = 12000,
2888 .io.pll_bypass = 0,
2889 .io.pll_range = 0,
2890 .io.pll_prediv = 3,
2891 .io.pll_loopdiv = 6,
2892 .io.adc_clock_ratio = 0,
2893 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2894
2895 .freq_offset_khz_uhf = 0,
2896 .freq_offset_khz_vhf = 0,
2897
be9bae10
OG		 2898 .clkouttobamse = 1,
2899 .analog_output = 0,
2900
2901 .wbd_vhf_offset = 0,
2902 .wbd_cband_offset = 0,
2903 .use_pwm_agc = 1,
2904 .clkoutdrive = 0,
2905
2906 .fref_clock_ratio = 0,
2907
2908 .wbd = dib7090_wbd_table,
2909
2910 .ls_cfg_pad_drv = 0,
2911 .data_tx_drv = 0,
2912 .low_if = NULL,
2913 .in_soc = 1,
2914};
2915
f45f513a 2916static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2917 .output_mpeg2_in_188_bytes = 1,
2918 .hostbus_diversity = 1,
2919 .tuner_is_baseband = 1,
f45f513a 2920 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2921
2922 .agc_config_count = 2,
2923 .agc = dib7090_agc_config,
2924
2925 .bw = &dib7090_clock_config_12_mhz,
2926
2927 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2928 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2929 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2930
2931 .pwm_freq_div = 0,
2932
2933 .agc_control = dib7090_agc_restart,
2934
2935 .spur_protect = 0,
2936 .disable_sample_and_hold = 0,
2937 .enable_current_mirror = 0,
2938 .diversity_delay = 0,
2939
2940 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2941 .enMpegOutput = 1,
2942};
2943
8abe4a0a 2944static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2945 .io.clock_khz = 12000,
2946 .io.pll_bypass = 0,
2947 .io.pll_range = 0,
2948 .io.pll_prediv = 3,
2949 .io.pll_loopdiv = 6,
2950 .io.adc_clock_ratio = 0,
2951 .io.pll_int_loop_filt = 0,
b293f304
OG		 2952
2953 .freq_offset_khz_uhf = 0,
2954 .freq_offset_khz_vhf = 0,
2955
b293f304
OG		 2956 .clkouttobamse = 1,
2957 .analog_output = 0,
2958
2959 .wbd_vhf_offset = 0,
2960 .wbd_cband_offset = 0,
2961 .use_pwm_agc = 1,
2962 .clkoutdrive = 0,
2963
2964 .fref_clock_ratio = 0,
2965
f45f513a 2966 .wbd = dib7090_wbd_table,
b293f304
OG		 2967
2968 .ls_cfg_pad_drv = 0,
2969 .data_tx_drv = 0,
2970 .low_if = NULL,
2971 .in_soc = 1,
f45f513a
OG		 2972 .force_cband_input = 0,
2973 .is_dib7090e = 0,
b293f304
OG		 2974 .force_crystal_mode = 1,
2975};
2976
8abe4a0a 2977static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2978 {
2979 .io.clock_khz = 12000,
2980 .io.pll_bypass = 0,
2981 .io.pll_range = 0,
2982 .io.pll_prediv = 3,
2983 .io.pll_loopdiv = 6,
2984 .io.adc_clock_ratio = 0,
2985 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2986
2987 .freq_offset_khz_uhf = 50,
2988 .freq_offset_khz_vhf = 70,
2989
be9bae10
OG		 2990 .clkouttobamse = 1,
2991 .analog_output = 0,
2992
2993 .wbd_vhf_offset = 0,
2994 .wbd_cband_offset = 0,
2995 .use_pwm_agc = 1,
2996 .clkoutdrive = 0,
2997
2998 .fref_clock_ratio = 0,
2999
3000 .wbd = dib7090_wbd_table,
3001
3002 .ls_cfg_pad_drv = 0,
3003 .data_tx_drv = 0,
3004 .low_if = NULL,
3005 .in_soc = 1,
b4d6046e 3006 }, {
be9bae10
OG		 3007 .io.clock_khz = 12000,
3008 .io.pll_bypass = 0,
3009 .io.pll_range = 0,
3010 .io.pll_prediv = 3,
3011 .io.pll_loopdiv = 6,
3012 .io.adc_clock_ratio = 0,
3013 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3014
3015 .freq_offset_khz_uhf = -50,
3016 .freq_offset_khz_vhf = -70,
3017
be9bae10
OG		 3018 .clkouttobamse = 1,
3019 .analog_output = 0,
3020
3021 .wbd_vhf_offset = 0,
3022 .wbd_cband_offset = 0,
3023 .use_pwm_agc = 1,
3024 .clkoutdrive = 0,
3025
3026 .fref_clock_ratio = 0,
3027
3028 .wbd = dib7090_wbd_table,
3029
3030 .ls_cfg_pad_drv = 0,
3031 .data_tx_drv = 0,
3032 .low_if = NULL,
3033 .in_soc = 1,
3034 }
3035};
3036
3037static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3038{
8abe4a0a
MCC		 3039 struct dib0700_adapter_state *state = adap->priv;
3040
3041 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3042 return -ENODEV;
3043
be9bae10 3044 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3045 msleep(20);
be9bae10
OG		 3046 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3047 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3048 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3049 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3050
b4d6046e 3051 msleep(20);
be9bae10 3052 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3053 msleep(20);
be9bae10 3054 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3055
8abe4a0a
MCC		 3056 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3057 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3058 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3059 return -ENODEV;
3060 }
8abe4a0a 3061 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3062
77eed219 3063 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3064}
3065
be9bae10 3066static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3067{
be9bae10 3068 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3069 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3070
3071 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
3072 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
3073 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3074
77eed219 3075 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3076 return -ENODEV;
03245a5e 3077
8abe4a0a 3078 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3079
77eed219
MK		 3080 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3081 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3082 return 0;
03245a5e
OG		 3083}
3084
be9bae10 3085static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3086{
be9bae10 3087 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3088 struct dib0700_adapter_state *state = adap->priv;
3089
3090 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3091 return -ENODEV;
be9bae10
OG		 3092
3093 /* The TFE7090 requires the dib0700 to not be in master mode */
3094 st->disable_streaming_master_mode = 1;
3095
03245a5e 3096 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3097 msleep(20);
03245a5e
OG		 3098 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3099 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3100 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3101 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3102
b4d6046e 3103 msleep(20);
03245a5e 3104 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3105 msleep(20);
03245a5e
OG		 3106 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3107
be9bae10 3108 /* initialize IC 0 */
8abe4a0a
MCC		 3109 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3110 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3111 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3112 return -ENODEV;
3113 }
03245a5e 3114
be9bae10 3115 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3116 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3117 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3118 return -ENODEV;
3119
8abe4a0a 3120 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3121
be9bae10
OG		 3122 return 0;
3123}
3124
3125static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3126{
3127 struct i2c_adapter *i2c;
8abe4a0a 3128 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3129
77eed219 3130 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3131 err("the master dib7090 has to be initialized first");
3132 return -ENODEV; /* the master device has not been initialized */
3133 }
3134
8abe4a0a
MCC		 3135 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3136 return -ENODEV;
3137
3138 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3139 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3140 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3141 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3142 return -ENODEV;
3143 }
3144
8abe4a0a 3145 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3146 dib0700_set_i2c_speed(adap->dev, 200);
3147
77eed219 3148 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3149}
3150
3151static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3152{
3153 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3154 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3155
3156 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3157 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3158 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3159
77eed219 3160 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3161 return -ENODEV;
3162
8abe4a0a 3163 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3164
77eed219
MK		 3165 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3166 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3167 return 0;
3168}
3169
3170static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3171{
3172 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3173 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3174
3175 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3176 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3177 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3178
77eed219 3179 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3180 return -ENODEV;
3181
8abe4a0a 3182 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3183
77eed219
MK		 3184 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3185 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3186 return 0;
03245a5e 3187}
ba3fe3a9 3188
f45f513a 3189static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3190{
3191 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3192 struct dib0700_adapter_state *state = adap->priv;
3193
3194 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3195 return -ENODEV;
b293f304 3196
f45f513a 3197 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3198 st->disable_streaming_master_mode = 1;
3199
3200 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3201 msleep(20);
3202 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3203 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3204 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3205 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3206 msleep(20);
3207 dib0700_ctrl_clock(adap->dev, 72, 1);
3208 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3209 msleep(20);
3210 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3211
8abe4a0a 3212 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3213 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3214 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3215 __func__);
8abe4a0a 3216 dvb_detach(&state->dib7000p_ops);
b293f304
OG		 3217 return -ENODEV;
3218 }
8abe4a0a 3219 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3220 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3221
3222 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3223}
3224
f45f513a 3225static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3226{
3227 struct dib0700_adapter_state *st = adap->priv;
3228 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3229 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3230
3231
3232 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3233 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3234 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3235
3236 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3237 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3238 return -ENODEV;
3239
8abe4a0a 3240 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3241
3242 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3243 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3244 return 0;
3245}
3246
01373a5c
PB		 3247/* STK7070PD */
3248static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3249 {
3250 .output_mpeg2_in_188_bytes = 1,
3251
3252 .agc_config_count = 1,
3253 .agc = &dib7070_agc_config,
3254 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3255 .tuner_is_baseband = 1,
3256 .spur_protect = 1,
01373a5c
PB		 3257
3258 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3259 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3260 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3261
3262 .hostbus_diversity = 1,
3263 }, {
3264 .output_mpeg2_in_188_bytes = 1,
3265
3266 .agc_config_count = 1,
3267 .agc = &dib7070_agc_config,
3268 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3269 .tuner_is_baseband = 1,
3270 .spur_protect = 1,
01373a5c
PB		 3271
3272 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3273 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3274 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3275
3276 .hostbus_diversity = 1,
3277 }
3278};
3279
52fd5b2e 3280static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3281{
52fd5b2e 3282 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3283 msleep(10);
52fd5b2e
JS		 3284 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3285 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3286 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3287 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3288
52fd5b2e 3289 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3290
3291 msleep(10);
52fd5b2e
JS		 3292 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3293}
3294
3295static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3296{
8abe4a0a
MCC		 3297 struct dib0700_adapter_state *state = adap->priv;
3298
3299 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3300 return -ENODEV;
3301
52fd5b2e
JS		 3302 stk7070pd_init(adap->dev);
3303
01373a5c
PB		 3304 msleep(10);
3305 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3306
8abe4a0a 3307 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3308 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3309 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3310 __func__);
8abe4a0a 3311 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 3312 return -ENODEV;
3313 }
01373a5c 3314
8abe4a0a 3315 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3316 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3317}
3318
3319static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3320{
8abe4a0a
MCC		 3321 struct dib0700_adapter_state *state = adap->priv;
3322
3323 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3324 return -ENODEV;
3325
3326 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3327 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3328}
3329
d43272a4 3330static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3331 enum fe_status *stat)
d43272a4
JS		 3332{
3333 struct dvb_usb_adapter *adap = fe->dvb->priv;
3334 struct dvb_usb_device *dev = adap->dev;
3335 struct dib0700_state *state = dev->priv;
3336 int ret;
3337
3338 ret = state->read_status(fe, stat);
3339
3340 if (!ret)
3341 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3342 !!(*stat & FE_HAS_LOCK));
3343
3344 return ret;
3345}
3346
3347static int novatd_sleep_override(struct dvb_frontend* fe)
3348{
3349 struct dvb_usb_adapter *adap = fe->dvb->priv;
3350 struct dvb_usb_device *dev = adap->dev;
3351 struct dib0700_state *state = dev->priv;
3352
3353 /* turn off LED */
3354 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3355
3356 return state->sleep(fe);
3357}
3358
2b05b881
JS		 3359/**
3360 * novatd_frontend_attach - Nova-TD specific attach
3361 *
3362 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3363 * information purposes.
3364 */
3365static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3366{
3367 struct dvb_usb_device *dev = adap->dev;
d43272a4 3368 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3369 struct dib0700_adapter_state *state = adap->priv;
3370
3371 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3372 return -ENODEV;
2b05b881
JS		 3373
3374 if (adap->id == 0) {
3375 stk7070pd_init(dev);
3376
3377 /* turn the power LED on, the other two off (just in case) */
3378 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3379 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3380 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3381
8abe4a0a 3382 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3383 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3384 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3385 __func__);
8abe4a0a 3386 dvb_detach(&state->dib7000p_ops);
2b05b881
JS		 3387 return -ENODEV;
3388 }
3389 }
3390
8abe4a0a 3391 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3392 adap->id == 0 ? 0x80 : 0x82,
3393 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3394
3395 if (adap->fe_adap[0].fe == NULL)
3396 return -ENODEV;
3397
3398 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3399 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3400 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3401 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3402
3403 return 0;
2b05b881
JS		 3404}
3405
cb22cb52
DH		 3406/* S5H1411 */
3407static struct s5h1411_config pinnacle_801e_config = {
3408 .output_mode = S5H1411_PARALLEL_OUTPUT,
3409 .gpio = S5H1411_GPIO_OFF,
3410 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
3411 .qam_if = S5H1411_IF_44000,
3412 .vsb_if = S5H1411_IF_44000,
3413 .inversion = S5H1411_INVERSION_OFF,
3414 .status_mode = S5H1411_DEMODLOCKING
3415};
3416
3417/* Pinnacle PCTV HD Pro 801e GPIOs map:
3418 GPIO0 - currently unknown
3419 GPIO1 - xc5000 tuner reset
3420 GPIO2 - CX25843 sleep
3421 GPIO3 - currently unknown
3422 GPIO4 - currently unknown
3423 GPIO6 - currently unknown
3424 GPIO7 - currently unknown
3425 GPIO9 - currently unknown
3426 GPIO10 - CX25843 reset
3427 */
3428static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3429{
3430 struct dib0700_state *st = adap->dev->priv;
3431
3432 /* Make use of the new i2c functions from FW 1.20 */
3433 st->fw_use_new_i2c_api = 1;
3434
3435 /* The s5h1411 requires the dib0700 to not be in master mode */
3436 st->disable_streaming_master_mode = 1;
3437
3438 /* All msleep values taken from Windows USB trace */
3439 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3440 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3441 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3442 msleep(400);
3443 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3444 msleep(60);
3445 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3446 msleep(30);
3447 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3448 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3449 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3450 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3451 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3452 msleep(30);
3453
3454 /* Put the CX25843 to sleep for now since we're in digital mode */
3455 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3456
3457 /* GPIOs are initialized, do the attach */
77eed219 3458 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3459 &adap->dev->i2c_adap);
77eed219 3460 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3461}
3462
767f3b3b
MK		 3463static int dib0700_xc5000_tuner_callback(void *priv, int component,
3464 int command, int arg)
cb22cb52
DH		 3465{
3466 struct dvb_usb_adapter *adap = priv;
3467
79025a9e
DH		 3468 if (command == XC5000_TUNER_RESET) {
3469 /* Reset the tuner */
3470 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3471 msleep(10);
79025a9e 3472 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3473 msleep(10);
79025a9e
DH		 3474 } else {
3475 err("xc5000: unknown tuner callback command: %d\n", command);
3476 return -EINVAL;
3477 }
cb22cb52
DH		 3478
3479 return 0;
3480}
3481
3482static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3483 .i2c_address = 0x64,
3484 .if_khz = 5380,
cb22cb52
DH		 3485};
3486
3487static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3488{
79025a9e 3489 /* FIXME: generalize & move to common area */
77eed219 3490 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3491
77eed219 3492 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3493 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3494 == NULL ? -ENODEV : 0;
3495}
3496
8d009a0c
DF		 3497static int dib0700_xc4000_tuner_callback(void *priv, int component,
3498 int command, int arg)
3499{
3500 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3501 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3502
3503 if (command == XC4000_TUNER_RESET) {
3504 /* Reset the tuner */
8abe4a0a 3505 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3506 msleep(10);
8abe4a0a 3507 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3508 } else {
3509 err("xc4000: unknown tuner callback command: %d\n", command);
3510 return -EINVAL;
3511 }
3512
3513 return 0;
3514}
3515
8583fc83
DH		 3516static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3517 .band_caps = BAND_UHF | BAND_VHF,
3518 .setup = 0x64,
3519 .inv_gain = 0x02c8,
3520 .time_stabiliz = 0x15,
3521 .alpha_level = 0x00,
3522 .thlock = 0x76,
3523 .wbd_inv = 0x01,
3524 .wbd_ref = 0x0b33,
3525 .wbd_sel = 0x00,
3526 .wbd_alpha = 0x02,
3527 .agc1_max = 0x00,
3528 .agc1_min = 0x00,
3529 .agc2_max = 0x9b26,
3530 .agc2_min = 0x26ca,
3531 .agc1_pt1 = 0x00,
3532 .agc1_pt2 = 0x00,
3533 .agc1_pt3 = 0x00,
3534 .agc1_slope1 = 0x00,
3535 .agc1_slope2 = 0x00,
3536 .agc2_pt1 = 0x00,
3537 .agc2_pt2 = 0x80,
3538 .agc2_slope1 = 0x1d,
3539 .agc2_slope2 = 0x1d,
2df12510 3540 .alpha_mant = 0x11,
8583fc83
DH		 3541 .alpha_exp = 0x1b,
3542 .beta_mant = 0x17,
3543 .beta_exp = 0x33,
3544 .perform_agc_softsplit = 0x00,
3545};
3546
f1c78d34 3547static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3548 .internal = 60000,
3549 .sampling = 30000,
3550 .pll_prediv = 1,
3551 .pll_ratio = 8,
3552 .pll_range = 3,
3553 .pll_reset = 1,
3554 .pll_bypass = 0,
3555 .enable_refdiv = 0,
3556 .bypclk_div = 0,
3557 .IO_CLK_en_core = 1,
3558 .ADClkSrc = 1,
3559 .modulo = 0,
3560 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3561 .ifreq = 39370534,
3562 .timf = 20452225,
3563 .xtal_hz = 30000000
f1c78d34
DH		 3564};
3565
01f16263
DH		 3566/* FIXME: none of these inputs are validated yet */
3567static struct dib7000p_config pctv_340e_config = {
62956ced 3568 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3569
3570 .agc_config_count = 1,
8583fc83 3571 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3572 .bw = &stk7700p_xc4000_pll_config,
01f16263 3573
01f16263
DH		 3574 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3575 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3576 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3577};
3578
3579/* PCTV 340e GPIOs map:
3580 dib0700:
3581 GPIO2 - CX25843 sleep
3582 GPIO3 - CS5340 reset
3583 GPIO5 - IRD
3584 GPIO6 - Power Supply
3585 GPIO8 - LNA (1=off 0=on)
3586 GPIO10 - CX25843 reset
3587 dib7000:
3588 GPIO8 - xc4000 reset
3589 */
3590static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3591{
3592 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3593 struct dib0700_adapter_state *state = adap->priv;
3594
3595 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3596 return -ENODEV;
01f16263
DH		 3597
3598 /* Power Supply on */
3599 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3600 msleep(50);
3601 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3602 msleep(100); /* Allow power supply to settle before probing */
3603
3604 /* cx25843 reset */
3605 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3606 msleep(1); /* cx25843 datasheet say 350us required */
3607 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3608
3609 /* LNA off for now */
3610 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3611
3612 /* Put the CX25843 to sleep for now since we're in digital mode */
3613 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3614
3615 /* FIXME: not verified yet */
3616 dib0700_ctrl_clock(adap->dev, 72, 1);
3617
2750d9c3
DH		 3618 msleep(500);
3619
8abe4a0a 3620 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3621 /* Demodulator not found for some reason? */
8abe4a0a 3622 dvb_detach(&state->dib7000p_ops);
01f16263
DH		 3623 return -ENODEV;
3624 }
3625
8abe4a0a 3626 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3627 &pctv_340e_config);
3628 st->is_dib7000pc = 1;
3629
77eed219 3630 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3631}
3632
8583fc83 3633static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3634 .i2c_address = 0x61,
3635 .default_pm = 1,
3636 .dvb_amplitude = 0,
3637 .set_smoothedcvbs = 0,
3638 .if_khz = 5400
8d009a0c
DF		 3639};
3640
3641static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3642{
59d0c37b 3643 struct i2c_adapter *tun_i2c;
8abe4a0a 3644 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3645
3646 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3647 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3648 DIBX000_I2C_INTERFACE_TUNER, 1);
3649 if (tun_i2c == NULL) {
941830c9 3650 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3651 return 0;
3652 }
3653
3654 /* Setup the reset callback */
77eed219 3655 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3656
77eed219 3657 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3658 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3659 == NULL ? -ENODEV : 0;
3660}
3661
ce904bcb
MK		 3662static struct lgdt3305_config hcw_lgdt3305_config = {
3663 .i2c_addr = 0x0e,
3664 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3665 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3666 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3667 .deny_i2c_rptr = 0,
3668 .spectral_inversion = 1,
3669 .qam_if_khz = 6000,
3670 .vsb_if_khz = 6000,
3671 .usref_8vsb = 0x0500,
3672};
3673
3674static struct mxl5007t_config hcw_mxl5007t_config = {
3675 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3676 .if_freq_hz = MxL_IF_6_MHZ,
3677 .invert_if = 1,
3678};
3679
3680/* TIGER-ATSC map:
3681 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3682 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3683 GPIO4 - SCL2
3684 GPIO6 - EN_TUNER
3685 GPIO7 - SDA2
3686 GPIO10 - DEM_RST
3687
3688 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3689 */
3690static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3691{
3692 struct dib0700_state *st = adap->dev->priv;
3693
3694 /* Make use of the new i2c functions from FW 1.20 */
3695 st->fw_use_new_i2c_api = 1;
3696
3697 st->disable_streaming_master_mode = 1;
3698
3699 /* fe power enable */
3700 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3701 msleep(30);
3702 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3703 msleep(30);
3704
3705 /* demod reset */
3706 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3707 msleep(30);
3708 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3709 msleep(30);
3710 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3711 msleep(30);
3712
77eed219 3713 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3714 &hcw_lgdt3305_config,
3715 &adap->dev->i2c_adap);
3716
77eed219 3717 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3718}
3719
3720static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3721{
77eed219 3722 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3723 &adap->dev->i2c_adap, 0x60,
3724 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3725}
3726
3727
01373a5c 3728/* DVB-USB and USB stuff follows */
b7f54910 3729struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3730/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3731 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3732 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3733 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3734 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3735/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3736 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3737 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3738 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3739 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3740/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3741 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3742 { USB_DEVICE(USB_VID_TERRATEC,
3743 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3744 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3745 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3746/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3747 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3748 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3749 { USB_DEVICE(USB_VID_PINNACLE,
3750 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3751 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3752/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3753 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3754 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3755 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3756 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3757/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3758 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3759 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3760 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3761 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3762/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3763 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3764 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3765 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3766 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3767/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3768 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3769 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3770 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3771 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3772/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3773 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3774 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3775 { USB_DEVICE(USB_VID_TERRATEC,
3776 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3777 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3778/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3779 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3780 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3781 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3782 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3783/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3784 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3785 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3786 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3787 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3788/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3789 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3790 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3791 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3792 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3793/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3794 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3795 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3796 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3797 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3798/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3799 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3800 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3801 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3802 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3803/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3804 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3805 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3806 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3807 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3808/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3809 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3810 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3811 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3812 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3813/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3814 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3815 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
91be260f 3816 { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
6ca8f0b9 3817 { 0 } /* Terminating entry */
b7f54910
PB		 3818};
3819MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3820
3821#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3822 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3823 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3824 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3825 .download_firmware = dib0700_download_firmware, \
6958effe 3826 .no_reconnect = 1, \
b7f54910 3827 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3828 .i2c_algo = &dib0700_i2c_algo, \
3829 .identify_state = dib0700_identify_state
b7f54910
PB		 3830
3831#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3832 .streaming_ctrl = dib0700_streaming_ctrl, \
3833 .stream = { \
3834 .type = USB_BULK, \
3835 .count = 4, \
3836 .endpoint = ep, \
3837 .u = { \
3838 .bulk = { \
3839 .buffersize = 39480, \
3840 } \
3841 } \
3842 }
3843
0fae1997
MCC		 3844#define DIB0700_NUM_FRONTENDS(n) \
3845 .num_frontends = n, \
3846 .size_of_priv = sizeof(struct dib0700_adapter_state)
3847
b7f54910
PB		 3848struct dvb_usb_device_properties dib0700_devices[] = {
3849 {
3850 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3851
3852 .num_adapters = 1,
3853 .adapter = {
3854 {
0fae1997 3855 DIB0700_NUM_FRONTENDS(1),
77eed219 3856 .fe = {{
f8731f4d
OG		 3857 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3858 .pid_filter_count = 32,
e192a7cf
OG		 3859 .pid_filter = stk7700p_pid_filter,
3860 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3861 .frontend_attach = stk7700p_frontend_attach,
3862 .tuner_attach = stk7700p_tuner_attach,
3863
3864 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3865 }},
b7f54910
PB		 3866 },
3867 },
3868
67053a40 3869 .num_device_descs = 8,
b7f54910
PB		 3870 .devices = {
3871 { "DiBcom STK7700P reference design",
49a1376c 3872 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3873 { NULL },
3874 },
3875 { "Hauppauge Nova-T Stick",
f9aeba45 3876 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3877 { NULL },
3878 },
3879 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3880 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3881 { NULL },
3882 },
49a1376c 3883 { "Compro Videomate U500",
1f8ca4b3 3884 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3885 { NULL },
0ce215e1
HS		 3886 },
3887 { "Uniwill STK7700P based (Hama and others)",
3888 { &dib0700_usb_id_table[7], NULL },
3889 { NULL },
8637a875
MK		 3890 },
3891 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3892 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3893 { NULL },
fa3b877e
JS		 3894 },
3895 { "AVerMedia AVerTV DVB-T Express",
3896 { &dib0700_usb_id_table[20] },
3897 { NULL },
67053a40 3898 },
67053a40 3899 { "Gigabyte U7000",
3900 { &dib0700_usb_id_table[21], NULL },
3901 { NULL },
49a1376c 3902 }
b1139e35
DS		 3903 },
3904
72b39310 3905 .rc.core = {
f72a27b8 3906 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3907 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3908 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3909 .allowed_protos = RC_BIT_RC5 |
3910 RC_BIT_RC6_MCE |
3911 RC_BIT_NEC,
d8b4b582 3912 .change_protocol = dib0700_change_protocol,
f72a27b8 3913 },
b7f54910
PB		 3914 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3915
3916 .num_adapters = 2,
3917 .adapter = {
3918 {
0fae1997 3919 DIB0700_NUM_FRONTENDS(1),
77eed219 3920 .fe = {{
b7f54910
PB		 3921 .frontend_attach = bristol_frontend_attach,
3922 .tuner_attach = bristol_tuner_attach,
3923
3924 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3925 }},
b7f54910 3926 }, {
0fae1997 3927 DIB0700_NUM_FRONTENDS(1),
77eed219 3928 .fe = {{
b7f54910
PB		 3929 .frontend_attach = bristol_frontend_attach,
3930 .tuner_attach = bristol_tuner_attach,
3931
3932 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3933 }},
b7f54910
PB		 3934 }
3935 },
3936
3937 .num_device_descs = 1,
3938 .devices = {
3939 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 3940 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 3941 { NULL },
3942 },
82f3d559
JG		 3943 },
3944
72b39310 3945 .rc.core = {
f72a27b8 3946 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3947 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3948 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3949 .allowed_protos = RC_BIT_RC5 |
3950 RC_BIT_RC6_MCE |
3951 RC_BIT_NEC,
d8b4b582 3952 .change_protocol = dib0700_change_protocol,
f72a27b8 3953 },
54d75eba
OD		 3954 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3955
3956 .num_adapters = 2,
3957 .adapter = {
3958 {
0fae1997 3959 DIB0700_NUM_FRONTENDS(1),
77eed219 3960 .fe = {{
f8731f4d
OG		 3961 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3962 .pid_filter_count = 32,
3963 .pid_filter = stk70x0p_pid_filter,
3964 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3965 .frontend_attach = stk7700d_frontend_attach,
3966 .tuner_attach = stk7700d_tuner_attach,
3967
3968 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3969 }},
54d75eba 3970 }, {
0fae1997 3971 DIB0700_NUM_FRONTENDS(1),
77eed219 3972 .fe = {{
f8731f4d
OG		 3973 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3974 .pid_filter_count = 32,
3975 .pid_filter = stk70x0p_pid_filter,
3976 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3977 .frontend_attach = stk7700d_frontend_attach,
3978 .tuner_attach = stk7700d_tuner_attach,
3979
3980 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3981 }},
54d75eba
OD		 3982 }
3983 },
3984
200e861c 3985 .num_device_descs = 5,
54d75eba
OD		 3986 .devices = {
3987 { "Pinnacle PCTV 2000e",
3988 { &dib0700_usb_id_table[11], NULL },
3989 { NULL },
3990 },
3991 { "Terratec Cinergy DT XS Diversity",
3992 { &dib0700_usb_id_table[12], NULL },
3993 { NULL },
3994 },
faebb914 3995 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 3996 { &dib0700_usb_id_table[13], NULL },
3997 { NULL },
3998 },
01373a5c 3999 { "DiBcom STK7700D reference design",
b6884a17
PB		 4000 { &dib0700_usb_id_table[14], NULL },
4001 { NULL },
bb1b082e 4002 },
200e861c
JW		 4003 { "YUAN High-Tech DiBcom STK7700D",
4004 { &dib0700_usb_id_table[55], NULL },
4005 { NULL },
4006 },
bb1b082e 4007
54d75eba 4008 },
82f3d559 4009
72b39310 4010 .rc.core = {
f72a27b8 4011 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4012 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4013 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4014 .allowed_protos = RC_BIT_RC5 |
4015 RC_BIT_RC6_MCE |
4016 RC_BIT_NEC,
d8b4b582 4017 .change_protocol = dib0700_change_protocol,
f72a27b8 4018 },
132c3188
DG		 4019 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4020
4021 .num_adapters = 1,
4022 .adapter = {
4023 {
0fae1997 4024 DIB0700_NUM_FRONTENDS(1),
77eed219 4025 .fe = {{
f8731f4d
OG		 4026 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4027 .pid_filter_count = 32,
4028 .pid_filter = stk70x0p_pid_filter,
4029 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4030 .frontend_attach = stk7700P2_frontend_attach,
4031 .tuner_attach = stk7700d_tuner_attach,
4032
4033 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4034 }},
132c3188
DG		 4035 },
4036 },
4037
bb1b082e 4038 .num_device_descs = 3,
132c3188
DG		 4039 .devices = {
4040 { "ASUS My Cinema U3000 Mini DVBT Tuner",
4041 { &dib0700_usb_id_table[23], NULL },
4042 { NULL },
4043 },
6ca8f0b9
AC		 4044 { "Yuan EC372S",
4045 { &dib0700_usb_id_table[31], NULL },
4046 { NULL },
bb1b082e
YA		 4047 },
4048 { "Terratec Cinergy T Express",
4049 { &dib0700_usb_id_table[42], NULL },
4050 { NULL },
6ca8f0b9 4051 }
48aa7391
CR		 4052 },
4053
72b39310 4054 .rc.core = {
f72a27b8 4055 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4056 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4057 .module_name = "dib0700",
0ffd1ab3 4058 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4059 .allowed_protos = RC_BIT_RC5 |
4060 RC_BIT_RC6_MCE |
4061 RC_BIT_NEC,
d8b4b582 4062 .change_protocol = dib0700_change_protocol,
f72a27b8 4063 },
01373a5c
PB		 4064 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4065
4066 .num_adapters = 1,
4067 .adapter = {
4068 {
0fae1997 4069 DIB0700_NUM_FRONTENDS(1),
77eed219 4070 .fe = {{
f8731f4d
OG		 4071 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4072 .pid_filter_count = 32,
4073 .pid_filter = stk70x0p_pid_filter,
4074 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4075 .frontend_attach = stk7070p_frontend_attach,
4076 .tuner_attach = dib7070p_tuner_attach,
4077
4078 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4079 }},
01373a5c
PB		 4080 },
4081 },
4082
0bc9d39b 4083 .num_device_descs = 12,
01373a5c
PB		 4084 .devices = {
4085 { "DiBcom STK7070P reference design",
4086 { &dib0700_usb_id_table[15], NULL },
4087 { NULL },
4088 },
4089 { "Pinnacle PCTV DVB-T Flash Stick",
4090 { &dib0700_usb_id_table[16], NULL },
4091 { NULL },
4092 },
7999a816
YL		 4093 { "Artec T14BR DVB-T",
4094 { &dib0700_usb_id_table[22], NULL },
4095 { NULL },
132c3188
DG		 4096 },
4097 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4098 { &dib0700_usb_id_table[24], NULL },
4099 { NULL },
4100 },
c7637b1a
TT		 4101 { "Hauppauge Nova-T Stick",
4102 { &dib0700_usb_id_table[25], NULL },
4103 { NULL },
4104 },
13b83b5d
DS		 4105 { "Hauppauge Nova-T MyTV.t",
4106 { &dib0700_usb_id_table[26], NULL },
4107 { NULL },
4108 },
6ca8f0b9
AC		 4109 { "Pinnacle PCTV 72e",
4110 { &dib0700_usb_id_table[29], NULL },
4111 { NULL },
4112 },
4113 { "Pinnacle PCTV 73e",
4114 { &dib0700_usb_id_table[30], NULL },
4115 { NULL },
4116 },
919a5488
KF		 4117 { "Elgato EyeTV DTT",
4118 { &dib0700_usb_id_table[49], NULL },
4119 { NULL },
4120 },
9abb6e6f
PT		 4121 { "Yuan PD378S",
4122 { &dib0700_usb_id_table[45], NULL },
4123 { NULL },
4124 },
513846ec
AS		 4125 { "Elgato EyeTV Dtt Dlx PD378S",
4126 { &dib0700_usb_id_table[50], NULL },
4127 { NULL },
4128 },
0bc9d39b 4129 { "Elgato EyeTV DTT rev. 2",
f45f513a 4130 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4131 { NULL },
4132 },
c7637b1a
TT		 4133 },
4134
72b39310 4135 .rc.core = {
f72a27b8 4136 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4137 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4138 .module_name = "dib0700",
0ffd1ab3 4139 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4140 .allowed_protos = RC_BIT_RC5 |
4141 RC_BIT_RC6_MCE |
4142 RC_BIT_NEC,
d8b4b582 4143 .change_protocol = dib0700_change_protocol,
f72a27b8 4144 },
74b76f21
OG		 4145 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4146
4147 .num_adapters = 1,
4148 .adapter = {
4149 {
0fae1997 4150 DIB0700_NUM_FRONTENDS(1),
77eed219 4151 .fe = {{
648732fc
MCC		 4152 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4153 .pid_filter_count = 32,
4154 .pid_filter = stk70x0p_pid_filter,
4155 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4156 .frontend_attach = stk7070p_frontend_attach,
4157 .tuner_attach = dib7070p_tuner_attach,
4158
4159 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4160 }},
74b76f21
OG		 4161 },
4162 },
4163
20232c47 4164 .num_device_descs = 3,
74b76f21
OG		 4165 .devices = {
4166 { "Pinnacle PCTV 73A",
4167 { &dib0700_usb_id_table[56], NULL },
4168 { NULL },
4169 },
4170 { "Pinnacle PCTV 73e SE",
20232c47 4171 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4172 { NULL },
4173 },
4174 { "Pinnacle PCTV 282e",
20232c47 4175 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4176 { NULL },
4177 },
4178 },
4179
72b39310 4180 .rc.core = {
f72a27b8 4181 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4182 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4183 .module_name = "dib0700",
0ffd1ab3 4184 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4185 .allowed_protos = RC_BIT_RC5 |
4186 RC_BIT_RC6_MCE |
4187 RC_BIT_NEC,
d8b4b582 4188 .change_protocol = dib0700_change_protocol,
f72a27b8 4189 },
01373a5c
PB		 4190 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4191
4192 .num_adapters = 2,
4193 .adapter = {
4194 {
0fae1997 4195 DIB0700_NUM_FRONTENDS(1),
77eed219 4196 .fe = {{
f8731f4d
OG		 4197 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4198 .pid_filter_count = 32,
4199 .pid_filter = stk70x0p_pid_filter,
4200 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4201 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4202 .tuner_attach = dib7070p_tuner_attach,
4203
4204 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4205 }},
01373a5c 4206 }, {
0fae1997 4207 DIB0700_NUM_FRONTENDS(1),
77eed219 4208 .fe = {{
f8731f4d
OG		 4209 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4210 .pid_filter_count = 32,
4211 .pid_filter = stk70x0p_pid_filter,
4212 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4213 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4214 .tuner_attach = dib7070p_tuner_attach,
4215
4216 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4217 }},
01373a5c
PB		 4218 }
4219 },
4220
c859e6ef 4221 .num_device_descs = 3,
9b6ba57b
JS		 4222 .devices = {
4223 { "Hauppauge Nova-TD Stick (52009)",
4224 { &dib0700_usb_id_table[35], NULL },
4225 { NULL },
4226 },
c859e6ef
MK		 4227 { "PCTV 2002e",
4228 { &dib0700_usb_id_table[81], NULL },
4229 { NULL },
4230 },
4231 { "PCTV 2002e SE",
4232 { &dib0700_usb_id_table[82], NULL },
4233 { NULL },
4234 },
9b6ba57b
JS		 4235 },
4236
4237 .rc.core = {
4238 .rc_interval = DEFAULT_RC_INTERVAL,
4239 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4240 .module_name = "dib0700",
4241 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4242 .allowed_protos = RC_BIT_RC5 |
4243 RC_BIT_RC6_MCE |
4244 RC_BIT_NEC,
9b6ba57b
JS		 4245 .change_protocol = dib0700_change_protocol,
4246 },
4247 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4248
4249 .num_adapters = 2,
4250 .adapter = {
4251 {
0fae1997 4252 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4253 .fe = {{
4254 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4255 .pid_filter_count = 32,
4256 .pid_filter = stk70x0p_pid_filter,
4257 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4258 .frontend_attach = stk7070pd_frontend_attach0,
4259 .tuner_attach = dib7070p_tuner_attach,
4260
4261 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4262 }},
9b6ba57b 4263 }, {
0fae1997 4264 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4265 .fe = {{
4266 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4267 .pid_filter_count = 32,
4268 .pid_filter = stk70x0p_pid_filter,
4269 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4270 .frontend_attach = stk7070pd_frontend_attach1,
4271 .tuner_attach = dib7070p_tuner_attach,
4272
4273 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4274 }},
9b6ba57b
JS		 4275 }
4276 },
4277
4278 .num_device_descs = 5,
01373a5c
PB		 4279 .devices = {
4280 { "DiBcom STK7070PD reference design",
4281 { &dib0700_usb_id_table[17], NULL },
4282 { NULL },
4283 },
4284 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4285 { &dib0700_usb_id_table[18], NULL },
4286 { NULL },
d01eb2dc 4287 },
9a0c04a1
MK		 4288 { "Hauppauge Nova-TD-500 (84xxx)",
4289 { &dib0700_usb_id_table[36], NULL },
4290 { NULL },
db4b2d19 4291 },
a9b8fe30
PB		 4292 { "Terratec Cinergy DT USB XS Diversity/ T5",
4293 { &dib0700_usb_id_table[43],
4294 &dib0700_usb_id_table[53], NULL},
db4b2d19 4295 { NULL },
0a6e1ed2 4296 },
4297 { "Sony PlayTV",
4298 { &dib0700_usb_id_table[44], NULL },
4299 { NULL },
84e2f037 4300 },
5af935cc
MCC		 4301 },
4302
4303 .rc.core = {
4304 .rc_interval = DEFAULT_RC_INTERVAL,
4305 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4306 .module_name = "dib0700",
0ffd1ab3 4307 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4308 .allowed_protos = RC_BIT_RC5 |
4309 RC_BIT_RC6_MCE |
4310 RC_BIT_NEC,
d8b4b582 4311 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4312 },
4313 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4314
4315 .num_adapters = 2,
4316 .adapter = {
4317 {
0fae1997 4318 DIB0700_NUM_FRONTENDS(1),
77eed219 4319 .fe = {{
5af935cc
MCC		 4320 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4321 .pid_filter_count = 32,
4322 .pid_filter = stk70x0p_pid_filter,
4323 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4324 .frontend_attach = stk7070pd_frontend_attach0,
4325 .tuner_attach = dib7070p_tuner_attach,
4326
4327 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4328 }},
5af935cc 4329 }, {
0fae1997 4330 DIB0700_NUM_FRONTENDS(1),
77eed219 4331 .fe = {{
5af935cc
MCC		 4332 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4333 .pid_filter_count = 32,
4334 .pid_filter = stk70x0p_pid_filter,
4335 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4336 .frontend_attach = stk7070pd_frontend_attach1,
4337 .tuner_attach = dib7070p_tuner_attach,
4338
4339 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4340 }},
5af935cc
MCC		 4341 }
4342 },
4343
4344 .num_device_descs = 1,
4345 .devices = {
84e2f037
MM		 4346 { "Elgato EyeTV Diversity",
4347 { &dib0700_usb_id_table[68], NULL },
4348 { NULL },
4349 },
c985a8dc 4350 },
f72a27b8 4351
72b39310 4352 .rc.core = {
f72a27b8 4353 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4354 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4355 .module_name = "dib0700",
0ffd1ab3 4356 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4357 .allowed_protos = RC_BIT_RC5 |
4358 RC_BIT_RC6_MCE |
4359 RC_BIT_NEC,
d8b4b582 4360 .change_protocol = dib0700_change_protocol,
f72a27b8 4361 },
6ca8f0b9
AC		 4362 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4363
4364 .num_adapters = 1,
4365 .adapter = {
4366 {
0fae1997 4367 DIB0700_NUM_FRONTENDS(1),
77eed219 4368 .fe = {{
f8731f4d
OG		 4369 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4370 .pid_filter_count = 32,
4371 .pid_filter = stk70x0p_pid_filter,
4372 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4373 .frontend_attach = stk7700ph_frontend_attach,
4374 .tuner_attach = stk7700ph_tuner_attach,
4375
4376 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4377 }},
6ca8f0b9
AC		 4378 },
4379 },
4380
c53d83cc 4381 .num_device_descs = 9,
6ca8f0b9
AC		 4382 .devices = {
4383 { "Terratec Cinergy HT USB XE",
4384 { &dib0700_usb_id_table[27], NULL },
4385 { NULL },
4386 },
4387 { "Pinnacle Expresscard 320cx",
4388 { &dib0700_usb_id_table[28], NULL },
4389 { NULL },
4390 },
4391 { "Terratec Cinergy HT Express",
4392 { &dib0700_usb_id_table[32], NULL },
4393 { NULL },
4394 },
17a370bc
FT		 4395 { "Gigabyte U8000-RH",
4396 { &dib0700_usb_id_table[37], NULL },
4397 { NULL },
4398 },
8751aaa6
DON		 4399 { "YUAN High-Tech STK7700PH",
4400 { &dib0700_usb_id_table[38], NULL },
4401 { NULL },
4402 },
5769743a
AC		 4403 { "Asus My Cinema-U3000Hybrid",
4404 { &dib0700_usb_id_table[39], NULL },
4405 { NULL },
4406 },
16ba1ee5
XL		 4407 { "YUAN High-Tech MC770",
4408 { &dib0700_usb_id_table[48], NULL },
4409 { NULL },
4410 },
f0f4ae76 4411 { "Leadtek WinFast DTV Dongle H",
4412 { &dib0700_usb_id_table[51], NULL },
4413 { NULL },
4414 },
c53d83cc
PH		 4415 { "YUAN High-Tech STK7700D",
4416 { &dib0700_usb_id_table[54], NULL },
4417 { NULL },
4418 },
6ca8f0b9 4419 },
f72a27b8 4420
72b39310 4421 .rc.core = {
f72a27b8 4422 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4423 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4424 .module_name = "dib0700",
0ffd1ab3 4425 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4426 .allowed_protos = RC_BIT_RC5 |
4427 RC_BIT_RC6_MCE |
4428 RC_BIT_NEC,
d8b4b582 4429 .change_protocol = dib0700_change_protocol,
f72a27b8 4430 },
cb22cb52
DH		 4431 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4432 .num_adapters = 1,
4433 .adapter = {
4434 {
0fae1997 4435 DIB0700_NUM_FRONTENDS(1),
77eed219 4436 .fe = {{
cb22cb52
DH		 4437 .frontend_attach = s5h1411_frontend_attach,
4438 .tuner_attach = xc5000_tuner_attach,
4439
4440 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4441 }},
cb22cb52
DH		 4442 },
4443 },
4444
d2fc3bfc 4445 .num_device_descs = 2,
cb22cb52
DH		 4446 .devices = {
4447 { "Pinnacle PCTV HD Pro USB Stick",
4448 { &dib0700_usb_id_table[40], NULL },
4449 { NULL },
4450 },
d2fc3bfc
DH		 4451 { "Pinnacle PCTV HD USB Stick",
4452 { &dib0700_usb_id_table[41], NULL },
4453 { NULL },
4454 },
cb22cb52 4455 },
72b39310
MCC		 4456
4457 .rc.core = {
f72a27b8 4458 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4459 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4460 .module_name = "dib0700",
0ffd1ab3 4461 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4462 .allowed_protos = RC_BIT_RC5 |
4463 RC_BIT_RC6_MCE |
4464 RC_BIT_NEC,
d8b4b582 4465 .change_protocol = dib0700_change_protocol,
f72a27b8 4466 },
ce904bcb
MK		 4467 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4468 .num_adapters = 1,
4469 .adapter = {
4470 {
0fae1997 4471 DIB0700_NUM_FRONTENDS(1),
77eed219 4472 .fe = {{
ce904bcb
MK		 4473 .frontend_attach = lgdt3305_frontend_attach,
4474 .tuner_attach = mxl5007t_tuner_attach,
4475
4476 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4477 }},
ce904bcb
MK		 4478 },
4479 },
4480
4481 .num_device_descs = 2,
4482 .devices = {
4483 { "Hauppauge ATSC MiniCard (B200)",
4484 { &dib0700_usb_id_table[46], NULL },
4485 { NULL },
4486 },
4487 { "Hauppauge ATSC MiniCard (B210)",
4488 { &dib0700_usb_id_table[47], NULL },
4489 { NULL },
4490 },
4491 },
d300bd69
OG		 4492 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4493
4494 .num_adapters = 1,
4495 .adapter = {
4496 {
0fae1997 4497 DIB0700_NUM_FRONTENDS(1),
77eed219 4498 .fe = {{
f8731f4d
OG		 4499 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4500 .pid_filter_count = 32,
4501 .pid_filter = stk70x0p_pid_filter,
4502 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4503 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4504 .tuner_attach = dib7770p_tuner_attach,
4505
4506 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4507 }},
d300bd69
OG		 4508 },
4509 },
4510
d1402307 4511 .num_device_descs = 4,
d300bd69
OG		 4512 .devices = {
4513 { "DiBcom STK7770P reference design",
4514 { &dib0700_usb_id_table[59], NULL },
4515 { NULL },
4516 },
1e13c8f0
PB		 4517 { "Terratec Cinergy T USB XXS (HD)/ T3",
4518 { &dib0700_usb_id_table[33],
4519 &dib0700_usb_id_table[52],
4520 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4521 { NULL },
4522 },
498e677c
LMF		 4523 { "TechniSat AirStar TeleStick 2",
4524 { &dib0700_usb_id_table[74], NULL },
4525 { NULL },
4526 },
d1402307
SE		 4527 { "Medion CTX1921 DVB-T USB",
4528 { &dib0700_usb_id_table[75], NULL },
4529 { NULL },
4530 },
d300bd69 4531 },
72b39310
MCC		 4532
4533 .rc.core = {
f72a27b8 4534 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4535 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4536 .module_name = "dib0700",
0ffd1ab3 4537 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4538 .allowed_protos = RC_BIT_RC5 |
4539 RC_BIT_RC6_MCE |
4540 RC_BIT_NEC,
d8b4b582 4541 .change_protocol = dib0700_change_protocol,
f72a27b8 4542 },
ba3fe3a9
PB		 4543 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4544 .num_adapters = 1,
4545 .adapter = {
4546 {
0fae1997 4547 DIB0700_NUM_FRONTENDS(1),
77eed219 4548 .fe = {{
f8731f4d
OG		 4549 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4550 .pid_filter_count = 32,
03245a5e
OG		 4551 .pid_filter = stk80xx_pid_filter,
4552 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4553 .frontend_attach = stk807x_frontend_attach,
4554 .tuner_attach = dib807x_tuner_attach,
4555
4556 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4557 }},
ba3fe3a9
PB		 4558 },
4559 },
4560
8a378e85 4561 .num_device_descs = 3,
ba3fe3a9
PB		 4562 .devices = {
4563 { "DiBcom STK807xP reference design",
4564 { &dib0700_usb_id_table[62], NULL },
4565 { NULL },
4566 },
aaeab30f
MCC		 4567 { "Prolink Pixelview SBTVD",
4568 { &dib0700_usb_id_table[63], NULL },
4569 { NULL },
4570 },
8a378e85
F		 4571 { "EvolutePC TVWay+",
4572 { &dib0700_usb_id_table[64], NULL },
4573 { NULL },
4574 },
ba3fe3a9
PB		 4575 },
4576
72b39310 4577 .rc.core = {
f72a27b8 4578 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4579 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4580 .module_name = "dib0700",
0ffd1ab3 4581 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4582 .allowed_protos = RC_BIT_RC5 |
4583 RC_BIT_RC6_MCE |
4584 RC_BIT_NEC,
d8b4b582 4585 .change_protocol = dib0700_change_protocol,
f72a27b8 4586 },
ba3fe3a9
PB		 4587 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4588 .num_adapters = 2,
4589 .adapter = {
4590 {
0fae1997 4591 DIB0700_NUM_FRONTENDS(1),
77eed219 4592 .fe = {{
f8731f4d
OG		 4593 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4594 .pid_filter_count = 32,
03245a5e
OG		 4595 .pid_filter = stk80xx_pid_filter,
4596 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4597 .frontend_attach = stk807xpvr_frontend_attach0,
4598 .tuner_attach = dib807x_tuner_attach,
4599
4600 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4601 }},
ba3fe3a9
PB		 4602 },
4603 {
0fae1997 4604 DIB0700_NUM_FRONTENDS(1),
77eed219 4605 .fe = {{
f8731f4d
OG		 4606 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4607 .pid_filter_count = 32,
03245a5e
OG		 4608 .pid_filter = stk80xx_pid_filter,
4609 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4610 .frontend_attach = stk807xpvr_frontend_attach1,
4611 .tuner_attach = dib807x_tuner_attach,
4612
4613 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4614 }},
ba3fe3a9
PB		 4615 },
4616 },
4617
4618 .num_device_descs = 1,
4619 .devices = {
4620 { "DiBcom STK807xPVR reference design",
4621 { &dib0700_usb_id_table[61], NULL },
4622 { NULL },
4623 },
4624 },
4625
72b39310 4626 .rc.core = {
f72a27b8 4627 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4628 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4629 .module_name = "dib0700",
0ffd1ab3 4630 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4631 .allowed_protos = RC_BIT_RC5 |
4632 RC_BIT_RC6_MCE |
4633 RC_BIT_NEC,
d8b4b582 4634 .change_protocol = dib0700_change_protocol,
f72a27b8 4635 },
03245a5e
OG		 4636 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4637 .num_adapters = 1,
4638 .adapter = {
4639 {
0fae1997 4640 DIB0700_NUM_FRONTENDS(1),
77eed219 4641 .fe = {{
03245a5e
OG		 4642 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4643 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4644 .pid_filter_count = 32,
4645 .pid_filter = stk80xx_pid_filter,
4646 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4647 .frontend_attach = stk809x_frontend_attach,
4648 .tuner_attach = dib809x_tuner_attach,
4649
4650 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4651 }},
03245a5e
OG		 4652 },
4653 },
4654
4655 .num_device_descs = 1,
4656 .devices = {
4657 { "DiBcom STK8096GP reference design",
4658 { &dib0700_usb_id_table[67], NULL },
4659 { NULL },
4660 },
4661 },
4662
be9bae10
OG		 4663 .rc.core = {
4664 .rc_interval = DEFAULT_RC_INTERVAL,
4665 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4666 .module_name = "dib0700",
4667 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4668 .allowed_protos = RC_BIT_RC5 |
4669 RC_BIT_RC6_MCE |
4670 RC_BIT_NEC,
be9bae10
OG		 4671 .change_protocol = dib0700_change_protocol,
4672 },
4673 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4674 .num_adapters = 1,
4675 .adapter = {
4676 {
0fae1997 4677 DIB0700_NUM_FRONTENDS(1),
77eed219 4678 .fe = {{
be9bae10
OG		 4679 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4680 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4681 .pid_filter_count = 32,
4682 .pid_filter = dib90x0_pid_filter,
4683 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4684 .frontend_attach = stk9090m_frontend_attach,
4685 .tuner_attach = dib9090_tuner_attach,
4686
4687 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4688 }},
be9bae10
OG		 4689 },
4690 },
4691
4692 .num_device_descs = 1,
4693 .devices = {
4694 { "DiBcom STK9090M reference design",
4695 { &dib0700_usb_id_table[69], NULL },
4696 { NULL },
4697 },
4698 },
4699
4700 .rc.core = {
4701 .rc_interval = DEFAULT_RC_INTERVAL,
4702 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4703 .module_name = "dib0700",
4704 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4705 .allowed_protos = RC_BIT_RC5 |
4706 RC_BIT_RC6_MCE |
4707 RC_BIT_NEC,
be9bae10
OG		 4708 .change_protocol = dib0700_change_protocol,
4709 },
4710 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4711 .num_adapters = 1,
4712 .adapter = {
4713 {
0fae1997 4714 DIB0700_NUM_FRONTENDS(1),
77eed219 4715 .fe = {{
be9bae10
OG		 4716 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4717 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4718 .pid_filter_count = 32,
4719 .pid_filter = stk80xx_pid_filter,
4720 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4721 .frontend_attach = nim8096md_frontend_attach,
4722 .tuner_attach = nim8096md_tuner_attach,
4723
4724 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4725 }},
be9bae10
OG		 4726 },
4727 },
4728
4729 .num_device_descs = 1,
4730 .devices = {
4731 { "DiBcom NIM8096MD reference design",
4732 { &dib0700_usb_id_table[70], NULL },
4733 { NULL },
4734 },
4735 },
4736
4737 .rc.core = {
4738 .rc_interval = DEFAULT_RC_INTERVAL,
4739 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4740 .module_name = "dib0700",
4741 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4742 .allowed_protos = RC_BIT_RC5 |
4743 RC_BIT_RC6_MCE |
4744 RC_BIT_NEC,
be9bae10
OG		 4745 .change_protocol = dib0700_change_protocol,
4746 },
4747 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4748 .num_adapters = 1,
4749 .adapter = {
4750 {
0fae1997 4751 DIB0700_NUM_FRONTENDS(1),
77eed219 4752 .fe = {{
be9bae10
OG		 4753 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4754 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4755 .pid_filter_count = 32,
4756 .pid_filter = dib90x0_pid_filter,
4757 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4758 .frontend_attach = nim9090md_frontend_attach,
4759 .tuner_attach = nim9090md_tuner_attach,
4760
4761 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4762 }},
be9bae10
OG		 4763 },
4764 },
4765
4766 .num_device_descs = 1,
4767 .devices = {
4768 { "DiBcom NIM9090MD reference design",
4769 { &dib0700_usb_id_table[71], NULL },
4770 { NULL },
4771 },
4772 },
4773
4774 .rc.core = {
4775 .rc_interval = DEFAULT_RC_INTERVAL,
4776 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4777 .module_name = "dib0700",
4778 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4779 .allowed_protos = RC_BIT_RC5 |
4780 RC_BIT_RC6_MCE |
4781 RC_BIT_NEC,
be9bae10
OG		 4782 .change_protocol = dib0700_change_protocol,
4783 },
4784 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4785 .num_adapters = 1,
4786 .adapter = {
4787 {
0fae1997 4788 DIB0700_NUM_FRONTENDS(1),
77eed219 4789 .fe = {{
be9bae10
OG		 4790 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4791 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4792 .pid_filter_count = 32,
4793 .pid_filter = stk70x0p_pid_filter,
4794 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4795 .frontend_attach = nim7090_frontend_attach,
4796 .tuner_attach = nim7090_tuner_attach,
4797
4798 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4799 }},
be9bae10
OG		 4800 },
4801 },
4802
4803 .num_device_descs = 1,
4804 .devices = {
4805 { "DiBcom NIM7090 reference design",
4806 { &dib0700_usb_id_table[72], NULL },
4807 { NULL },
4808 },
4809 },
4810
4811 .rc.core = {
4812 .rc_interval = DEFAULT_RC_INTERVAL,
4813 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4814 .module_name = "dib0700",
4815 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4816 .allowed_protos = RC_BIT_RC5 |
4817 RC_BIT_RC6_MCE |
4818 RC_BIT_NEC,
be9bae10
OG		 4819 .change_protocol = dib0700_change_protocol,
4820 },
4821 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4822 .num_adapters = 2,
4823 .adapter = {
4824 {
0fae1997 4825 DIB0700_NUM_FRONTENDS(1),
77eed219 4826 .fe = {{
be9bae10
OG		 4827 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4828 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4829 .pid_filter_count = 32,
4830 .pid_filter = stk70x0p_pid_filter,
4831 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4832 .frontend_attach = tfe7090pvr_frontend0_attach,
4833 .tuner_attach = tfe7090pvr_tuner0_attach,
4834
4835 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4836 }},
be9bae10
OG		 4837 },
4838 {
0fae1997 4839 DIB0700_NUM_FRONTENDS(1),
77eed219 4840 .fe = {{
be9bae10
OG		 4841 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4842 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4843 .pid_filter_count = 32,
4844 .pid_filter = stk70x0p_pid_filter,
4845 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4846 .frontend_attach = tfe7090pvr_frontend1_attach,
4847 .tuner_attach = tfe7090pvr_tuner1_attach,
4848
4849 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4850 }},
be9bae10
OG		 4851 },
4852 },
4853
4854 .num_device_descs = 1,
4855 .devices = {
4856 { "DiBcom TFE7090PVR reference design",
4857 { &dib0700_usb_id_table[73], NULL },
4858 { NULL },
4859 },
4860 },
4861
8d009a0c
DF		 4862 .rc.core = {
4863 .rc_interval = DEFAULT_RC_INTERVAL,
4864 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4865 .module_name = "dib0700",
4866 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4867 .allowed_protos = RC_BIT_RC5 |
4868 RC_BIT_RC6_MCE |
4869 RC_BIT_NEC,
8d009a0c
DF		 4870 .change_protocol = dib0700_change_protocol,
4871 },
4872 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4873 .num_adapters = 1,
4874 .adapter = {
4875 {
0fae1997 4876 DIB0700_NUM_FRONTENDS(1),
77eed219 4877 .fe = {{
01f16263 4878 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4879 .tuner_attach = xc4000_tuner_attach,
4880
4881 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4882 }},
8d009a0c
DF		 4883 },
4884 },
4885
33fb1681 4886 .num_device_descs = 2,
8d009a0c
DF		 4887 .devices = {
4888 { "Pinnacle PCTV 340e HD Pro USB Stick",
4889 { &dib0700_usb_id_table[76], NULL },
4890 { NULL },
4891 },
33fb1681
DH		 4892 { "Pinnacle PCTV Hybrid Stick Solo",
4893 { &dib0700_usb_id_table[77], NULL },
4894 { NULL },
4895 },
8d009a0c 4896 },
6724a2f4
OG		 4897 .rc.core = {
4898 .rc_interval = DEFAULT_RC_INTERVAL,
4899 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4900 .module_name = "dib0700",
4901 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4902 .allowed_protos = RC_BIT_RC5 |
4903 RC_BIT_RC6_MCE |
4904 RC_BIT_NEC,
6724a2f4
OG		 4905 .change_protocol = dib0700_change_protocol,
4906 },
4907 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4908 .num_adapters = 1,
4909 .adapter = {
4910 {
0fae1997 4911 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 4912 .fe = {{
4913 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4914 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4915 .pid_filter_count = 32,
4916 .pid_filter = stk70x0p_pid_filter,
4917 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 4918 .frontend_attach = tfe7790p_frontend_attach,
4919 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 4920
4921 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4922 } },
b293f304
OG		 4923 },
4924 },
4925
4926 .num_device_descs = 1,
4927 .devices = {
f45f513a
OG		 4928 { "DiBcom TFE7790P reference design",
4929 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 4930 { NULL },
4931 },
4932 },
4933
88f3a358
OG		 4934 .rc.core = {
4935 .rc_interval = DEFAULT_RC_INTERVAL,
4936 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4937 .module_name = "dib0700",
4938 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4939 .allowed_protos = RC_BIT_RC5 |
4940 RC_BIT_RC6_MCE |
4941 RC_BIT_NEC,
88f3a358
OG		 4942 .change_protocol = dib0700_change_protocol,
4943 },
4944 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4945 .num_adapters = 1,
4946 .adapter = {
4947 {
0fae1997 4948 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 4949 .fe = {{
4950 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4951 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4952 .pid_filter_count = 32,
4953 .pid_filter = stk80xx_pid_filter,
4954 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4955 .frontend_attach = tfe8096p_frontend_attach,
4956 .tuner_attach = tfe8096p_tuner_attach,
4957
4958 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4959
4960 } },
88f3a358
OG		 4961 },
4962 },
4963
4964 .num_device_descs = 1,
4965 .devices = {
4966 { "DiBcom TFE8096P reference design",
f45f513a 4967 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 4968 { NULL },
4969 },
4970 },
4971
72b39310 4972 .rc.core = {
f72a27b8 4973 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4974 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4975 .module_name = "dib0700",
0ffd1ab3 4976 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4977 .allowed_protos = RC_BIT_RC5 |
4978 RC_BIT_RC6_MCE |
4979 RC_BIT_NEC,
d8b4b582 4980 .change_protocol = dib0700_change_protocol,
f72a27b8 4981 },
91be260f
NS		 4982 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4983 .num_adapters = 2,
4984 .adapter = {
4985 {
4986 .num_frontends = 1,
4987 .fe = {{
4988 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4989 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4990 .pid_filter_count = 32,
4991 .pid_filter = stk80xx_pid_filter,
4992 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4993 .frontend_attach = stk809x_frontend_attach,
4994 .tuner_attach = dib809x_tuner_attach,
4995
4996 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4997 } },
4998 .size_of_priv =
4999 sizeof(struct dib0700_adapter_state),
5000 }, {
5001 .num_frontends = 1,
5002 .fe = { {
5003 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5004 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5005 .pid_filter_count = 32,
5006 .pid_filter = stk80xx_pid_filter,
5007 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5008 .frontend_attach = stk809x_frontend1_attach,
5009 .tuner_attach = dib809x_tuner_attach,
5010
5011 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5012 } },
5013 .size_of_priv =
5014 sizeof(struct dib0700_adapter_state),
5015 },
5016 },
5017 .num_device_descs = 1,
5018 .devices = {
5019 { "DiBcom STK8096-PVR reference design",
5020 { &dib0700_usb_id_table[83], NULL },
5021 { NULL },
5022 },
5023 },
5024
5025 .rc.core = {
5026 .rc_interval = DEFAULT_RC_INTERVAL,
5027 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5028 .module_name = "dib0700",
5029 .rc_query = dib0700_rc_query_old_firmware,
5030 .allowed_protos = RC_BIT_RC5 |
5031 RC_BIT_RC6_MCE |
5032 RC_BIT_NEC,
5033 .change_protocol = dib0700_change_protocol,
5034 },
01373a5c 5035 },
b7f54910
PB		 5036};
5037
5038int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
Linux kernel - Deliverables
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