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[media] media: usb: em28xx: em28xx-core: don't print error when allocating urb fails
[deliverable/linux.git] / drivers / media / usb / em28xx / em28xx-core.c
CommitLineData
a6c2ba28 1/*
3acf2809 2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
f7abcd38
MCC		 4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
f7abcd38 7 Sascha Sommer <saschasommer@freenet.de>
6ddd89d0 8 Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
a6c2ba28 9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#include <linux/init.h>
5022a208 26#include <linux/jiffies.h>
a6c2ba28 27#include <linux/list.h>
28#include <linux/module.h>
5a0e3ad6 29#include <linux/slab.h>
a6c2ba28 30#include <linux/usb.h>
31#include <linux/vmalloc.h>
67b8d033 32#include <sound/ac97_codec.h>
1a23f81b 33#include <media/v4l2-common.h>
a6c2ba28 34
f7abcd38 35#include "em28xx.h"
a6c2ba28 36
01c28193
MCC		 37#define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \
38 "Markus Rechberger <mrechberger@gmail.com>, " \
39 "Mauro Carvalho Chehab <mchehab@infradead.org>, " \
40 "Sascha Sommer <saschasommer@freenet.de>"
41
01c28193
MCC		 42MODULE_AUTHOR(DRIVER_AUTHOR);
43MODULE_DESCRIPTION(DRIVER_DESC);
44MODULE_LICENSE("GPL");
45MODULE_VERSION(EM28XX_VERSION);
46
a6c2ba28 47/* #define ENABLE_DEBUG_ISOC_FRAMES */
48
ff699e6b 49static unsigned int core_debug;
a1a6ee74
NS		 50module_param(core_debug, int, 0644);
51MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
a6c2ba28 52
3acf2809 53#define em28xx_coredbg(fmt, arg...) do {\
4ac97914
MCC		 54 if (core_debug) \
55 printk(KERN_INFO "%s %s :"fmt, \
d80e134d 56 dev->name, __func__ , ##arg); } while (0)
a6c2ba28 57
ff699e6b 58static unsigned int reg_debug;
a1a6ee74
NS		 59module_param(reg_debug, int, 0644);
60MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
a6c2ba28 61
3acf2809 62#define em28xx_regdbg(fmt, arg...) do {\
4ac97914
MCC		 63 if (reg_debug) \
64 printk(KERN_INFO "%s %s :"fmt, \
d80e134d 65 dev->name, __func__ , ##arg); } while (0)
a6c2ba28 66
579f72e4
AT		 67/* FIXME */
68#define em28xx_isocdbg(fmt, arg...) do {\
69 if (core_debug) \
70 printk(KERN_INFO "%s %s :"fmt, \
71 dev->name, __func__ , ##arg); } while (0)
72
a6c2ba28 73/*
3acf2809 74 * em28xx_read_reg_req()
a6c2ba28 75 * reads data from the usb device specifying bRequest
76 */
3acf2809 77int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
fdf1bc9f 78 char *buf, int len)
a6c2ba28 79{
9e5d6760
MCC		 80 int ret;
81 int pipe = usb_rcvctrlpipe(dev->udev, 0);
a6c2ba28 82
2665c299 83 if (dev->disconnected)
c4a98793
MCC		 84 return -ENODEV;
85
86 if (len > URB_MAX_CTRL_SIZE)
87 return -EINVAL;
9f38724a 88
9e5d6760 89 if (reg_debug) {
a1a6ee74 90 printk(KERN_DEBUG "(pipe 0x%08x): "
9e5d6760
MCC		 91 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
92 pipe,
93 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
94 req, 0, 0,
95 reg & 0xff, reg >> 8,
96 len & 0xff, len >> 8);
97 }
a6c2ba28 98
f2a2e491 99 mutex_lock(&dev->ctrl_urb_lock);
9e5d6760 100 ret = usb_control_msg(dev->udev, pipe, req,
a6c2ba28 101 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
c4a98793
MCC		 102 0x0000, reg, dev->urb_buf, len, HZ);
103 if (ret < 0) {
104 if (reg_debug)
105 printk(" failed!\n");
f2a2e491 106 mutex_unlock(&dev->ctrl_urb_lock);
45f04e82 107 return usb_translate_errors(ret);
c4a98793
MCC		 108 }
109
110 if (len)
111 memcpy(buf, dev->urb_buf, len);
a6c2ba28 112
f2a2e491
MCC		 113 mutex_unlock(&dev->ctrl_urb_lock);
114
6ea54d93 115 if (reg_debug) {
9e5d6760
MCC		 116 int byte;
117
118 printk("<<<");
6ea54d93 119 for (byte = 0; byte < len; byte++)
82ac4f87 120 printk(" %02x", (unsigned char)buf[byte]);
82ac4f87 121 printk("\n");
a6c2ba28 122 }
123
124 return ret;
125}
126
127/*
3acf2809 128 * em28xx_read_reg_req()
a6c2ba28 129 * reads data from the usb device specifying bRequest
130 */
3acf2809 131int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
a6c2ba28 132{
a6c2ba28 133 int ret;
9e5d6760 134 u8 val;
a6c2ba28 135
9e5d6760
MCC		 136 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
137 if (ret < 0)
c4a98793 138 return ret;
a6c2ba28 139
140 return val;
141}
142
3acf2809 143int em28xx_read_reg(struct em28xx *dev, u16 reg)
a6c2ba28 144{
3acf2809 145 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
a6c2ba28 146}
37e65dce 147EXPORT_SYMBOL_GPL(em28xx_read_reg);
a6c2ba28 148
149/*
3acf2809 150 * em28xx_write_regs_req()
a6c2ba28 151 * sends data to the usb device, specifying bRequest
152 */
3acf2809 153int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
fdf1bc9f 154 int len)
a6c2ba28 155{
156 int ret;
9e5d6760 157 int pipe = usb_sndctrlpipe(dev->udev, 0);
a6c2ba28 158
2665c299 159 if (dev->disconnected)
c67ec53f
MCC		 160 return -ENODEV;
161
c4a98793 162 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
c67ec53f 163 return -EINVAL;
9f38724a 164
a6c2ba28 165 if (reg_debug) {
9e5d6760
MCC		 166 int byte;
167
a1a6ee74 168 printk(KERN_DEBUG "(pipe 0x%08x): "
9e5d6760
MCC		 169 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
170 pipe,
171 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
172 req, 0, 0,
173 reg & 0xff, reg >> 8,
174 len & 0xff, len >> 8);
175
176 for (byte = 0; byte < len; byte++)
177 printk(" %02x", (unsigned char)buf[byte]);
82ac4f87 178 printk("\n");
a6c2ba28 179 }
180
f2a2e491 181 mutex_lock(&dev->ctrl_urb_lock);
c4a98793 182 memcpy(dev->urb_buf, buf, len);
9e5d6760 183 ret = usb_control_msg(dev->udev, pipe, req,
a6c2ba28 184 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
c4a98793 185 0x0000, reg, dev->urb_buf, len, HZ);
f2a2e491 186 mutex_unlock(&dev->ctrl_urb_lock);
c4a98793 187
45f04e82
FS		 188 if (ret < 0)
189 return usb_translate_errors(ret);
190
89b329ef
MCC		 191 if (dev->wait_after_write)
192 msleep(dev->wait_after_write);
193
a6c2ba28 194 return ret;
195}
196
3acf2809 197int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
a6c2ba28 198{
6914d70e 199 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
a6c2ba28 200}
37e65dce 201EXPORT_SYMBOL_GPL(em28xx_write_regs);
a6c2ba28 202
b6972489
DH		 203/* Write a single register */
204int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
205{
206 return em28xx_write_regs(dev, reg, &val, 1);
207}
fec528b7 208EXPORT_SYMBOL_GPL(em28xx_write_reg);
b6972489 209
a6c2ba28 210/*
3acf2809 211 * em28xx_write_reg_bits()
a6c2ba28 212 * sets only some bits (specified by bitmask) of a register, by first reading
213 * the actual value
214 */
1bad429e 215int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
fdf1bc9f 216 u8 bitmask)
a6c2ba28 217{
218 int oldval;
219 u8 newval;
6ea54d93 220
6914d70e 221 oldval = em28xx_read_reg(dev, reg);
6ea54d93 222 if (oldval < 0)
a6c2ba28 223 return oldval;
6ea54d93 224
fdf1bc9f 225 newval = (((u8)oldval) & ~bitmask) | (val & bitmask);
c67ec53f 226
3acf2809 227 return em28xx_write_regs(dev, reg, &newval, 1);
a6c2ba28 228}
37e65dce 229EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
a6c2ba28 230
6063d077
FS		 231/*
232 * em28xx_toggle_reg_bits()
233 * toggles/inverts the bits (specified by bitmask) of a register
234 */
235int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask)
236{
237 int oldval;
238 u8 newval;
239
240 oldval = em28xx_read_reg(dev, reg);
241 if (oldval < 0)
242 return oldval;
243
244 newval = (~oldval & bitmask) | (oldval & ~bitmask);
245
246 return em28xx_write_reg(dev, reg, newval);
247}
248EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits);
249
35643943
MCC		 250/*
251 * em28xx_is_ac97_ready()
252 * Checks if ac97 is ready
253 */
254static int em28xx_is_ac97_ready(struct em28xx *dev)
255{
5022a208
MCC		 256 unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT);
257 int ret;
35643943
MCC		 258
259 /* Wait up to 50 ms for AC97 command to complete */
5022a208 260 while (time_is_after_jiffies(timeout)) {
35643943
MCC		 261 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
262 if (ret < 0)
263 return ret;
264
265 if (!(ret & 0x01))
266 return 0;
5022a208 267 msleep(5);
35643943
MCC		 268 }
269
270 em28xx_warn("AC97 command still being executed: not handled properly!\n");
271 return -EBUSY;
272}
273
274/*
275 * em28xx_read_ac97()
276 * write a 16 bit value to the specified AC97 address (LSB first!)
277 */
531c98e7 278int em28xx_read_ac97(struct em28xx *dev, u8 reg)
35643943
MCC		 279{
280 int ret;
281 u8 addr = (reg & 0x7f) | 0x80;
4a9e512a 282 __le16 val;
35643943
MCC		 283
284 ret = em28xx_is_ac97_ready(dev);
285 if (ret < 0)
286 return ret;
287
288 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
289 if (ret < 0)
290 return ret;
291
292 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
293 (u8 *)&val, sizeof(val));
294
295 if (ret < 0)
296 return ret;
297 return le16_to_cpu(val);
298}
850d24a5 299EXPORT_SYMBOL_GPL(em28xx_read_ac97);
35643943 300
a6c2ba28 301/*
3acf2809 302 * em28xx_write_ac97()
a6c2ba28 303 * write a 16 bit value to the specified AC97 address (LSB first!)
304 */
531c98e7 305int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
a6c2ba28 306{
35643943 307 int ret;
a6c2ba28 308 u8 addr = reg & 0x7f;
35643943
MCC		 309 __le16 value;
310
311 value = cpu_to_le16(val);
312
313 ret = em28xx_is_ac97_ready(dev);
314 if (ret < 0)
315 return ret;
6ea54d93 316
fdf1bc9f 317 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2);
6ea54d93 318 if (ret < 0)
a6c2ba28 319 return ret;
6ea54d93 320
41facaa4 321 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
6ea54d93 322 if (ret < 0)
a6c2ba28 323 return ret;
00b8730f 324
35643943
MCC		 325 return 0;
326}
850d24a5 327EXPORT_SYMBOL_GPL(em28xx_write_ac97);
6ea54d93 328
0f8a61fc 329struct em28xx_vol_itable {
e879b8eb 330 enum em28xx_amux mux;
5faff789
MCC		 331 u8 reg;
332};
333
0f8a61fc 334static struct em28xx_vol_itable inputs[] = {
67b8d033
EG		 335 { EM28XX_AMUX_VIDEO, AC97_VIDEO },
336 { EM28XX_AMUX_LINE_IN, AC97_LINE },
337 { EM28XX_AMUX_PHONE, AC97_PHONE },
338 { EM28XX_AMUX_MIC, AC97_MIC },
339 { EM28XX_AMUX_CD, AC97_CD },
340 { EM28XX_AMUX_AUX, AC97_AUX },
341 { EM28XX_AMUX_PCM_OUT, AC97_PCM },
5faff789
MCC		 342};
343
344static int set_ac97_input(struct em28xx *dev)
35643943 345{
5faff789
MCC		 346 int ret, i;
347 enum em28xx_amux amux = dev->ctl_ainput;
35643943 348
5faff789
MCC		 349 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
350 em28xx should point to LINE IN, while AC97 should use VIDEO
351 */
352 if (amux == EM28XX_AMUX_VIDEO2)
f1990a9c 353 amux = EM28XX_AMUX_VIDEO;
35643943 354
5faff789
MCC		 355 /* Mute all entres but the one that were selected */
356 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
e879b8eb 357 if (amux == inputs[i].mux)
5faff789
MCC		 358 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
359 else
360 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
35643943 361
5faff789
MCC		 362 if (ret < 0)
363 em28xx_warn("couldn't setup AC97 register %d\n",
fdf1bc9f 364 inputs[i].reg);
5faff789
MCC		 365 }
366 return 0;
a6c2ba28 367}
368
00b8730f 369static int em28xx_set_audio_source(struct em28xx *dev)
539c96d0 370{
1685a6fe 371 int ret;
539c96d0
MCC		 372 u8 input;
373
505b6d0b 374 if (dev->board.is_em2800) {
5faff789 375 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
539c96d0 376 input = EM2800_AUDIO_SRC_TUNER;
5faff789
MCC		 377 else
378 input = EM2800_AUDIO_SRC_LINE;
539c96d0 379
41facaa4 380 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
539c96d0
MCC		 381 if (ret < 0)
382 return ret;
383 }
384
505b6d0b 385 if (dev->board.has_msp34xx)
539c96d0
MCC		 386 input = EM28XX_AUDIO_SRC_TUNER;
387 else {
388 switch (dev->ctl_ainput) {
389 case EM28XX_AMUX_VIDEO:
390 input = EM28XX_AUDIO_SRC_TUNER;
539c96d0 391 break;
35643943 392 default:
539c96d0 393 input = EM28XX_AUDIO_SRC_LINE;
539c96d0
MCC		 394 break;
395 }
396 }
397
2bd1d9eb
VW		 398 if (dev->board.mute_gpio && dev->mute)
399 em28xx_gpio_set(dev, dev->board.mute_gpio);
400 else
401 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
402
41facaa4 403 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
539c96d0
MCC		 404 if (ret < 0)
405 return ret;
00b8730f 406 msleep(5);
539c96d0 407
35643943
MCC		 408 switch (dev->audio_mode.ac97) {
409 case EM28XX_NO_AC97:
410 break;
5faff789
MCC		 411 default:
412 ret = set_ac97_input(dev);
35643943 413 }
539c96d0 414
5faff789 415 return ret;
539c96d0
MCC		 416}
417
0f8a61fc
MCC		 418struct em28xx_vol_otable {
419 enum em28xx_aout mux;
420 u8 reg;
421};
422
423static const struct em28xx_vol_otable outputs[] = {
67b8d033
EG		 424 { EM28XX_AOUT_MASTER, AC97_MASTER },
425 { EM28XX_AOUT_LINE, AC97_HEADPHONE },
426 { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
427 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
428 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
35ae6f04
MCC		 429};
430
3acf2809 431int em28xx_audio_analog_set(struct em28xx *dev)
a6c2ba28 432{
35ae6f04 433 int ret, i;
a2070c66 434 u8 xclk;
539c96d0 435
920f1e4a 436 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE)
35643943 437 return 0;
539c96d0 438
5faff789
MCC		 439 /* It is assumed that all devices use master volume for output.
440 It would be possible to use also line output.
441 */
35643943 442 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
35ae6f04
MCC		 443 /* Mute all outputs */
444 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
e879b8eb 445 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
35ae6f04
MCC		 446 if (ret < 0)
447 em28xx_warn("couldn't setup AC97 register %d\n",
fdf1bc9f 448 outputs[i].reg);
35ae6f04 449 }
35643943 450 }
539c96d0 451
505b6d0b 452 xclk = dev->board.xclk & 0x7f;
3abee53e 453 if (!dev->mute)
8ed06fd4 454 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
3abee53e 455
a2070c66 456 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
539c96d0
MCC		 457 if (ret < 0)
458 return ret;
3abee53e 459 msleep(10);
539c96d0
MCC		 460
461 /* Selects the proper audio input */
462 ret = em28xx_set_audio_source(dev);
a6c2ba28 463
35643943
MCC		 464 /* Sets volume */
465 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
466 int vol;
467
67b8d033
EG		 468 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
469 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
470 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
7e4b15e4 471
35643943
MCC		 472 /* LSB: left channel - both channels with the same level */
473 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
474
475 /* Mute device, if needed */
476 if (dev->mute)
477 vol |= 0x8000;
478
479 /* Sets volume */
e879b8eb
MCC		 480 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
481 if (dev->ctl_aoutput & outputs[i].mux)
482 ret = em28xx_write_ac97(dev, outputs[i].reg,
483 vol);
484 if (ret < 0)
485 em28xx_warn("couldn't setup AC97 register %d\n",
fdf1bc9f 486 outputs[i].reg);
e879b8eb 487 }
8866f9cf
MCC		 488
489 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
490 int sel = ac97_return_record_select(dev->ctl_aoutput);
491
a1a6ee74
NS		 492 /* Use the same input for both left and right
493 channels */
8866f9cf
MCC		 494 sel |= (sel << 8);
495
67b8d033 496 em28xx_write_ac97(dev, AC97_REC_SEL, sel);
8866f9cf 497 }
35643943 498 }
00b8730f 499
539c96d0
MCC		 500 return ret;
501}
502EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
a6c2ba28 503
35643943
MCC		 504int em28xx_audio_setup(struct em28xx *dev)
505{
506 int vid1, vid2, feat, cfg;
430e3572 507 u32 vid = 0;
60a24ba0 508 u8 i2s_samplerates;
35643943 509
fb91bde9
FS		 510 if (dev->chip_id == CHIP_ID_EM2870 ||
511 dev->chip_id == CHIP_ID_EM2874 ||
512 dev->chip_id == CHIP_ID_EM28174 ||
513 dev->chip_id == CHIP_ID_EM28178) {
514 /* Digital only device - don't load any alsa module */
920f1e4a 515 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
c5874208 516 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
35643943 517 return 0;
fb91bde9
FS		 518 }
519
35643943
MCC		 520 /* See how this device is configured */
521 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
1cdc6392 522 em28xx_info("Config register raw data: 0x%02x\n", cfg);
43c3ea31
FS		 523 if (cfg < 0) { /* Register read error */
524 /* Be conservative */
920f1e4a 525 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
1cdc6392
DH		 526 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
527 /* The device doesn't have vendor audio at all */
920f1e4a 528 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
c5874208 529 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
1cdc6392 530 return 0;
687ff8b0 531 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
920f1e4a 532 dev->int_audio_type = EM28XX_INT_AUDIO_I2S;
687ff8b0 533 if (dev->chip_id < CHIP_ID_EM2860 &&
fdf1bc9f 534 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
687ff8b0 535 EM2820_CHIPCFG_I2S_1_SAMPRATE)
60a24ba0 536 i2s_samplerates = 1;
687ff8b0
FS		 537 else if (dev->chip_id >= CHIP_ID_EM2860 &&
538 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
539 EM2860_CHIPCFG_I2S_5_SAMPRATES)
60a24ba0 540 i2s_samplerates = 5;
687ff8b0 541 else
60a24ba0 542 i2s_samplerates = 3;
687ff8b0 543 em28xx_info("I2S Audio (%d sample rate(s))\n",
fdf1bc9f 544 i2s_samplerates);
de84830e 545 /* Skip the code that does AC97 vendor detection */
35643943
MCC		 546 dev->audio_mode.ac97 = EM28XX_NO_AC97;
547 goto init_audio;
920f1e4a
FS		 548 } else {
549 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
35643943
MCC		 550 }
551
552 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
553
554 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
555 if (vid1 < 0) {
0731160a
MCC		 556 /*
557 * Device likely doesn't support AC97
558 * Note: (some) em2800 devices without eeprom reports 0x91 on
559 * CHIPCFG register, even not having an AC97 chip
560 */
35643943 561 em28xx_warn("AC97 chip type couldn't be determined\n");
0731160a 562 dev->audio_mode.ac97 = EM28XX_NO_AC97;
c5874208
FS		 563 if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
564 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
920f1e4a 565 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
35643943
MCC		 566 goto init_audio;
567 }
568
569 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
570 if (vid2 < 0)
571 goto init_audio;
572
16c7bcad 573 vid = vid1 << 16 | vid2;
16c7bcad 574 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
35643943
MCC		 575
576 feat = em28xx_read_ac97(dev, AC97_RESET);
577 if (feat < 0)
578 goto init_audio;
579
35643943
MCC		 580 em28xx_warn("AC97 features = 0x%04x\n", feat);
581
16c7bcad 582 /* Try to identify what audio processor we have */
2a5fc873 583 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
35643943 584 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
209acc02
MCC		 585 else if ((vid >> 8) == 0x838476)
586 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
35643943
MCC		 587
588init_audio:
589 /* Reports detected AC97 processor */
590 switch (dev->audio_mode.ac97) {
591 case EM28XX_NO_AC97:
592 em28xx_info("No AC97 audio processor\n");
593 break;
594 case EM28XX_AC97_EM202:
595 em28xx_info("Empia 202 AC97 audio processor detected\n");
596 break;
209acc02 597 case EM28XX_AC97_SIGMATEL:
60a24ba0
FS		 598 em28xx_info("Sigmatel audio processor detected (stac 97%02x)\n",
599 vid & 0xff);
209acc02 600 break;
35643943
MCC		 601 case EM28XX_AC97_OTHER:
602 em28xx_warn("Unknown AC97 audio processor detected!\n");
603 break;
604 default:
605 break;
606 }
607
608 return em28xx_audio_analog_set(dev);
609}
610EXPORT_SYMBOL_GPL(em28xx_audio_setup);
611
6b8a3170
FS		 612const struct em28xx_led *em28xx_find_led(struct em28xx *dev,
613 enum em28xx_led_role role)
614{
615 if (dev->board.leds) {
616 u8 k = 0;
fdf1bc9f 617
6b8a3170 618 while (dev->board.leds[k].role >= 0 &&
fdf1bc9f 619 dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) {
6b8a3170
FS		 620 if (dev->board.leds[k].role == role)
621 return &dev->board.leds[k];
622 k++;
623 }
624 }
625 return NULL;
626}
627EXPORT_SYMBOL_GPL(em28xx_find_led);
628
3acf2809 629int em28xx_capture_start(struct em28xx *dev, int start)
a6c2ba28 630{
ee6e3a86 631 int rc;
54e92549 632 const struct em28xx_led *led = NULL;
ebef13d4 633
fec528b7
MCC		 634 if (dev->chip_id == CHIP_ID_EM2874 ||
635 dev->chip_id == CHIP_ID_EM2884 ||
9f1d0bda
AP		 636 dev->chip_id == CHIP_ID_EM28174 ||
637 dev->chip_id == CHIP_ID_EM28178) {
ebef13d4 638 /* The Transport Stream Enable Register moved in em2874 */
ebef13d4 639 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
07e4de30
FS		 640 start ?
641 EM2874_TS1_CAPTURE_ENABLE : 0x00,
ebef13d4 642 EM2874_TS1_CAPTURE_ENABLE);
07e4de30
FS		 643 } else {
644 /* FIXME: which is the best order? */
645 /* video registers are sampled by VREF */
646 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
647 start ? 0x10 : 0x00, 0x10);
648 if (rc < 0)
649 return rc;
ebef13d4 650
07e4de30
FS		 651 if (start) {
652 if (dev->board.is_webcam)
653 rc = em28xx_write_reg(dev, 0x13, 0x0c);
ebef13d4 654
07e4de30
FS		 655 /* Enable video capture */
656 rc = em28xx_write_reg(dev, 0x48, 0x00);
54e92549
MCC		 657 if (rc < 0)
658 return rc;
ee6e3a86 659
07e4de30
FS		 660 if (dev->mode == EM28XX_ANALOG_MODE)
661 rc = em28xx_write_reg(dev,
fdf1bc9f
MCC		 662 EM28XX_R12_VINENABLE,
663 0x67);
07e4de30
FS		 664 else
665 rc = em28xx_write_reg(dev,
fdf1bc9f
MCC		 666 EM28XX_R12_VINENABLE,
667 0x37);
54e92549
MCC		 668 if (rc < 0)
669 return rc;
d7612c86 670
07e4de30
FS		 671 msleep(6);
672 } else {
673 /* disable video capture */
674 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
675 }
676 }
102a0b08 677
54e92549 678 if (dev->mode == EM28XX_ANALOG_MODE)
6b8a3170 679 led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING);
54e92549
MCC		 680 else
681 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING);
682
683 if (led)
684 em28xx_write_reg_bits(dev, led->gpio_reg,
685 (!start ^ led->inverted) ?
686 ~led->gpio_mask : led->gpio_mask,
687 led->gpio_mask);
ee6e3a86
MCC		 688
689 return rc;
a6c2ba28 690}
691
c67ec53f
MCC		 692int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
693{
694 int rc = 0;
695
696 if (!gpio)
697 return rc;
698
2fe3e2ee
MCC		 699 if (dev->mode != EM28XX_SUSPEND) {
700 em28xx_write_reg(dev, 0x48, 0x00);
701 if (dev->mode == EM28XX_ANALOG_MODE)
702 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
703 else
704 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
705 msleep(6);
706 }
c67ec53f
MCC		 707
708 /* Send GPIO reset sequences specified at board entry */
709 while (gpio->sleep >= 0) {
710 if (gpio->reg >= 0) {
711 rc = em28xx_write_reg_bits(dev,
712 gpio->reg,
713 gpio->val,
714 gpio->mask);
715 if (rc < 0)
716 return rc;
717 }
718 if (gpio->sleep > 0)
719 msleep(gpio->sleep);
720
721 gpio++;
722 }
723 return rc;
724}
fec528b7 725EXPORT_SYMBOL_GPL(em28xx_gpio_set);
c67ec53f
MCC		 726
727int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
728{
729 if (dev->mode == set_mode)
730 return 0;
731
2fe3e2ee 732 if (set_mode == EM28XX_SUSPEND) {
c67ec53f 733 dev->mode = set_mode;
2fe3e2ee
MCC		 734
735 /* FIXME: add suspend support for ac97 */
736
737 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
c67ec53f
MCC		 738 }
739
740 dev->mode = set_mode;
741
742 if (dev->mode == EM28XX_DIGITAL_MODE)
f502e861 743 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
c67ec53f 744 else
f502e861 745 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
c67ec53f
MCC		 746}
747EXPORT_SYMBOL_GPL(em28xx_set_mode);
748
579f72e4
AT		 749/* ------------------------------------------------------------------
750 URB control
751 ------------------------------------------------------------------*/
752
753/*
836e93bf 754 * URB completion handler for isoc/bulk transfers
579f72e4
AT		 755 */
756static void em28xx_irq_callback(struct urb *urb)
757{
da52a55c 758 struct em28xx *dev = urb->context;
00d2e7ad 759 int i;
579f72e4 760
aa5a1821
RK		 761 switch (urb->status) {
762 case 0: /* success */
763 case -ETIMEDOUT: /* NAK */
764 break;
765 case -ECONNRESET: /* kill */
766 case -ENOENT:
767 case -ESHUTDOWN:
768 return;
769 default: /* error */
770 em28xx_isocdbg("urb completition error %d.\n", urb->status);
771 break;
772 }
773
579f72e4
AT		 774 /* Copy data from URB */
775 spin_lock(&dev->slock);
74209dc0 776 dev->usb_ctl.urb_data_copy(dev, urb);
579f72e4
AT		 777 spin_unlock(&dev->slock);
778
779 /* Reset urb buffers */
780 for (i = 0; i < urb->number_of_packets; i++) {
836e93bf 781 /* isoc only (bulk: number_of_packets = 0) */
579f72e4
AT		 782 urb->iso_frame_desc[i].status = 0;
783 urb->iso_frame_desc[i].actual_length = 0;
784 }
785 urb->status = 0;
786
787 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
788 if (urb->status) {
4269a8ee
DH		 789 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
790 urb->status);
579f72e4
AT		 791 }
792}
793
794/*
795 * Stop and Deallocate URBs
796 */
afb177e0 797void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode)
579f72e4
AT		 798{
799 struct urb *urb;
afb177e0 800 struct em28xx_usb_bufs *usb_bufs;
579f72e4
AT		 801 int i;
802
afb177e0
FS		 803 em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n",
804 mode);
86d38d1e
GG		 805
806 if (mode == EM28XX_DIGITAL_MODE)
afb177e0 807 usb_bufs = &dev->usb_ctl.digital_bufs;
86d38d1e 808 else
afb177e0 809 usb_bufs = &dev->usb_ctl.analog_bufs;
579f72e4 810
afb177e0
FS		 811 for (i = 0; i < usb_bufs->num_bufs; i++) {
812 urb = usb_bufs->urb[i];
579f72e4 813 if (urb) {
9c06210b
RK		 814 if (!irqs_disabled())
815 usb_kill_urb(urb);
816 else
817 usb_unlink_urb(urb);
818
afb177e0 819 if (usb_bufs->transfer_buffer[i]) {
997ea58e 820 usb_free_coherent(dev->udev,
fdf1bc9f
MCC		 821 urb->transfer_buffer_length,
822 usb_bufs->transfer_buffer[i],
823 urb->transfer_dma);
579f72e4
AT		 824 }
825 usb_free_urb(urb);
afb177e0 826 usb_bufs->urb[i] = NULL;
579f72e4 827 }
afb177e0 828 usb_bufs->transfer_buffer[i] = NULL;
579f72e4
AT		 829 }
830
afb177e0
FS		 831 kfree(usb_bufs->urb);
832 kfree(usb_bufs->transfer_buffer);
579f72e4 833
afb177e0
FS		 834 usb_bufs->urb = NULL;
835 usb_bufs->transfer_buffer = NULL;
836 usb_bufs->num_bufs = 0;
579f72e4
AT		 837
838 em28xx_capture_start(dev, 0);
839}
afb177e0 840EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer);
579f72e4 841
5f5f147f
GG		 842/*
843 * Stop URBs
844 */
845void em28xx_stop_urbs(struct em28xx *dev)
846{
847 int i;
848 struct urb *urb;
74209dc0 849 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs;
5f5f147f
GG		 850
851 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");
852
853 for (i = 0; i < isoc_bufs->num_bufs; i++) {
854 urb = isoc_bufs->urb[i];
855 if (urb) {
856 if (!irqs_disabled())
857 usb_kill_urb(urb);
858 else
859 usb_unlink_urb(urb);
860 }
861 }
862
863 em28xx_capture_start(dev, 0);
864}
865EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
866
579f72e4 867/*
86d38d1e 868 * Allocate URBs
579f72e4 869 */
6ddd89d0
FS		 870int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
871 int num_bufs, int max_pkt_size, int packet_multiplier)
579f72e4 872{
6ddd89d0 873 struct em28xx_usb_bufs *usb_bufs;
579f72e4
AT		 874 int i;
875 int sb_size, pipe;
876 struct urb *urb;
877 int j, k;
579f72e4 878
86d38d1e
GG		 879 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
880
c647a91a
FS		 881 /* Check mode and if we have an endpoint for the selected
882 transfer type, select buffer */
883 if (mode == EM28XX_DIGITAL_MODE) {
884 if ((xfer_bulk && !dev->dvb_ep_bulk) ||
885 (!xfer_bulk && !dev->dvb_ep_isoc)) {
886 em28xx_errdev("no endpoint for DVB mode and transfer type %d\n",
887 xfer_bulk > 0);
888 return -EINVAL;
889 }
6ddd89d0 890 usb_bufs = &dev->usb_ctl.digital_bufs;
c647a91a
FS		 891 } else if (mode == EM28XX_ANALOG_MODE) {
892 if ((xfer_bulk && !dev->analog_ep_bulk) ||
893 (!xfer_bulk && !dev->analog_ep_isoc)) {
894 em28xx_errdev("no endpoint for analog mode and transfer type %d\n",
fdf1bc9f 895 xfer_bulk > 0);
c647a91a
FS		 896 return -EINVAL;
897 }
6ddd89d0 898 usb_bufs = &dev->usb_ctl.analog_bufs;
c647a91a
FS		 899 } else {
900 em28xx_errdev("invalid mode selected\n");
901 return -EINVAL;
902 }
579f72e4
AT		 903
904 /* De-allocates all pending stuff */
afb177e0 905 em28xx_uninit_usb_xfer(dev, mode);
579f72e4 906
6ddd89d0 907 usb_bufs->num_bufs = num_bufs;
579f72e4 908
6ddd89d0
FS		 909 usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
910 if (!usb_bufs->urb) {
579f72e4
AT		 911 em28xx_errdev("cannot alloc memory for usb buffers\n");
912 return -ENOMEM;
913 }
914
6ddd89d0 915 usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
86d38d1e 916 GFP_KERNEL);
6ddd89d0 917 if (!usb_bufs->transfer_buffer) {
42ef4632 918 em28xx_errdev("cannot allocate memory for usb transfer\n");
6ddd89d0 919 kfree(usb_bufs->urb);
579f72e4
AT		 920 return -ENOMEM;
921 }
922
6ddd89d0
FS		 923 usb_bufs->max_pkt_size = max_pkt_size;
924 if (xfer_bulk)
925 usb_bufs->num_packets = 0;
926 else
927 usb_bufs->num_packets = packet_multiplier;
74209dc0
FS		 928 dev->usb_ctl.vid_buf = NULL;
929 dev->usb_ctl.vbi_buf = NULL;
579f72e4 930
6ddd89d0 931 sb_size = packet_multiplier * usb_bufs->max_pkt_size;
579f72e4
AT		 932
933 /* allocate urbs and transfer buffers */
6ddd89d0
FS		 934 for (i = 0; i < usb_bufs->num_bufs; i++) {
935 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL);
579f72e4 936 if (!urb) {
afb177e0 937 em28xx_uninit_usb_xfer(dev, mode);
579f72e4
AT		 938 return -ENOMEM;
939 }
6ddd89d0 940 usb_bufs->urb[i] = urb;
579f72e4 941
6ddd89d0 942 usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev,
579f72e4 943 sb_size, GFP_KERNEL, &urb->transfer_dma);
6ddd89d0 944 if (!usb_bufs->transfer_buffer[i]) {
579f72e4
AT		 945 em28xx_err("unable to allocate %i bytes for transfer"
946 " buffer %i%s\n",
947 sb_size, i,
a1a6ee74 948 in_interrupt() ? " while in int" : "");
afb177e0 949 em28xx_uninit_usb_xfer(dev, mode);
579f72e4
AT		 950 return -ENOMEM;
951 }
6ddd89d0
FS		 952 memset(usb_bufs->transfer_buffer[i], 0, sb_size);
953
954 if (xfer_bulk) { /* bulk */
955 pipe = usb_rcvbulkpipe(dev->udev,
956 mode == EM28XX_ANALOG_MODE ?
c647a91a
FS		 957 dev->analog_ep_bulk :
958 dev->dvb_ep_bulk);
6ddd89d0
FS		 959 usb_fill_bulk_urb(urb, dev->udev, pipe,
960 usb_bufs->transfer_buffer[i], sb_size,
961 em28xx_irq_callback, dev);
962 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
963 } else { /* isoc */
964 pipe = usb_rcvisocpipe(dev->udev,
965 mode == EM28XX_ANALOG_MODE ?
c647a91a
FS		 966 dev->analog_ep_isoc :
967 dev->dvb_ep_isoc);
6ddd89d0
FS		 968 usb_fill_int_urb(urb, dev->udev, pipe,
969 usb_bufs->transfer_buffer[i], sb_size,
970 em28xx_irq_callback, dev, 1);
971 urb->transfer_flags = URB_ISO_ASAP |
972 URB_NO_TRANSFER_DMA_MAP;
973 k = 0;
974 for (j = 0; j < usb_bufs->num_packets; j++) {
975 urb->iso_frame_desc[j].offset = k;
976 urb->iso_frame_desc[j].length =
977 usb_bufs->max_pkt_size;
978 k += usb_bufs->max_pkt_size;
979 }
579f72e4 980 }
6ddd89d0
FS		 981
982 urb->number_of_packets = usb_bufs->num_packets;
579f72e4
AT		 983 }
984
86d38d1e
GG		 985 return 0;
986}
6ddd89d0 987EXPORT_SYMBOL_GPL(em28xx_alloc_urbs);
86d38d1e
GG		 988
989/*
990 * Allocate URBs and start IRQ
991 */
057ca0da 992int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
fdf1bc9f 993 int xfer_bulk, int num_bufs, int max_pkt_size,
057ca0da 994 int packet_multiplier,
fdf1bc9f 995 int (*urb_data_copy)(struct em28xx *dev, struct urb *urb))
86d38d1e
GG		 996{
997 struct em28xx_dmaqueue *dma_q = &dev->vidq;
998 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
057ca0da 999 struct em28xx_usb_bufs *usb_bufs;
86d38d1e
GG		 1000 int i;
1001 int rc;
1002 int alloc;
1003
057ca0da
FS		 1004 em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n",
1005 mode);
86d38d1e 1006
057ca0da 1007 dev->usb_ctl.urb_data_copy = urb_data_copy;
86d38d1e
GG		 1008
1009 if (mode == EM28XX_DIGITAL_MODE) {
057ca0da
FS		 1010 usb_bufs = &dev->usb_ctl.digital_bufs;
1011 /* no need to free/alloc usb buffers in digital mode */
86d38d1e
GG		 1012 alloc = 0;
1013 } else {
057ca0da 1014 usb_bufs = &dev->usb_ctl.analog_bufs;
86d38d1e
GG		 1015 alloc = 1;
1016 }
1017
1018 if (alloc) {
057ca0da
FS		 1019 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs,
1020 max_pkt_size, packet_multiplier);
86d38d1e
GG		 1021 if (rc)
1022 return rc;
1023 }
1024
337fe8da
FS		 1025 if (xfer_bulk) {
1026 rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe);
1027 if (rc < 0) {
1028 em28xx_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
1029 rc);
1030 em28xx_uninit_usb_xfer(dev, mode);
1031 return rc;
1032 }
1033 }
1034
579f72e4 1035 init_waitqueue_head(&dma_q->wq);
28abf083 1036 init_waitqueue_head(&vbi_dma_q->wq);
579f72e4 1037
c67ec53f 1038 em28xx_capture_start(dev, 1);
579f72e4
AT		 1039
1040 /* submit urbs and enables IRQ */
057ca0da
FS		 1041 for (i = 0; i < usb_bufs->num_bufs; i++) {
1042 rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC);
579f72e4
AT		 1043 if (rc) {
1044 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1045 rc);
afb177e0 1046 em28xx_uninit_usb_xfer(dev, mode);
579f72e4
AT		 1047 return rc;
1048 }
1049 }
1050
1051 return 0;
1052}
057ca0da 1053EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer);
1a23f81b 1054
1a23f81b
MCC		 1055/*
1056 * Device control list
1057 */
1058
1059static LIST_HEAD(em28xx_devlist);
1060static DEFINE_MUTEX(em28xx_devlist_mutex);
1061
1a23f81b
MCC		 1062/*
1063 * Extension interface
1064 */
1065
1066static LIST_HEAD(em28xx_extension_devlist);
1a23f81b
MCC		 1067
1068int em28xx_register_extension(struct em28xx_ops *ops)
1069{
1070 struct em28xx *dev = NULL;
1071
1072 mutex_lock(&em28xx_devlist_mutex);
1a23f81b
MCC		 1073 list_add_tail(&ops->next, &em28xx_extension_devlist);
1074 list_for_each_entry(dev, &em28xx_devlist, devlist) {
517521e4 1075 ops->init(dev);
1a23f81b 1076 }
1a23f81b 1077 mutex_unlock(&em28xx_devlist_mutex);
9634614f 1078 printk(KERN_INFO "em28xx: Registered (%s) extension\n", ops->name);
1a23f81b
MCC		 1079 return 0;
1080}
1081EXPORT_SYMBOL(em28xx_register_extension);
1082
1083void em28xx_unregister_extension(struct em28xx_ops *ops)
1084{
1085 struct em28xx *dev = NULL;
1086
1087 mutex_lock(&em28xx_devlist_mutex);
1088 list_for_each_entry(dev, &em28xx_devlist, devlist) {
517521e4 1089 ops->fini(dev);
1a23f81b 1090 }
1a23f81b 1091 list_del(&ops->next);
1a23f81b 1092 mutex_unlock(&em28xx_devlist_mutex);
76424a0a 1093 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1a23f81b
MCC		 1094}
1095EXPORT_SYMBOL(em28xx_unregister_extension);
1096
1097void em28xx_init_extension(struct em28xx *dev)
1098{
6c03e38b 1099 const struct em28xx_ops *ops = NULL;
1a23f81b 1100
5013318c 1101 mutex_lock(&em28xx_devlist_mutex);
6c03e38b
CR		 1102 list_add_tail(&dev->devlist, &em28xx_devlist);
1103 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1104 if (ops->init)
1105 ops->init(dev);
1a23f81b 1106 }
5013318c 1107 mutex_unlock(&em28xx_devlist_mutex);
1a23f81b
MCC		 1108}
1109
1110void em28xx_close_extension(struct em28xx *dev)
1111{
d7222e7d 1112 const struct em28xx_ops *ops = NULL;
1a23f81b 1113
5013318c 1114 mutex_lock(&em28xx_devlist_mutex);
d7222e7d
CR		 1115 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1116 if (ops->fini)
1117 ops->fini(dev);
1a23f81b 1118 }
d7222e7d 1119 list_del(&dev->devlist);
5013318c 1120 mutex_unlock(&em28xx_devlist_mutex);
1a23f81b 1121}
9c669b73
SK		 1122
1123int em28xx_suspend_extension(struct em28xx *dev)
1124{
1125 const struct em28xx_ops *ops = NULL;
1126
522adc7c 1127 em28xx_info("Suspending extensions\n");
9c669b73
SK		 1128 mutex_lock(&em28xx_devlist_mutex);
1129 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1130 if (ops->suspend)
1131 ops->suspend(dev);
1132 }
1133 mutex_unlock(&em28xx_devlist_mutex);
1134 return 0;
1135}
1136
1137int em28xx_resume_extension(struct em28xx *dev)
1138{
1139 const struct em28xx_ops *ops = NULL;
1140
522adc7c 1141 em28xx_info("Resuming extensions\n");
9c669b73
SK		 1142 mutex_lock(&em28xx_devlist_mutex);
1143 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1144 if (ops->resume)
1145 ops->resume(dev);
1146 }
1147 mutex_unlock(&em28xx_devlist_mutex);
1148 return 0;
1149}
Linux kernel - Deliverables
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