Commit | Line | Data |
---|---|---|
3aefb79a MCC |
1 | /* |
2 | DVB device driver for em28xx | |
3 | ||
fec528b7 | 4 | (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org> |
3aefb79a | 5 | |
bdfbf952 DH |
6 | (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com> |
7 | - Fixes for the driver to properly work with HVR-950 | |
4fd305b2 | 8 | - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick |
e14b3658 | 9 | - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600 |
bdfbf952 | 10 | |
3421b778 AT |
11 | (c) 2008 Aidan Thornton <makosoft@googlemail.com> |
12 | ||
a950e4a7 FS |
13 | (c) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> |
14 | ||
3421b778 | 15 | Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by: |
3aefb79a MCC |
16 | (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
17 | (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
18 | ||
19 | This program is free software; you can redistribute it and/or modify | |
20 | it under the terms of the GNU General Public License as published by | |
21 | the Free Software Foundation; either version 2 of the License. | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
3aefb79a MCC |
26 | #include <linux/usb.h> |
27 | ||
28 | #include "em28xx.h" | |
29 | #include <media/v4l2-common.h> | |
d3829fad DH |
30 | #include <dvb_demux.h> |
31 | #include <dvb_net.h> | |
32 | #include <dmxdev.h> | |
d7de5d8f FM |
33 | #include <media/tuner.h> |
34 | #include "tuner-simple.h" | |
1e8f31f3 | 35 | #include <linux/gpio.h> |
3aefb79a MCC |
36 | |
37 | #include "lgdt330x.h" | |
7e48b30a | 38 | #include "lgdt3305.h" |
7e6388a1 | 39 | #include "zl10353.h" |
6e7b9ea0 | 40 | #include "s5h1409.h" |
4fb202a8 DH |
41 | #include "mt352.h" |
42 | #include "mt352_priv.h" /* FIXME */ | |
285eb1a4 | 43 | #include "tda1002x.h" |
7e48b30a | 44 | #include "tda18271.h" |
ca3dfd6a | 45 | #include "s921.h" |
75e2b869 | 46 | #include "drxd.h" |
d6a5f921 | 47 | #include "cxd2820r.h" |
fec528b7 MCC |
48 | #include "tda18271c2dd.h" |
49 | #include "drxk.h" | |
36588715 AP |
50 | #include "tda10071.h" |
51 | #include "a8293.h" | |
1985f6fb | 52 | #include "qt1010.h" |
4159d01b | 53 | #include "mb86a20s.h" |
3aefb79a MCC |
54 | |
55 | MODULE_DESCRIPTION("driver for em28xx based DVB cards"); | |
56 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | |
57 | MODULE_LICENSE("GPL"); | |
58 | ||
59 | static unsigned int debug; | |
60 | module_param(debug, int, 0644); | |
61 | MODULE_PARM_DESC(debug, "enable debug messages [dvb]"); | |
62 | ||
63 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |
64 | ||
65 | #define dprintk(level, fmt, arg...) do { \ | |
66 | if (debug >= level) \ | |
3421b778 | 67 | printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \ |
3aefb79a MCC |
68 | } while (0) |
69 | ||
3421b778 | 70 | struct em28xx_dvb { |
f71095be | 71 | struct dvb_frontend *fe[2]; |
3421b778 AT |
72 | |
73 | /* feed count management */ | |
74 | struct mutex lock; | |
75 | int nfeeds; | |
76 | ||
77 | /* general boilerplate stuff */ | |
78 | struct dvb_adapter adapter; | |
79 | struct dvb_demux demux; | |
80 | struct dmxdev dmxdev; | |
81 | struct dmx_frontend fe_hw; | |
82 | struct dmx_frontend fe_mem; | |
83 | struct dvb_net net; | |
fec528b7 | 84 | |
c4c3a3d3 | 85 | /* Due to DRX-K - probably need changes */ |
fec528b7 MCC |
86 | int (*gate_ctrl)(struct dvb_frontend *, int); |
87 | struct semaphore pll_mutex; | |
c4c3a3d3 | 88 | bool dont_attach_fe1; |
13a5336e | 89 | int lna_gpio; |
3421b778 AT |
90 | }; |
91 | ||
92 | ||
93 | static inline void print_err_status(struct em28xx *dev, | |
94 | int packet, int status) | |
3aefb79a | 95 | { |
3421b778 | 96 | char *errmsg = "Unknown"; |
3aefb79a | 97 | |
3421b778 AT |
98 | switch (status) { |
99 | case -ENOENT: | |
100 | errmsg = "unlinked synchronuously"; | |
101 | break; | |
102 | case -ECONNRESET: | |
103 | errmsg = "unlinked asynchronuously"; | |
104 | break; | |
105 | case -ENOSR: | |
106 | errmsg = "Buffer error (overrun)"; | |
107 | break; | |
108 | case -EPIPE: | |
109 | errmsg = "Stalled (device not responding)"; | |
110 | break; | |
111 | case -EOVERFLOW: | |
112 | errmsg = "Babble (bad cable?)"; | |
113 | break; | |
114 | case -EPROTO: | |
115 | errmsg = "Bit-stuff error (bad cable?)"; | |
116 | break; | |
117 | case -EILSEQ: | |
118 | errmsg = "CRC/Timeout (could be anything)"; | |
119 | break; | |
120 | case -ETIME: | |
121 | errmsg = "Device does not respond"; | |
122 | break; | |
123 | } | |
124 | if (packet < 0) { | |
125 | dprintk(1, "URB status %d [%s].\n", status, errmsg); | |
126 | } else { | |
6ea54d93 DSL |
127 | dprintk(1, "URB packet %d, status %d [%s].\n", |
128 | packet, status, errmsg); | |
3421b778 AT |
129 | } |
130 | } | |
3aefb79a | 131 | |
a950e4a7 | 132 | static inline int em28xx_dvb_urb_data_copy(struct em28xx *dev, struct urb *urb) |
3421b778 | 133 | { |
a950e4a7 | 134 | int xfer_bulk, num_packets, i; |
3aefb79a | 135 | |
3421b778 AT |
136 | if (!dev) |
137 | return 0; | |
3aefb79a | 138 | |
2665c299 | 139 | if (dev->disconnected) |
3421b778 AT |
140 | return 0; |
141 | ||
1653cb0c | 142 | if (urb->status < 0) |
3421b778 | 143 | print_err_status(dev, -1, urb->status); |
3421b778 | 144 | |
a950e4a7 FS |
145 | xfer_bulk = usb_pipebulk(urb->pipe); |
146 | ||
147 | if (xfer_bulk) /* bulk */ | |
148 | num_packets = 1; | |
149 | else /* isoc */ | |
150 | num_packets = urb->number_of_packets; | |
151 | ||
152 | for (i = 0; i < num_packets; i++) { | |
153 | if (xfer_bulk) { | |
154 | if (urb->status < 0) { | |
155 | print_err_status(dev, i, urb->status); | |
156 | if (urb->status != -EPROTO) | |
157 | continue; | |
158 | } | |
159 | dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer, | |
160 | urb->actual_length); | |
161 | } else { | |
162 | if (urb->iso_frame_desc[i].status < 0) { | |
163 | print_err_status(dev, i, | |
164 | urb->iso_frame_desc[i].status); | |
165 | if (urb->iso_frame_desc[i].status != -EPROTO) | |
166 | continue; | |
167 | } | |
168 | dvb_dmx_swfilter(&dev->dvb->demux, | |
169 | urb->transfer_buffer + | |
170 | urb->iso_frame_desc[i].offset, | |
171 | urb->iso_frame_desc[i].actual_length); | |
3421b778 | 172 | } |
3421b778 AT |
173 | } |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
f2d0c1c6 | 178 | static int em28xx_start_streaming(struct em28xx_dvb *dvb) |
6ea54d93 | 179 | { |
c67ec53f | 180 | int rc; |
3de09fbb HV |
181 | struct em28xx_i2c_bus *i2c_bus = dvb->adapter.priv; |
182 | struct em28xx *dev = i2c_bus->dev; | |
c647a91a FS |
183 | int dvb_max_packet_size, packet_multiplier, dvb_alt; |
184 | ||
185 | if (dev->dvb_xfer_bulk) { | |
186 | if (!dev->dvb_ep_bulk) | |
187 | return -ENODEV; | |
188 | dvb_max_packet_size = 512; /* USB 2.0 spec */ | |
189 | packet_multiplier = EM28XX_DVB_BULK_PACKET_MULTIPLIER; | |
190 | dvb_alt = 0; | |
191 | } else { /* isoc */ | |
192 | if (!dev->dvb_ep_isoc) | |
193 | return -ENODEV; | |
194 | dvb_max_packet_size = dev->dvb_max_pkt_size_isoc; | |
195 | if (dvb_max_packet_size < 0) | |
196 | return dvb_max_packet_size; | |
197 | packet_multiplier = EM28XX_DVB_NUM_ISOC_PACKETS; | |
198 | dvb_alt = dev->dvb_alt_isoc; | |
199 | } | |
3421b778 | 200 | |
c647a91a | 201 | usb_set_interface(dev->udev, 0, dvb_alt); |
c67ec53f MCC |
202 | rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
203 | if (rc < 0) | |
204 | return rc; | |
3421b778 | 205 | |
86d38d1e | 206 | dprintk(1, "Using %d buffers each with %d x %d bytes\n", |
f7acc4bb | 207 | EM28XX_DVB_NUM_BUFS, |
c647a91a FS |
208 | packet_multiplier, |
209 | dvb_max_packet_size); | |
d18e2fda | 210 | |
c647a91a FS |
211 | return em28xx_init_usb_xfer(dev, EM28XX_DIGITAL_MODE, |
212 | dev->dvb_xfer_bulk, | |
057ca0da | 213 | EM28XX_DVB_NUM_BUFS, |
c647a91a FS |
214 | dvb_max_packet_size, |
215 | packet_multiplier, | |
a950e4a7 | 216 | em28xx_dvb_urb_data_copy); |
3421b778 AT |
217 | } |
218 | ||
f2d0c1c6 | 219 | static int em28xx_stop_streaming(struct em28xx_dvb *dvb) |
6ea54d93 | 220 | { |
3de09fbb HV |
221 | struct em28xx_i2c_bus *i2c_bus = dvb->adapter.priv; |
222 | struct em28xx *dev = i2c_bus->dev; | |
3421b778 | 223 | |
5f5f147f | 224 | em28xx_stop_urbs(dev); |
c67ec53f | 225 | |
3aefb79a MCC |
226 | return 0; |
227 | } | |
228 | ||
f2d0c1c6 | 229 | static int em28xx_start_feed(struct dvb_demux_feed *feed) |
3421b778 AT |
230 | { |
231 | struct dvb_demux *demux = feed->demux; | |
232 | struct em28xx_dvb *dvb = demux->priv; | |
233 | int rc, ret; | |
234 | ||
235 | if (!demux->dmx.frontend) | |
236 | return -EINVAL; | |
237 | ||
238 | mutex_lock(&dvb->lock); | |
239 | dvb->nfeeds++; | |
240 | rc = dvb->nfeeds; | |
241 | ||
242 | if (dvb->nfeeds == 1) { | |
f2d0c1c6 | 243 | ret = em28xx_start_streaming(dvb); |
6ea54d93 DSL |
244 | if (ret < 0) |
245 | rc = ret; | |
3421b778 AT |
246 | } |
247 | ||
248 | mutex_unlock(&dvb->lock); | |
249 | return rc; | |
250 | } | |
251 | ||
f2d0c1c6 | 252 | static int em28xx_stop_feed(struct dvb_demux_feed *feed) |
3421b778 AT |
253 | { |
254 | struct dvb_demux *demux = feed->demux; | |
255 | struct em28xx_dvb *dvb = demux->priv; | |
256 | int err = 0; | |
257 | ||
258 | mutex_lock(&dvb->lock); | |
259 | dvb->nfeeds--; | |
6ea54d93 DSL |
260 | |
261 | if (0 == dvb->nfeeds) | |
f2d0c1c6 | 262 | err = em28xx_stop_streaming(dvb); |
6ea54d93 | 263 | |
3421b778 AT |
264 | mutex_unlock(&dvb->lock); |
265 | return err; | |
266 | } | |
267 | ||
268 | ||
e3569abc MCC |
269 | |
270 | /* ------------------------------------------------------------------ */ | |
271 | static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire) | |
272 | { | |
273 | struct em28xx *dev = fe->dvb->priv; | |
274 | ||
275 | if (acquire) | |
276 | return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); | |
277 | else | |
2fe3e2ee | 278 | return em28xx_set_mode(dev, EM28XX_SUSPEND); |
e3569abc MCC |
279 | } |
280 | ||
3aefb79a MCC |
281 | /* ------------------------------------------------------------------ */ |
282 | ||
227ad4ab MCC |
283 | static struct lgdt330x_config em2880_lgdt3303_dev = { |
284 | .demod_address = 0x0e, | |
285 | .demod_chip = LGDT3303, | |
286 | }; | |
3aefb79a | 287 | |
7e48b30a JW |
288 | static struct lgdt3305_config em2870_lgdt3304_dev = { |
289 | .i2c_addr = 0x0e, | |
290 | .demod_chip = LGDT3304, | |
291 | .spectral_inversion = 1, | |
292 | .deny_i2c_rptr = 1, | |
293 | .mpeg_mode = LGDT3305_MPEG_PARALLEL, | |
294 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
295 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
296 | .vsb_if_khz = 3250, | |
297 | .qam_if_khz = 4000, | |
298 | }; | |
299 | ||
ca3dfd6a MCC |
300 | static struct s921_config sharp_isdbt = { |
301 | .demod_address = 0x30 >> 1 | |
302 | }; | |
303 | ||
7e6388a1 AT |
304 | static struct zl10353_config em28xx_zl10353_with_xc3028 = { |
305 | .demod_address = (0x1e >> 1), | |
306 | .no_tuner = 1, | |
307 | .parallel_ts = 1, | |
308 | .if2 = 45600, | |
309 | }; | |
310 | ||
6e7b9ea0 RK |
311 | static struct s5h1409_config em28xx_s5h1409_with_xc3028 = { |
312 | .demod_address = 0x32 >> 1, | |
313 | .output_mode = S5H1409_PARALLEL_OUTPUT, | |
314 | .gpio = S5H1409_GPIO_OFF, | |
315 | .inversion = S5H1409_INVERSION_OFF, | |
316 | .status_mode = S5H1409_DEMODLOCKING, | |
317 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK | |
318 | }; | |
319 | ||
7e48b30a JW |
320 | static struct tda18271_std_map kworld_a340_std_map = { |
321 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0, | |
322 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
323 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1, | |
324 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
325 | }; | |
326 | ||
327 | static struct tda18271_config kworld_a340_config = { | |
328 | .std_map = &kworld_a340_std_map, | |
329 | }; | |
330 | ||
a84f79ae | 331 | static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = { |
f797608c DH |
332 | .demod_address = (0x1e >> 1), |
333 | .no_tuner = 1, | |
334 | .disable_i2c_gate_ctrl = 1, | |
335 | .parallel_ts = 1, | |
336 | .if2 = 45600, | |
337 | }; | |
338 | ||
75e2b869 | 339 | static struct drxd_config em28xx_drxd = { |
aac865f7 MCC |
340 | .demod_address = 0x70, |
341 | .demod_revision = 0xa2, | |
342 | .pll_type = DRXD_PLL_NONE, | |
343 | .clock = 12000, | |
344 | .insert_rs_byte = 1, | |
345 | .IF = 42800000, | |
6b142b3c | 346 | .disable_i2c_gate_ctrl = 1, |
17d9d558 | 347 | }; |
17d9d558 | 348 | |
61bdbef0 | 349 | static struct drxk_config terratec_h5_drxk = { |
fec528b7 | 350 | .adr = 0x29, |
e4f4f875 | 351 | .single_master = 1, |
f1fe1b75 | 352 | .no_i2c_bridge = 1, |
8b9456ae | 353 | .microcode_name = "dvb-usb-terratec-h5-drxk.fw", |
9e23f50a | 354 | .qam_demod_parameter_count = 2, |
2425bb3d | 355 | .load_firmware_sync = true, |
fec528b7 MCC |
356 | }; |
357 | ||
61bdbef0 | 358 | static struct drxk_config hauppauge_930c_drxk = { |
82e7dbbd EDP |
359 | .adr = 0x29, |
360 | .single_master = 1, | |
361 | .no_i2c_bridge = 1, | |
362 | .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw", | |
363 | .chunk_size = 56, | |
9e23f50a | 364 | .qam_demod_parameter_count = 2, |
2425bb3d | 365 | .load_firmware_sync = true, |
82e7dbbd EDP |
366 | }; |
367 | ||
89040136 | 368 | static struct drxk_config terratec_htc_stick_drxk = { |
c8dce008 MB |
369 | .adr = 0x29, |
370 | .single_master = 1, | |
371 | .no_i2c_bridge = 1, | |
372 | .microcode_name = "dvb-usb-terratec-htc-stick-drxk.fw", | |
373 | .chunk_size = 54, | |
9e23f50a | 374 | .qam_demod_parameter_count = 2, |
c8dce008 MB |
375 | /* Required for the antenna_gpio to disable LNA. */ |
376 | .antenna_dvbt = true, | |
377 | /* The windows driver uses the same. This will disable LNA. */ | |
378 | .antenna_gpio = 0x6, | |
2425bb3d | 379 | .load_firmware_sync = true, |
c8dce008 MB |
380 | }; |
381 | ||
61bdbef0 | 382 | static struct drxk_config maxmedia_ub425_tc_drxk = { |
3553085c AP |
383 | .adr = 0x29, |
384 | .single_master = 1, | |
385 | .no_i2c_bridge = 1, | |
2425bb3d | 386 | .load_firmware_sync = true, |
3553085c AP |
387 | }; |
388 | ||
61bdbef0 | 389 | static struct drxk_config pctv_520e_drxk = { |
c247d7b1 AP |
390 | .adr = 0x29, |
391 | .single_master = 1, | |
392 | .microcode_name = "dvb-demod-drxk-pctv.fw", | |
9e23f50a | 393 | .qam_demod_parameter_count = 2, |
c247d7b1 | 394 | .chunk_size = 58, |
f6f379df AP |
395 | .antenna_dvbt = true, /* disable LNA */ |
396 | .antenna_gpio = (1 << 2), /* disable LNA */ | |
2425bb3d | 397 | .load_firmware_sync = true, |
c247d7b1 AP |
398 | }; |
399 | ||
fec528b7 MCC |
400 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) |
401 | { | |
402 | struct em28xx_dvb *dvb = fe->sec_priv; | |
403 | int status; | |
404 | ||
405 | if (!dvb) | |
406 | return -EINVAL; | |
407 | ||
408 | if (enable) { | |
409 | down(&dvb->pll_mutex); | |
410 | status = dvb->gate_ctrl(fe, 1); | |
411 | } else { | |
412 | status = dvb->gate_ctrl(fe, 0); | |
413 | up(&dvb->pll_mutex); | |
414 | } | |
415 | return status; | |
416 | } | |
417 | ||
82e7dbbd EDP |
418 | static void hauppauge_hvr930c_init(struct em28xx *dev) |
419 | { | |
420 | int i; | |
421 | ||
422 | struct em28xx_reg_seq hauppauge_hvr930c_init[] = { | |
de72405f MCC |
423 | {EM2874_R80_GPIO, 0xff, 0xff, 0x65}, |
424 | {EM2874_R80_GPIO, 0xfb, 0xff, 0x32}, | |
425 | {EM2874_R80_GPIO, 0xff, 0xff, 0xb8}, | |
82e7dbbd EDP |
426 | { -1, -1, -1, -1}, |
427 | }; | |
428 | struct em28xx_reg_seq hauppauge_hvr930c_end[] = { | |
de72405f MCC |
429 | {EM2874_R80_GPIO, 0xef, 0xff, 0x01}, |
430 | {EM2874_R80_GPIO, 0xaf, 0xff, 0x65}, | |
431 | {EM2874_R80_GPIO, 0xef, 0xff, 0x76}, | |
432 | {EM2874_R80_GPIO, 0xef, 0xff, 0x01}, | |
433 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b}, | |
434 | {EM2874_R80_GPIO, 0xef, 0xff, 0x40}, | |
435 | ||
436 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x65}, | |
437 | {EM2874_R80_GPIO, 0xef, 0xff, 0x65}, | |
438 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b}, | |
439 | {EM2874_R80_GPIO, 0xef, 0xff, 0x65}, | |
82e7dbbd | 440 | |
82e7dbbd EDP |
441 | { -1, -1, -1, -1}, |
442 | }; | |
443 | ||
82e7dbbd EDP |
444 | struct { |
445 | unsigned char r[4]; | |
446 | int len; | |
447 | } regs[] = { | |
448 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
449 | {{ 0x01, 0x02 }, 2}, | |
450 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
451 | {{ 0x01, 0x00 }, 2}, | |
452 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
453 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
454 | {{ 0x01, 0x00 }, 2}, | |
455 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
456 | {{ 0x04, 0x00 }, 2}, | |
457 | {{ 0x00, 0x04 }, 2}, | |
458 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
459 | {{ 0x04, 0x14 }, 2}, | |
460 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
461 | }; | |
462 | ||
463 | em28xx_gpio_set(dev, hauppauge_hvr930c_init); | |
464 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
465 | msleep(10); | |
466 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
467 | msleep(10); | |
468 | ||
c7a45e5b | 469 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
82e7dbbd EDP |
470 | |
471 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 472 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
82e7dbbd EDP |
473 | em28xx_gpio_set(dev, hauppauge_hvr930c_end); |
474 | ||
475 | msleep(100); | |
476 | ||
477 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
478 | msleep(30); | |
479 | ||
82e7dbbd EDP |
480 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45); |
481 | msleep(10); | |
482 | ||
483 | } | |
484 | ||
fec528b7 MCC |
485 | static void terratec_h5_init(struct em28xx *dev) |
486 | { | |
487 | int i; | |
488 | struct em28xx_reg_seq terratec_h5_init[] = { | |
489 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
490 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
491 | {EM2874_R80_GPIO, 0xf2, 0xff, 50}, | |
492 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
493 | { -1, -1, -1, -1}, | |
494 | }; | |
495 | struct em28xx_reg_seq terratec_h5_end[] = { | |
496 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
497 | {EM2874_R80_GPIO, 0xa6, 0xff, 50}, | |
498 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
499 | { -1, -1, -1, -1}, | |
500 | }; | |
501 | struct { | |
502 | unsigned char r[4]; | |
503 | int len; | |
504 | } regs[] = { | |
505 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
506 | {{ 0x01, 0x02 }, 2}, | |
507 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
508 | {{ 0x01, 0x00 }, 2}, | |
509 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
510 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
511 | {{ 0x01, 0x00 }, 2}, | |
512 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
513 | {{ 0x04, 0x00 }, 2}, | |
514 | {{ 0x00, 0x04 }, 2}, | |
515 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
516 | {{ 0x04, 0x14 }, 2}, | |
517 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
518 | }; | |
519 | ||
520 | em28xx_gpio_set(dev, terratec_h5_init); | |
521 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
522 | msleep(10); | |
523 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45); | |
524 | msleep(10); | |
525 | ||
c7a45e5b | 526 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
fec528b7 MCC |
527 | |
528 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 529 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
fec528b7 MCC |
530 | em28xx_gpio_set(dev, terratec_h5_end); |
531 | }; | |
532 | ||
c8dce008 MB |
533 | static void terratec_htc_stick_init(struct em28xx *dev) |
534 | { | |
535 | int i; | |
536 | ||
537 | /* | |
538 | * GPIO configuration: | |
539 | * 0xff: unknown (does not affect DVB-T). | |
540 | * 0xf6: DRX-K (demodulator). | |
541 | * 0xe6: unknown (does not affect DVB-T). | |
542 | * 0xb6: unknown (does not affect DVB-T). | |
543 | */ | |
544 | struct em28xx_reg_seq terratec_htc_stick_init[] = { | |
545 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
546 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
547 | {EM2874_R80_GPIO, 0xe6, 0xff, 50}, | |
548 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
549 | { -1, -1, -1, -1}, | |
550 | }; | |
551 | struct em28xx_reg_seq terratec_htc_stick_end[] = { | |
552 | {EM2874_R80_GPIO, 0xb6, 0xff, 100}, | |
553 | {EM2874_R80_GPIO, 0xf6, 0xff, 50}, | |
554 | { -1, -1, -1, -1}, | |
555 | }; | |
556 | ||
89040136 MB |
557 | /* |
558 | * Init the analog decoder (not yet supported), but | |
559 | * it's probably still a good idea. | |
560 | */ | |
c8dce008 MB |
561 | struct { |
562 | unsigned char r[4]; | |
563 | int len; | |
564 | } regs[] = { | |
565 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
566 | {{ 0x01, 0x02 }, 2}, | |
567 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
568 | {{ 0x01, 0x00 }, 2}, | |
569 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
570 | }; | |
571 | ||
572 | em28xx_gpio_set(dev, terratec_htc_stick_init); | |
573 | ||
574 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
575 | msleep(10); | |
576 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
577 | msleep(10); | |
578 | ||
c7a45e5b | 579 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
c8dce008 MB |
580 | |
581 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 582 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
c8dce008 MB |
583 | |
584 | em28xx_gpio_set(dev, terratec_htc_stick_end); | |
585 | }; | |
586 | ||
89040136 MB |
587 | static void terratec_htc_usb_xs_init(struct em28xx *dev) |
588 | { | |
589 | int i; | |
590 | ||
591 | struct em28xx_reg_seq terratec_htc_usb_xs_init[] = { | |
592 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
593 | {EM2874_R80_GPIO, 0xb2, 0xff, 100}, | |
594 | {EM2874_R80_GPIO, 0xb2, 0xff, 50}, | |
595 | {EM2874_R80_GPIO, 0xb6, 0xff, 100}, | |
596 | { -1, -1, -1, -1}, | |
597 | }; | |
598 | struct em28xx_reg_seq terratec_htc_usb_xs_end[] = { | |
599 | {EM2874_R80_GPIO, 0xa6, 0xff, 100}, | |
600 | {EM2874_R80_GPIO, 0xa6, 0xff, 50}, | |
601 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
602 | { -1, -1, -1, -1}, | |
603 | }; | |
604 | ||
605 | /* | |
606 | * Init the analog decoder (not yet supported), but | |
607 | * it's probably still a good idea. | |
608 | */ | |
609 | struct { | |
610 | unsigned char r[4]; | |
611 | int len; | |
612 | } regs[] = { | |
613 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
614 | {{ 0x01, 0x02 }, 2}, | |
615 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
616 | {{ 0x01, 0x00 }, 2}, | |
617 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
618 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
619 | {{ 0x01, 0x00 }, 2}, | |
620 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
621 | {{ 0x04, 0x00 }, 2}, | |
622 | {{ 0x00, 0x04 }, 2}, | |
623 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
624 | {{ 0x04, 0x14 }, 2}, | |
625 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
626 | }; | |
627 | ||
628 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
629 | ||
630 | em28xx_gpio_set(dev, terratec_htc_usb_xs_init); | |
631 | ||
632 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
633 | msleep(10); | |
634 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
635 | msleep(10); | |
636 | ||
c7a45e5b | 637 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
89040136 MB |
638 | |
639 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 640 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
89040136 MB |
641 | |
642 | em28xx_gpio_set(dev, terratec_htc_usb_xs_end); | |
643 | }; | |
644 | ||
c247d7b1 AP |
645 | static void pctv_520e_init(struct em28xx *dev) |
646 | { | |
647 | /* | |
26c8a729 AP |
648 | * Init AVF4910B analog decoder. Looks like I2C traffic to |
649 | * digital demodulator and tuner are routed via AVF4910B. | |
c247d7b1 AP |
650 | */ |
651 | int i; | |
652 | struct { | |
653 | unsigned char r[4]; | |
654 | int len; | |
655 | } regs[] = { | |
656 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
657 | {{ 0x01, 0x02 }, 2}, | |
658 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
659 | {{ 0x01, 0x00 }, 2}, | |
660 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
661 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
662 | {{ 0x01, 0x00 }, 2}, | |
663 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
664 | }; | |
665 | ||
c7a45e5b | 666 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; /* 0x41 */ |
c247d7b1 AP |
667 | |
668 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 669 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
c247d7b1 AP |
670 | }; |
671 | ||
33eebec5 | 672 | static int em28xx_pctv_290e_set_lna(struct dvb_frontend *fe) |
13a5336e | 673 | { |
33eebec5 | 674 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
13a5336e AP |
675 | struct em28xx *dev = fe->dvb->priv; |
676 | #ifdef CONFIG_GPIOLIB | |
677 | struct em28xx_dvb *dvb = dev->dvb; | |
678 | int ret; | |
679 | unsigned long flags; | |
680 | ||
33eebec5 AP |
681 | if (c->lna == 1) |
682 | flags = GPIOF_OUT_INIT_HIGH; /* enable LNA */ | |
13a5336e | 683 | else |
33eebec5 | 684 | flags = GPIOF_OUT_INIT_LOW; /* disable LNA */ |
13a5336e AP |
685 | |
686 | ret = gpio_request_one(dvb->lna_gpio, flags, NULL); | |
687 | if (ret) | |
688 | em28xx_errdev("gpio request failed %d\n", ret); | |
689 | else | |
690 | gpio_free(dvb->lna_gpio); | |
691 | ||
692 | return ret; | |
693 | #else | |
33eebec5 AP |
694 | dev_warn(&dev->udev->dev, "%s: LNA control is disabled (lna=%u)\n", |
695 | KBUILD_MODNAME, c->lna); | |
13a5336e AP |
696 | return 0; |
697 | #endif | |
698 | } | |
699 | ||
f2d0c1c6 | 700 | static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe) |
4fb202a8 DH |
701 | { |
702 | /* Values extracted from a USB trace of the Terratec Windows driver */ | |
703 | static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c }; | |
704 | static u8 reset[] = { RESET, 0x80 }; | |
705 | static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; | |
706 | static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 }; | |
707 | static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 }; | |
708 | static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d }; | |
709 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; | |
710 | static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 }; | |
711 | static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 }; | |
ff69786b | 712 | static u8 tuner_go[] = { TUNER_GO, 0x01}; |
4fb202a8 DH |
713 | |
714 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
715 | udelay(200); | |
716 | mt352_write(fe, reset, sizeof(reset)); | |
717 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
718 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
719 | mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg)); | |
720 | mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg)); | |
721 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
722 | mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg)); | |
723 | mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg)); | |
724 | mt352_write(fe, tuner_go, sizeof(tuner_go)); | |
725 | return 0; | |
726 | } | |
727 | ||
728 | static struct mt352_config terratec_xs_mt352_cfg = { | |
729 | .demod_address = (0x1e >> 1), | |
730 | .no_tuner = 1, | |
731 | .if2 = 45600, | |
f2d0c1c6 | 732 | .demod_init = em28xx_mt352_terratec_xs_init, |
4fb202a8 DH |
733 | }; |
734 | ||
285eb1a4 AP |
735 | static struct tda10023_config em28xx_tda10023_config = { |
736 | .demod_address = 0x0c, | |
737 | .invert = 1, | |
738 | }; | |
739 | ||
d6a5f921 AP |
740 | static struct cxd2820r_config em28xx_cxd2820r_config = { |
741 | .i2c_address = (0xd8 >> 1), | |
742 | .ts_mode = CXD2820R_TS_SERIAL, | |
d6a5f921 AP |
743 | }; |
744 | ||
745 | static struct tda18271_config em28xx_cxd2820r_tda18271_config = { | |
746 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
0db4bf42 | 747 | .gate = TDA18271_GATE_DIGITAL, |
d6a5f921 AP |
748 | }; |
749 | ||
36588715 | 750 | static const struct tda10071_config em28xx_tda10071_config = { |
41f55d57 MK |
751 | .demod_i2c_addr = 0x55, /* (0xaa >> 1) */ |
752 | .tuner_i2c_addr = 0x14, | |
36588715 AP |
753 | .i2c_wr_max = 64, |
754 | .ts_mode = TDA10071_TS_SERIAL, | |
755 | .spec_inv = 0, | |
756 | .xtal = 40444000, /* 40.444 MHz */ | |
757 | .pll_multiplier = 20, | |
758 | }; | |
759 | ||
760 | static const struct a8293_config em28xx_a8293_config = { | |
761 | .i2c_addr = 0x08, /* (0x10 >> 1) */ | |
762 | }; | |
763 | ||
1985f6fb AP |
764 | static struct zl10353_config em28xx_zl10353_no_i2c_gate_dev = { |
765 | .demod_address = (0x1e >> 1), | |
766 | .disable_i2c_gate_ctrl = 1, | |
767 | .no_tuner = 1, | |
768 | .parallel_ts = 1, | |
769 | }; | |
770 | static struct qt1010_config em28xx_qt1010_config = { | |
771 | .i2c_address = 0x62 | |
4159d01b MCC |
772 | }; |
773 | ||
774 | static const struct mb86a20s_config c3tech_duo_mb86a20s_config = { | |
775 | .demod_address = 0x10, | |
776 | .is_serial = true, | |
777 | }; | |
778 | ||
779 | static struct tda18271_std_map mb86a20s_tda18271_config = { | |
780 | .dvbt_6 = { .if_freq = 4000, .agc_mode = 3, .std = 4, | |
781 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
782 | }; | |
1985f6fb | 783 | |
4159d01b MCC |
784 | static struct tda18271_config c3tech_duo_tda18271_config = { |
785 | .std_map = &mb86a20s_tda18271_config, | |
786 | .gate = TDA18271_GATE_DIGITAL, | |
787 | .small_i2c = TDA18271_03_BYTE_CHUNK_INIT, | |
1985f6fb AP |
788 | }; |
789 | ||
4159d01b | 790 | |
3aefb79a MCC |
791 | /* ------------------------------------------------------------------ */ |
792 | ||
f2d0c1c6 | 793 | static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev) |
3aefb79a MCC |
794 | { |
795 | struct dvb_frontend *fe; | |
3ca9c093 MCC |
796 | struct xc2028_config cfg; |
797 | ||
6ea54d93 | 798 | memset(&cfg, 0, sizeof(cfg)); |
c7a45e5b | 799 | cfg.i2c_adap = &dev->i2c_adap[dev->def_i2c_bus]; |
3ca9c093 | 800 | cfg.i2c_addr = addr; |
3ca9c093 | 801 | |
f71095be | 802 | if (!dev->dvb->fe[0]) { |
480be185 FR |
803 | em28xx_errdev("/2: dvb frontend not attached. " |
804 | "Can't attach xc3028\n"); | |
3aefb79a MCC |
805 | return -EINVAL; |
806 | } | |
807 | ||
f71095be | 808 | fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg); |
3aefb79a | 809 | if (!fe) { |
480be185 | 810 | em28xx_errdev("/2: xc3028 attach failed\n"); |
f71095be AP |
811 | dvb_frontend_detach(dev->dvb->fe[0]); |
812 | dev->dvb->fe[0] = NULL; | |
3aefb79a MCC |
813 | return -EINVAL; |
814 | } | |
815 | ||
480be185 | 816 | em28xx_info("%s/2: xc3028 attached\n", dev->name); |
3aefb79a MCC |
817 | |
818 | return 0; | |
819 | } | |
820 | ||
3421b778 AT |
821 | /* ------------------------------------------------------------------ */ |
822 | ||
f2d0c1c6 JW |
823 | static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module, |
824 | struct em28xx *dev, struct device *device) | |
3aefb79a | 825 | { |
3421b778 | 826 | int result; |
3aefb79a | 827 | |
3421b778 | 828 | mutex_init(&dvb->lock); |
3aefb79a | 829 | |
3421b778 AT |
830 | /* register adapter */ |
831 | result = dvb_register_adapter(&dvb->adapter, dev->name, module, device, | |
832 | adapter_nr); | |
833 | if (result < 0) { | |
834 | printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n", | |
835 | dev->name, result); | |
836 | goto fail_adapter; | |
837 | } | |
e3569abc MCC |
838 | |
839 | /* Ensure all frontends negotiate bus access */ | |
f71095be AP |
840 | dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl; |
841 | if (dvb->fe[1]) | |
842 | dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl; | |
e3569abc | 843 | |
3de09fbb | 844 | dvb->adapter.priv = &dev->i2c_bus[dev->def_i2c_bus]; |
3421b778 AT |
845 | |
846 | /* register frontend */ | |
f71095be | 847 | result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]); |
3421b778 AT |
848 | if (result < 0) { |
849 | printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n", | |
850 | dev->name, result); | |
f71095be AP |
851 | goto fail_frontend0; |
852 | } | |
853 | ||
854 | /* register 2nd frontend */ | |
855 | if (dvb->fe[1]) { | |
856 | result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]); | |
857 | if (result < 0) { | |
858 | printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n", | |
859 | dev->name, result); | |
860 | goto fail_frontend1; | |
861 | } | |
3421b778 AT |
862 | } |
863 | ||
864 | /* register demux stuff */ | |
865 | dvb->demux.dmx.capabilities = | |
866 | DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
867 | DMX_MEMORY_BASED_FILTERING; | |
868 | dvb->demux.priv = dvb; | |
869 | dvb->demux.filternum = 256; | |
870 | dvb->demux.feednum = 256; | |
f2d0c1c6 JW |
871 | dvb->demux.start_feed = em28xx_start_feed; |
872 | dvb->demux.stop_feed = em28xx_stop_feed; | |
e3569abc | 873 | |
3421b778 AT |
874 | result = dvb_dmx_init(&dvb->demux); |
875 | if (result < 0) { | |
876 | printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n", | |
877 | dev->name, result); | |
878 | goto fail_dmx; | |
879 | } | |
880 | ||
881 | dvb->dmxdev.filternum = 256; | |
882 | dvb->dmxdev.demux = &dvb->demux.dmx; | |
883 | dvb->dmxdev.capabilities = 0; | |
884 | result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter); | |
885 | if (result < 0) { | |
886 | printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n", | |
887 | dev->name, result); | |
888 | goto fail_dmxdev; | |
889 | } | |
52284c3e | 890 | |
3421b778 AT |
891 | dvb->fe_hw.source = DMX_FRONTEND_0; |
892 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
893 | if (result < 0) { | |
894 | printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n", | |
895 | dev->name, result); | |
896 | goto fail_fe_hw; | |
897 | } | |
898 | ||
899 | dvb->fe_mem.source = DMX_MEMORY_FE; | |
900 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
901 | if (result < 0) { | |
902 | printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n", | |
903 | dev->name, result); | |
904 | goto fail_fe_mem; | |
905 | } | |
906 | ||
907 | result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
908 | if (result < 0) { | |
909 | printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n", | |
910 | dev->name, result); | |
911 | goto fail_fe_conn; | |
912 | } | |
913 | ||
914 | /* register network adapter */ | |
915 | dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx); | |
916 | return 0; | |
917 | ||
918 | fail_fe_conn: | |
919 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
920 | fail_fe_mem: | |
921 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
922 | fail_fe_hw: | |
923 | dvb_dmxdev_release(&dvb->dmxdev); | |
924 | fail_dmxdev: | |
925 | dvb_dmx_release(&dvb->demux); | |
926 | fail_dmx: | |
f71095be AP |
927 | if (dvb->fe[1]) |
928 | dvb_unregister_frontend(dvb->fe[1]); | |
929 | dvb_unregister_frontend(dvb->fe[0]); | |
930 | fail_frontend1: | |
931 | if (dvb->fe[1]) | |
932 | dvb_frontend_detach(dvb->fe[1]); | |
933 | fail_frontend0: | |
934 | dvb_frontend_detach(dvb->fe[0]); | |
3421b778 AT |
935 | dvb_unregister_adapter(&dvb->adapter); |
936 | fail_adapter: | |
937 | return result; | |
938 | } | |
939 | ||
f2d0c1c6 | 940 | static void em28xx_unregister_dvb(struct em28xx_dvb *dvb) |
3421b778 AT |
941 | { |
942 | dvb_net_release(&dvb->net); | |
943 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
944 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
945 | dvb_dmxdev_release(&dvb->dmxdev); | |
946 | dvb_dmx_release(&dvb->demux); | |
f71095be AP |
947 | if (dvb->fe[1]) |
948 | dvb_unregister_frontend(dvb->fe[1]); | |
949 | dvb_unregister_frontend(dvb->fe[0]); | |
c4c3a3d3 | 950 | if (dvb->fe[1] && !dvb->dont_attach_fe1) |
f71095be AP |
951 | dvb_frontend_detach(dvb->fe[1]); |
952 | dvb_frontend_detach(dvb->fe[0]); | |
3421b778 AT |
953 | dvb_unregister_adapter(&dvb->adapter); |
954 | } | |
955 | ||
f2d0c1c6 | 956 | static int em28xx_dvb_init(struct em28xx *dev) |
3421b778 | 957 | { |
13a5336e | 958 | int result = 0, mfe_shared = 0; |
3421b778 AT |
959 | struct em28xx_dvb *dvb; |
960 | ||
505b6d0b | 961 | if (!dev->board.has_dvb) { |
df619181 | 962 | /* This device does not support the extension */ |
ca3dfd6a | 963 | printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n"); |
df619181 DH |
964 | return 0; |
965 | } | |
966 | ||
3421b778 | 967 | dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL); |
6ea54d93 DSL |
968 | |
969 | if (dvb == NULL) { | |
480be185 | 970 | em28xx_info("em28xx_dvb: memory allocation failed\n"); |
3421b778 AT |
971 | return -ENOMEM; |
972 | } | |
973 | dev->dvb = dvb; | |
f71095be | 974 | dvb->fe[0] = dvb->fe[1] = NULL; |
3aefb79a | 975 | |
5013318c | 976 | mutex_lock(&dev->lock); |
c67ec53f | 977 | em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
3aefb79a MCC |
978 | /* init frontend */ |
979 | switch (dev->model) { | |
ebaefdb7 | 980 | case EM2874_BOARD_LEADERSHIP_ISDBT: |
f71095be | 981 | dvb->fe[0] = dvb_attach(s921_attach, |
c7a45e5b | 982 | &sharp_isdbt, &dev->i2c_adap[dev->def_i2c_bus]); |
ca3dfd6a | 983 | |
f71095be | 984 | if (!dvb->fe[0]) { |
ca3dfd6a MCC |
985 | result = -EINVAL; |
986 | goto out_free; | |
987 | } | |
988 | ||
989 | break; | |
f89bc329 | 990 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850: |
10ac6603 | 991 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950: |
4fd305b2 | 992 | case EM2880_BOARD_PINNACLE_PCTV_HD_PRO: |
e14b3658 | 993 | case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600: |
f71095be | 994 | dvb->fe[0] = dvb_attach(lgdt330x_attach, |
3421b778 | 995 | &em2880_lgdt3303_dev, |
c7a45e5b | 996 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 997 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
3421b778 AT |
998 | result = -EINVAL; |
999 | goto out_free; | |
1000 | } | |
227ad4ab | 1001 | break; |
46510b56 | 1002 | case EM2880_BOARD_KWORLD_DVB_310U: |
f71095be | 1003 | dvb->fe[0] = dvb_attach(zl10353_attach, |
3421b778 | 1004 | &em28xx_zl10353_with_xc3028, |
c7a45e5b | 1005 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 1006 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
3421b778 AT |
1007 | result = -EINVAL; |
1008 | goto out_free; | |
1009 | } | |
7e6388a1 | 1010 | break; |
a84f79ae | 1011 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900: |
ec994d05 | 1012 | case EM2882_BOARD_TERRATEC_HYBRID_XS: |
01a5fd6f | 1013 | case EM2880_BOARD_EMPIRE_DUAL_TV: |
f71095be | 1014 | dvb->fe[0] = dvb_attach(zl10353_attach, |
a84f79ae | 1015 | &em28xx_zl10353_xc3028_no_i2c_gate, |
c7a45e5b | 1016 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 1017 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
a84f79ae DH |
1018 | result = -EINVAL; |
1019 | goto out_free; | |
1020 | } | |
1021 | break; | |
f797608c | 1022 | case EM2880_BOARD_TERRATEC_HYBRID_XS: |
65638011 | 1023 | case EM2880_BOARD_TERRATEC_HYBRID_XS_FR: |
d5b3ba9c | 1024 | case EM2881_BOARD_PINNACLE_HYBRID_PRO: |
7ca7ef60 | 1025 | case EM2882_BOARD_DIKOM_DK300: |
811fab62 | 1026 | case EM2882_BOARD_KWORLD_VS_DVBT: |
f71095be | 1027 | dvb->fe[0] = dvb_attach(zl10353_attach, |
a84f79ae | 1028 | &em28xx_zl10353_xc3028_no_i2c_gate, |
c7a45e5b | 1029 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be | 1030 | if (dvb->fe[0] == NULL) { |
f797608c DH |
1031 | /* This board could have either a zl10353 or a mt352. |
1032 | If the chip id isn't for zl10353, try mt352 */ | |
f71095be | 1033 | dvb->fe[0] = dvb_attach(mt352_attach, |
4fb202a8 | 1034 | &terratec_xs_mt352_cfg, |
c7a45e5b | 1035 | &dev->i2c_adap[dev->def_i2c_bus]); |
f797608c | 1036 | } |
4fb202a8 | 1037 | |
f2d0c1c6 | 1038 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
f797608c DH |
1039 | result = -EINVAL; |
1040 | goto out_free; | |
1041 | } | |
1042 | break; | |
1985f6fb AP |
1043 | case EM2870_BOARD_KWORLD_355U: |
1044 | dvb->fe[0] = dvb_attach(zl10353_attach, | |
1045 | &em28xx_zl10353_no_i2c_gate_dev, | |
c7a45e5b | 1046 | &dev->i2c_adap[dev->def_i2c_bus]); |
1985f6fb AP |
1047 | if (dvb->fe[0] != NULL) |
1048 | dvb_attach(qt1010_attach, dvb->fe[0], | |
c7a45e5b | 1049 | &dev->i2c_adap[dev->def_i2c_bus], &em28xx_qt1010_config); |
1985f6fb | 1050 | break; |
6e7b9ea0 | 1051 | case EM2883_BOARD_KWORLD_HYBRID_330U: |
19859229 | 1052 | case EM2882_BOARD_EVGA_INDTUBE: |
f71095be | 1053 | dvb->fe[0] = dvb_attach(s5h1409_attach, |
6e7b9ea0 | 1054 | &em28xx_s5h1409_with_xc3028, |
c7a45e5b | 1055 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 1056 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
6e7b9ea0 RK |
1057 | result = -EINVAL; |
1058 | goto out_free; | |
1059 | } | |
1060 | break; | |
d7de5d8f | 1061 | case EM2882_BOARD_KWORLD_ATSC_315U: |
f71095be | 1062 | dvb->fe[0] = dvb_attach(lgdt330x_attach, |
d7de5d8f | 1063 | &em2880_lgdt3303_dev, |
c7a45e5b | 1064 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be AP |
1065 | if (dvb->fe[0] != NULL) { |
1066 | if (!dvb_attach(simple_tuner_attach, dvb->fe[0], | |
c7a45e5b | 1067 | &dev->i2c_adap[dev->def_i2c_bus], 0x61, TUNER_THOMSON_DTT761X)) { |
d7de5d8f FM |
1068 | result = -EINVAL; |
1069 | goto out_free; | |
1070 | } | |
1071 | } | |
1072 | break; | |
17d9d558 | 1073 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2: |
ad9b4bb2 | 1074 | case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E: |
f71095be | 1075 | dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL, |
c7a45e5b | 1076 | &dev->i2c_adap[dev->def_i2c_bus], &dev->udev->dev); |
f2d0c1c6 | 1077 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
17d9d558 DH |
1078 | result = -EINVAL; |
1079 | goto out_free; | |
1080 | } | |
1081 | break; | |
285eb1a4 AP |
1082 | case EM2870_BOARD_REDDO_DVB_C_USB_BOX: |
1083 | /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */ | |
f71095be | 1084 | dvb->fe[0] = dvb_attach(tda10023_attach, |
285eb1a4 | 1085 | &em28xx_tda10023_config, |
c7a45e5b | 1086 | &dev->i2c_adap[dev->def_i2c_bus], 0x48); |
f71095be AP |
1087 | if (dvb->fe[0]) { |
1088 | if (!dvb_attach(simple_tuner_attach, dvb->fe[0], | |
c7a45e5b | 1089 | &dev->i2c_adap[dev->def_i2c_bus], 0x60, TUNER_PHILIPS_CU1216L)) { |
285eb1a4 AP |
1090 | result = -EINVAL; |
1091 | goto out_free; | |
1092 | } | |
1093 | } | |
1094 | break; | |
7e48b30a | 1095 | case EM2870_BOARD_KWORLD_A340: |
f71095be | 1096 | dvb->fe[0] = dvb_attach(lgdt3305_attach, |
7e48b30a | 1097 | &em2870_lgdt3304_dev, |
c7a45e5b | 1098 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be AP |
1099 | if (dvb->fe[0] != NULL) |
1100 | dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1101 | &dev->i2c_adap[dev->def_i2c_bus], &kworld_a340_config); |
7e48b30a | 1102 | break; |
d6a5f921 | 1103 | case EM28174_BOARD_PCTV_290E: |
a36a66d7 AP |
1104 | /* set default GPIO0 for LNA, used if GPIOLIB is undefined */ |
1105 | dvb->lna_gpio = CXD2820R_GPIO_E | CXD2820R_GPIO_O | | |
1106 | CXD2820R_GPIO_L; | |
d6a5f921 | 1107 | dvb->fe[0] = dvb_attach(cxd2820r_attach, |
7e7b8287 | 1108 | &em28xx_cxd2820r_config, |
c7a45e5b | 1109 | &dev->i2c_adap[dev->def_i2c_bus], |
13a5336e | 1110 | &dvb->lna_gpio); |
d6a5f921 | 1111 | if (dvb->fe[0]) { |
d6a5f921 | 1112 | /* FE 0 attach tuner */ |
7e7b8287 MA |
1113 | if (!dvb_attach(tda18271_attach, |
1114 | dvb->fe[0], | |
1115 | 0x60, | |
c7a45e5b | 1116 | &dev->i2c_adap[dev->def_i2c_bus], |
7e7b8287 MA |
1117 | &em28xx_cxd2820r_tda18271_config)) { |
1118 | ||
d6a5f921 AP |
1119 | dvb_frontend_detach(dvb->fe[0]); |
1120 | result = -EINVAL; | |
1121 | goto out_free; | |
1122 | } | |
1e8f31f3 | 1123 | |
13a5336e | 1124 | #ifdef CONFIG_GPIOLIB |
0c42a55c AP |
1125 | /* enable LNA for DVB-T, DVB-T2 and DVB-C */ |
1126 | result = gpio_request_one(dvb->lna_gpio, | |
1127 | GPIOF_OUT_INIT_LOW, NULL); | |
1128 | if (result) | |
1129 | em28xx_errdev("gpio request failed %d\n", | |
1130 | result); | |
1131 | else | |
1132 | gpio_free(dvb->lna_gpio); | |
1133 | ||
1134 | result = 0; /* continue even set LNA fails */ | |
13a5336e | 1135 | #endif |
0c42a55c AP |
1136 | dvb->fe[0]->ops.set_lna = em28xx_pctv_290e_set_lna; |
1137 | } | |
1138 | ||
82e7dbbd EDP |
1139 | break; |
1140 | case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C: | |
8503232f MCC |
1141 | { |
1142 | struct xc5000_config cfg; | |
82e7dbbd EDP |
1143 | hauppauge_hvr930c_init(dev); |
1144 | ||
de72405f | 1145 | dvb->fe[0] = dvb_attach(drxk_attach, |
c7a45e5b | 1146 | &hauppauge_930c_drxk, &dev->i2c_adap[dev->def_i2c_bus]); |
82e7dbbd EDP |
1147 | if (!dvb->fe[0]) { |
1148 | result = -EINVAL; | |
1149 | goto out_free; | |
1150 | } | |
1151 | /* FIXME: do we need a pll semaphore? */ | |
1152 | dvb->fe[0]->sec_priv = dvb; | |
1153 | sema_init(&dvb->pll_mutex, 1); | |
1154 | dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; | |
1155 | dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; | |
82e7dbbd EDP |
1156 | |
1157 | /* Attach xc5000 */ | |
82e7dbbd EDP |
1158 | memset(&cfg, 0, sizeof(cfg)); |
1159 | cfg.i2c_address = 0x61; | |
de72405f | 1160 | cfg.if_khz = 4000; |
82e7dbbd EDP |
1161 | |
1162 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | |
1163 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1); | |
c7a45e5b | 1164 | if (!dvb_attach(xc5000_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], |
de72405f | 1165 | &cfg)) { |
82e7dbbd EDP |
1166 | result = -EINVAL; |
1167 | goto out_free; | |
1168 | } | |
82e7dbbd EDP |
1169 | if (dvb->fe[0]->ops.i2c_gate_ctrl) |
1170 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); | |
1171 | ||
fec528b7 | 1172 | break; |
8503232f | 1173 | } |
fec528b7 MCC |
1174 | case EM2884_BOARD_TERRATEC_H5: |
1175 | terratec_h5_init(dev); | |
1176 | ||
c7a45e5b | 1177 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap[dev->def_i2c_bus]); |
c4c3a3d3 | 1178 | if (!dvb->fe[0]) { |
fec528b7 MCC |
1179 | result = -EINVAL; |
1180 | goto out_free; | |
1181 | } | |
1182 | /* FIXME: do we need a pll semaphore? */ | |
1183 | dvb->fe[0]->sec_priv = dvb; | |
1184 | sema_init(&dvb->pll_mutex, 1); | |
1185 | dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; | |
1186 | dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; | |
fec528b7 | 1187 | |
c4c3a3d3 | 1188 | /* Attach tda18271 to DVB-C frontend */ |
fec528b7 MCC |
1189 | if (dvb->fe[0]->ops.i2c_gate_ctrl) |
1190 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1); | |
c7a45e5b | 1191 | if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], 0x60)) { |
fec528b7 MCC |
1192 | result = -EINVAL; |
1193 | goto out_free; | |
1194 | } | |
1195 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | |
1196 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); | |
c4c3a3d3 | 1197 | |
d6a5f921 | 1198 | break; |
4159d01b MCC |
1199 | case EM2884_BOARD_C3TECH_DIGITAL_DUO: |
1200 | dvb->fe[0] = dvb_attach(mb86a20s_attach, | |
1201 | &c3tech_duo_mb86a20s_config, | |
1202 | &dev->i2c_adap[dev->def_i2c_bus]); | |
1203 | if (dvb->fe[0] != NULL) | |
1204 | dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
1205 | &dev->i2c_adap[dev->def_i2c_bus], | |
1206 | &c3tech_duo_tda18271_config); | |
1207 | break; | |
36588715 AP |
1208 | case EM28174_BOARD_PCTV_460E: |
1209 | /* attach demod */ | |
1210 | dvb->fe[0] = dvb_attach(tda10071_attach, | |
c7a45e5b | 1211 | &em28xx_tda10071_config, &dev->i2c_adap[dev->def_i2c_bus]); |
36588715 AP |
1212 | |
1213 | /* attach SEC */ | |
1214 | if (dvb->fe[0]) | |
c7a45e5b | 1215 | dvb_attach(a8293_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], |
36588715 AP |
1216 | &em28xx_a8293_config); |
1217 | break; | |
3553085c AP |
1218 | case EM2874_BOARD_MAXMEDIA_UB425_TC: |
1219 | /* attach demodulator */ | |
1220 | dvb->fe[0] = dvb_attach(drxk_attach, &maxmedia_ub425_tc_drxk, | |
c7a45e5b | 1221 | &dev->i2c_adap[dev->def_i2c_bus]); |
3553085c AP |
1222 | |
1223 | if (dvb->fe[0]) { | |
1224 | /* disable I2C-gate */ | |
1225 | dvb->fe[0]->ops.i2c_gate_ctrl = NULL; | |
1226 | ||
1227 | /* attach tuner */ | |
1228 | if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], | |
c7a45e5b | 1229 | &dev->i2c_adap[dev->def_i2c_bus], 0x60)) { |
3553085c AP |
1230 | dvb_frontend_detach(dvb->fe[0]); |
1231 | result = -EINVAL; | |
1232 | goto out_free; | |
1233 | } | |
1234 | } | |
1235 | ||
1236 | /* TODO: we need drx-3913k firmware in order to support DVB-T */ | |
1237 | em28xx_info("MaxMedia UB425-TC: only DVB-C supported by that " \ | |
1238 | "driver version\n"); | |
1239 | ||
c247d7b1 | 1240 | break; |
fa5527cd IK |
1241 | case EM2884_BOARD_PCTV_510E: |
1242 | case EM2884_BOARD_PCTV_520E: | |
1243 | pctv_520e_init(dev); | |
1244 | ||
c247d7b1 AP |
1245 | /* attach demodulator */ |
1246 | dvb->fe[0] = dvb_attach(drxk_attach, &pctv_520e_drxk, | |
c7a45e5b | 1247 | &dev->i2c_adap[dev->def_i2c_bus]); |
c247d7b1 AP |
1248 | |
1249 | if (dvb->fe[0]) { | |
1250 | /* attach tuner */ | |
1251 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1252 | &dev->i2c_adap[dev->def_i2c_bus], |
c247d7b1 AP |
1253 | &em28xx_cxd2820r_tda18271_config)) { |
1254 | dvb_frontend_detach(dvb->fe[0]); | |
1255 | result = -EINVAL; | |
1256 | goto out_free; | |
1257 | } | |
1258 | } | |
3553085c | 1259 | break; |
c8dce008 MB |
1260 | case EM2884_BOARD_CINERGY_HTC_STICK: |
1261 | terratec_htc_stick_init(dev); | |
1262 | ||
89040136 MB |
1263 | /* attach demodulator */ |
1264 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk, | |
c7a45e5b | 1265 | &dev->i2c_adap[dev->def_i2c_bus]); |
89040136 MB |
1266 | if (!dvb->fe[0]) { |
1267 | result = -EINVAL; | |
1268 | goto out_free; | |
1269 | } | |
1270 | ||
1271 | /* Attach the demodulator. */ | |
1272 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1273 | &dev->i2c_adap[dev->def_i2c_bus], |
89040136 MB |
1274 | &em28xx_cxd2820r_tda18271_config)) { |
1275 | result = -EINVAL; | |
1276 | goto out_free; | |
1277 | } | |
1278 | break; | |
1279 | case EM2884_BOARD_TERRATEC_HTC_USB_XS: | |
1280 | terratec_htc_usb_xs_init(dev); | |
1281 | ||
c8dce008 MB |
1282 | /* attach demodulator */ |
1283 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk, | |
c7a45e5b | 1284 | &dev->i2c_adap[dev->def_i2c_bus]); |
c8dce008 MB |
1285 | if (!dvb->fe[0]) { |
1286 | result = -EINVAL; | |
1287 | goto out_free; | |
1288 | } | |
1289 | ||
1290 | /* Attach the demodulator. */ | |
1291 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1292 | &dev->i2c_adap[dev->def_i2c_bus], |
c8dce008 MB |
1293 | &em28xx_cxd2820r_tda18271_config)) { |
1294 | result = -EINVAL; | |
1295 | goto out_free; | |
1296 | } | |
1297 | break; | |
3aefb79a | 1298 | default: |
480be185 FR |
1299 | em28xx_errdev("/2: The frontend of your DVB/ATSC card" |
1300 | " isn't supported yet\n"); | |
3aefb79a MCC |
1301 | break; |
1302 | } | |
f71095be | 1303 | if (NULL == dvb->fe[0]) { |
480be185 | 1304 | em28xx_errdev("/2: frontend initialization failed\n"); |
3421b778 AT |
1305 | result = -EINVAL; |
1306 | goto out_free; | |
3aefb79a | 1307 | } |
d7cba043 | 1308 | /* define general-purpose callback pointer */ |
f71095be | 1309 | dvb->fe[0]->callback = em28xx_tuner_callback; |
82e7dbbd | 1310 | if (dvb->fe[1]) |
de72405f | 1311 | dvb->fe[1]->callback = em28xx_tuner_callback; |
3aefb79a MCC |
1312 | |
1313 | /* register everything */ | |
f2d0c1c6 | 1314 | result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev); |
3421b778 | 1315 | |
6ea54d93 | 1316 | if (result < 0) |
3421b778 | 1317 | goto out_free; |
3421b778 | 1318 | |
e3645437 AP |
1319 | /* MFE lock */ |
1320 | dvb->adapter.mfe_shared = mfe_shared; | |
1321 | ||
480be185 | 1322 | em28xx_info("Successfully loaded em28xx-dvb\n"); |
5013318c MCC |
1323 | ret: |
1324 | em28xx_set_mode(dev, EM28XX_SUSPEND); | |
1325 | mutex_unlock(&dev->lock); | |
1326 | return result; | |
3421b778 AT |
1327 | |
1328 | out_free: | |
1329 | kfree(dvb); | |
1330 | dev->dvb = NULL; | |
5013318c | 1331 | goto ret; |
3aefb79a MCC |
1332 | } |
1333 | ||
0b8bd83c CR |
1334 | static inline void prevent_sleep(struct dvb_frontend_ops *ops) |
1335 | { | |
1336 | ops->set_voltage = NULL; | |
1337 | ops->sleep = NULL; | |
1338 | ops->tuner_ops.sleep = NULL; | |
1339 | } | |
1340 | ||
f2d0c1c6 | 1341 | static int em28xx_dvb_fini(struct em28xx *dev) |
3aefb79a | 1342 | { |
505b6d0b | 1343 | if (!dev->board.has_dvb) { |
df619181 DH |
1344 | /* This device does not support the extension */ |
1345 | return 0; | |
1346 | } | |
1347 | ||
3421b778 | 1348 | if (dev->dvb) { |
0b8bd83c CR |
1349 | struct em28xx_dvb *dvb = dev->dvb; |
1350 | ||
2665c299 | 1351 | if (dev->disconnected) { |
0b8bd83c CR |
1352 | /* We cannot tell the device to sleep |
1353 | * once it has been unplugged. */ | |
1354 | if (dvb->fe[0]) | |
1355 | prevent_sleep(&dvb->fe[0]->ops); | |
1356 | if (dvb->fe[1]) | |
1357 | prevent_sleep(&dvb->fe[1]->ops); | |
1358 | } | |
1359 | ||
1360 | em28xx_unregister_dvb(dvb); | |
1361 | kfree(dvb); | |
3421b778 AT |
1362 | dev->dvb = NULL; |
1363 | } | |
3aefb79a MCC |
1364 | |
1365 | return 0; | |
1366 | } | |
1367 | ||
1368 | static struct em28xx_ops dvb_ops = { | |
1369 | .id = EM28XX_DVB, | |
1370 | .name = "Em28xx dvb Extension", | |
f2d0c1c6 JW |
1371 | .init = em28xx_dvb_init, |
1372 | .fini = em28xx_dvb_fini, | |
3aefb79a MCC |
1373 | }; |
1374 | ||
1375 | static int __init em28xx_dvb_register(void) | |
1376 | { | |
1377 | return em28xx_register_extension(&dvb_ops); | |
1378 | } | |
1379 | ||
1380 | static void __exit em28xx_dvb_unregister(void) | |
1381 | { | |
1382 | em28xx_unregister_extension(&dvb_ops); | |
1383 | } | |
1384 | ||
1385 | module_init(em28xx_dvb_register); | |
1386 | module_exit(em28xx_dvb_unregister); |