Commit | Line | Data |
---|---|---|
3aefb79a MCC |
1 | /* |
2 | DVB device driver for em28xx | |
3 | ||
fec528b7 | 4 | (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org> |
3aefb79a | 5 | |
bdfbf952 DH |
6 | (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com> |
7 | - Fixes for the driver to properly work with HVR-950 | |
4fd305b2 | 8 | - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick |
e14b3658 | 9 | - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600 |
bdfbf952 | 10 | |
3421b778 AT |
11 | (c) 2008 Aidan Thornton <makosoft@googlemail.com> |
12 | ||
a950e4a7 FS |
13 | (c) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> |
14 | ||
3421b778 | 15 | Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by: |
3aefb79a MCC |
16 | (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
17 | (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
18 | ||
19 | This program is free software; you can redistribute it and/or modify | |
20 | it under the terms of the GNU General Public License as published by | |
21 | the Free Software Foundation; either version 2 of the License. | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
3aefb79a MCC |
26 | #include <linux/usb.h> |
27 | ||
28 | #include "em28xx.h" | |
29 | #include <media/v4l2-common.h> | |
d3829fad DH |
30 | #include <dvb_demux.h> |
31 | #include <dvb_net.h> | |
32 | #include <dmxdev.h> | |
d7de5d8f FM |
33 | #include <media/tuner.h> |
34 | #include "tuner-simple.h" | |
1e8f31f3 | 35 | #include <linux/gpio.h> |
3aefb79a MCC |
36 | |
37 | #include "lgdt330x.h" | |
7e48b30a | 38 | #include "lgdt3305.h" |
7e6388a1 | 39 | #include "zl10353.h" |
6e7b9ea0 | 40 | #include "s5h1409.h" |
4fb202a8 DH |
41 | #include "mt352.h" |
42 | #include "mt352_priv.h" /* FIXME */ | |
285eb1a4 | 43 | #include "tda1002x.h" |
7e48b30a | 44 | #include "tda18271.h" |
ca3dfd6a | 45 | #include "s921.h" |
75e2b869 | 46 | #include "drxd.h" |
d6a5f921 | 47 | #include "cxd2820r.h" |
fec528b7 MCC |
48 | #include "tda18271c2dd.h" |
49 | #include "drxk.h" | |
36588715 AP |
50 | #include "tda10071.h" |
51 | #include "a8293.h" | |
1985f6fb | 52 | #include "qt1010.h" |
3aefb79a MCC |
53 | |
54 | MODULE_DESCRIPTION("driver for em28xx based DVB cards"); | |
55 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | |
56 | MODULE_LICENSE("GPL"); | |
57 | ||
58 | static unsigned int debug; | |
59 | module_param(debug, int, 0644); | |
60 | MODULE_PARM_DESC(debug, "enable debug messages [dvb]"); | |
61 | ||
62 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |
63 | ||
64 | #define dprintk(level, fmt, arg...) do { \ | |
65 | if (debug >= level) \ | |
3421b778 | 66 | printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \ |
3aefb79a MCC |
67 | } while (0) |
68 | ||
3421b778 | 69 | struct em28xx_dvb { |
f71095be | 70 | struct dvb_frontend *fe[2]; |
3421b778 AT |
71 | |
72 | /* feed count management */ | |
73 | struct mutex lock; | |
74 | int nfeeds; | |
75 | ||
76 | /* general boilerplate stuff */ | |
77 | struct dvb_adapter adapter; | |
78 | struct dvb_demux demux; | |
79 | struct dmxdev dmxdev; | |
80 | struct dmx_frontend fe_hw; | |
81 | struct dmx_frontend fe_mem; | |
82 | struct dvb_net net; | |
fec528b7 | 83 | |
c4c3a3d3 | 84 | /* Due to DRX-K - probably need changes */ |
fec528b7 MCC |
85 | int (*gate_ctrl)(struct dvb_frontend *, int); |
86 | struct semaphore pll_mutex; | |
c4c3a3d3 | 87 | bool dont_attach_fe1; |
13a5336e | 88 | int lna_gpio; |
3421b778 AT |
89 | }; |
90 | ||
91 | ||
92 | static inline void print_err_status(struct em28xx *dev, | |
93 | int packet, int status) | |
3aefb79a | 94 | { |
3421b778 | 95 | char *errmsg = "Unknown"; |
3aefb79a | 96 | |
3421b778 AT |
97 | switch (status) { |
98 | case -ENOENT: | |
99 | errmsg = "unlinked synchronuously"; | |
100 | break; | |
101 | case -ECONNRESET: | |
102 | errmsg = "unlinked asynchronuously"; | |
103 | break; | |
104 | case -ENOSR: | |
105 | errmsg = "Buffer error (overrun)"; | |
106 | break; | |
107 | case -EPIPE: | |
108 | errmsg = "Stalled (device not responding)"; | |
109 | break; | |
110 | case -EOVERFLOW: | |
111 | errmsg = "Babble (bad cable?)"; | |
112 | break; | |
113 | case -EPROTO: | |
114 | errmsg = "Bit-stuff error (bad cable?)"; | |
115 | break; | |
116 | case -EILSEQ: | |
117 | errmsg = "CRC/Timeout (could be anything)"; | |
118 | break; | |
119 | case -ETIME: | |
120 | errmsg = "Device does not respond"; | |
121 | break; | |
122 | } | |
123 | if (packet < 0) { | |
124 | dprintk(1, "URB status %d [%s].\n", status, errmsg); | |
125 | } else { | |
6ea54d93 DSL |
126 | dprintk(1, "URB packet %d, status %d [%s].\n", |
127 | packet, status, errmsg); | |
3421b778 AT |
128 | } |
129 | } | |
3aefb79a | 130 | |
a950e4a7 | 131 | static inline int em28xx_dvb_urb_data_copy(struct em28xx *dev, struct urb *urb) |
3421b778 | 132 | { |
a950e4a7 | 133 | int xfer_bulk, num_packets, i; |
3aefb79a | 134 | |
3421b778 AT |
135 | if (!dev) |
136 | return 0; | |
3aefb79a | 137 | |
2665c299 | 138 | if (dev->disconnected) |
3421b778 AT |
139 | return 0; |
140 | ||
1653cb0c | 141 | if (urb->status < 0) |
3421b778 | 142 | print_err_status(dev, -1, urb->status); |
3421b778 | 143 | |
a950e4a7 FS |
144 | xfer_bulk = usb_pipebulk(urb->pipe); |
145 | ||
146 | if (xfer_bulk) /* bulk */ | |
147 | num_packets = 1; | |
148 | else /* isoc */ | |
149 | num_packets = urb->number_of_packets; | |
150 | ||
151 | for (i = 0; i < num_packets; i++) { | |
152 | if (xfer_bulk) { | |
153 | if (urb->status < 0) { | |
154 | print_err_status(dev, i, urb->status); | |
155 | if (urb->status != -EPROTO) | |
156 | continue; | |
157 | } | |
158 | dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer, | |
159 | urb->actual_length); | |
160 | } else { | |
161 | if (urb->iso_frame_desc[i].status < 0) { | |
162 | print_err_status(dev, i, | |
163 | urb->iso_frame_desc[i].status); | |
164 | if (urb->iso_frame_desc[i].status != -EPROTO) | |
165 | continue; | |
166 | } | |
167 | dvb_dmx_swfilter(&dev->dvb->demux, | |
168 | urb->transfer_buffer + | |
169 | urb->iso_frame_desc[i].offset, | |
170 | urb->iso_frame_desc[i].actual_length); | |
3421b778 | 171 | } |
3421b778 AT |
172 | } |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
f2d0c1c6 | 177 | static int em28xx_start_streaming(struct em28xx_dvb *dvb) |
6ea54d93 | 178 | { |
c67ec53f | 179 | int rc; |
3421b778 | 180 | struct em28xx *dev = dvb->adapter.priv; |
c647a91a FS |
181 | int dvb_max_packet_size, packet_multiplier, dvb_alt; |
182 | ||
183 | if (dev->dvb_xfer_bulk) { | |
184 | if (!dev->dvb_ep_bulk) | |
185 | return -ENODEV; | |
186 | dvb_max_packet_size = 512; /* USB 2.0 spec */ | |
187 | packet_multiplier = EM28XX_DVB_BULK_PACKET_MULTIPLIER; | |
188 | dvb_alt = 0; | |
189 | } else { /* isoc */ | |
190 | if (!dev->dvb_ep_isoc) | |
191 | return -ENODEV; | |
192 | dvb_max_packet_size = dev->dvb_max_pkt_size_isoc; | |
193 | if (dvb_max_packet_size < 0) | |
194 | return dvb_max_packet_size; | |
195 | packet_multiplier = EM28XX_DVB_NUM_ISOC_PACKETS; | |
196 | dvb_alt = dev->dvb_alt_isoc; | |
197 | } | |
3421b778 | 198 | |
c647a91a | 199 | usb_set_interface(dev->udev, 0, dvb_alt); |
c67ec53f MCC |
200 | rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
201 | if (rc < 0) | |
202 | return rc; | |
3421b778 | 203 | |
86d38d1e | 204 | dprintk(1, "Using %d buffers each with %d x %d bytes\n", |
f7acc4bb | 205 | EM28XX_DVB_NUM_BUFS, |
c647a91a FS |
206 | packet_multiplier, |
207 | dvb_max_packet_size); | |
d18e2fda | 208 | |
c647a91a FS |
209 | return em28xx_init_usb_xfer(dev, EM28XX_DIGITAL_MODE, |
210 | dev->dvb_xfer_bulk, | |
057ca0da | 211 | EM28XX_DVB_NUM_BUFS, |
c647a91a FS |
212 | dvb_max_packet_size, |
213 | packet_multiplier, | |
a950e4a7 | 214 | em28xx_dvb_urb_data_copy); |
3421b778 AT |
215 | } |
216 | ||
f2d0c1c6 | 217 | static int em28xx_stop_streaming(struct em28xx_dvb *dvb) |
6ea54d93 | 218 | { |
3421b778 AT |
219 | struct em28xx *dev = dvb->adapter.priv; |
220 | ||
5f5f147f | 221 | em28xx_stop_urbs(dev); |
c67ec53f | 222 | |
3aefb79a MCC |
223 | return 0; |
224 | } | |
225 | ||
f2d0c1c6 | 226 | static int em28xx_start_feed(struct dvb_demux_feed *feed) |
3421b778 AT |
227 | { |
228 | struct dvb_demux *demux = feed->demux; | |
229 | struct em28xx_dvb *dvb = demux->priv; | |
230 | int rc, ret; | |
231 | ||
232 | if (!demux->dmx.frontend) | |
233 | return -EINVAL; | |
234 | ||
235 | mutex_lock(&dvb->lock); | |
236 | dvb->nfeeds++; | |
237 | rc = dvb->nfeeds; | |
238 | ||
239 | if (dvb->nfeeds == 1) { | |
f2d0c1c6 | 240 | ret = em28xx_start_streaming(dvb); |
6ea54d93 DSL |
241 | if (ret < 0) |
242 | rc = ret; | |
3421b778 AT |
243 | } |
244 | ||
245 | mutex_unlock(&dvb->lock); | |
246 | return rc; | |
247 | } | |
248 | ||
f2d0c1c6 | 249 | static int em28xx_stop_feed(struct dvb_demux_feed *feed) |
3421b778 AT |
250 | { |
251 | struct dvb_demux *demux = feed->demux; | |
252 | struct em28xx_dvb *dvb = demux->priv; | |
253 | int err = 0; | |
254 | ||
255 | mutex_lock(&dvb->lock); | |
256 | dvb->nfeeds--; | |
6ea54d93 DSL |
257 | |
258 | if (0 == dvb->nfeeds) | |
f2d0c1c6 | 259 | err = em28xx_stop_streaming(dvb); |
6ea54d93 | 260 | |
3421b778 AT |
261 | mutex_unlock(&dvb->lock); |
262 | return err; | |
263 | } | |
264 | ||
265 | ||
e3569abc MCC |
266 | |
267 | /* ------------------------------------------------------------------ */ | |
268 | static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire) | |
269 | { | |
270 | struct em28xx *dev = fe->dvb->priv; | |
271 | ||
272 | if (acquire) | |
273 | return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); | |
274 | else | |
2fe3e2ee | 275 | return em28xx_set_mode(dev, EM28XX_SUSPEND); |
e3569abc MCC |
276 | } |
277 | ||
3aefb79a MCC |
278 | /* ------------------------------------------------------------------ */ |
279 | ||
227ad4ab MCC |
280 | static struct lgdt330x_config em2880_lgdt3303_dev = { |
281 | .demod_address = 0x0e, | |
282 | .demod_chip = LGDT3303, | |
283 | }; | |
3aefb79a | 284 | |
7e48b30a JW |
285 | static struct lgdt3305_config em2870_lgdt3304_dev = { |
286 | .i2c_addr = 0x0e, | |
287 | .demod_chip = LGDT3304, | |
288 | .spectral_inversion = 1, | |
289 | .deny_i2c_rptr = 1, | |
290 | .mpeg_mode = LGDT3305_MPEG_PARALLEL, | |
291 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
292 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
293 | .vsb_if_khz = 3250, | |
294 | .qam_if_khz = 4000, | |
295 | }; | |
296 | ||
ca3dfd6a MCC |
297 | static struct s921_config sharp_isdbt = { |
298 | .demod_address = 0x30 >> 1 | |
299 | }; | |
300 | ||
7e6388a1 AT |
301 | static struct zl10353_config em28xx_zl10353_with_xc3028 = { |
302 | .demod_address = (0x1e >> 1), | |
303 | .no_tuner = 1, | |
304 | .parallel_ts = 1, | |
305 | .if2 = 45600, | |
306 | }; | |
307 | ||
6e7b9ea0 RK |
308 | static struct s5h1409_config em28xx_s5h1409_with_xc3028 = { |
309 | .demod_address = 0x32 >> 1, | |
310 | .output_mode = S5H1409_PARALLEL_OUTPUT, | |
311 | .gpio = S5H1409_GPIO_OFF, | |
312 | .inversion = S5H1409_INVERSION_OFF, | |
313 | .status_mode = S5H1409_DEMODLOCKING, | |
314 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK | |
315 | }; | |
316 | ||
7e48b30a JW |
317 | static struct tda18271_std_map kworld_a340_std_map = { |
318 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0, | |
319 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
320 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1, | |
321 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
322 | }; | |
323 | ||
324 | static struct tda18271_config kworld_a340_config = { | |
325 | .std_map = &kworld_a340_std_map, | |
326 | }; | |
327 | ||
a84f79ae | 328 | static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = { |
f797608c DH |
329 | .demod_address = (0x1e >> 1), |
330 | .no_tuner = 1, | |
331 | .disable_i2c_gate_ctrl = 1, | |
332 | .parallel_ts = 1, | |
333 | .if2 = 45600, | |
334 | }; | |
335 | ||
75e2b869 | 336 | static struct drxd_config em28xx_drxd = { |
aac865f7 MCC |
337 | .demod_address = 0x70, |
338 | .demod_revision = 0xa2, | |
339 | .pll_type = DRXD_PLL_NONE, | |
340 | .clock = 12000, | |
341 | .insert_rs_byte = 1, | |
342 | .IF = 42800000, | |
6b142b3c | 343 | .disable_i2c_gate_ctrl = 1, |
17d9d558 | 344 | }; |
17d9d558 | 345 | |
61bdbef0 | 346 | static struct drxk_config terratec_h5_drxk = { |
fec528b7 | 347 | .adr = 0x29, |
e4f4f875 | 348 | .single_master = 1, |
f1fe1b75 | 349 | .no_i2c_bridge = 1, |
8b9456ae | 350 | .microcode_name = "dvb-usb-terratec-h5-drxk.fw", |
9e23f50a | 351 | .qam_demod_parameter_count = 2, |
2425bb3d | 352 | .load_firmware_sync = true, |
fec528b7 MCC |
353 | }; |
354 | ||
61bdbef0 | 355 | static struct drxk_config hauppauge_930c_drxk = { |
82e7dbbd EDP |
356 | .adr = 0x29, |
357 | .single_master = 1, | |
358 | .no_i2c_bridge = 1, | |
359 | .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw", | |
360 | .chunk_size = 56, | |
9e23f50a | 361 | .qam_demod_parameter_count = 2, |
2425bb3d | 362 | .load_firmware_sync = true, |
82e7dbbd EDP |
363 | }; |
364 | ||
89040136 | 365 | static struct drxk_config terratec_htc_stick_drxk = { |
c8dce008 MB |
366 | .adr = 0x29, |
367 | .single_master = 1, | |
368 | .no_i2c_bridge = 1, | |
369 | .microcode_name = "dvb-usb-terratec-htc-stick-drxk.fw", | |
370 | .chunk_size = 54, | |
9e23f50a | 371 | .qam_demod_parameter_count = 2, |
c8dce008 MB |
372 | /* Required for the antenna_gpio to disable LNA. */ |
373 | .antenna_dvbt = true, | |
374 | /* The windows driver uses the same. This will disable LNA. */ | |
375 | .antenna_gpio = 0x6, | |
2425bb3d | 376 | .load_firmware_sync = true, |
c8dce008 MB |
377 | }; |
378 | ||
61bdbef0 | 379 | static struct drxk_config maxmedia_ub425_tc_drxk = { |
3553085c AP |
380 | .adr = 0x29, |
381 | .single_master = 1, | |
382 | .no_i2c_bridge = 1, | |
2425bb3d | 383 | .load_firmware_sync = true, |
3553085c AP |
384 | }; |
385 | ||
61bdbef0 | 386 | static struct drxk_config pctv_520e_drxk = { |
c247d7b1 AP |
387 | .adr = 0x29, |
388 | .single_master = 1, | |
389 | .microcode_name = "dvb-demod-drxk-pctv.fw", | |
9e23f50a | 390 | .qam_demod_parameter_count = 2, |
c247d7b1 | 391 | .chunk_size = 58, |
f6f379df AP |
392 | .antenna_dvbt = true, /* disable LNA */ |
393 | .antenna_gpio = (1 << 2), /* disable LNA */ | |
2425bb3d | 394 | .load_firmware_sync = true, |
c247d7b1 AP |
395 | }; |
396 | ||
fec528b7 MCC |
397 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) |
398 | { | |
399 | struct em28xx_dvb *dvb = fe->sec_priv; | |
400 | int status; | |
401 | ||
402 | if (!dvb) | |
403 | return -EINVAL; | |
404 | ||
405 | if (enable) { | |
406 | down(&dvb->pll_mutex); | |
407 | status = dvb->gate_ctrl(fe, 1); | |
408 | } else { | |
409 | status = dvb->gate_ctrl(fe, 0); | |
410 | up(&dvb->pll_mutex); | |
411 | } | |
412 | return status; | |
413 | } | |
414 | ||
82e7dbbd EDP |
415 | static void hauppauge_hvr930c_init(struct em28xx *dev) |
416 | { | |
417 | int i; | |
418 | ||
419 | struct em28xx_reg_seq hauppauge_hvr930c_init[] = { | |
de72405f MCC |
420 | {EM2874_R80_GPIO, 0xff, 0xff, 0x65}, |
421 | {EM2874_R80_GPIO, 0xfb, 0xff, 0x32}, | |
422 | {EM2874_R80_GPIO, 0xff, 0xff, 0xb8}, | |
82e7dbbd EDP |
423 | { -1, -1, -1, -1}, |
424 | }; | |
425 | struct em28xx_reg_seq hauppauge_hvr930c_end[] = { | |
de72405f MCC |
426 | {EM2874_R80_GPIO, 0xef, 0xff, 0x01}, |
427 | {EM2874_R80_GPIO, 0xaf, 0xff, 0x65}, | |
428 | {EM2874_R80_GPIO, 0xef, 0xff, 0x76}, | |
429 | {EM2874_R80_GPIO, 0xef, 0xff, 0x01}, | |
430 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b}, | |
431 | {EM2874_R80_GPIO, 0xef, 0xff, 0x40}, | |
432 | ||
433 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x65}, | |
434 | {EM2874_R80_GPIO, 0xef, 0xff, 0x65}, | |
435 | {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b}, | |
436 | {EM2874_R80_GPIO, 0xef, 0xff, 0x65}, | |
82e7dbbd | 437 | |
82e7dbbd EDP |
438 | { -1, -1, -1, -1}, |
439 | }; | |
440 | ||
82e7dbbd EDP |
441 | struct { |
442 | unsigned char r[4]; | |
443 | int len; | |
444 | } regs[] = { | |
445 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
446 | {{ 0x01, 0x02 }, 2}, | |
447 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
448 | {{ 0x01, 0x00 }, 2}, | |
449 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
450 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
451 | {{ 0x01, 0x00 }, 2}, | |
452 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
453 | {{ 0x04, 0x00 }, 2}, | |
454 | {{ 0x00, 0x04 }, 2}, | |
455 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
456 | {{ 0x04, 0x14 }, 2}, | |
457 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
458 | }; | |
459 | ||
460 | em28xx_gpio_set(dev, hauppauge_hvr930c_init); | |
461 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
462 | msleep(10); | |
463 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
464 | msleep(10); | |
465 | ||
c7a45e5b | 466 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
82e7dbbd EDP |
467 | |
468 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 469 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
82e7dbbd EDP |
470 | em28xx_gpio_set(dev, hauppauge_hvr930c_end); |
471 | ||
472 | msleep(100); | |
473 | ||
474 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
475 | msleep(30); | |
476 | ||
82e7dbbd EDP |
477 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45); |
478 | msleep(10); | |
479 | ||
480 | } | |
481 | ||
fec528b7 MCC |
482 | static void terratec_h5_init(struct em28xx *dev) |
483 | { | |
484 | int i; | |
485 | struct em28xx_reg_seq terratec_h5_init[] = { | |
486 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
487 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
488 | {EM2874_R80_GPIO, 0xf2, 0xff, 50}, | |
489 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
490 | { -1, -1, -1, -1}, | |
491 | }; | |
492 | struct em28xx_reg_seq terratec_h5_end[] = { | |
493 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
494 | {EM2874_R80_GPIO, 0xa6, 0xff, 50}, | |
495 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
496 | { -1, -1, -1, -1}, | |
497 | }; | |
498 | struct { | |
499 | unsigned char r[4]; | |
500 | int len; | |
501 | } regs[] = { | |
502 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
503 | {{ 0x01, 0x02 }, 2}, | |
504 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
505 | {{ 0x01, 0x00 }, 2}, | |
506 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
507 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
508 | {{ 0x01, 0x00 }, 2}, | |
509 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
510 | {{ 0x04, 0x00 }, 2}, | |
511 | {{ 0x00, 0x04 }, 2}, | |
512 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
513 | {{ 0x04, 0x14 }, 2}, | |
514 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
515 | }; | |
516 | ||
517 | em28xx_gpio_set(dev, terratec_h5_init); | |
518 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
519 | msleep(10); | |
520 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45); | |
521 | msleep(10); | |
522 | ||
c7a45e5b | 523 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
fec528b7 MCC |
524 | |
525 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 526 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
fec528b7 MCC |
527 | em28xx_gpio_set(dev, terratec_h5_end); |
528 | }; | |
529 | ||
c8dce008 MB |
530 | static void terratec_htc_stick_init(struct em28xx *dev) |
531 | { | |
532 | int i; | |
533 | ||
534 | /* | |
535 | * GPIO configuration: | |
536 | * 0xff: unknown (does not affect DVB-T). | |
537 | * 0xf6: DRX-K (demodulator). | |
538 | * 0xe6: unknown (does not affect DVB-T). | |
539 | * 0xb6: unknown (does not affect DVB-T). | |
540 | */ | |
541 | struct em28xx_reg_seq terratec_htc_stick_init[] = { | |
542 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
543 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
544 | {EM2874_R80_GPIO, 0xe6, 0xff, 50}, | |
545 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | |
546 | { -1, -1, -1, -1}, | |
547 | }; | |
548 | struct em28xx_reg_seq terratec_htc_stick_end[] = { | |
549 | {EM2874_R80_GPIO, 0xb6, 0xff, 100}, | |
550 | {EM2874_R80_GPIO, 0xf6, 0xff, 50}, | |
551 | { -1, -1, -1, -1}, | |
552 | }; | |
553 | ||
89040136 MB |
554 | /* |
555 | * Init the analog decoder (not yet supported), but | |
556 | * it's probably still a good idea. | |
557 | */ | |
c8dce008 MB |
558 | struct { |
559 | unsigned char r[4]; | |
560 | int len; | |
561 | } regs[] = { | |
562 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
563 | {{ 0x01, 0x02 }, 2}, | |
564 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
565 | {{ 0x01, 0x00 }, 2}, | |
566 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
567 | }; | |
568 | ||
569 | em28xx_gpio_set(dev, terratec_htc_stick_init); | |
570 | ||
571 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
572 | msleep(10); | |
573 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
574 | msleep(10); | |
575 | ||
c7a45e5b | 576 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
c8dce008 MB |
577 | |
578 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 579 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
c8dce008 MB |
580 | |
581 | em28xx_gpio_set(dev, terratec_htc_stick_end); | |
582 | }; | |
583 | ||
89040136 MB |
584 | static void terratec_htc_usb_xs_init(struct em28xx *dev) |
585 | { | |
586 | int i; | |
587 | ||
588 | struct em28xx_reg_seq terratec_htc_usb_xs_init[] = { | |
589 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | |
590 | {EM2874_R80_GPIO, 0xb2, 0xff, 100}, | |
591 | {EM2874_R80_GPIO, 0xb2, 0xff, 50}, | |
592 | {EM2874_R80_GPIO, 0xb6, 0xff, 100}, | |
593 | { -1, -1, -1, -1}, | |
594 | }; | |
595 | struct em28xx_reg_seq terratec_htc_usb_xs_end[] = { | |
596 | {EM2874_R80_GPIO, 0xa6, 0xff, 100}, | |
597 | {EM2874_R80_GPIO, 0xa6, 0xff, 50}, | |
598 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | |
599 | { -1, -1, -1, -1}, | |
600 | }; | |
601 | ||
602 | /* | |
603 | * Init the analog decoder (not yet supported), but | |
604 | * it's probably still a good idea. | |
605 | */ | |
606 | struct { | |
607 | unsigned char r[4]; | |
608 | int len; | |
609 | } regs[] = { | |
610 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
611 | {{ 0x01, 0x02 }, 2}, | |
612 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
613 | {{ 0x01, 0x00 }, 2}, | |
614 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
615 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
616 | {{ 0x01, 0x00 }, 2}, | |
617 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
618 | {{ 0x04, 0x00 }, 2}, | |
619 | {{ 0x00, 0x04 }, 2}, | |
620 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | |
621 | {{ 0x04, 0x14 }, 2}, | |
622 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | |
623 | }; | |
624 | ||
625 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
626 | ||
627 | em28xx_gpio_set(dev, terratec_htc_usb_xs_init); | |
628 | ||
629 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | |
630 | msleep(10); | |
631 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44); | |
632 | msleep(10); | |
633 | ||
c7a45e5b | 634 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; |
89040136 MB |
635 | |
636 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 637 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
89040136 MB |
638 | |
639 | em28xx_gpio_set(dev, terratec_htc_usb_xs_end); | |
640 | }; | |
641 | ||
c247d7b1 AP |
642 | static void pctv_520e_init(struct em28xx *dev) |
643 | { | |
644 | /* | |
26c8a729 AP |
645 | * Init AVF4910B analog decoder. Looks like I2C traffic to |
646 | * digital demodulator and tuner are routed via AVF4910B. | |
c247d7b1 AP |
647 | */ |
648 | int i; | |
649 | struct { | |
650 | unsigned char r[4]; | |
651 | int len; | |
652 | } regs[] = { | |
653 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | |
654 | {{ 0x01, 0x02 }, 2}, | |
655 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | |
656 | {{ 0x01, 0x00 }, 2}, | |
657 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | |
658 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | |
659 | {{ 0x01, 0x00 }, 2}, | |
660 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | |
661 | }; | |
662 | ||
c7a45e5b | 663 | dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; /* 0x41 */ |
c247d7b1 AP |
664 | |
665 | for (i = 0; i < ARRAY_SIZE(regs); i++) | |
c7a45e5b | 666 | i2c_master_send(&dev->i2c_client[dev->def_i2c_bus], regs[i].r, regs[i].len); |
c247d7b1 AP |
667 | }; |
668 | ||
33eebec5 | 669 | static int em28xx_pctv_290e_set_lna(struct dvb_frontend *fe) |
13a5336e | 670 | { |
33eebec5 | 671 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
13a5336e AP |
672 | struct em28xx *dev = fe->dvb->priv; |
673 | #ifdef CONFIG_GPIOLIB | |
674 | struct em28xx_dvb *dvb = dev->dvb; | |
675 | int ret; | |
676 | unsigned long flags; | |
677 | ||
33eebec5 AP |
678 | if (c->lna == 1) |
679 | flags = GPIOF_OUT_INIT_HIGH; /* enable LNA */ | |
13a5336e | 680 | else |
33eebec5 | 681 | flags = GPIOF_OUT_INIT_LOW; /* disable LNA */ |
13a5336e AP |
682 | |
683 | ret = gpio_request_one(dvb->lna_gpio, flags, NULL); | |
684 | if (ret) | |
685 | em28xx_errdev("gpio request failed %d\n", ret); | |
686 | else | |
687 | gpio_free(dvb->lna_gpio); | |
688 | ||
689 | return ret; | |
690 | #else | |
33eebec5 AP |
691 | dev_warn(&dev->udev->dev, "%s: LNA control is disabled (lna=%u)\n", |
692 | KBUILD_MODNAME, c->lna); | |
13a5336e AP |
693 | return 0; |
694 | #endif | |
695 | } | |
696 | ||
f2d0c1c6 | 697 | static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe) |
4fb202a8 DH |
698 | { |
699 | /* Values extracted from a USB trace of the Terratec Windows driver */ | |
700 | static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c }; | |
701 | static u8 reset[] = { RESET, 0x80 }; | |
702 | static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; | |
703 | static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 }; | |
704 | static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 }; | |
705 | static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d }; | |
706 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; | |
707 | static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 }; | |
708 | static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 }; | |
ff69786b | 709 | static u8 tuner_go[] = { TUNER_GO, 0x01}; |
4fb202a8 DH |
710 | |
711 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
712 | udelay(200); | |
713 | mt352_write(fe, reset, sizeof(reset)); | |
714 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
715 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
716 | mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg)); | |
717 | mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg)); | |
718 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
719 | mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg)); | |
720 | mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg)); | |
721 | mt352_write(fe, tuner_go, sizeof(tuner_go)); | |
722 | return 0; | |
723 | } | |
724 | ||
725 | static struct mt352_config terratec_xs_mt352_cfg = { | |
726 | .demod_address = (0x1e >> 1), | |
727 | .no_tuner = 1, | |
728 | .if2 = 45600, | |
f2d0c1c6 | 729 | .demod_init = em28xx_mt352_terratec_xs_init, |
4fb202a8 DH |
730 | }; |
731 | ||
285eb1a4 AP |
732 | static struct tda10023_config em28xx_tda10023_config = { |
733 | .demod_address = 0x0c, | |
734 | .invert = 1, | |
735 | }; | |
736 | ||
d6a5f921 AP |
737 | static struct cxd2820r_config em28xx_cxd2820r_config = { |
738 | .i2c_address = (0xd8 >> 1), | |
739 | .ts_mode = CXD2820R_TS_SERIAL, | |
d6a5f921 AP |
740 | }; |
741 | ||
742 | static struct tda18271_config em28xx_cxd2820r_tda18271_config = { | |
743 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
0db4bf42 | 744 | .gate = TDA18271_GATE_DIGITAL, |
d6a5f921 AP |
745 | }; |
746 | ||
36588715 | 747 | static const struct tda10071_config em28xx_tda10071_config = { |
41f55d57 MK |
748 | .demod_i2c_addr = 0x55, /* (0xaa >> 1) */ |
749 | .tuner_i2c_addr = 0x14, | |
36588715 AP |
750 | .i2c_wr_max = 64, |
751 | .ts_mode = TDA10071_TS_SERIAL, | |
752 | .spec_inv = 0, | |
753 | .xtal = 40444000, /* 40.444 MHz */ | |
754 | .pll_multiplier = 20, | |
755 | }; | |
756 | ||
757 | static const struct a8293_config em28xx_a8293_config = { | |
758 | .i2c_addr = 0x08, /* (0x10 >> 1) */ | |
759 | }; | |
760 | ||
1985f6fb AP |
761 | static struct zl10353_config em28xx_zl10353_no_i2c_gate_dev = { |
762 | .demod_address = (0x1e >> 1), | |
763 | .disable_i2c_gate_ctrl = 1, | |
764 | .no_tuner = 1, | |
765 | .parallel_ts = 1, | |
766 | }; | |
767 | static struct qt1010_config em28xx_qt1010_config = { | |
768 | .i2c_address = 0x62 | |
769 | ||
770 | }; | |
771 | ||
3aefb79a MCC |
772 | /* ------------------------------------------------------------------ */ |
773 | ||
f2d0c1c6 | 774 | static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev) |
3aefb79a MCC |
775 | { |
776 | struct dvb_frontend *fe; | |
3ca9c093 MCC |
777 | struct xc2028_config cfg; |
778 | ||
6ea54d93 | 779 | memset(&cfg, 0, sizeof(cfg)); |
c7a45e5b | 780 | cfg.i2c_adap = &dev->i2c_adap[dev->def_i2c_bus]; |
3ca9c093 | 781 | cfg.i2c_addr = addr; |
3ca9c093 | 782 | |
f71095be | 783 | if (!dev->dvb->fe[0]) { |
480be185 FR |
784 | em28xx_errdev("/2: dvb frontend not attached. " |
785 | "Can't attach xc3028\n"); | |
3aefb79a MCC |
786 | return -EINVAL; |
787 | } | |
788 | ||
f71095be | 789 | fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg); |
3aefb79a | 790 | if (!fe) { |
480be185 | 791 | em28xx_errdev("/2: xc3028 attach failed\n"); |
f71095be AP |
792 | dvb_frontend_detach(dev->dvb->fe[0]); |
793 | dev->dvb->fe[0] = NULL; | |
3aefb79a MCC |
794 | return -EINVAL; |
795 | } | |
796 | ||
480be185 | 797 | em28xx_info("%s/2: xc3028 attached\n", dev->name); |
3aefb79a MCC |
798 | |
799 | return 0; | |
800 | } | |
801 | ||
3421b778 AT |
802 | /* ------------------------------------------------------------------ */ |
803 | ||
f2d0c1c6 JW |
804 | static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module, |
805 | struct em28xx *dev, struct device *device) | |
3aefb79a | 806 | { |
3421b778 | 807 | int result; |
3aefb79a | 808 | |
3421b778 | 809 | mutex_init(&dvb->lock); |
3aefb79a | 810 | |
3421b778 AT |
811 | /* register adapter */ |
812 | result = dvb_register_adapter(&dvb->adapter, dev->name, module, device, | |
813 | adapter_nr); | |
814 | if (result < 0) { | |
815 | printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n", | |
816 | dev->name, result); | |
817 | goto fail_adapter; | |
818 | } | |
e3569abc MCC |
819 | |
820 | /* Ensure all frontends negotiate bus access */ | |
f71095be AP |
821 | dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl; |
822 | if (dvb->fe[1]) | |
823 | dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl; | |
e3569abc | 824 | |
3421b778 AT |
825 | dvb->adapter.priv = dev; |
826 | ||
827 | /* register frontend */ | |
f71095be | 828 | result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]); |
3421b778 AT |
829 | if (result < 0) { |
830 | printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n", | |
831 | dev->name, result); | |
f71095be AP |
832 | goto fail_frontend0; |
833 | } | |
834 | ||
835 | /* register 2nd frontend */ | |
836 | if (dvb->fe[1]) { | |
837 | result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]); | |
838 | if (result < 0) { | |
839 | printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n", | |
840 | dev->name, result); | |
841 | goto fail_frontend1; | |
842 | } | |
3421b778 AT |
843 | } |
844 | ||
845 | /* register demux stuff */ | |
846 | dvb->demux.dmx.capabilities = | |
847 | DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
848 | DMX_MEMORY_BASED_FILTERING; | |
849 | dvb->demux.priv = dvb; | |
850 | dvb->demux.filternum = 256; | |
851 | dvb->demux.feednum = 256; | |
f2d0c1c6 JW |
852 | dvb->demux.start_feed = em28xx_start_feed; |
853 | dvb->demux.stop_feed = em28xx_stop_feed; | |
e3569abc | 854 | |
3421b778 AT |
855 | result = dvb_dmx_init(&dvb->demux); |
856 | if (result < 0) { | |
857 | printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n", | |
858 | dev->name, result); | |
859 | goto fail_dmx; | |
860 | } | |
861 | ||
862 | dvb->dmxdev.filternum = 256; | |
863 | dvb->dmxdev.demux = &dvb->demux.dmx; | |
864 | dvb->dmxdev.capabilities = 0; | |
865 | result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter); | |
866 | if (result < 0) { | |
867 | printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n", | |
868 | dev->name, result); | |
869 | goto fail_dmxdev; | |
870 | } | |
52284c3e | 871 | |
3421b778 AT |
872 | dvb->fe_hw.source = DMX_FRONTEND_0; |
873 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
874 | if (result < 0) { | |
875 | printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n", | |
876 | dev->name, result); | |
877 | goto fail_fe_hw; | |
878 | } | |
879 | ||
880 | dvb->fe_mem.source = DMX_MEMORY_FE; | |
881 | result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
882 | if (result < 0) { | |
883 | printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n", | |
884 | dev->name, result); | |
885 | goto fail_fe_mem; | |
886 | } | |
887 | ||
888 | result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
889 | if (result < 0) { | |
890 | printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n", | |
891 | dev->name, result); | |
892 | goto fail_fe_conn; | |
893 | } | |
894 | ||
895 | /* register network adapter */ | |
896 | dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx); | |
897 | return 0; | |
898 | ||
899 | fail_fe_conn: | |
900 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
901 | fail_fe_mem: | |
902 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
903 | fail_fe_hw: | |
904 | dvb_dmxdev_release(&dvb->dmxdev); | |
905 | fail_dmxdev: | |
906 | dvb_dmx_release(&dvb->demux); | |
907 | fail_dmx: | |
f71095be AP |
908 | if (dvb->fe[1]) |
909 | dvb_unregister_frontend(dvb->fe[1]); | |
910 | dvb_unregister_frontend(dvb->fe[0]); | |
911 | fail_frontend1: | |
912 | if (dvb->fe[1]) | |
913 | dvb_frontend_detach(dvb->fe[1]); | |
914 | fail_frontend0: | |
915 | dvb_frontend_detach(dvb->fe[0]); | |
3421b778 AT |
916 | dvb_unregister_adapter(&dvb->adapter); |
917 | fail_adapter: | |
918 | return result; | |
919 | } | |
920 | ||
f2d0c1c6 | 921 | static void em28xx_unregister_dvb(struct em28xx_dvb *dvb) |
3421b778 AT |
922 | { |
923 | dvb_net_release(&dvb->net); | |
924 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); | |
925 | dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); | |
926 | dvb_dmxdev_release(&dvb->dmxdev); | |
927 | dvb_dmx_release(&dvb->demux); | |
f71095be AP |
928 | if (dvb->fe[1]) |
929 | dvb_unregister_frontend(dvb->fe[1]); | |
930 | dvb_unregister_frontend(dvb->fe[0]); | |
c4c3a3d3 | 931 | if (dvb->fe[1] && !dvb->dont_attach_fe1) |
f71095be AP |
932 | dvb_frontend_detach(dvb->fe[1]); |
933 | dvb_frontend_detach(dvb->fe[0]); | |
3421b778 AT |
934 | dvb_unregister_adapter(&dvb->adapter); |
935 | } | |
936 | ||
f2d0c1c6 | 937 | static int em28xx_dvb_init(struct em28xx *dev) |
3421b778 | 938 | { |
13a5336e | 939 | int result = 0, mfe_shared = 0; |
3421b778 AT |
940 | struct em28xx_dvb *dvb; |
941 | ||
505b6d0b | 942 | if (!dev->board.has_dvb) { |
df619181 | 943 | /* This device does not support the extension */ |
ca3dfd6a | 944 | printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n"); |
df619181 DH |
945 | return 0; |
946 | } | |
947 | ||
3421b778 | 948 | dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL); |
6ea54d93 DSL |
949 | |
950 | if (dvb == NULL) { | |
480be185 | 951 | em28xx_info("em28xx_dvb: memory allocation failed\n"); |
3421b778 AT |
952 | return -ENOMEM; |
953 | } | |
954 | dev->dvb = dvb; | |
f71095be | 955 | dvb->fe[0] = dvb->fe[1] = NULL; |
3aefb79a | 956 | |
5013318c | 957 | mutex_lock(&dev->lock); |
c67ec53f | 958 | em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
3aefb79a MCC |
959 | /* init frontend */ |
960 | switch (dev->model) { | |
ebaefdb7 | 961 | case EM2874_BOARD_LEADERSHIP_ISDBT: |
f71095be | 962 | dvb->fe[0] = dvb_attach(s921_attach, |
c7a45e5b | 963 | &sharp_isdbt, &dev->i2c_adap[dev->def_i2c_bus]); |
ca3dfd6a | 964 | |
f71095be | 965 | if (!dvb->fe[0]) { |
ca3dfd6a MCC |
966 | result = -EINVAL; |
967 | goto out_free; | |
968 | } | |
969 | ||
970 | break; | |
f89bc329 | 971 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850: |
10ac6603 | 972 | case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950: |
4fd305b2 | 973 | case EM2880_BOARD_PINNACLE_PCTV_HD_PRO: |
e14b3658 | 974 | case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600: |
f71095be | 975 | dvb->fe[0] = dvb_attach(lgdt330x_attach, |
3421b778 | 976 | &em2880_lgdt3303_dev, |
c7a45e5b | 977 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 978 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
3421b778 AT |
979 | result = -EINVAL; |
980 | goto out_free; | |
981 | } | |
227ad4ab | 982 | break; |
46510b56 | 983 | case EM2880_BOARD_KWORLD_DVB_310U: |
f71095be | 984 | dvb->fe[0] = dvb_attach(zl10353_attach, |
3421b778 | 985 | &em28xx_zl10353_with_xc3028, |
c7a45e5b | 986 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 987 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
3421b778 AT |
988 | result = -EINVAL; |
989 | goto out_free; | |
990 | } | |
7e6388a1 | 991 | break; |
a84f79ae | 992 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900: |
ec994d05 | 993 | case EM2882_BOARD_TERRATEC_HYBRID_XS: |
01a5fd6f | 994 | case EM2880_BOARD_EMPIRE_DUAL_TV: |
f71095be | 995 | dvb->fe[0] = dvb_attach(zl10353_attach, |
a84f79ae | 996 | &em28xx_zl10353_xc3028_no_i2c_gate, |
c7a45e5b | 997 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 998 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
a84f79ae DH |
999 | result = -EINVAL; |
1000 | goto out_free; | |
1001 | } | |
1002 | break; | |
f797608c | 1003 | case EM2880_BOARD_TERRATEC_HYBRID_XS: |
65638011 | 1004 | case EM2880_BOARD_TERRATEC_HYBRID_XS_FR: |
d5b3ba9c | 1005 | case EM2881_BOARD_PINNACLE_HYBRID_PRO: |
7ca7ef60 | 1006 | case EM2882_BOARD_DIKOM_DK300: |
811fab62 | 1007 | case EM2882_BOARD_KWORLD_VS_DVBT: |
f71095be | 1008 | dvb->fe[0] = dvb_attach(zl10353_attach, |
a84f79ae | 1009 | &em28xx_zl10353_xc3028_no_i2c_gate, |
c7a45e5b | 1010 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be | 1011 | if (dvb->fe[0] == NULL) { |
f797608c DH |
1012 | /* This board could have either a zl10353 or a mt352. |
1013 | If the chip id isn't for zl10353, try mt352 */ | |
f71095be | 1014 | dvb->fe[0] = dvb_attach(mt352_attach, |
4fb202a8 | 1015 | &terratec_xs_mt352_cfg, |
c7a45e5b | 1016 | &dev->i2c_adap[dev->def_i2c_bus]); |
f797608c | 1017 | } |
4fb202a8 | 1018 | |
f2d0c1c6 | 1019 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
f797608c DH |
1020 | result = -EINVAL; |
1021 | goto out_free; | |
1022 | } | |
1023 | break; | |
1985f6fb AP |
1024 | case EM2870_BOARD_KWORLD_355U: |
1025 | dvb->fe[0] = dvb_attach(zl10353_attach, | |
1026 | &em28xx_zl10353_no_i2c_gate_dev, | |
c7a45e5b | 1027 | &dev->i2c_adap[dev->def_i2c_bus]); |
1985f6fb AP |
1028 | if (dvb->fe[0] != NULL) |
1029 | dvb_attach(qt1010_attach, dvb->fe[0], | |
c7a45e5b | 1030 | &dev->i2c_adap[dev->def_i2c_bus], &em28xx_qt1010_config); |
1985f6fb | 1031 | break; |
6e7b9ea0 | 1032 | case EM2883_BOARD_KWORLD_HYBRID_330U: |
19859229 | 1033 | case EM2882_BOARD_EVGA_INDTUBE: |
f71095be | 1034 | dvb->fe[0] = dvb_attach(s5h1409_attach, |
6e7b9ea0 | 1035 | &em28xx_s5h1409_with_xc3028, |
c7a45e5b | 1036 | &dev->i2c_adap[dev->def_i2c_bus]); |
f2d0c1c6 | 1037 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
6e7b9ea0 RK |
1038 | result = -EINVAL; |
1039 | goto out_free; | |
1040 | } | |
1041 | break; | |
d7de5d8f | 1042 | case EM2882_BOARD_KWORLD_ATSC_315U: |
f71095be | 1043 | dvb->fe[0] = dvb_attach(lgdt330x_attach, |
d7de5d8f | 1044 | &em2880_lgdt3303_dev, |
c7a45e5b | 1045 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be AP |
1046 | if (dvb->fe[0] != NULL) { |
1047 | if (!dvb_attach(simple_tuner_attach, dvb->fe[0], | |
c7a45e5b | 1048 | &dev->i2c_adap[dev->def_i2c_bus], 0x61, TUNER_THOMSON_DTT761X)) { |
d7de5d8f FM |
1049 | result = -EINVAL; |
1050 | goto out_free; | |
1051 | } | |
1052 | } | |
1053 | break; | |
17d9d558 | 1054 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2: |
ad9b4bb2 | 1055 | case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E: |
f71095be | 1056 | dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL, |
c7a45e5b | 1057 | &dev->i2c_adap[dev->def_i2c_bus], &dev->udev->dev); |
f2d0c1c6 | 1058 | if (em28xx_attach_xc3028(0x61, dev) < 0) { |
17d9d558 DH |
1059 | result = -EINVAL; |
1060 | goto out_free; | |
1061 | } | |
1062 | break; | |
285eb1a4 AP |
1063 | case EM2870_BOARD_REDDO_DVB_C_USB_BOX: |
1064 | /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */ | |
f71095be | 1065 | dvb->fe[0] = dvb_attach(tda10023_attach, |
285eb1a4 | 1066 | &em28xx_tda10023_config, |
c7a45e5b | 1067 | &dev->i2c_adap[dev->def_i2c_bus], 0x48); |
f71095be AP |
1068 | if (dvb->fe[0]) { |
1069 | if (!dvb_attach(simple_tuner_attach, dvb->fe[0], | |
c7a45e5b | 1070 | &dev->i2c_adap[dev->def_i2c_bus], 0x60, TUNER_PHILIPS_CU1216L)) { |
285eb1a4 AP |
1071 | result = -EINVAL; |
1072 | goto out_free; | |
1073 | } | |
1074 | } | |
1075 | break; | |
7e48b30a | 1076 | case EM2870_BOARD_KWORLD_A340: |
f71095be | 1077 | dvb->fe[0] = dvb_attach(lgdt3305_attach, |
7e48b30a | 1078 | &em2870_lgdt3304_dev, |
c7a45e5b | 1079 | &dev->i2c_adap[dev->def_i2c_bus]); |
f71095be AP |
1080 | if (dvb->fe[0] != NULL) |
1081 | dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1082 | &dev->i2c_adap[dev->def_i2c_bus], &kworld_a340_config); |
7e48b30a | 1083 | break; |
d6a5f921 | 1084 | case EM28174_BOARD_PCTV_290E: |
a36a66d7 AP |
1085 | /* set default GPIO0 for LNA, used if GPIOLIB is undefined */ |
1086 | dvb->lna_gpio = CXD2820R_GPIO_E | CXD2820R_GPIO_O | | |
1087 | CXD2820R_GPIO_L; | |
d6a5f921 | 1088 | dvb->fe[0] = dvb_attach(cxd2820r_attach, |
7e7b8287 | 1089 | &em28xx_cxd2820r_config, |
c7a45e5b | 1090 | &dev->i2c_adap[dev->def_i2c_bus], |
13a5336e | 1091 | &dvb->lna_gpio); |
d6a5f921 | 1092 | if (dvb->fe[0]) { |
d6a5f921 | 1093 | /* FE 0 attach tuner */ |
7e7b8287 MA |
1094 | if (!dvb_attach(tda18271_attach, |
1095 | dvb->fe[0], | |
1096 | 0x60, | |
c7a45e5b | 1097 | &dev->i2c_adap[dev->def_i2c_bus], |
7e7b8287 MA |
1098 | &em28xx_cxd2820r_tda18271_config)) { |
1099 | ||
d6a5f921 AP |
1100 | dvb_frontend_detach(dvb->fe[0]); |
1101 | result = -EINVAL; | |
1102 | goto out_free; | |
1103 | } | |
1e8f31f3 | 1104 | |
13a5336e | 1105 | #ifdef CONFIG_GPIOLIB |
0c42a55c AP |
1106 | /* enable LNA for DVB-T, DVB-T2 and DVB-C */ |
1107 | result = gpio_request_one(dvb->lna_gpio, | |
1108 | GPIOF_OUT_INIT_LOW, NULL); | |
1109 | if (result) | |
1110 | em28xx_errdev("gpio request failed %d\n", | |
1111 | result); | |
1112 | else | |
1113 | gpio_free(dvb->lna_gpio); | |
1114 | ||
1115 | result = 0; /* continue even set LNA fails */ | |
13a5336e | 1116 | #endif |
0c42a55c AP |
1117 | dvb->fe[0]->ops.set_lna = em28xx_pctv_290e_set_lna; |
1118 | } | |
1119 | ||
82e7dbbd EDP |
1120 | break; |
1121 | case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C: | |
8503232f MCC |
1122 | { |
1123 | struct xc5000_config cfg; | |
82e7dbbd EDP |
1124 | hauppauge_hvr930c_init(dev); |
1125 | ||
de72405f | 1126 | dvb->fe[0] = dvb_attach(drxk_attach, |
c7a45e5b | 1127 | &hauppauge_930c_drxk, &dev->i2c_adap[dev->def_i2c_bus]); |
82e7dbbd EDP |
1128 | if (!dvb->fe[0]) { |
1129 | result = -EINVAL; | |
1130 | goto out_free; | |
1131 | } | |
1132 | /* FIXME: do we need a pll semaphore? */ | |
1133 | dvb->fe[0]->sec_priv = dvb; | |
1134 | sema_init(&dvb->pll_mutex, 1); | |
1135 | dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; | |
1136 | dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; | |
82e7dbbd EDP |
1137 | |
1138 | /* Attach xc5000 */ | |
82e7dbbd EDP |
1139 | memset(&cfg, 0, sizeof(cfg)); |
1140 | cfg.i2c_address = 0x61; | |
de72405f | 1141 | cfg.if_khz = 4000; |
82e7dbbd EDP |
1142 | |
1143 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | |
1144 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1); | |
c7a45e5b | 1145 | if (!dvb_attach(xc5000_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], |
de72405f | 1146 | &cfg)) { |
82e7dbbd EDP |
1147 | result = -EINVAL; |
1148 | goto out_free; | |
1149 | } | |
82e7dbbd EDP |
1150 | if (dvb->fe[0]->ops.i2c_gate_ctrl) |
1151 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); | |
1152 | ||
fec528b7 | 1153 | break; |
8503232f | 1154 | } |
fec528b7 MCC |
1155 | case EM2884_BOARD_TERRATEC_H5: |
1156 | terratec_h5_init(dev); | |
1157 | ||
c7a45e5b | 1158 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap[dev->def_i2c_bus]); |
c4c3a3d3 | 1159 | if (!dvb->fe[0]) { |
fec528b7 MCC |
1160 | result = -EINVAL; |
1161 | goto out_free; | |
1162 | } | |
1163 | /* FIXME: do we need a pll semaphore? */ | |
1164 | dvb->fe[0]->sec_priv = dvb; | |
1165 | sema_init(&dvb->pll_mutex, 1); | |
1166 | dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; | |
1167 | dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; | |
fec528b7 | 1168 | |
c4c3a3d3 | 1169 | /* Attach tda18271 to DVB-C frontend */ |
fec528b7 MCC |
1170 | if (dvb->fe[0]->ops.i2c_gate_ctrl) |
1171 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1); | |
c7a45e5b | 1172 | if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], 0x60)) { |
fec528b7 MCC |
1173 | result = -EINVAL; |
1174 | goto out_free; | |
1175 | } | |
1176 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | |
1177 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); | |
c4c3a3d3 | 1178 | |
d6a5f921 | 1179 | break; |
36588715 AP |
1180 | case EM28174_BOARD_PCTV_460E: |
1181 | /* attach demod */ | |
1182 | dvb->fe[0] = dvb_attach(tda10071_attach, | |
c7a45e5b | 1183 | &em28xx_tda10071_config, &dev->i2c_adap[dev->def_i2c_bus]); |
36588715 AP |
1184 | |
1185 | /* attach SEC */ | |
1186 | if (dvb->fe[0]) | |
c7a45e5b | 1187 | dvb_attach(a8293_attach, dvb->fe[0], &dev->i2c_adap[dev->def_i2c_bus], |
36588715 AP |
1188 | &em28xx_a8293_config); |
1189 | break; | |
3553085c AP |
1190 | case EM2874_BOARD_MAXMEDIA_UB425_TC: |
1191 | /* attach demodulator */ | |
1192 | dvb->fe[0] = dvb_attach(drxk_attach, &maxmedia_ub425_tc_drxk, | |
c7a45e5b | 1193 | &dev->i2c_adap[dev->def_i2c_bus]); |
3553085c AP |
1194 | |
1195 | if (dvb->fe[0]) { | |
1196 | /* disable I2C-gate */ | |
1197 | dvb->fe[0]->ops.i2c_gate_ctrl = NULL; | |
1198 | ||
1199 | /* attach tuner */ | |
1200 | if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], | |
c7a45e5b | 1201 | &dev->i2c_adap[dev->def_i2c_bus], 0x60)) { |
3553085c AP |
1202 | dvb_frontend_detach(dvb->fe[0]); |
1203 | result = -EINVAL; | |
1204 | goto out_free; | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | /* TODO: we need drx-3913k firmware in order to support DVB-T */ | |
1209 | em28xx_info("MaxMedia UB425-TC: only DVB-C supported by that " \ | |
1210 | "driver version\n"); | |
1211 | ||
c247d7b1 | 1212 | break; |
fa5527cd IK |
1213 | case EM2884_BOARD_PCTV_510E: |
1214 | case EM2884_BOARD_PCTV_520E: | |
1215 | pctv_520e_init(dev); | |
1216 | ||
c247d7b1 AP |
1217 | /* attach demodulator */ |
1218 | dvb->fe[0] = dvb_attach(drxk_attach, &pctv_520e_drxk, | |
c7a45e5b | 1219 | &dev->i2c_adap[dev->def_i2c_bus]); |
c247d7b1 AP |
1220 | |
1221 | if (dvb->fe[0]) { | |
1222 | /* attach tuner */ | |
1223 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1224 | &dev->i2c_adap[dev->def_i2c_bus], |
c247d7b1 AP |
1225 | &em28xx_cxd2820r_tda18271_config)) { |
1226 | dvb_frontend_detach(dvb->fe[0]); | |
1227 | result = -EINVAL; | |
1228 | goto out_free; | |
1229 | } | |
1230 | } | |
3553085c | 1231 | break; |
c8dce008 MB |
1232 | case EM2884_BOARD_CINERGY_HTC_STICK: |
1233 | terratec_htc_stick_init(dev); | |
1234 | ||
89040136 MB |
1235 | /* attach demodulator */ |
1236 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk, | |
c7a45e5b | 1237 | &dev->i2c_adap[dev->def_i2c_bus]); |
89040136 MB |
1238 | if (!dvb->fe[0]) { |
1239 | result = -EINVAL; | |
1240 | goto out_free; | |
1241 | } | |
1242 | ||
1243 | /* Attach the demodulator. */ | |
1244 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1245 | &dev->i2c_adap[dev->def_i2c_bus], |
89040136 MB |
1246 | &em28xx_cxd2820r_tda18271_config)) { |
1247 | result = -EINVAL; | |
1248 | goto out_free; | |
1249 | } | |
1250 | break; | |
1251 | case EM2884_BOARD_TERRATEC_HTC_USB_XS: | |
1252 | terratec_htc_usb_xs_init(dev); | |
1253 | ||
c8dce008 MB |
1254 | /* attach demodulator */ |
1255 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk, | |
c7a45e5b | 1256 | &dev->i2c_adap[dev->def_i2c_bus]); |
c8dce008 MB |
1257 | if (!dvb->fe[0]) { |
1258 | result = -EINVAL; | |
1259 | goto out_free; | |
1260 | } | |
1261 | ||
1262 | /* Attach the demodulator. */ | |
1263 | if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, | |
c7a45e5b | 1264 | &dev->i2c_adap[dev->def_i2c_bus], |
c8dce008 MB |
1265 | &em28xx_cxd2820r_tda18271_config)) { |
1266 | result = -EINVAL; | |
1267 | goto out_free; | |
1268 | } | |
1269 | break; | |
3aefb79a | 1270 | default: |
480be185 FR |
1271 | em28xx_errdev("/2: The frontend of your DVB/ATSC card" |
1272 | " isn't supported yet\n"); | |
3aefb79a MCC |
1273 | break; |
1274 | } | |
f71095be | 1275 | if (NULL == dvb->fe[0]) { |
480be185 | 1276 | em28xx_errdev("/2: frontend initialization failed\n"); |
3421b778 AT |
1277 | result = -EINVAL; |
1278 | goto out_free; | |
3aefb79a | 1279 | } |
d7cba043 | 1280 | /* define general-purpose callback pointer */ |
f71095be | 1281 | dvb->fe[0]->callback = em28xx_tuner_callback; |
82e7dbbd | 1282 | if (dvb->fe[1]) |
de72405f | 1283 | dvb->fe[1]->callback = em28xx_tuner_callback; |
3aefb79a MCC |
1284 | |
1285 | /* register everything */ | |
f2d0c1c6 | 1286 | result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev); |
3421b778 | 1287 | |
6ea54d93 | 1288 | if (result < 0) |
3421b778 | 1289 | goto out_free; |
3421b778 | 1290 | |
e3645437 AP |
1291 | /* MFE lock */ |
1292 | dvb->adapter.mfe_shared = mfe_shared; | |
1293 | ||
480be185 | 1294 | em28xx_info("Successfully loaded em28xx-dvb\n"); |
5013318c MCC |
1295 | ret: |
1296 | em28xx_set_mode(dev, EM28XX_SUSPEND); | |
1297 | mutex_unlock(&dev->lock); | |
1298 | return result; | |
3421b778 AT |
1299 | |
1300 | out_free: | |
1301 | kfree(dvb); | |
1302 | dev->dvb = NULL; | |
5013318c | 1303 | goto ret; |
3aefb79a MCC |
1304 | } |
1305 | ||
0b8bd83c CR |
1306 | static inline void prevent_sleep(struct dvb_frontend_ops *ops) |
1307 | { | |
1308 | ops->set_voltage = NULL; | |
1309 | ops->sleep = NULL; | |
1310 | ops->tuner_ops.sleep = NULL; | |
1311 | } | |
1312 | ||
f2d0c1c6 | 1313 | static int em28xx_dvb_fini(struct em28xx *dev) |
3aefb79a | 1314 | { |
505b6d0b | 1315 | if (!dev->board.has_dvb) { |
df619181 DH |
1316 | /* This device does not support the extension */ |
1317 | return 0; | |
1318 | } | |
1319 | ||
3421b778 | 1320 | if (dev->dvb) { |
0b8bd83c CR |
1321 | struct em28xx_dvb *dvb = dev->dvb; |
1322 | ||
2665c299 | 1323 | if (dev->disconnected) { |
0b8bd83c CR |
1324 | /* We cannot tell the device to sleep |
1325 | * once it has been unplugged. */ | |
1326 | if (dvb->fe[0]) | |
1327 | prevent_sleep(&dvb->fe[0]->ops); | |
1328 | if (dvb->fe[1]) | |
1329 | prevent_sleep(&dvb->fe[1]->ops); | |
1330 | } | |
1331 | ||
1332 | em28xx_unregister_dvb(dvb); | |
1333 | kfree(dvb); | |
3421b778 AT |
1334 | dev->dvb = NULL; |
1335 | } | |
3aefb79a MCC |
1336 | |
1337 | return 0; | |
1338 | } | |
1339 | ||
1340 | static struct em28xx_ops dvb_ops = { | |
1341 | .id = EM28XX_DVB, | |
1342 | .name = "Em28xx dvb Extension", | |
f2d0c1c6 JW |
1343 | .init = em28xx_dvb_init, |
1344 | .fini = em28xx_dvb_fini, | |
3aefb79a MCC |
1345 | }; |
1346 | ||
1347 | static int __init em28xx_dvb_register(void) | |
1348 | { | |
1349 | return em28xx_register_extension(&dvb_ops); | |
1350 | } | |
1351 | ||
1352 | static void __exit em28xx_dvb_unregister(void) | |
1353 | { | |
1354 | em28xx_unregister_extension(&dvb_ops); | |
1355 | } | |
1356 | ||
1357 | module_init(em28xx_dvb_register); | |
1358 | module_exit(em28xx_dvb_unregister); |