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Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/mfleming...
[deliverable/linux.git] / drivers / media / v4l2-core / v4l2-dv-timings.c
CommitLineData
b18787ed
HV		 1/*
2 * v4l2-dv-timings - dv-timings helper functions
3 *
4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/errno.h>
25#include <linux/videodev2.h>
26#include <linux/v4l2-dv-timings.h>
b18787ed
HV		 27#include <media/v4l2-dv-timings.h>
28
c4885ada
HV		 29MODULE_AUTHOR("Hans Verkuil");
30MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions");
31MODULE_LICENSE("GPL");
32
d1c65ad6 33const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
b18787ed
HV		 34 V4L2_DV_BT_CEA_640X480P59_94,
35 V4L2_DV_BT_CEA_720X480I59_94,
36 V4L2_DV_BT_CEA_720X480P59_94,
37 V4L2_DV_BT_CEA_720X576I50,
38 V4L2_DV_BT_CEA_720X576P50,
39 V4L2_DV_BT_CEA_1280X720P24,
40 V4L2_DV_BT_CEA_1280X720P25,
41 V4L2_DV_BT_CEA_1280X720P30,
42 V4L2_DV_BT_CEA_1280X720P50,
43 V4L2_DV_BT_CEA_1280X720P60,
44 V4L2_DV_BT_CEA_1920X1080P24,
45 V4L2_DV_BT_CEA_1920X1080P25,
46 V4L2_DV_BT_CEA_1920X1080P30,
47 V4L2_DV_BT_CEA_1920X1080I50,
48 V4L2_DV_BT_CEA_1920X1080P50,
49 V4L2_DV_BT_CEA_1920X1080I60,
50 V4L2_DV_BT_CEA_1920X1080P60,
51 V4L2_DV_BT_DMT_640X350P85,
52 V4L2_DV_BT_DMT_640X400P85,
53 V4L2_DV_BT_DMT_720X400P85,
54 V4L2_DV_BT_DMT_640X480P72,
55 V4L2_DV_BT_DMT_640X480P75,
56 V4L2_DV_BT_DMT_640X480P85,
57 V4L2_DV_BT_DMT_800X600P56,
58 V4L2_DV_BT_DMT_800X600P60,
59 V4L2_DV_BT_DMT_800X600P72,
60 V4L2_DV_BT_DMT_800X600P75,
61 V4L2_DV_BT_DMT_800X600P85,
62 V4L2_DV_BT_DMT_800X600P120_RB,
63 V4L2_DV_BT_DMT_848X480P60,
64 V4L2_DV_BT_DMT_1024X768I43,
65 V4L2_DV_BT_DMT_1024X768P60,
66 V4L2_DV_BT_DMT_1024X768P70,
67 V4L2_DV_BT_DMT_1024X768P75,
68 V4L2_DV_BT_DMT_1024X768P85,
69 V4L2_DV_BT_DMT_1024X768P120_RB,
70 V4L2_DV_BT_DMT_1152X864P75,
71 V4L2_DV_BT_DMT_1280X768P60_RB,
72 V4L2_DV_BT_DMT_1280X768P60,
73 V4L2_DV_BT_DMT_1280X768P75,
74 V4L2_DV_BT_DMT_1280X768P85,
75 V4L2_DV_BT_DMT_1280X768P120_RB,
76 V4L2_DV_BT_DMT_1280X800P60_RB,
77 V4L2_DV_BT_DMT_1280X800P60,
78 V4L2_DV_BT_DMT_1280X800P75,
79 V4L2_DV_BT_DMT_1280X800P85,
80 V4L2_DV_BT_DMT_1280X800P120_RB,
81 V4L2_DV_BT_DMT_1280X960P60,
82 V4L2_DV_BT_DMT_1280X960P85,
83 V4L2_DV_BT_DMT_1280X960P120_RB,
84 V4L2_DV_BT_DMT_1280X1024P60,
85 V4L2_DV_BT_DMT_1280X1024P75,
86 V4L2_DV_BT_DMT_1280X1024P85,
87 V4L2_DV_BT_DMT_1280X1024P120_RB,
88 V4L2_DV_BT_DMT_1360X768P60,
89 V4L2_DV_BT_DMT_1360X768P120_RB,
90 V4L2_DV_BT_DMT_1366X768P60,
91 V4L2_DV_BT_DMT_1366X768P60_RB,
92 V4L2_DV_BT_DMT_1400X1050P60_RB,
93 V4L2_DV_BT_DMT_1400X1050P60,
94 V4L2_DV_BT_DMT_1400X1050P75,
95 V4L2_DV_BT_DMT_1400X1050P85,
96 V4L2_DV_BT_DMT_1400X1050P120_RB,
97 V4L2_DV_BT_DMT_1440X900P60_RB,
98 V4L2_DV_BT_DMT_1440X900P60,
99 V4L2_DV_BT_DMT_1440X900P75,
100 V4L2_DV_BT_DMT_1440X900P85,
101 V4L2_DV_BT_DMT_1440X900P120_RB,
102 V4L2_DV_BT_DMT_1600X900P60_RB,
103 V4L2_DV_BT_DMT_1600X1200P60,
104 V4L2_DV_BT_DMT_1600X1200P65,
105 V4L2_DV_BT_DMT_1600X1200P70,
106 V4L2_DV_BT_DMT_1600X1200P75,
107 V4L2_DV_BT_DMT_1600X1200P85,
108 V4L2_DV_BT_DMT_1600X1200P120_RB,
109 V4L2_DV_BT_DMT_1680X1050P60_RB,
110 V4L2_DV_BT_DMT_1680X1050P60,
111 V4L2_DV_BT_DMT_1680X1050P75,
112 V4L2_DV_BT_DMT_1680X1050P85,
113 V4L2_DV_BT_DMT_1680X1050P120_RB,
114 V4L2_DV_BT_DMT_1792X1344P60,
115 V4L2_DV_BT_DMT_1792X1344P75,
116 V4L2_DV_BT_DMT_1792X1344P120_RB,
117 V4L2_DV_BT_DMT_1856X1392P60,
118 V4L2_DV_BT_DMT_1856X1392P75,
119 V4L2_DV_BT_DMT_1856X1392P120_RB,
120 V4L2_DV_BT_DMT_1920X1200P60_RB,
121 V4L2_DV_BT_DMT_1920X1200P60,
122 V4L2_DV_BT_DMT_1920X1200P75,
123 V4L2_DV_BT_DMT_1920X1200P85,
124 V4L2_DV_BT_DMT_1920X1200P120_RB,
125 V4L2_DV_BT_DMT_1920X1440P60,
126 V4L2_DV_BT_DMT_1920X1440P75,
127 V4L2_DV_BT_DMT_1920X1440P120_RB,
128 V4L2_DV_BT_DMT_2048X1152P60_RB,
129 V4L2_DV_BT_DMT_2560X1600P60_RB,
130 V4L2_DV_BT_DMT_2560X1600P60,
131 V4L2_DV_BT_DMT_2560X1600P75,
132 V4L2_DV_BT_DMT_2560X1600P85,
133 V4L2_DV_BT_DMT_2560X1600P120_RB,
bc96f30c
HV		 134 V4L2_DV_BT_CEA_3840X2160P24,
135 V4L2_DV_BT_CEA_3840X2160P25,
136 V4L2_DV_BT_CEA_3840X2160P30,
137 V4L2_DV_BT_CEA_3840X2160P50,
138 V4L2_DV_BT_CEA_3840X2160P60,
139 V4L2_DV_BT_CEA_4096X2160P24,
140 V4L2_DV_BT_CEA_4096X2160P25,
141 V4L2_DV_BT_CEA_4096X2160P30,
142 V4L2_DV_BT_CEA_4096X2160P50,
143 V4L2_DV_BT_DMT_4096X2160P59_94_RB,
144 V4L2_DV_BT_CEA_4096X2160P60,
d1c65ad6 145 { }
b18787ed 146};
d1c65ad6 147EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
b18787ed 148
70b65494 149bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
b8f0fff4
HV		 150 const struct v4l2_dv_timings_cap *dvcap,
151 v4l2_check_dv_timings_fnc fnc,
152 void *fnc_handle)
b18787ed
HV		 153{
154 const struct v4l2_bt_timings *bt = &t->bt;
155 const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
156 u32 caps = cap->capabilities;
157
158 if (t->type != V4L2_DV_BT_656_1120)
159 return false;
160 if (t->type != dvcap->type ||
161 bt->height < cap->min_height ||
162 bt->height > cap->max_height ||
163 bt->width < cap->min_width ||
164 bt->width > cap->max_width ||
165 bt->pixelclock < cap->min_pixelclock ||
166 bt->pixelclock > cap->max_pixelclock ||
c166845c
HV		 167 (cap->standards && bt->standards &&
168 !(bt->standards & cap->standards)) ||
b18787ed
HV		 169 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
170 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
171 return false;
b8f0fff4 172 return fnc == NULL || fnc(t, fnc_handle);
b18787ed 173}
70b65494 174EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
b18787ed
HV		 175
176int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
b8f0fff4
HV		 177 const struct v4l2_dv_timings_cap *cap,
178 v4l2_check_dv_timings_fnc fnc,
179 void *fnc_handle)
b18787ed
HV		 180{
181 u32 i, idx;
182
183 memset(t->reserved, 0, sizeof(t->reserved));
d1c65ad6 184 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
b8f0fff4
HV		 185 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
186 fnc, fnc_handle) &&
b18787ed 187 idx++ == t->index) {
d1c65ad6 188 t->timings = v4l2_dv_timings_presets[i];
b18787ed
HV		 189 return 0;
190 }
191 }
192 return -EINVAL;
193}
194EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
195
196bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
197 const struct v4l2_dv_timings_cap *cap,
b8f0fff4
HV		 198 unsigned pclock_delta,
199 v4l2_check_dv_timings_fnc fnc,
200 void *fnc_handle)
b18787ed
HV		 201{
202 int i;
203
b8f0fff4 204 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
b18787ed
HV		 205 return false;
206
d1c65ad6 207 for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
b8f0fff4
HV		 208 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
209 fnc, fnc_handle) &&
210 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
211 pclock_delta)) {
d1c65ad6 212 *t = v4l2_dv_timings_presets[i];
b18787ed
HV		 213 return true;
214 }
215 }
216 return false;
217}
218EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
25764158
HV		 219
220/**
ef1ed8f5 221 * v4l2_match_dv_timings - check if two timings match
25764158
HV		 222 * @t1 - compare this v4l2_dv_timings struct...
223 * @t2 - with this struct.
224 * @pclock_delta - the allowed pixelclock deviation.
225 *
226 * Compare t1 with t2 with a given margin of error for the pixelclock.
227 */
ef1ed8f5
HV		 228bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
229 const struct v4l2_dv_timings *t2,
230 unsigned pclock_delta)
25764158
HV		 231{
232 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
233 return false;
234 if (t1->bt.width == t2->bt.width &&
235 t1->bt.height == t2->bt.height &&
236 t1->bt.interlaced == t2->bt.interlaced &&
237 t1->bt.polarities == t2->bt.polarities &&
238 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
239 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
240 t1->bt.hfrontporch == t2->bt.hfrontporch &&
241 t1->bt.vfrontporch == t2->bt.vfrontporch &&
242 t1->bt.vsync == t2->bt.vsync &&
243 t1->bt.vbackporch == t2->bt.vbackporch &&
244 (!t1->bt.interlaced ||
245 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
246 t1->bt.il_vsync == t2->bt.il_vsync &&
247 t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
248 return true;
249 return false;
250}
ef1ed8f5 251EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
25764158 252
0216dc2f
HV		 253void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
254 const struct v4l2_dv_timings *t, bool detailed)
255{
256 const struct v4l2_bt_timings *bt = &t->bt;
257 u32 htot, vtot;
258
259 if (t->type != V4L2_DV_BT_656_1120)
260 return;
261
262 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
263 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
264
265 if (prefix == NULL)
266 prefix = "";
267
268 pr_info("%s: %s%ux%u%s%u (%ux%u)\n", dev_prefix, prefix,
269 bt->width, bt->height, bt->interlaced ? "i" : "p",
270 (htot * vtot) > 0 ? ((u32)bt->pixelclock / (htot * vtot)) : 0,
271 htot, vtot);
272
273 if (!detailed)
274 return;
275
276 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n",
277 dev_prefix, bt->hfrontporch,
278 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
279 bt->hsync, bt->hbackporch);
280 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n",
281 dev_prefix, bt->vfrontporch,
282 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
283 bt->vsync, bt->vbackporch);
284 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);
285 pr_info("%s: flags (0x%x):%s%s%s%s\n", dev_prefix, bt->flags,
286 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
287 " REDUCED_BLANKING" : "",
288 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
289 " CAN_REDUCE_FPS" : "",
290 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
291 " REDUCED_FPS" : "",
292 (bt->flags & V4L2_DV_FL_HALF_LINE) ?
293 " HALF_LINE" : "");
294 pr_info("%s: standards (0x%x):%s%s%s%s\n", dev_prefix, bt->standards,
295 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "",
296 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "",
297 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
298 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "");
299}
300EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
301
25764158
HV		 302/*
303 * CVT defines
304 * Based on Coordinated Video Timings Standard
305 * version 1.1 September 10, 2003
306 */
307
308#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
309
310/* Normal blanking */
311#define CVT_MIN_V_BPORCH 7 /* lines */
312#define CVT_MIN_V_PORCH_RND 3 /* lines */
313#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
314
315/* Normal blanking for CVT uses GTF to calculate horizontal blanking */
316#define CVT_CELL_GRAN 8 /* character cell granularity */
317#define CVT_M 600 /* blanking formula gradient */
318#define CVT_C 40 /* blanking formula offset */
319#define CVT_K 128 /* blanking formula scaling factor */
320#define CVT_J 20 /* blanking formula scaling factor */
321#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
322#define CVT_M_PRIME (CVT_K * CVT_M / 256)
323
324/* Reduced Blanking */
325#define CVT_RB_MIN_V_BPORCH 7 /* lines */
326#define CVT_RB_V_FPORCH 3 /* lines */
327#define CVT_RB_MIN_V_BLANK 460 /* us */
328#define CVT_RB_H_SYNC 32 /* pixels */
329#define CVT_RB_H_BPORCH 80 /* pixels */
330#define CVT_RB_H_BLANK 160 /* pixels */
331
332/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
333 * @frame_height - the total height of the frame (including blanking) in lines.
334 * @hfreq - the horizontal frequency in Hz.
335 * @vsync - the height of the vertical sync in lines.
336 * @polarities - the horizontal and vertical polarities (same as struct
337 * v4l2_bt_timings polarities).
338 * @fmt - the resulting timings.
339 *
340 * This function will attempt to detect if the given values correspond to a
341 * valid CVT format. If so, then it will return true, and fmt will be filled
342 * in with the found CVT timings.
3be55e04
HV		 343 *
344 * TODO: VESA defined a new version 2 of their reduced blanking
345 * formula. Support for that is currently missing in this CVT
346 * detection function.
25764158
HV		 347 */
348bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
349 u32 polarities, struct v4l2_dv_timings *fmt)
350{
351 int v_fp, v_bp, h_fp, h_bp, hsync;
352 int frame_width, image_height, image_width;
353 bool reduced_blanking;
354 unsigned pix_clk;
355
356 if (vsync < 4 || vsync > 7)
357 return false;
358
359 if (polarities == V4L2_DV_VSYNC_POS_POL)
360 reduced_blanking = false;
361 else if (polarities == V4L2_DV_HSYNC_POS_POL)
362 reduced_blanking = true;
363 else
364 return false;
365
366 /* Vertical */
367 if (reduced_blanking) {
368 v_fp = CVT_RB_V_FPORCH;
c3e75c7d 369 v_bp = (CVT_RB_MIN_V_BLANK * hfreq + 1999999) / 1000000;
25764158
HV		 370 v_bp -= vsync + v_fp;
371
372 if (v_bp < CVT_RB_MIN_V_BPORCH)
373 v_bp = CVT_RB_MIN_V_BPORCH;
374 } else {
375 v_fp = CVT_MIN_V_PORCH_RND;
c3e75c7d 376 v_bp = (CVT_MIN_VSYNC_BP * hfreq + 1999999) / 1000000 - vsync;
25764158
HV		 377
378 if (v_bp < CVT_MIN_V_BPORCH)
379 v_bp = CVT_MIN_V_BPORCH;
380 }
381 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
382
383 /* Aspect ratio based on vsync */
384 switch (vsync) {
385 case 4:
386 image_width = (image_height * 4) / 3;
387 break;
388 case 5:
389 image_width = (image_height * 16) / 9;
390 break;
391 case 6:
392 image_width = (image_height * 16) / 10;
393 break;
394 case 7:
395 /* special case */
396 if (image_height == 1024)
397 image_width = (image_height * 5) / 4;
398 else if (image_height == 768)
399 image_width = (image_height * 15) / 9;
400 else
401 return false;
402 break;
403 default:
404 return false;
405 }
406
407 image_width = image_width & ~7;
408
409 /* Horizontal */
410 if (reduced_blanking) {
411 pix_clk = (image_width + CVT_RB_H_BLANK) * hfreq;
412 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
413
414 h_bp = CVT_RB_H_BPORCH;
415 hsync = CVT_RB_H_SYNC;
416 h_fp = CVT_RB_H_BLANK - h_bp - hsync;
417
418 frame_width = image_width + CVT_RB_H_BLANK;
419 } else {
c3e75c7d
MB		 420 unsigned ideal_duty_cycle_per_myriad =
421 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq;
25764158 422 int h_blank;
25764158 423
c3e75c7d
MB		 424 if (ideal_duty_cycle_per_myriad < 2000)
425 ideal_duty_cycle_per_myriad = 2000;
25764158 426
c3e75c7d
MB		 427 h_blank = image_width * ideal_duty_cycle_per_myriad /
428 (10000 - ideal_duty_cycle_per_myriad);
429 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN;
25764158
HV		 430
431 pix_clk = (image_width + h_blank) * hfreq;
432 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
433
434 h_bp = h_blank / 2;
435 frame_width = image_width + h_blank;
436
437 hsync = (frame_width * 8 + 50) / 100;
438 hsync = hsync - hsync % CVT_CELL_GRAN;
439 h_fp = h_blank - hsync - h_bp;
440 }
441
074ca43f 442 fmt->type = V4L2_DV_BT_656_1120;
25764158
HV		 443 fmt->bt.polarities = polarities;
444 fmt->bt.width = image_width;
445 fmt->bt.height = image_height;
446 fmt->bt.hfrontporch = h_fp;
447 fmt->bt.vfrontporch = v_fp;
448 fmt->bt.hsync = hsync;
449 fmt->bt.vsync = vsync;
450 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
451 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
452 fmt->bt.pixelclock = pix_clk;
453 fmt->bt.standards = V4L2_DV_BT_STD_CVT;
454 if (reduced_blanking)
455 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
456 return true;
457}
458EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
459
460/*
461 * GTF defines
462 * Based on Generalized Timing Formula Standard
463 * Version 1.1 September 2, 1999
464 */
465
466#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
467
468#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
469#define GTF_V_FP 1 /* vertical front porch (lines) */
470#define GTF_CELL_GRAN 8 /* character cell granularity */
471
472/* Default */
473#define GTF_D_M 600 /* blanking formula gradient */
474#define GTF_D_C 40 /* blanking formula offset */
475#define GTF_D_K 128 /* blanking formula scaling factor */
476#define GTF_D_J 20 /* blanking formula scaling factor */
477#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
478#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
479
480/* Secondary */
481#define GTF_S_M 3600 /* blanking formula gradient */
482#define GTF_S_C 40 /* blanking formula offset */
483#define GTF_S_K 128 /* blanking formula scaling factor */
484#define GTF_S_J 35 /* blanking formula scaling factor */
485#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
486#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
487
488/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
489 * @frame_height - the total height of the frame (including blanking) in lines.
490 * @hfreq - the horizontal frequency in Hz.
491 * @vsync - the height of the vertical sync in lines.
492 * @polarities - the horizontal and vertical polarities (same as struct
493 * v4l2_bt_timings polarities).
494 * @aspect - preferred aspect ratio. GTF has no method of determining the
495 * aspect ratio in order to derive the image width from the
496 * image height, so it has to be passed explicitly. Usually
497 * the native screen aspect ratio is used for this. If it
498 * is not filled in correctly, then 16:9 will be assumed.
499 * @fmt - the resulting timings.
500 *
501 * This function will attempt to detect if the given values correspond to a
502 * valid GTF format. If so, then it will return true, and fmt will be filled
503 * in with the found GTF timings.
504 */
505bool v4l2_detect_gtf(unsigned frame_height,
506 unsigned hfreq,
507 unsigned vsync,
508 u32 polarities,
509 struct v4l2_fract aspect,
510 struct v4l2_dv_timings *fmt)
511{
512 int pix_clk;
513 int v_fp, v_bp, h_fp, hsync;
514 int frame_width, image_height, image_width;
515 bool default_gtf;
516 int h_blank;
517
518 if (vsync != 3)
519 return false;
520
521 if (polarities == V4L2_DV_VSYNC_POS_POL)
522 default_gtf = true;
523 else if (polarities == V4L2_DV_HSYNC_POS_POL)
524 default_gtf = false;
525 else
526 return false;
527
528 /* Vertical */
529 v_fp = GTF_V_FP;
530 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
531 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
532
533 if (aspect.numerator == 0 || aspect.denominator == 0) {
534 aspect.numerator = 16;
535 aspect.denominator = 9;
536 }
537 image_width = ((image_height * aspect.numerator) / aspect.denominator);
257cc4b5 538 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1);
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HV		 539
540 /* Horizontal */
541 if (default_gtf)
542 h_blank = ((image_width * GTF_D_C_PRIME * hfreq) -
543 (image_width * GTF_D_M_PRIME * 1000) +
544 (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) / 2) /
545 (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000);
546 else
547 h_blank = ((image_width * GTF_S_C_PRIME * hfreq) -
548 (image_width * GTF_S_M_PRIME * 1000) +
549 (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) / 2) /
550 (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000);
551
552 h_blank = h_blank - h_blank % (2 * GTF_CELL_GRAN);
553 frame_width = image_width + h_blank;
554
555 pix_clk = (image_width + h_blank) * hfreq;
556 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
557
558 hsync = (frame_width * 8 + 50) / 100;
559 hsync = hsync - hsync % GTF_CELL_GRAN;
560
561 h_fp = h_blank / 2 - hsync;
562
074ca43f 563 fmt->type = V4L2_DV_BT_656_1120;
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HV		 564 fmt->bt.polarities = polarities;
565 fmt->bt.width = image_width;
566 fmt->bt.height = image_height;
567 fmt->bt.hfrontporch = h_fp;
568 fmt->bt.vfrontporch = v_fp;
569 fmt->bt.hsync = hsync;
570 fmt->bt.vsync = vsync;
571 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
572 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
573 fmt->bt.pixelclock = pix_clk;
574 fmt->bt.standards = V4L2_DV_BT_STD_GTF;
575 if (!default_gtf)
576 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
577 return true;
578}
579EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
580
581/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
582 * 0x15 and 0x16 from the EDID.
583 * @hor_landscape - byte 0x15 from the EDID.
584 * @vert_portrait - byte 0x16 from the EDID.
585 *
586 * Determines the aspect ratio from the EDID.
587 * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
588 * "Horizontal and Vertical Screen Size or Aspect Ratio"
589 */
590struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
591{
592 struct v4l2_fract aspect = { 16, 9 };
593 u32 tmp;
594 u8 ratio;
595
596 /* Nothing filled in, fallback to 16:9 */
597 if (!hor_landscape && !vert_portrait)
598 return aspect;
599 /* Both filled in, so they are interpreted as the screen size in cm */
600 if (hor_landscape && vert_portrait) {
601 aspect.numerator = hor_landscape;
602 aspect.denominator = vert_portrait;
603 return aspect;
604 }
605 /* Only one is filled in, so interpret them as a ratio:
606 (val + 99) / 100 */
607 ratio = hor_landscape | vert_portrait;
608 /* Change some rounded values into the exact aspect ratio */
609 if (ratio == 79) {
610 aspect.numerator = 16;
611 aspect.denominator = 9;
612 } else if (ratio == 34) {
613 aspect.numerator = 4;
f71920ef 614 aspect.denominator = 3;
25764158
HV		 615 } else if (ratio == 68) {
616 aspect.numerator = 15;
f71920ef 617 aspect.denominator = 9;
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HV		 618 } else {
619 aspect.numerator = hor_landscape + 99;
620 aspect.denominator = 100;
621 }
622 if (hor_landscape)
623 return aspect;
624 /* The aspect ratio is for portrait, so swap numerator and denominator */
625 tmp = aspect.denominator;
626 aspect.denominator = aspect.numerator;
627 aspect.numerator = tmp;
628 return aspect;
629}
630EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
Linux kernel - Deliverables
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