cpufreq: governor: Always schedule work on the CPU running update
[deliverable/linux.git] / drivers / media / v4l2-core / v4l2-dv-timings.c
CommitLineData
b18787ed
HV
1/*
2 * v4l2-dv-timings - dv-timings helper functions
3 *
4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/errno.h>
25#include <linux/videodev2.h>
26#include <linux/v4l2-dv-timings.h>
b18787ed 27#include <media/v4l2-dv-timings.h>
c9bc9f50 28#include <linux/math64.h>
b18787ed 29
c4885ada
HV
30MODULE_AUTHOR("Hans Verkuil");
31MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions");
32MODULE_LICENSE("GPL");
33
d1c65ad6 34const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
b18787ed
HV
35 V4L2_DV_BT_CEA_640X480P59_94,
36 V4L2_DV_BT_CEA_720X480I59_94,
37 V4L2_DV_BT_CEA_720X480P59_94,
38 V4L2_DV_BT_CEA_720X576I50,
39 V4L2_DV_BT_CEA_720X576P50,
40 V4L2_DV_BT_CEA_1280X720P24,
41 V4L2_DV_BT_CEA_1280X720P25,
42 V4L2_DV_BT_CEA_1280X720P30,
43 V4L2_DV_BT_CEA_1280X720P50,
44 V4L2_DV_BT_CEA_1280X720P60,
45 V4L2_DV_BT_CEA_1920X1080P24,
46 V4L2_DV_BT_CEA_1920X1080P25,
47 V4L2_DV_BT_CEA_1920X1080P30,
48 V4L2_DV_BT_CEA_1920X1080I50,
49 V4L2_DV_BT_CEA_1920X1080P50,
50 V4L2_DV_BT_CEA_1920X1080I60,
51 V4L2_DV_BT_CEA_1920X1080P60,
52 V4L2_DV_BT_DMT_640X350P85,
53 V4L2_DV_BT_DMT_640X400P85,
54 V4L2_DV_BT_DMT_720X400P85,
55 V4L2_DV_BT_DMT_640X480P72,
56 V4L2_DV_BT_DMT_640X480P75,
57 V4L2_DV_BT_DMT_640X480P85,
58 V4L2_DV_BT_DMT_800X600P56,
59 V4L2_DV_BT_DMT_800X600P60,
60 V4L2_DV_BT_DMT_800X600P72,
61 V4L2_DV_BT_DMT_800X600P75,
62 V4L2_DV_BT_DMT_800X600P85,
63 V4L2_DV_BT_DMT_800X600P120_RB,
64 V4L2_DV_BT_DMT_848X480P60,
65 V4L2_DV_BT_DMT_1024X768I43,
66 V4L2_DV_BT_DMT_1024X768P60,
67 V4L2_DV_BT_DMT_1024X768P70,
68 V4L2_DV_BT_DMT_1024X768P75,
69 V4L2_DV_BT_DMT_1024X768P85,
70 V4L2_DV_BT_DMT_1024X768P120_RB,
71 V4L2_DV_BT_DMT_1152X864P75,
72 V4L2_DV_BT_DMT_1280X768P60_RB,
73 V4L2_DV_BT_DMT_1280X768P60,
74 V4L2_DV_BT_DMT_1280X768P75,
75 V4L2_DV_BT_DMT_1280X768P85,
76 V4L2_DV_BT_DMT_1280X768P120_RB,
77 V4L2_DV_BT_DMT_1280X800P60_RB,
78 V4L2_DV_BT_DMT_1280X800P60,
79 V4L2_DV_BT_DMT_1280X800P75,
80 V4L2_DV_BT_DMT_1280X800P85,
81 V4L2_DV_BT_DMT_1280X800P120_RB,
82 V4L2_DV_BT_DMT_1280X960P60,
83 V4L2_DV_BT_DMT_1280X960P85,
84 V4L2_DV_BT_DMT_1280X960P120_RB,
85 V4L2_DV_BT_DMT_1280X1024P60,
86 V4L2_DV_BT_DMT_1280X1024P75,
87 V4L2_DV_BT_DMT_1280X1024P85,
88 V4L2_DV_BT_DMT_1280X1024P120_RB,
89 V4L2_DV_BT_DMT_1360X768P60,
90 V4L2_DV_BT_DMT_1360X768P120_RB,
91 V4L2_DV_BT_DMT_1366X768P60,
92 V4L2_DV_BT_DMT_1366X768P60_RB,
93 V4L2_DV_BT_DMT_1400X1050P60_RB,
94 V4L2_DV_BT_DMT_1400X1050P60,
95 V4L2_DV_BT_DMT_1400X1050P75,
96 V4L2_DV_BT_DMT_1400X1050P85,
97 V4L2_DV_BT_DMT_1400X1050P120_RB,
98 V4L2_DV_BT_DMT_1440X900P60_RB,
99 V4L2_DV_BT_DMT_1440X900P60,
100 V4L2_DV_BT_DMT_1440X900P75,
101 V4L2_DV_BT_DMT_1440X900P85,
102 V4L2_DV_BT_DMT_1440X900P120_RB,
103 V4L2_DV_BT_DMT_1600X900P60_RB,
104 V4L2_DV_BT_DMT_1600X1200P60,
105 V4L2_DV_BT_DMT_1600X1200P65,
106 V4L2_DV_BT_DMT_1600X1200P70,
107 V4L2_DV_BT_DMT_1600X1200P75,
108 V4L2_DV_BT_DMT_1600X1200P85,
109 V4L2_DV_BT_DMT_1600X1200P120_RB,
110 V4L2_DV_BT_DMT_1680X1050P60_RB,
111 V4L2_DV_BT_DMT_1680X1050P60,
112 V4L2_DV_BT_DMT_1680X1050P75,
113 V4L2_DV_BT_DMT_1680X1050P85,
114 V4L2_DV_BT_DMT_1680X1050P120_RB,
115 V4L2_DV_BT_DMT_1792X1344P60,
116 V4L2_DV_BT_DMT_1792X1344P75,
117 V4L2_DV_BT_DMT_1792X1344P120_RB,
118 V4L2_DV_BT_DMT_1856X1392P60,
119 V4L2_DV_BT_DMT_1856X1392P75,
120 V4L2_DV_BT_DMT_1856X1392P120_RB,
121 V4L2_DV_BT_DMT_1920X1200P60_RB,
122 V4L2_DV_BT_DMT_1920X1200P60,
123 V4L2_DV_BT_DMT_1920X1200P75,
124 V4L2_DV_BT_DMT_1920X1200P85,
125 V4L2_DV_BT_DMT_1920X1200P120_RB,
126 V4L2_DV_BT_DMT_1920X1440P60,
127 V4L2_DV_BT_DMT_1920X1440P75,
128 V4L2_DV_BT_DMT_1920X1440P120_RB,
129 V4L2_DV_BT_DMT_2048X1152P60_RB,
130 V4L2_DV_BT_DMT_2560X1600P60_RB,
131 V4L2_DV_BT_DMT_2560X1600P60,
132 V4L2_DV_BT_DMT_2560X1600P75,
133 V4L2_DV_BT_DMT_2560X1600P85,
134 V4L2_DV_BT_DMT_2560X1600P120_RB,
bc96f30c
HV
135 V4L2_DV_BT_CEA_3840X2160P24,
136 V4L2_DV_BT_CEA_3840X2160P25,
137 V4L2_DV_BT_CEA_3840X2160P30,
138 V4L2_DV_BT_CEA_3840X2160P50,
139 V4L2_DV_BT_CEA_3840X2160P60,
140 V4L2_DV_BT_CEA_4096X2160P24,
141 V4L2_DV_BT_CEA_4096X2160P25,
142 V4L2_DV_BT_CEA_4096X2160P30,
143 V4L2_DV_BT_CEA_4096X2160P50,
144 V4L2_DV_BT_DMT_4096X2160P59_94_RB,
145 V4L2_DV_BT_CEA_4096X2160P60,
d1c65ad6 146 { }
b18787ed 147};
d1c65ad6 148EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
b18787ed 149
70b65494 150bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
b8f0fff4
HV
151 const struct v4l2_dv_timings_cap *dvcap,
152 v4l2_check_dv_timings_fnc fnc,
153 void *fnc_handle)
b18787ed
HV
154{
155 const struct v4l2_bt_timings *bt = &t->bt;
156 const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
157 u32 caps = cap->capabilities;
158
159 if (t->type != V4L2_DV_BT_656_1120)
160 return false;
161 if (t->type != dvcap->type ||
162 bt->height < cap->min_height ||
163 bt->height > cap->max_height ||
164 bt->width < cap->min_width ||
165 bt->width > cap->max_width ||
166 bt->pixelclock < cap->min_pixelclock ||
167 bt->pixelclock > cap->max_pixelclock ||
c166845c
HV
168 (cap->standards && bt->standards &&
169 !(bt->standards & cap->standards)) ||
b18787ed
HV
170 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
171 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
172 return false;
b8f0fff4 173 return fnc == NULL || fnc(t, fnc_handle);
b18787ed 174}
70b65494 175EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
b18787ed
HV
176
177int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
b8f0fff4
HV
178 const struct v4l2_dv_timings_cap *cap,
179 v4l2_check_dv_timings_fnc fnc,
180 void *fnc_handle)
b18787ed
HV
181{
182 u32 i, idx;
183
184 memset(t->reserved, 0, sizeof(t->reserved));
d1c65ad6 185 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
b8f0fff4
HV
186 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
187 fnc, fnc_handle) &&
b18787ed 188 idx++ == t->index) {
d1c65ad6 189 t->timings = v4l2_dv_timings_presets[i];
b18787ed
HV
190 return 0;
191 }
192 }
193 return -EINVAL;
194}
195EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
196
197bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
198 const struct v4l2_dv_timings_cap *cap,
b8f0fff4
HV
199 unsigned pclock_delta,
200 v4l2_check_dv_timings_fnc fnc,
201 void *fnc_handle)
b18787ed
HV
202{
203 int i;
204
b8f0fff4 205 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
b18787ed
HV
206 return false;
207
d1c65ad6 208 for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
b8f0fff4
HV
209 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
210 fnc, fnc_handle) &&
211 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
85f9e06c 212 pclock_delta, false)) {
8d7322f4
PL
213 u32 flags = t->bt.flags & V4L2_DV_FL_REDUCED_FPS;
214
d1c65ad6 215 *t = v4l2_dv_timings_presets[i];
8d7322f4
PL
216 if (can_reduce_fps(&t->bt))
217 t->bt.flags |= flags;
218
b18787ed
HV
219 return true;
220 }
221 }
222 return false;
223}
224EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
25764158
HV
225
226/**
ef1ed8f5 227 * v4l2_match_dv_timings - check if two timings match
25764158
HV
228 * @t1 - compare this v4l2_dv_timings struct...
229 * @t2 - with this struct.
230 * @pclock_delta - the allowed pixelclock deviation.
85f9e06c
HV
231 * @match_reduced_fps - if true, then fail if V4L2_DV_FL_REDUCED_FPS does not
232 * match.
25764158
HV
233 *
234 * Compare t1 with t2 with a given margin of error for the pixelclock.
235 */
ef1ed8f5
HV
236bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
237 const struct v4l2_dv_timings *t2,
85f9e06c 238 unsigned pclock_delta, bool match_reduced_fps)
25764158
HV
239{
240 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
241 return false;
242 if (t1->bt.width == t2->bt.width &&
243 t1->bt.height == t2->bt.height &&
244 t1->bt.interlaced == t2->bt.interlaced &&
245 t1->bt.polarities == t2->bt.polarities &&
246 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
247 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
248 t1->bt.hfrontporch == t2->bt.hfrontporch &&
74c9c0fe
MR
249 t1->bt.hsync == t2->bt.hsync &&
250 t1->bt.hbackporch == t2->bt.hbackporch &&
25764158
HV
251 t1->bt.vfrontporch == t2->bt.vfrontporch &&
252 t1->bt.vsync == t2->bt.vsync &&
253 t1->bt.vbackporch == t2->bt.vbackporch &&
85f9e06c
HV
254 (!match_reduced_fps ||
255 (t1->bt.flags & V4L2_DV_FL_REDUCED_FPS) ==
256 (t2->bt.flags & V4L2_DV_FL_REDUCED_FPS)) &&
25764158
HV
257 (!t1->bt.interlaced ||
258 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
259 t1->bt.il_vsync == t2->bt.il_vsync &&
260 t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
261 return true;
262 return false;
263}
ef1ed8f5 264EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
25764158 265
0216dc2f
HV
266void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
267 const struct v4l2_dv_timings *t, bool detailed)
268{
269 const struct v4l2_bt_timings *bt = &t->bt;
270 u32 htot, vtot;
227da85e 271 u32 fps;
0216dc2f
HV
272
273 if (t->type != V4L2_DV_BT_656_1120)
274 return;
275
276 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
277 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
8cf6874e
HV
278 if (bt->interlaced)
279 vtot /= 2;
0216dc2f 280
227da85e
PL
281 fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock),
282 (htot * vtot)) : 0;
283
0216dc2f
HV
284 if (prefix == NULL)
285 prefix = "";
286
227da85e 287 pr_info("%s: %s%ux%u%s%u.%u (%ux%u)\n", dev_prefix, prefix,
0216dc2f 288 bt->width, bt->height, bt->interlaced ? "i" : "p",
227da85e 289 fps / 100, fps % 100, htot, vtot);
0216dc2f
HV
290
291 if (!detailed)
292 return;
293
294 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n",
295 dev_prefix, bt->hfrontporch,
296 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
297 bt->hsync, bt->hbackporch);
298 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n",
299 dev_prefix, bt->vfrontporch,
300 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
301 bt->vsync, bt->vbackporch);
8cf6874e
HV
302 if (bt->interlaced)
303 pr_info("%s: vertical bottom field: fp = %u, %ssync = %u, bp = %u\n",
304 dev_prefix, bt->il_vfrontporch,
305 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
306 bt->il_vsync, bt->il_vbackporch);
0216dc2f 307 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);
1b3b3841 308 pr_info("%s: flags (0x%x):%s%s%s%s%s%s\n", dev_prefix, bt->flags,
0216dc2f
HV
309 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
310 " REDUCED_BLANKING" : "",
1b3b3841
HV
311 ((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) &&
312 bt->vsync == 8) ? " (V2)" : "",
0216dc2f
HV
313 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
314 " CAN_REDUCE_FPS" : "",
315 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
316 " REDUCED_FPS" : "",
317 (bt->flags & V4L2_DV_FL_HALF_LINE) ?
74d802d8
HV
318 " HALF_LINE" : "",
319 (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ?
320 " CE_VIDEO" : "");
0216dc2f
HV
321 pr_info("%s: standards (0x%x):%s%s%s%s\n", dev_prefix, bt->standards,
322 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "",
323 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "",
324 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
325 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "");
326}
327EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
328
25764158
HV
329/*
330 * CVT defines
331 * Based on Coordinated Video Timings Standard
332 * version 1.1 September 10, 2003
333 */
334
335#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
5fea1bb7 336#define CVT_PXL_CLK_GRAN_RB_V2 1000 /* granularity for reduced blanking v2*/
25764158
HV
337
338/* Normal blanking */
339#define CVT_MIN_V_BPORCH 7 /* lines */
340#define CVT_MIN_V_PORCH_RND 3 /* lines */
341#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
9c3f2052 342#define CVT_HSYNC_PERCENT 8 /* nominal hsync as percentage of line */
25764158
HV
343
344/* Normal blanking for CVT uses GTF to calculate horizontal blanking */
345#define CVT_CELL_GRAN 8 /* character cell granularity */
346#define CVT_M 600 /* blanking formula gradient */
347#define CVT_C 40 /* blanking formula offset */
348#define CVT_K 128 /* blanking formula scaling factor */
349#define CVT_J 20 /* blanking formula scaling factor */
350#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
351#define CVT_M_PRIME (CVT_K * CVT_M / 256)
352
353/* Reduced Blanking */
354#define CVT_RB_MIN_V_BPORCH 7 /* lines */
355#define CVT_RB_V_FPORCH 3 /* lines */
5fea1bb7 356#define CVT_RB_MIN_V_BLANK 460 /* us */
25764158 357#define CVT_RB_H_SYNC 32 /* pixels */
25764158 358#define CVT_RB_H_BLANK 160 /* pixels */
5fea1bb7
PL
359/* Reduce blanking Version 2 */
360#define CVT_RB_V2_H_BLANK 80 /* pixels */
361#define CVT_RB_MIN_V_FPORCH 3 /* lines */
362#define CVT_RB_V2_MIN_V_FPORCH 1 /* lines */
363#define CVT_RB_V_BPORCH 6 /* lines */
25764158
HV
364
365/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
366 * @frame_height - the total height of the frame (including blanking) in lines.
367 * @hfreq - the horizontal frequency in Hz.
368 * @vsync - the height of the vertical sync in lines.
5fea1bb7
PL
369 * @active_width - active width of image (does not include blanking). This
370 * information is needed only in case of version 2 of reduced blanking.
371 * In other cases, this parameter does not have any effect on timings.
25764158
HV
372 * @polarities - the horizontal and vertical polarities (same as struct
373 * v4l2_bt_timings polarities).
061ddda6 374 * @interlaced - if this flag is true, it indicates interlaced format
25764158
HV
375 * @fmt - the resulting timings.
376 *
377 * This function will attempt to detect if the given values correspond to a
378 * valid CVT format. If so, then it will return true, and fmt will be filled
379 * in with the found CVT timings.
380 */
5fea1bb7
PL
381bool v4l2_detect_cvt(unsigned frame_height,
382 unsigned hfreq,
383 unsigned vsync,
384 unsigned active_width,
385 u32 polarities,
386 bool interlaced,
387 struct v4l2_dv_timings *fmt)
25764158
HV
388{
389 int v_fp, v_bp, h_fp, h_bp, hsync;
390 int frame_width, image_height, image_width;
391 bool reduced_blanking;
5fea1bb7 392 bool rb_v2 = false;
25764158
HV
393 unsigned pix_clk;
394
5fea1bb7 395 if (vsync < 4 || vsync > 8)
25764158
HV
396 return false;
397
398 if (polarities == V4L2_DV_VSYNC_POS_POL)
399 reduced_blanking = false;
400 else if (polarities == V4L2_DV_HSYNC_POS_POL)
401 reduced_blanking = true;
402 else
403 return false;
404
5fea1bb7
PL
405 if (reduced_blanking && vsync == 8)
406 rb_v2 = true;
407
408 if (rb_v2 && active_width == 0)
409 return false;
410
411 if (!rb_v2 && vsync > 7)
412 return false;
413
947ed99e
PL
414 if (hfreq == 0)
415 return false;
416
25764158
HV
417 /* Vertical */
418 if (reduced_blanking) {
5fea1bb7
PL
419 if (rb_v2) {
420 v_bp = CVT_RB_V_BPORCH;
421 v_fp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
422 v_fp -= vsync + v_bp;
423
424 if (v_fp < CVT_RB_V2_MIN_V_FPORCH)
425 v_fp = CVT_RB_V2_MIN_V_FPORCH;
426 } else {
427 v_fp = CVT_RB_V_FPORCH;
428 v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
429 v_bp -= vsync + v_fp;
430
431 if (v_bp < CVT_RB_MIN_V_BPORCH)
432 v_bp = CVT_RB_MIN_V_BPORCH;
433 }
25764158
HV
434 } else {
435 v_fp = CVT_MIN_V_PORCH_RND;
f6747658 436 v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync;
25764158
HV
437
438 if (v_bp < CVT_MIN_V_BPORCH)
439 v_bp = CVT_MIN_V_BPORCH;
440 }
061ddda6
PL
441
442 if (interlaced)
443 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
444 else
445 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
25764158 446
947ed99e
PL
447 if (image_height < 0)
448 return false;
449
25764158
HV
450 /* Aspect ratio based on vsync */
451 switch (vsync) {
452 case 4:
453 image_width = (image_height * 4) / 3;
454 break;
455 case 5:
456 image_width = (image_height * 16) / 9;
457 break;
458 case 6:
459 image_width = (image_height * 16) / 10;
460 break;
461 case 7:
462 /* special case */
463 if (image_height == 1024)
464 image_width = (image_height * 5) / 4;
465 else if (image_height == 768)
466 image_width = (image_height * 15) / 9;
467 else
468 return false;
469 break;
5fea1bb7
PL
470 case 8:
471 image_width = active_width;
472 break;
25764158
HV
473 default:
474 return false;
475 }
476
5fea1bb7
PL
477 if (!rb_v2)
478 image_width = image_width & ~7;
25764158
HV
479
480 /* Horizontal */
481 if (reduced_blanking) {
5fea1bb7
PL
482 int h_blank;
483 int clk_gran;
484
485 h_blank = rb_v2 ? CVT_RB_V2_H_BLANK : CVT_RB_H_BLANK;
486 clk_gran = rb_v2 ? CVT_PXL_CLK_GRAN_RB_V2 : CVT_PXL_CLK_GRAN;
487
488 pix_clk = (image_width + h_blank) * hfreq;
489 pix_clk = (pix_clk / clk_gran) * clk_gran;
25764158 490
5fea1bb7 491 h_bp = h_blank / 2;
25764158 492 hsync = CVT_RB_H_SYNC;
5fea1bb7 493 h_fp = h_blank - h_bp - hsync;
25764158 494
5fea1bb7 495 frame_width = image_width + h_blank;
25764158 496 } else {
c3e75c7d
MB
497 unsigned ideal_duty_cycle_per_myriad =
498 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq;
25764158 499 int h_blank;
25764158 500
c3e75c7d
MB
501 if (ideal_duty_cycle_per_myriad < 2000)
502 ideal_duty_cycle_per_myriad = 2000;
25764158 503
c3e75c7d
MB
504 h_blank = image_width * ideal_duty_cycle_per_myriad /
505 (10000 - ideal_duty_cycle_per_myriad);
506 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN;
25764158
HV
507
508 pix_clk = (image_width + h_blank) * hfreq;
509 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
510
511 h_bp = h_blank / 2;
512 frame_width = image_width + h_blank;
513
9c3f2052 514 hsync = frame_width * CVT_HSYNC_PERCENT / 100;
d7ed5a3d 515 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN;
25764158
HV
516 h_fp = h_blank - hsync - h_bp;
517 }
518
074ca43f 519 fmt->type = V4L2_DV_BT_656_1120;
25764158
HV
520 fmt->bt.polarities = polarities;
521 fmt->bt.width = image_width;
522 fmt->bt.height = image_height;
523 fmt->bt.hfrontporch = h_fp;
524 fmt->bt.vfrontporch = v_fp;
525 fmt->bt.hsync = hsync;
526 fmt->bt.vsync = vsync;
527 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
061ddda6
PL
528
529 if (!interlaced) {
530 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
531 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
532 } else {
533 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
534 2 * vsync) / 2;
535 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
536 2 * vsync - fmt->bt.vbackporch;
537 fmt->bt.il_vfrontporch = v_fp;
538 fmt->bt.il_vsync = vsync;
539 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
540 fmt->bt.interlaced = V4L2_DV_INTERLACED;
541 }
542
25764158
HV
543 fmt->bt.pixelclock = pix_clk;
544 fmt->bt.standards = V4L2_DV_BT_STD_CVT;
061ddda6 545
25764158
HV
546 if (reduced_blanking)
547 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
061ddda6 548
25764158
HV
549 return true;
550}
551EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
552
553/*
554 * GTF defines
555 * Based on Generalized Timing Formula Standard
556 * Version 1.1 September 2, 1999
557 */
558
559#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
560
561#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
562#define GTF_V_FP 1 /* vertical front porch (lines) */
563#define GTF_CELL_GRAN 8 /* character cell granularity */
564
565/* Default */
566#define GTF_D_M 600 /* blanking formula gradient */
567#define GTF_D_C 40 /* blanking formula offset */
568#define GTF_D_K 128 /* blanking formula scaling factor */
569#define GTF_D_J 20 /* blanking formula scaling factor */
570#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
571#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
572
573/* Secondary */
574#define GTF_S_M 3600 /* blanking formula gradient */
575#define GTF_S_C 40 /* blanking formula offset */
576#define GTF_S_K 128 /* blanking formula scaling factor */
577#define GTF_S_J 35 /* blanking formula scaling factor */
578#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
579#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
580
581/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
582 * @frame_height - the total height of the frame (including blanking) in lines.
583 * @hfreq - the horizontal frequency in Hz.
584 * @vsync - the height of the vertical sync in lines.
585 * @polarities - the horizontal and vertical polarities (same as struct
586 * v4l2_bt_timings polarities).
061ddda6 587 * @interlaced - if this flag is true, it indicates interlaced format
25764158
HV
588 * @aspect - preferred aspect ratio. GTF has no method of determining the
589 * aspect ratio in order to derive the image width from the
590 * image height, so it has to be passed explicitly. Usually
591 * the native screen aspect ratio is used for this. If it
592 * is not filled in correctly, then 16:9 will be assumed.
593 * @fmt - the resulting timings.
594 *
595 * This function will attempt to detect if the given values correspond to a
596 * valid GTF format. If so, then it will return true, and fmt will be filled
597 * in with the found GTF timings.
598 */
599bool v4l2_detect_gtf(unsigned frame_height,
600 unsigned hfreq,
601 unsigned vsync,
602 u32 polarities,
061ddda6 603 bool interlaced,
25764158
HV
604 struct v4l2_fract aspect,
605 struct v4l2_dv_timings *fmt)
606{
607 int pix_clk;
608 int v_fp, v_bp, h_fp, hsync;
609 int frame_width, image_height, image_width;
610 bool default_gtf;
611 int h_blank;
612
613 if (vsync != 3)
614 return false;
615
616 if (polarities == V4L2_DV_VSYNC_POS_POL)
617 default_gtf = true;
618 else if (polarities == V4L2_DV_HSYNC_POS_POL)
619 default_gtf = false;
620 else
621 return false;
622
947ed99e
PL
623 if (hfreq == 0)
624 return false;
625
25764158
HV
626 /* Vertical */
627 v_fp = GTF_V_FP;
f6747658 628 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync;
061ddda6
PL
629 if (interlaced)
630 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1;
631 else
632 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
25764158 633
947ed99e
PL
634 if (image_height < 0)
635 return false;
636
25764158
HV
637 if (aspect.numerator == 0 || aspect.denominator == 0) {
638 aspect.numerator = 16;
639 aspect.denominator = 9;
640 }
641 image_width = ((image_height * aspect.numerator) / aspect.denominator);
257cc4b5 642 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1);
25764158
HV
643
644 /* Horizontal */
c9bc9f50
PL
645 if (default_gtf) {
646 u64 num;
647 u32 den;
648
649 num = ((image_width * GTF_D_C_PRIME * (u64)hfreq) -
650 ((u64)image_width * GTF_D_M_PRIME * 1000));
dc0cf4cf
PL
651 den = (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) *
652 (2 * GTF_CELL_GRAN);
c9bc9f50 653 h_blank = div_u64((num + (den >> 1)), den);
dc0cf4cf 654 h_blank *= (2 * GTF_CELL_GRAN);
c9bc9f50
PL
655 } else {
656 u64 num;
657 u32 den;
658
659 num = ((image_width * GTF_S_C_PRIME * (u64)hfreq) -
660 ((u64)image_width * GTF_S_M_PRIME * 1000));
dc0cf4cf
PL
661 den = (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) *
662 (2 * GTF_CELL_GRAN);
c9bc9f50 663 h_blank = div_u64((num + (den >> 1)), den);
dc0cf4cf 664 h_blank *= (2 * GTF_CELL_GRAN);
c9bc9f50 665 }
25764158 666
25764158
HV
667 frame_width = image_width + h_blank;
668
669 pix_clk = (image_width + h_blank) * hfreq;
670 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
671
672 hsync = (frame_width * 8 + 50) / 100;
d7ed5a3d 673 hsync = ((hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN) * GTF_CELL_GRAN;
25764158
HV
674
675 h_fp = h_blank / 2 - hsync;
676
074ca43f 677 fmt->type = V4L2_DV_BT_656_1120;
25764158
HV
678 fmt->bt.polarities = polarities;
679 fmt->bt.width = image_width;
680 fmt->bt.height = image_height;
681 fmt->bt.hfrontporch = h_fp;
682 fmt->bt.vfrontporch = v_fp;
683 fmt->bt.hsync = hsync;
684 fmt->bt.vsync = vsync;
685 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
061ddda6
PL
686
687 if (!interlaced) {
688 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
689 fmt->bt.interlaced = V4L2_DV_PROGRESSIVE;
690 } else {
691 fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp -
692 2 * vsync) / 2;
693 fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp -
694 2 * vsync - fmt->bt.vbackporch;
695 fmt->bt.il_vfrontporch = v_fp;
696 fmt->bt.il_vsync = vsync;
697 fmt->bt.flags |= V4L2_DV_FL_HALF_LINE;
698 fmt->bt.interlaced = V4L2_DV_INTERLACED;
699 }
700
25764158
HV
701 fmt->bt.pixelclock = pix_clk;
702 fmt->bt.standards = V4L2_DV_BT_STD_GTF;
061ddda6 703
25764158
HV
704 if (!default_gtf)
705 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
061ddda6 706
25764158
HV
707 return true;
708}
709EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
710
711/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
712 * 0x15 and 0x16 from the EDID.
713 * @hor_landscape - byte 0x15 from the EDID.
714 * @vert_portrait - byte 0x16 from the EDID.
715 *
716 * Determines the aspect ratio from the EDID.
717 * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
718 * "Horizontal and Vertical Screen Size or Aspect Ratio"
719 */
720struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
721{
722 struct v4l2_fract aspect = { 16, 9 };
25764158
HV
723 u8 ratio;
724
725 /* Nothing filled in, fallback to 16:9 */
726 if (!hor_landscape && !vert_portrait)
727 return aspect;
728 /* Both filled in, so they are interpreted as the screen size in cm */
729 if (hor_landscape && vert_portrait) {
730 aspect.numerator = hor_landscape;
731 aspect.denominator = vert_portrait;
732 return aspect;
733 }
734 /* Only one is filled in, so interpret them as a ratio:
735 (val + 99) / 100 */
736 ratio = hor_landscape | vert_portrait;
737 /* Change some rounded values into the exact aspect ratio */
738 if (ratio == 79) {
739 aspect.numerator = 16;
740 aspect.denominator = 9;
741 } else if (ratio == 34) {
742 aspect.numerator = 4;
f71920ef 743 aspect.denominator = 3;
25764158
HV
744 } else if (ratio == 68) {
745 aspect.numerator = 15;
f71920ef 746 aspect.denominator = 9;
25764158
HV
747 } else {
748 aspect.numerator = hor_landscape + 99;
749 aspect.denominator = 100;
750 }
751 if (hor_landscape)
752 return aspect;
753 /* The aspect ratio is for portrait, so swap numerator and denominator */
fd752429 754 swap(aspect.denominator, aspect.numerator);
25764158
HV
755 return aspect;
756}
757EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
This page took 0.179284 seconds and 5 git commands to generate.