Commit | Line | Data |
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6789cb52 RR |
1 | /* |
2 | * adv7180.c Analog Devices ADV7180 video decoder driver | |
3 | * Copyright (c) 2009 Intel Corporation | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/i2c.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
6789cb52 RR |
26 | #include <media/v4l2-ioctl.h> |
27 | #include <linux/videodev2.h> | |
28 | #include <media/v4l2-device.h> | |
29 | #include <media/v4l2-chip-ident.h> | |
42752f7a | 30 | #include <linux/mutex.h> |
6789cb52 RR |
31 | |
32 | #define DRIVER_NAME "adv7180" | |
33 | ||
d3124294 RR |
34 | #define ADV7180_INPUT_CONTROL_REG 0x00 |
35 | #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00 | |
36 | #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10 | |
37 | #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20 | |
38 | #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30 | |
39 | #define ADV7180_INPUT_CONTROL_NTSC_J 0x40 | |
40 | #define ADV7180_INPUT_CONTROL_NTSC_M 0x50 | |
41 | #define ADV7180_INPUT_CONTROL_PAL60 0x60 | |
42 | #define ADV7180_INPUT_CONTROL_NTSC_443 0x70 | |
43 | #define ADV7180_INPUT_CONTROL_PAL_BG 0x80 | |
44 | #define ADV7180_INPUT_CONTROL_PAL_N 0x90 | |
45 | #define ADV7180_INPUT_CONTROL_PAL_M 0xa0 | |
46 | #define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0 | |
47 | #define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0 | |
48 | #define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0 | |
49 | #define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0 | |
50 | #define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0 | |
bca7ad1a | 51 | #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f |
d3124294 | 52 | |
42752f7a RR |
53 | #define ADV7180_EXTENDED_OUTPUT_CONTROL_REG 0x04 |
54 | #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5 | |
6789cb52 | 55 | |
42752f7a RR |
56 | #define ADV7180_AUTODETECT_ENABLE_REG 0x07 |
57 | #define ADV7180_AUTODETECT_DEFAULT 0x7f | |
58 | ||
bca7ad1a FV |
59 | #define ADV7180_CON_REG 0x08 /*Unsigned */ |
60 | #define CON_REG_MIN 0 | |
61 | #define CON_REG_DEF 128 | |
62 | #define CON_REG_MAX 255 | |
63 | ||
64 | #define ADV7180_BRI_REG 0x0a /*Signed */ | |
65 | #define BRI_REG_MIN -128 | |
66 | #define BRI_REG_DEF 0 | |
67 | #define BRI_REG_MAX 127 | |
68 | ||
69 | #define ADV7180_HUE_REG 0x0b /*Signed, inverted */ | |
70 | #define HUE_REG_MIN -127 | |
71 | #define HUE_REG_DEF 0 | |
72 | #define HUE_REG_MAX 128 | |
73 | ||
42752f7a RR |
74 | #define ADV7180_ADI_CTRL_REG 0x0e |
75 | #define ADV7180_ADI_CTRL_IRQ_SPACE 0x20 | |
6789cb52 | 76 | |
bca7ad1a FV |
77 | #define ADV7180_PWR_MAN_REG 0x0f |
78 | #define ADV7180_PWR_MAN_ON 0x04 | |
79 | #define ADV7180_PWR_MAN_OFF 0x24 | |
80 | #define ADV7180_PWR_MAN_RES 0x80 | |
81 | ||
d3124294 RR |
82 | #define ADV7180_STATUS1_REG 0x10 |
83 | #define ADV7180_STATUS1_IN_LOCK 0x01 | |
84 | #define ADV7180_STATUS1_AUTOD_MASK 0x70 | |
6789cb52 RR |
85 | #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00 |
86 | #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10 | |
87 | #define ADV7180_STATUS1_AUTOD_PAL_M 0x20 | |
88 | #define ADV7180_STATUS1_AUTOD_PAL_60 0x30 | |
89 | #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40 | |
90 | #define ADV7180_STATUS1_AUTOD_SECAM 0x50 | |
91 | #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60 | |
92 | #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70 | |
93 | ||
94 | #define ADV7180_IDENT_REG 0x11 | |
95 | #define ADV7180_ID_7180 0x18 | |
96 | ||
42752f7a RR |
97 | #define ADV7180_ICONF1_ADI 0x40 |
98 | #define ADV7180_ICONF1_ACTIVE_LOW 0x01 | |
99 | #define ADV7180_ICONF1_PSYNC_ONLY 0x10 | |
100 | #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0 | |
101 | ||
bca7ad1a FV |
102 | #define ADV7180_SD_SAT_CB_REG 0xe3 /*Unsigned */ |
103 | #define ADV7180_SD_SAT_CR_REG 0xe4 /*Unsigned */ | |
104 | #define SAT_REG_MIN 0 | |
105 | #define SAT_REG_DEF 128 | |
106 | #define SAT_REG_MAX 255 | |
107 | ||
42752f7a RR |
108 | #define ADV7180_IRQ1_LOCK 0x01 |
109 | #define ADV7180_IRQ1_UNLOCK 0x02 | |
110 | #define ADV7180_ISR1_ADI 0x42 | |
111 | #define ADV7180_ICR1_ADI 0x43 | |
112 | #define ADV7180_IMR1_ADI 0x44 | |
113 | #define ADV7180_IMR2_ADI 0x48 | |
114 | #define ADV7180_IRQ3_AD_CHANGE 0x08 | |
115 | #define ADV7180_ISR3_ADI 0x4A | |
116 | #define ADV7180_ICR3_ADI 0x4B | |
117 | #define ADV7180_IMR3_ADI 0x4C | |
118 | #define ADV7180_IMR4_ADI 0x50 | |
6789cb52 | 119 | |
bca7ad1a FV |
120 | #define ADV7180_NTSC_V_BIT_END_REG 0xE6 |
121 | #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F | |
122 | ||
6789cb52 | 123 | struct adv7180_state { |
c277b60a | 124 | struct v4l2_subdev sd; |
42752f7a RR |
125 | struct work_struct work; |
126 | struct mutex mutex; /* mutual excl. when accessing chip */ | |
127 | int irq; | |
c277b60a RR |
128 | v4l2_std_id curr_norm; |
129 | bool autodetect; | |
bca7ad1a FV |
130 | s8 brightness; |
131 | s16 hue; | |
132 | u8 contrast; | |
133 | u8 saturation; | |
134 | u8 input; | |
6789cb52 RR |
135 | }; |
136 | ||
d3124294 | 137 | static v4l2_std_id adv7180_std_to_v4l2(u8 status1) |
6789cb52 | 138 | { |
6789cb52 RR |
139 | switch (status1 & ADV7180_STATUS1_AUTOD_MASK) { |
140 | case ADV7180_STATUS1_AUTOD_NTSM_M_J: | |
d3124294 | 141 | return V4L2_STD_NTSC; |
6789cb52 RR |
142 | case ADV7180_STATUS1_AUTOD_NTSC_4_43: |
143 | return V4L2_STD_NTSC_443; | |
144 | case ADV7180_STATUS1_AUTOD_PAL_M: | |
145 | return V4L2_STD_PAL_M; | |
146 | case ADV7180_STATUS1_AUTOD_PAL_60: | |
147 | return V4L2_STD_PAL_60; | |
148 | case ADV7180_STATUS1_AUTOD_PAL_B_G: | |
149 | return V4L2_STD_PAL; | |
150 | case ADV7180_STATUS1_AUTOD_SECAM: | |
151 | return V4L2_STD_SECAM; | |
152 | case ADV7180_STATUS1_AUTOD_PAL_COMB: | |
153 | return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N; | |
154 | case ADV7180_STATUS1_AUTOD_SECAM_525: | |
155 | return V4L2_STD_SECAM; | |
156 | default: | |
157 | return V4L2_STD_UNKNOWN; | |
158 | } | |
159 | } | |
160 | ||
c277b60a RR |
161 | static int v4l2_std_to_adv7180(v4l2_std_id std) |
162 | { | |
163 | if (std == V4L2_STD_PAL_60) | |
164 | return ADV7180_INPUT_CONTROL_PAL60; | |
165 | if (std == V4L2_STD_NTSC_443) | |
166 | return ADV7180_INPUT_CONTROL_NTSC_443; | |
167 | if (std == V4L2_STD_PAL_N) | |
168 | return ADV7180_INPUT_CONTROL_PAL_N; | |
169 | if (std == V4L2_STD_PAL_M) | |
170 | return ADV7180_INPUT_CONTROL_PAL_M; | |
171 | if (std == V4L2_STD_PAL_Nc) | |
172 | return ADV7180_INPUT_CONTROL_PAL_COMB_N; | |
173 | ||
174 | if (std & V4L2_STD_PAL) | |
175 | return ADV7180_INPUT_CONTROL_PAL_BG; | |
176 | if (std & V4L2_STD_NTSC) | |
177 | return ADV7180_INPUT_CONTROL_NTSC_M; | |
178 | if (std & V4L2_STD_SECAM) | |
179 | return ADV7180_INPUT_CONTROL_PAL_SECAM; | |
180 | ||
181 | return -EINVAL; | |
182 | } | |
183 | ||
d3124294 RR |
184 | static u32 adv7180_status_to_v4l2(u8 status1) |
185 | { | |
186 | if (!(status1 & ADV7180_STATUS1_IN_LOCK)) | |
187 | return V4L2_IN_ST_NO_SIGNAL; | |
188 | ||
189 | return 0; | |
190 | } | |
191 | ||
192 | static int __adv7180_status(struct i2c_client *client, u32 *status, | |
bca7ad1a | 193 | v4l2_std_id *std) |
d3124294 RR |
194 | { |
195 | int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG); | |
196 | ||
197 | if (status1 < 0) | |
198 | return status1; | |
199 | ||
200 | if (status) | |
201 | *status = adv7180_status_to_v4l2(status1); | |
202 | if (std) | |
203 | *std = adv7180_std_to_v4l2(status1); | |
204 | ||
205 | return 0; | |
206 | } | |
207 | ||
6789cb52 RR |
208 | static inline struct adv7180_state *to_state(struct v4l2_subdev *sd) |
209 | { | |
210 | return container_of(sd, struct adv7180_state, sd); | |
211 | } | |
212 | ||
213 | static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) | |
214 | { | |
c277b60a | 215 | struct adv7180_state *state = to_state(sd); |
42752f7a RR |
216 | int err = mutex_lock_interruptible(&state->mutex); |
217 | if (err) | |
218 | return err; | |
c277b60a | 219 | |
42752f7a RR |
220 | /* when we are interrupt driven we know the state */ |
221 | if (!state->autodetect || state->irq > 0) | |
c277b60a RR |
222 | *std = state->curr_norm; |
223 | else | |
224 | err = __adv7180_status(v4l2_get_subdevdata(sd), NULL, std); | |
225 | ||
42752f7a | 226 | mutex_unlock(&state->mutex); |
c277b60a | 227 | return err; |
d3124294 | 228 | } |
6789cb52 | 229 | |
bca7ad1a FV |
230 | static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input, |
231 | u32 output, u32 config) | |
232 | { | |
233 | struct adv7180_state *state = to_state(sd); | |
234 | int ret = mutex_lock_interruptible(&state->mutex); | |
235 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
236 | ||
237 | if (ret) | |
238 | return ret; | |
239 | ||
240 | /*We cannot discriminate between LQFP and 40-pin LFCSP, so accept | |
241 | * all inputs and let the card driver take care of validation | |
242 | */ | |
243 | if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input) | |
244 | goto out; | |
245 | ||
246 | ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG); | |
247 | ||
248 | if (ret < 0) | |
249 | goto out; | |
250 | ||
251 | ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK; | |
252 | ret = i2c_smbus_write_byte_data(client, | |
253 | ADV7180_INPUT_CONTROL_REG, ret | input); | |
254 | state->input = input; | |
255 | out: | |
256 | mutex_unlock(&state->mutex); | |
257 | return ret; | |
258 | } | |
259 | ||
d3124294 RR |
260 | static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status) |
261 | { | |
42752f7a RR |
262 | struct adv7180_state *state = to_state(sd); |
263 | int ret = mutex_lock_interruptible(&state->mutex); | |
264 | if (ret) | |
265 | return ret; | |
266 | ||
267 | ret = __adv7180_status(v4l2_get_subdevdata(sd), status, NULL); | |
268 | mutex_unlock(&state->mutex); | |
269 | return ret; | |
6789cb52 RR |
270 | } |
271 | ||
272 | static int adv7180_g_chip_ident(struct v4l2_subdev *sd, | |
bca7ad1a | 273 | struct v4l2_dbg_chip_ident *chip) |
6789cb52 RR |
274 | { |
275 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
276 | ||
277 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7180, 0); | |
278 | } | |
279 | ||
c277b60a RR |
280 | static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
281 | { | |
282 | struct adv7180_state *state = to_state(sd); | |
283 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
42752f7a RR |
284 | int ret = mutex_lock_interruptible(&state->mutex); |
285 | if (ret) | |
286 | return ret; | |
c277b60a RR |
287 | |
288 | /* all standards -> autodetect */ | |
289 | if (std == V4L2_STD_ALL) { | |
bca7ad1a FV |
290 | ret = |
291 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
292 | ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM | |
293 | | state->input); | |
c277b60a RR |
294 | if (ret < 0) |
295 | goto out; | |
296 | ||
42752f7a | 297 | __adv7180_status(client, NULL, &state->curr_norm); |
c277b60a RR |
298 | state->autodetect = true; |
299 | } else { | |
300 | ret = v4l2_std_to_adv7180(std); | |
301 | if (ret < 0) | |
302 | goto out; | |
303 | ||
304 | ret = i2c_smbus_write_byte_data(client, | |
bca7ad1a FV |
305 | ADV7180_INPUT_CONTROL_REG, |
306 | ret | state->input); | |
c277b60a RR |
307 | if (ret < 0) |
308 | goto out; | |
309 | ||
310 | state->curr_norm = std; | |
311 | state->autodetect = false; | |
312 | } | |
313 | ret = 0; | |
314 | out: | |
42752f7a | 315 | mutex_unlock(&state->mutex); |
c277b60a RR |
316 | return ret; |
317 | } | |
318 | ||
bca7ad1a FV |
319 | static int adv7180_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) |
320 | { | |
321 | switch (qc->id) { | |
322 | case V4L2_CID_BRIGHTNESS: | |
323 | return v4l2_ctrl_query_fill(qc, BRI_REG_MIN, BRI_REG_MAX, | |
324 | 1, BRI_REG_DEF); | |
325 | case V4L2_CID_HUE: | |
326 | return v4l2_ctrl_query_fill(qc, HUE_REG_MIN, HUE_REG_MAX, | |
327 | 1, HUE_REG_DEF); | |
328 | case V4L2_CID_CONTRAST: | |
329 | return v4l2_ctrl_query_fill(qc, CON_REG_MIN, CON_REG_MAX, | |
330 | 1, CON_REG_DEF); | |
331 | case V4L2_CID_SATURATION: | |
332 | return v4l2_ctrl_query_fill(qc, SAT_REG_MIN, SAT_REG_MAX, | |
333 | 1, SAT_REG_DEF); | |
334 | default: | |
335 | break; | |
336 | } | |
337 | ||
338 | return -EINVAL; | |
339 | } | |
340 | ||
341 | static int adv7180_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |
342 | { | |
343 | struct adv7180_state *state = to_state(sd); | |
344 | int ret = mutex_lock_interruptible(&state->mutex); | |
345 | if (ret) | |
346 | return ret; | |
347 | ||
348 | switch (ctrl->id) { | |
349 | case V4L2_CID_BRIGHTNESS: | |
350 | ctrl->value = state->brightness; | |
351 | break; | |
352 | case V4L2_CID_HUE: | |
353 | ctrl->value = state->hue; | |
354 | break; | |
355 | case V4L2_CID_CONTRAST: | |
356 | ctrl->value = state->contrast; | |
357 | break; | |
358 | case V4L2_CID_SATURATION: | |
359 | ctrl->value = state->saturation; | |
360 | break; | |
361 | default: | |
362 | ret = -EINVAL; | |
363 | } | |
364 | ||
365 | mutex_unlock(&state->mutex); | |
366 | return ret; | |
367 | } | |
368 | ||
369 | static int adv7180_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |
370 | { | |
371 | struct adv7180_state *state = to_state(sd); | |
372 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
373 | int ret = mutex_lock_interruptible(&state->mutex); | |
374 | if (ret) | |
375 | return ret; | |
376 | ||
377 | switch (ctrl->id) { | |
378 | case V4L2_CID_BRIGHTNESS: | |
379 | if ((ctrl->value > BRI_REG_MAX) | |
380 | || (ctrl->value < BRI_REG_MIN)) { | |
381 | ret = -ERANGE; | |
382 | break; | |
383 | } | |
384 | state->brightness = ctrl->value; | |
385 | ret = i2c_smbus_write_byte_data(client, | |
386 | ADV7180_BRI_REG, | |
387 | state->brightness); | |
388 | break; | |
389 | case V4L2_CID_HUE: | |
390 | if ((ctrl->value > HUE_REG_MAX) | |
391 | || (ctrl->value < HUE_REG_MIN)) { | |
392 | ret = -ERANGE; | |
393 | break; | |
394 | } | |
395 | state->hue = ctrl->value; | |
396 | /*Hue is inverted according to HSL chart */ | |
397 | ret = i2c_smbus_write_byte_data(client, | |
398 | ADV7180_HUE_REG, -state->hue); | |
399 | break; | |
400 | case V4L2_CID_CONTRAST: | |
401 | if ((ctrl->value > CON_REG_MAX) | |
402 | || (ctrl->value < CON_REG_MIN)) { | |
403 | ret = -ERANGE; | |
404 | break; | |
405 | } | |
406 | state->contrast = ctrl->value; | |
407 | ret = i2c_smbus_write_byte_data(client, | |
408 | ADV7180_CON_REG, | |
409 | state->contrast); | |
410 | break; | |
411 | case V4L2_CID_SATURATION: | |
412 | if ((ctrl->value > SAT_REG_MAX) | |
413 | || (ctrl->value < SAT_REG_MIN)) { | |
414 | ret = -ERANGE; | |
415 | break; | |
416 | } | |
417 | /* | |
418 | *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE | |
419 | *Let's not confuse the user, everybody understands saturation | |
420 | */ | |
421 | state->saturation = ctrl->value; | |
422 | ret = i2c_smbus_write_byte_data(client, | |
423 | ADV7180_SD_SAT_CB_REG, | |
424 | state->saturation); | |
425 | if (ret < 0) | |
426 | break; | |
427 | ret = i2c_smbus_write_byte_data(client, | |
428 | ADV7180_SD_SAT_CR_REG, | |
429 | state->saturation); | |
430 | break; | |
431 | default: | |
432 | ret = -EINVAL; | |
433 | } | |
434 | ||
435 | mutex_unlock(&state->mutex); | |
436 | return ret; | |
437 | } | |
438 | ||
6789cb52 RR |
439 | static const struct v4l2_subdev_video_ops adv7180_video_ops = { |
440 | .querystd = adv7180_querystd, | |
d3124294 | 441 | .g_input_status = adv7180_g_input_status, |
bca7ad1a | 442 | .s_routing = adv7180_s_routing, |
6789cb52 RR |
443 | }; |
444 | ||
445 | static const struct v4l2_subdev_core_ops adv7180_core_ops = { | |
446 | .g_chip_ident = adv7180_g_chip_ident, | |
c277b60a | 447 | .s_std = adv7180_s_std, |
bca7ad1a FV |
448 | .queryctrl = adv7180_queryctrl, |
449 | .g_ctrl = adv7180_g_ctrl, | |
450 | .s_ctrl = adv7180_s_ctrl, | |
6789cb52 RR |
451 | }; |
452 | ||
453 | static const struct v4l2_subdev_ops adv7180_ops = { | |
454 | .core = &adv7180_core_ops, | |
455 | .video = &adv7180_video_ops, | |
456 | }; | |
457 | ||
42752f7a RR |
458 | static void adv7180_work(struct work_struct *work) |
459 | { | |
460 | struct adv7180_state *state = container_of(work, struct adv7180_state, | |
bca7ad1a | 461 | work); |
42752f7a RR |
462 | struct i2c_client *client = v4l2_get_subdevdata(&state->sd); |
463 | u8 isr3; | |
464 | ||
465 | mutex_lock(&state->mutex); | |
466 | i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 467 | ADV7180_ADI_CTRL_IRQ_SPACE); |
42752f7a RR |
468 | isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI); |
469 | /* clear */ | |
470 | i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3); | |
471 | i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, 0); | |
472 | ||
473 | if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect) | |
474 | __adv7180_status(client, NULL, &state->curr_norm); | |
475 | mutex_unlock(&state->mutex); | |
476 | ||
477 | enable_irq(state->irq); | |
478 | } | |
479 | ||
480 | static irqreturn_t adv7180_irq(int irq, void *devid) | |
481 | { | |
482 | struct adv7180_state *state = devid; | |
483 | ||
484 | schedule_work(&state->work); | |
485 | ||
486 | disable_irq_nosync(state->irq); | |
487 | ||
488 | return IRQ_HANDLED; | |
489 | } | |
490 | ||
bca7ad1a | 491 | static int init_device(struct i2c_client *client, struct adv7180_state *state) |
6789cb52 | 492 | { |
6789cb52 RR |
493 | int ret; |
494 | ||
6789cb52 | 495 | /* Initialize adv7180 */ |
42752f7a | 496 | /* Enable autodetection */ |
bca7ad1a FV |
497 | if (state->autodetect) { |
498 | ret = | |
499 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
500 | ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM | |
501 | | state->input); | |
502 | if (ret < 0) | |
503 | return ret; | |
42752f7a | 504 | |
bca7ad1a FV |
505 | ret = |
506 | i2c_smbus_write_byte_data(client, | |
507 | ADV7180_AUTODETECT_ENABLE_REG, | |
508 | ADV7180_AUTODETECT_DEFAULT); | |
509 | if (ret < 0) | |
510 | return ret; | |
511 | } else { | |
512 | ret = v4l2_std_to_adv7180(state->curr_norm); | |
513 | if (ret < 0) | |
514 | return ret; | |
42752f7a | 515 | |
bca7ad1a FV |
516 | ret = |
517 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
518 | ret | state->input); | |
519 | if (ret < 0) | |
520 | return ret; | |
521 | ||
522 | } | |
42752f7a RR |
523 | /* ITU-R BT.656-4 compatible */ |
524 | ret = i2c_smbus_write_byte_data(client, | |
bca7ad1a FV |
525 | ADV7180_EXTENDED_OUTPUT_CONTROL_REG, |
526 | ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS); | |
42752f7a | 527 | if (ret < 0) |
bca7ad1a FV |
528 | return ret; |
529 | ||
530 | /* Manually set V bit end position in NTSC mode */ | |
531 | ret = i2c_smbus_write_byte_data(client, | |
532 | ADV7180_NTSC_V_BIT_END_REG, | |
533 | ADV7180_NTSC_V_BIT_END_MANUAL_NVEND); | |
534 | if (ret < 0) | |
535 | return ret; | |
42752f7a RR |
536 | |
537 | /* read current norm */ | |
538 | __adv7180_status(client, NULL, &state->curr_norm); | |
539 | ||
540 | /* register for interrupts */ | |
541 | if (state->irq > 0) { | |
542 | ret = request_irq(state->irq, adv7180_irq, 0, DRIVER_NAME, | |
bca7ad1a | 543 | state); |
42752f7a | 544 | if (ret) |
bca7ad1a | 545 | return ret; |
42752f7a RR |
546 | |
547 | ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 548 | ADV7180_ADI_CTRL_IRQ_SPACE); |
42752f7a | 549 | if (ret < 0) |
bca7ad1a | 550 | return ret; |
42752f7a RR |
551 | |
552 | /* config the Interrupt pin to be active low */ | |
553 | ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI, | |
bca7ad1a FV |
554 | ADV7180_ICONF1_ACTIVE_LOW | |
555 | ADV7180_ICONF1_PSYNC_ONLY); | |
42752f7a | 556 | if (ret < 0) |
bca7ad1a | 557 | return ret; |
42752f7a RR |
558 | |
559 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0); | |
560 | if (ret < 0) | |
bca7ad1a | 561 | return ret; |
42752f7a RR |
562 | |
563 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0); | |
564 | if (ret < 0) | |
bca7ad1a | 565 | return ret; |
42752f7a RR |
566 | |
567 | /* enable AD change interrupts interrupts */ | |
568 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI, | |
bca7ad1a | 569 | ADV7180_IRQ3_AD_CHANGE); |
42752f7a | 570 | if (ret < 0) |
bca7ad1a | 571 | return ret; |
42752f7a RR |
572 | |
573 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0); | |
574 | if (ret < 0) | |
bca7ad1a | 575 | return ret; |
42752f7a RR |
576 | |
577 | ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 578 | 0); |
42752f7a | 579 | if (ret < 0) |
bca7ad1a | 580 | return ret; |
6789cb52 RR |
581 | } |
582 | ||
bca7ad1a FV |
583 | /*Set default value for controls */ |
584 | ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG, | |
585 | state->brightness); | |
586 | if (ret < 0) | |
587 | return ret; | |
588 | ||
589 | ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, state->hue); | |
590 | if (ret < 0) | |
591 | return ret; | |
592 | ||
593 | ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG, | |
594 | state->contrast); | |
595 | if (ret < 0) | |
596 | return ret; | |
597 | ||
598 | ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG, | |
599 | state->saturation); | |
600 | if (ret < 0) | |
601 | return ret; | |
602 | ||
603 | ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG, | |
604 | state->saturation); | |
605 | if (ret < 0) | |
606 | return ret; | |
607 | ||
608 | return 0; | |
609 | } | |
610 | ||
611 | static __devinit int adv7180_probe(struct i2c_client *client, | |
612 | const struct i2c_device_id *id) | |
613 | { | |
614 | struct adv7180_state *state; | |
615 | struct v4l2_subdev *sd; | |
616 | int ret; | |
617 | ||
618 | /* Check if the adapter supports the needed features */ | |
619 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
620 | return -EIO; | |
621 | ||
622 | v4l_info(client, "chip found @ 0x%02x (%s)\n", | |
623 | client->addr, client->adapter->name); | |
624 | ||
625 | state = kzalloc(sizeof(struct adv7180_state), GFP_KERNEL); | |
626 | if (state == NULL) { | |
627 | ret = -ENOMEM; | |
628 | goto err; | |
629 | } | |
630 | ||
631 | state->irq = client->irq; | |
632 | INIT_WORK(&state->work, adv7180_work); | |
633 | mutex_init(&state->mutex); | |
634 | state->autodetect = true; | |
635 | state->brightness = BRI_REG_DEF; | |
636 | state->hue = HUE_REG_DEF; | |
637 | state->contrast = CON_REG_DEF; | |
638 | state->saturation = SAT_REG_DEF; | |
639 | state->input = 0; | |
640 | sd = &state->sd; | |
641 | v4l2_i2c_subdev_init(sd, client, &adv7180_ops); | |
642 | ||
643 | ret = init_device(client, state); | |
644 | if (0 != ret) | |
645 | goto err_unreg_subdev; | |
6789cb52 | 646 | return 0; |
42752f7a RR |
647 | |
648 | err_unreg_subdev: | |
649 | mutex_destroy(&state->mutex); | |
650 | v4l2_device_unregister_subdev(sd); | |
651 | kfree(state); | |
652 | err: | |
653 | printk(KERN_ERR DRIVER_NAME ": Failed to probe: %d\n", ret); | |
654 | return ret; | |
6789cb52 RR |
655 | } |
656 | ||
527aebf2 | 657 | static __devexit int adv7180_remove(struct i2c_client *client) |
6789cb52 RR |
658 | { |
659 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
42752f7a RR |
660 | struct adv7180_state *state = to_state(sd); |
661 | ||
662 | if (state->irq > 0) { | |
663 | free_irq(client->irq, state); | |
664 | if (cancel_work_sync(&state->work)) { | |
665 | /* | |
666 | * Work was pending, therefore we need to enable | |
667 | * IRQ here to balance the disable_irq() done in the | |
668 | * interrupt handler. | |
669 | */ | |
670 | enable_irq(state->irq); | |
671 | } | |
672 | } | |
6789cb52 | 673 | |
42752f7a | 674 | mutex_destroy(&state->mutex); |
6789cb52 RR |
675 | v4l2_device_unregister_subdev(sd); |
676 | kfree(to_state(sd)); | |
677 | return 0; | |
678 | } | |
679 | ||
680 | static const struct i2c_device_id adv7180_id[] = { | |
681 | {DRIVER_NAME, 0}, | |
682 | {}, | |
683 | }; | |
684 | ||
bca7ad1a FV |
685 | #ifdef CONFIG_PM |
686 | static int adv7180_suspend(struct i2c_client *client, pm_message_t state) | |
687 | { | |
688 | int ret; | |
689 | ||
690 | ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG, | |
691 | ADV7180_PWR_MAN_OFF); | |
692 | if (ret < 0) | |
693 | return ret; | |
694 | return 0; | |
695 | } | |
696 | ||
697 | static int adv7180_resume(struct i2c_client *client) | |
698 | { | |
699 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
700 | struct adv7180_state *state = to_state(sd); | |
701 | int ret; | |
702 | ||
703 | ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG, | |
704 | ADV7180_PWR_MAN_ON); | |
705 | if (ret < 0) | |
706 | return ret; | |
707 | ret = init_device(client, state); | |
708 | if (ret < 0) | |
709 | return ret; | |
710 | return 0; | |
711 | } | |
712 | #endif | |
713 | ||
6789cb52 RR |
714 | MODULE_DEVICE_TABLE(i2c, adv7180_id); |
715 | ||
716 | static struct i2c_driver adv7180_driver = { | |
717 | .driver = { | |
bca7ad1a FV |
718 | .owner = THIS_MODULE, |
719 | .name = DRIVER_NAME, | |
720 | }, | |
721 | .probe = adv7180_probe, | |
722 | .remove = __devexit_p(adv7180_remove), | |
723 | #ifdef CONFIG_PM | |
724 | .suspend = adv7180_suspend, | |
725 | .resume = adv7180_resume, | |
726 | #endif | |
727 | .id_table = adv7180_id, | |
6789cb52 RR |
728 | }; |
729 | ||
c6e8d86f | 730 | module_i2c_driver(adv7180_driver); |
6789cb52 RR |
731 | |
732 | MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver"); | |
733 | MODULE_AUTHOR("Mocean Laboratories"); | |
734 | MODULE_LICENSE("GPL v2"); |