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195ebc43 JW |
1 | /* |
2 | * Copyright (c) 2011 Atmel Corporation | |
3 | * Josh Wu, <josh.wu@atmel.com> | |
4 | * | |
5 | * Based on previous work by Lars Haring, <lars.haring@atmel.com> | |
6 | * and Sedji Gaouaou | |
7 | * Based on the bttv driver for Bt848 with respective copyright holders | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/completion.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/fs.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/slab.h> | |
24 | ||
25 | #include <media/atmel-isi.h> | |
26 | #include <media/soc_camera.h> | |
27 | #include <media/soc_mediabus.h> | |
28 | #include <media/videobuf2-dma-contig.h> | |
29 | ||
30 | #define MAX_BUFFER_NUM 32 | |
31 | #define MAX_SUPPORT_WIDTH 2048 | |
32 | #define MAX_SUPPORT_HEIGHT 2048 | |
33 | #define VID_LIMIT_BYTES (16 * 1024 * 1024) | |
34 | #define MIN_FRAME_RATE 15 | |
35 | #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE) | |
36 | ||
37 | /* ISI states */ | |
38 | enum { | |
39 | ISI_STATE_IDLE = 0, | |
40 | ISI_STATE_READY, | |
41 | ISI_STATE_WAIT_SOF, | |
42 | }; | |
43 | ||
44 | /* Frame buffer descriptor */ | |
45 | struct fbd { | |
46 | /* Physical address of the frame buffer */ | |
47 | u32 fb_address; | |
48 | /* DMA Control Register(only in HISI2) */ | |
49 | u32 dma_ctrl; | |
50 | /* Physical address of the next fbd */ | |
51 | u32 next_fbd_address; | |
52 | }; | |
53 | ||
54 | static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl) | |
55 | { | |
56 | fb_desc->dma_ctrl = ctrl; | |
57 | } | |
58 | ||
59 | struct isi_dma_desc { | |
60 | struct list_head list; | |
61 | struct fbd *p_fbd; | |
62 | u32 fbd_phys; | |
63 | }; | |
64 | ||
65 | /* Frame buffer data */ | |
66 | struct frame_buffer { | |
67 | struct vb2_buffer vb; | |
68 | struct isi_dma_desc *p_dma_desc; | |
69 | struct list_head list; | |
70 | }; | |
71 | ||
72 | struct atmel_isi { | |
73 | /* Protects the access of variables shared with the ISR */ | |
74 | spinlock_t lock; | |
75 | void __iomem *regs; | |
76 | ||
77 | int sequence; | |
78 | /* State of the ISI module in capturing mode */ | |
79 | int state; | |
80 | ||
81 | /* Wait queue for waiting for SOF */ | |
82 | wait_queue_head_t vsync_wq; | |
83 | ||
84 | struct vb2_alloc_ctx *alloc_ctx; | |
85 | ||
86 | /* Allocate descriptors for dma buffer use */ | |
87 | struct fbd *p_fb_descriptors; | |
88 | u32 fb_descriptors_phys; | |
89 | struct list_head dma_desc_head; | |
90 | struct isi_dma_desc dma_desc[MAX_BUFFER_NUM]; | |
91 | ||
92 | struct completion complete; | |
d8ec0961 | 93 | /* ISI peripherial clock */ |
195ebc43 | 94 | struct clk *pclk; |
d8ec0961 JW |
95 | /* ISI_MCK, feed to camera sensor to generate pixel clock */ |
96 | struct clk *mck; | |
195ebc43 JW |
97 | unsigned int irq; |
98 | ||
99 | struct isi_platform_data *pdata; | |
a4e9f10b | 100 | u16 width_flags; /* max 12 bits */ |
195ebc43 JW |
101 | |
102 | struct list_head video_buffer_list; | |
103 | struct frame_buffer *active; | |
104 | ||
105 | struct soc_camera_device *icd; | |
106 | struct soc_camera_host soc_host; | |
107 | }; | |
108 | ||
109 | static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val) | |
110 | { | |
111 | writel(val, isi->regs + reg); | |
112 | } | |
113 | static u32 isi_readl(struct atmel_isi *isi, u32 reg) | |
114 | { | |
115 | return readl(isi->regs + reg); | |
116 | } | |
117 | ||
118 | static int configure_geometry(struct atmel_isi *isi, u32 width, | |
119 | u32 height, enum v4l2_mbus_pixelcode code) | |
120 | { | |
121 | u32 cfg2, cr; | |
122 | ||
123 | switch (code) { | |
124 | /* YUV, including grey */ | |
125 | case V4L2_MBUS_FMT_Y8_1X8: | |
126 | cr = ISI_CFG2_GRAYSCALE; | |
127 | break; | |
128 | case V4L2_MBUS_FMT_UYVY8_2X8: | |
129 | cr = ISI_CFG2_YCC_SWAP_MODE_3; | |
130 | break; | |
131 | case V4L2_MBUS_FMT_VYUY8_2X8: | |
132 | cr = ISI_CFG2_YCC_SWAP_MODE_2; | |
133 | break; | |
134 | case V4L2_MBUS_FMT_YUYV8_2X8: | |
135 | cr = ISI_CFG2_YCC_SWAP_MODE_1; | |
136 | break; | |
137 | case V4L2_MBUS_FMT_YVYU8_2X8: | |
138 | cr = ISI_CFG2_YCC_SWAP_DEFAULT; | |
139 | break; | |
140 | /* RGB, TODO */ | |
141 | default: | |
142 | return -EINVAL; | |
143 | } | |
144 | ||
145 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
146 | ||
147 | cfg2 = isi_readl(isi, ISI_CFG2); | |
148 | cfg2 |= cr; | |
149 | /* Set width */ | |
150 | cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK); | |
151 | cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & | |
152 | ISI_CFG2_IM_HSIZE_MASK; | |
153 | /* Set height */ | |
154 | cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK); | |
155 | cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) | |
156 | & ISI_CFG2_IM_VSIZE_MASK; | |
157 | isi_writel(isi, ISI_CFG2, cfg2); | |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
162 | static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi) | |
163 | { | |
164 | if (isi->active) { | |
165 | struct vb2_buffer *vb = &isi->active->vb; | |
166 | struct frame_buffer *buf = isi->active; | |
167 | ||
168 | list_del_init(&buf->list); | |
169 | do_gettimeofday(&vb->v4l2_buf.timestamp); | |
170 | vb->v4l2_buf.sequence = isi->sequence++; | |
171 | vb2_buffer_done(vb, VB2_BUF_STATE_DONE); | |
172 | } | |
173 | ||
174 | if (list_empty(&isi->video_buffer_list)) { | |
175 | isi->active = NULL; | |
176 | } else { | |
177 | /* start next dma frame. */ | |
178 | isi->active = list_entry(isi->video_buffer_list.next, | |
179 | struct frame_buffer, list); | |
180 | isi_writel(isi, ISI_DMA_C_DSCR, | |
181 | isi->active->p_dma_desc->fbd_phys); | |
182 | isi_writel(isi, ISI_DMA_C_CTRL, | |
183 | ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | |
184 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | |
185 | } | |
186 | return IRQ_HANDLED; | |
187 | } | |
188 | ||
189 | /* ISI interrupt service routine */ | |
190 | static irqreturn_t isi_interrupt(int irq, void *dev_id) | |
191 | { | |
192 | struct atmel_isi *isi = dev_id; | |
193 | u32 status, mask, pending; | |
194 | irqreturn_t ret = IRQ_NONE; | |
195 | ||
196 | spin_lock(&isi->lock); | |
197 | ||
198 | status = isi_readl(isi, ISI_STATUS); | |
199 | mask = isi_readl(isi, ISI_INTMASK); | |
200 | pending = status & mask; | |
201 | ||
202 | if (pending & ISI_CTRL_SRST) { | |
203 | complete(&isi->complete); | |
204 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST); | |
205 | ret = IRQ_HANDLED; | |
206 | } else if (pending & ISI_CTRL_DIS) { | |
207 | complete(&isi->complete); | |
208 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS); | |
209 | ret = IRQ_HANDLED; | |
210 | } else { | |
211 | if ((pending & ISI_SR_VSYNC) && | |
212 | (isi->state == ISI_STATE_IDLE)) { | |
213 | isi->state = ISI_STATE_READY; | |
214 | wake_up_interruptible(&isi->vsync_wq); | |
215 | ret = IRQ_HANDLED; | |
216 | } | |
217 | if (likely(pending & ISI_SR_CXFR_DONE)) | |
218 | ret = atmel_isi_handle_streaming(isi); | |
219 | } | |
220 | ||
221 | spin_unlock(&isi->lock); | |
222 | return ret; | |
223 | } | |
224 | ||
225 | #define WAIT_ISI_RESET 1 | |
226 | #define WAIT_ISI_DISABLE 0 | |
227 | static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset) | |
228 | { | |
229 | unsigned long timeout; | |
230 | /* | |
231 | * The reset or disable will only succeed if we have a | |
232 | * pixel clock from the camera. | |
233 | */ | |
234 | init_completion(&isi->complete); | |
235 | ||
236 | if (wait_reset) { | |
237 | isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST); | |
238 | isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST); | |
239 | } else { | |
240 | isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS); | |
241 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
242 | } | |
243 | ||
244 | timeout = wait_for_completion_timeout(&isi->complete, | |
245 | msecs_to_jiffies(100)); | |
246 | if (timeout == 0) | |
247 | return -ETIMEDOUT; | |
248 | ||
249 | return 0; | |
250 | } | |
251 | ||
252 | /* ------------------------------------------------------------------ | |
253 | Videobuf operations | |
254 | ------------------------------------------------------------------*/ | |
fc714e70 GL |
255 | static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, |
256 | unsigned int *nbuffers, unsigned int *nplanes, | |
257 | unsigned int sizes[], void *alloc_ctxs[]) | |
195ebc43 JW |
258 | { |
259 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 260 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
261 | struct atmel_isi *isi = ici->priv; |
262 | unsigned long size; | |
2b61d46e | 263 | int ret; |
195ebc43 JW |
264 | |
265 | /* Reset ISI */ | |
266 | ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET); | |
267 | if (ret < 0) { | |
7dfff953 | 268 | dev_err(icd->parent, "Reset ISI timed out\n"); |
195ebc43 JW |
269 | return ret; |
270 | } | |
271 | /* Disable all interrupts */ | |
272 | isi_writel(isi, ISI_INTDIS, ~0UL); | |
273 | ||
2b61d46e | 274 | size = icd->sizeimage; |
195ebc43 JW |
275 | |
276 | if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM) | |
277 | *nbuffers = MAX_BUFFER_NUM; | |
278 | ||
279 | if (size * *nbuffers > VID_LIMIT_BYTES) | |
280 | *nbuffers = VID_LIMIT_BYTES / size; | |
281 | ||
282 | *nplanes = 1; | |
283 | sizes[0] = size; | |
284 | alloc_ctxs[0] = isi->alloc_ctx; | |
285 | ||
286 | isi->sequence = 0; | |
287 | isi->active = NULL; | |
288 | ||
7dfff953 | 289 | dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__, |
195ebc43 JW |
290 | *nbuffers, size); |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
295 | static int buffer_init(struct vb2_buffer *vb) | |
296 | { | |
297 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
298 | ||
299 | buf->p_dma_desc = NULL; | |
300 | INIT_LIST_HEAD(&buf->list); | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static int buffer_prepare(struct vb2_buffer *vb) | |
306 | { | |
307 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
308 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
7dfff953 | 309 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
310 | struct atmel_isi *isi = ici->priv; |
311 | unsigned long size; | |
312 | struct isi_dma_desc *desc; | |
195ebc43 | 313 | |
2b61d46e | 314 | size = icd->sizeimage; |
195ebc43 JW |
315 | |
316 | if (vb2_plane_size(vb, 0) < size) { | |
7dfff953 | 317 | dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n", |
195ebc43 JW |
318 | __func__, vb2_plane_size(vb, 0), size); |
319 | return -EINVAL; | |
320 | } | |
321 | ||
322 | vb2_set_plane_payload(&buf->vb, 0, size); | |
323 | ||
324 | if (!buf->p_dma_desc) { | |
325 | if (list_empty(&isi->dma_desc_head)) { | |
7dfff953 | 326 | dev_err(icd->parent, "Not enough dma descriptors.\n"); |
195ebc43 JW |
327 | return -EINVAL; |
328 | } else { | |
329 | /* Get an available descriptor */ | |
330 | desc = list_entry(isi->dma_desc_head.next, | |
331 | struct isi_dma_desc, list); | |
332 | /* Delete the descriptor since now it is used */ | |
333 | list_del_init(&desc->list); | |
334 | ||
335 | /* Initialize the dma descriptor */ | |
336 | desc->p_fbd->fb_address = | |
ba7fcb0c | 337 | vb2_dma_contig_plane_dma_addr(vb, 0); |
195ebc43 JW |
338 | desc->p_fbd->next_fbd_address = 0; |
339 | set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB); | |
340 | ||
341 | buf->p_dma_desc = desc; | |
342 | } | |
343 | } | |
344 | return 0; | |
345 | } | |
346 | ||
347 | static void buffer_cleanup(struct vb2_buffer *vb) | |
348 | { | |
349 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
7dfff953 | 350 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
351 | struct atmel_isi *isi = ici->priv; |
352 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
353 | ||
354 | /* This descriptor is available now and we add to head list */ | |
355 | if (buf->p_dma_desc) | |
356 | list_add(&buf->p_dma_desc->list, &isi->dma_desc_head); | |
357 | } | |
358 | ||
359 | static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer) | |
360 | { | |
361 | u32 ctrl, cfg1; | |
362 | ||
363 | cfg1 = isi_readl(isi, ISI_CFG1); | |
364 | /* Enable irq: cxfr for the codec path, pxfr for the preview path */ | |
365 | isi_writel(isi, ISI_INTEN, | |
366 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | |
367 | ||
368 | /* Check if already in a frame */ | |
369 | if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) { | |
7dfff953 | 370 | dev_err(isi->icd->parent, "Already in frame handling.\n"); |
195ebc43 JW |
371 | return; |
372 | } | |
373 | ||
374 | isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys); | |
375 | isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | |
376 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | |
377 | ||
378 | /* Enable linked list */ | |
379 | cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR; | |
380 | ||
381 | /* Enable codec path and ISI */ | |
382 | ctrl = ISI_CTRL_CDC | ISI_CTRL_EN; | |
383 | isi_writel(isi, ISI_CTRL, ctrl); | |
384 | isi_writel(isi, ISI_CFG1, cfg1); | |
385 | } | |
386 | ||
387 | static void buffer_queue(struct vb2_buffer *vb) | |
388 | { | |
389 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | |
7dfff953 | 390 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
391 | struct atmel_isi *isi = ici->priv; |
392 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | |
393 | unsigned long flags = 0; | |
394 | ||
395 | spin_lock_irqsave(&isi->lock, flags); | |
396 | list_add_tail(&buf->list, &isi->video_buffer_list); | |
397 | ||
398 | if (isi->active == NULL) { | |
399 | isi->active = buf; | |
bd323e28 MS |
400 | if (vb2_is_streaming(vb->vb2_queue)) |
401 | start_dma(isi, buf); | |
195ebc43 JW |
402 | } |
403 | spin_unlock_irqrestore(&isi->lock, flags); | |
404 | } | |
405 | ||
bd323e28 | 406 | static int start_streaming(struct vb2_queue *vq, unsigned int count) |
195ebc43 JW |
407 | { |
408 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 409 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
410 | struct atmel_isi *isi = ici->priv; |
411 | ||
412 | u32 sr = 0; | |
413 | int ret; | |
414 | ||
415 | spin_lock_irq(&isi->lock); | |
416 | isi->state = ISI_STATE_IDLE; | |
417 | /* Clear any pending SOF interrupt */ | |
418 | sr = isi_readl(isi, ISI_STATUS); | |
419 | /* Enable VSYNC interrupt for SOF */ | |
420 | isi_writel(isi, ISI_INTEN, ISI_SR_VSYNC); | |
421 | isi_writel(isi, ISI_CTRL, ISI_CTRL_EN); | |
422 | spin_unlock_irq(&isi->lock); | |
423 | ||
7dfff953 | 424 | dev_dbg(icd->parent, "Waiting for SOF\n"); |
195ebc43 JW |
425 | ret = wait_event_interruptible(isi->vsync_wq, |
426 | isi->state != ISI_STATE_IDLE); | |
427 | if (ret) | |
bd323e28 | 428 | goto err; |
195ebc43 | 429 | |
bd323e28 MS |
430 | if (isi->state != ISI_STATE_READY) { |
431 | ret = -EIO; | |
432 | goto err; | |
433 | } | |
195ebc43 JW |
434 | |
435 | spin_lock_irq(&isi->lock); | |
436 | isi->state = ISI_STATE_WAIT_SOF; | |
437 | isi_writel(isi, ISI_INTDIS, ISI_SR_VSYNC); | |
bd323e28 MS |
438 | if (count) |
439 | start_dma(isi, isi->active); | |
195ebc43 JW |
440 | spin_unlock_irq(&isi->lock); |
441 | ||
442 | return 0; | |
bd323e28 MS |
443 | err: |
444 | isi->active = NULL; | |
445 | isi->sequence = 0; | |
446 | INIT_LIST_HEAD(&isi->video_buffer_list); | |
447 | return ret; | |
195ebc43 JW |
448 | } |
449 | ||
450 | /* abort streaming and wait for last buffer */ | |
451 | static int stop_streaming(struct vb2_queue *vq) | |
452 | { | |
453 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | |
7dfff953 | 454 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
455 | struct atmel_isi *isi = ici->priv; |
456 | struct frame_buffer *buf, *node; | |
457 | int ret = 0; | |
458 | unsigned long timeout; | |
459 | ||
460 | spin_lock_irq(&isi->lock); | |
461 | isi->active = NULL; | |
462 | /* Release all active buffers */ | |
463 | list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) { | |
464 | list_del_init(&buf->list); | |
465 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | |
466 | } | |
467 | spin_unlock_irq(&isi->lock); | |
468 | ||
469 | timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ; | |
470 | /* Wait until the end of the current frame. */ | |
471 | while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) && | |
472 | time_before(jiffies, timeout)) | |
473 | msleep(1); | |
474 | ||
475 | if (time_after(jiffies, timeout)) { | |
7dfff953 | 476 | dev_err(icd->parent, |
195ebc43 JW |
477 | "Timeout waiting for finishing codec request\n"); |
478 | return -ETIMEDOUT; | |
479 | } | |
480 | ||
481 | /* Disable interrupts */ | |
482 | isi_writel(isi, ISI_INTDIS, | |
483 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | |
484 | ||
485 | /* Disable ISI and wait for it is done */ | |
486 | ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE); | |
487 | if (ret < 0) | |
7dfff953 | 488 | dev_err(icd->parent, "Disable ISI timed out\n"); |
195ebc43 JW |
489 | |
490 | return ret; | |
491 | } | |
492 | ||
493 | static struct vb2_ops isi_video_qops = { | |
494 | .queue_setup = queue_setup, | |
495 | .buf_init = buffer_init, | |
496 | .buf_prepare = buffer_prepare, | |
497 | .buf_cleanup = buffer_cleanup, | |
498 | .buf_queue = buffer_queue, | |
499 | .start_streaming = start_streaming, | |
500 | .stop_streaming = stop_streaming, | |
501 | .wait_prepare = soc_camera_unlock, | |
502 | .wait_finish = soc_camera_lock, | |
503 | }; | |
504 | ||
505 | /* ------------------------------------------------------------------ | |
506 | SOC camera operations for the device | |
507 | ------------------------------------------------------------------*/ | |
508 | static int isi_camera_init_videobuf(struct vb2_queue *q, | |
509 | struct soc_camera_device *icd) | |
510 | { | |
511 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
512 | q->io_modes = VB2_MMAP; | |
513 | q->drv_priv = icd; | |
514 | q->buf_struct_size = sizeof(struct frame_buffer); | |
515 | q->ops = &isi_video_qops; | |
516 | q->mem_ops = &vb2_dma_contig_memops; | |
517 | ||
518 | return vb2_queue_init(q); | |
519 | } | |
520 | ||
521 | static int isi_camera_set_fmt(struct soc_camera_device *icd, | |
522 | struct v4l2_format *f) | |
523 | { | |
7dfff953 | 524 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
525 | struct atmel_isi *isi = ici->priv; |
526 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
527 | const struct soc_camera_format_xlate *xlate; | |
528 | struct v4l2_pix_format *pix = &f->fmt.pix; | |
529 | struct v4l2_mbus_framefmt mf; | |
530 | int ret; | |
531 | ||
532 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | |
533 | if (!xlate) { | |
7dfff953 | 534 | dev_warn(icd->parent, "Format %x not found\n", |
195ebc43 JW |
535 | pix->pixelformat); |
536 | return -EINVAL; | |
537 | } | |
538 | ||
7dfff953 | 539 | dev_dbg(icd->parent, "Plan to set format %dx%d\n", |
195ebc43 JW |
540 | pix->width, pix->height); |
541 | ||
542 | mf.width = pix->width; | |
543 | mf.height = pix->height; | |
544 | mf.field = pix->field; | |
545 | mf.colorspace = pix->colorspace; | |
546 | mf.code = xlate->code; | |
547 | ||
548 | ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); | |
549 | if (ret < 0) | |
550 | return ret; | |
551 | ||
552 | if (mf.code != xlate->code) | |
553 | return -EINVAL; | |
554 | ||
555 | ret = configure_geometry(isi, pix->width, pix->height, xlate->code); | |
556 | if (ret < 0) | |
557 | return ret; | |
558 | ||
559 | pix->width = mf.width; | |
560 | pix->height = mf.height; | |
561 | pix->field = mf.field; | |
562 | pix->colorspace = mf.colorspace; | |
563 | icd->current_fmt = xlate; | |
564 | ||
7dfff953 | 565 | dev_dbg(icd->parent, "Finally set format %dx%d\n", |
195ebc43 JW |
566 | pix->width, pix->height); |
567 | ||
568 | return ret; | |
569 | } | |
570 | ||
571 | static int isi_camera_try_fmt(struct soc_camera_device *icd, | |
572 | struct v4l2_format *f) | |
573 | { | |
574 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
575 | const struct soc_camera_format_xlate *xlate; | |
576 | struct v4l2_pix_format *pix = &f->fmt.pix; | |
577 | struct v4l2_mbus_framefmt mf; | |
578 | u32 pixfmt = pix->pixelformat; | |
579 | int ret; | |
580 | ||
581 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | |
582 | if (pixfmt && !xlate) { | |
7dfff953 | 583 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
195ebc43 JW |
584 | return -EINVAL; |
585 | } | |
586 | ||
587 | /* limit to Atmel ISI hardware capabilities */ | |
588 | if (pix->height > MAX_SUPPORT_HEIGHT) | |
589 | pix->height = MAX_SUPPORT_HEIGHT; | |
590 | if (pix->width > MAX_SUPPORT_WIDTH) | |
591 | pix->width = MAX_SUPPORT_WIDTH; | |
592 | ||
593 | /* limit to sensor capabilities */ | |
594 | mf.width = pix->width; | |
595 | mf.height = pix->height; | |
596 | mf.field = pix->field; | |
597 | mf.colorspace = pix->colorspace; | |
598 | mf.code = xlate->code; | |
599 | ||
600 | ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); | |
601 | if (ret < 0) | |
602 | return ret; | |
603 | ||
604 | pix->width = mf.width; | |
605 | pix->height = mf.height; | |
606 | pix->colorspace = mf.colorspace; | |
607 | ||
608 | switch (mf.field) { | |
609 | case V4L2_FIELD_ANY: | |
610 | pix->field = V4L2_FIELD_NONE; | |
611 | break; | |
612 | case V4L2_FIELD_NONE: | |
613 | break; | |
614 | default: | |
7dfff953 | 615 | dev_err(icd->parent, "Field type %d unsupported.\n", |
195ebc43 JW |
616 | mf.field); |
617 | ret = -EINVAL; | |
618 | } | |
619 | ||
620 | return ret; | |
621 | } | |
622 | ||
623 | static const struct soc_mbus_pixelfmt isi_camera_formats[] = { | |
624 | { | |
625 | .fourcc = V4L2_PIX_FMT_YUYV, | |
626 | .name = "Packed YUV422 16 bit", | |
627 | .bits_per_sample = 8, | |
628 | .packing = SOC_MBUS_PACKING_2X8_PADHI, | |
629 | .order = SOC_MBUS_ORDER_LE, | |
ad3b81fa | 630 | .layout = SOC_MBUS_LAYOUT_PACKED, |
195ebc43 JW |
631 | }, |
632 | }; | |
633 | ||
634 | /* This will be corrected as we get more formats */ | |
635 | static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt) | |
636 | { | |
637 | return fmt->packing == SOC_MBUS_PACKING_NONE || | |
638 | (fmt->bits_per_sample == 8 && | |
639 | fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || | |
640 | (fmt->bits_per_sample > 8 && | |
641 | fmt->packing == SOC_MBUS_PACKING_EXTEND16); | |
642 | } | |
643 | ||
a4e9f10b GL |
644 | #define ISI_BUS_PARAM (V4L2_MBUS_MASTER | \ |
645 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \ | |
646 | V4L2_MBUS_HSYNC_ACTIVE_LOW | \ | |
647 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | \ | |
648 | V4L2_MBUS_VSYNC_ACTIVE_LOW | \ | |
649 | V4L2_MBUS_PCLK_SAMPLE_RISING | \ | |
650 | V4L2_MBUS_PCLK_SAMPLE_FALLING | \ | |
651 | V4L2_MBUS_DATA_ACTIVE_HIGH) | |
195ebc43 JW |
652 | |
653 | static int isi_camera_try_bus_param(struct soc_camera_device *icd, | |
654 | unsigned char buswidth) | |
655 | { | |
a4e9f10b | 656 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
7dfff953 | 657 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 | 658 | struct atmel_isi *isi = ici->priv; |
a4e9f10b GL |
659 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; |
660 | unsigned long common_flags; | |
195ebc43 JW |
661 | int ret; |
662 | ||
a4e9f10b GL |
663 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); |
664 | if (!ret) { | |
665 | common_flags = soc_mbus_config_compatible(&cfg, | |
666 | ISI_BUS_PARAM); | |
667 | if (!common_flags) { | |
668 | dev_warn(icd->parent, | |
669 | "Flags incompatible: camera 0x%x, host 0x%x\n", | |
670 | cfg.flags, ISI_BUS_PARAM); | |
671 | return -EINVAL; | |
672 | } | |
673 | } else if (ret != -ENOIOCTLCMD) { | |
674 | return ret; | |
675 | } | |
676 | ||
677 | if ((1 << (buswidth - 1)) & isi->width_flags) | |
678 | return 0; | |
679 | return -EINVAL; | |
195ebc43 JW |
680 | } |
681 | ||
682 | ||
683 | static int isi_camera_get_formats(struct soc_camera_device *icd, | |
684 | unsigned int idx, | |
685 | struct soc_camera_format_xlate *xlate) | |
686 | { | |
687 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
688 | int formats = 0, ret; | |
689 | /* sensor format */ | |
690 | enum v4l2_mbus_pixelcode code; | |
691 | /* soc camera host format */ | |
692 | const struct soc_mbus_pixelfmt *fmt; | |
693 | ||
694 | ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); | |
695 | if (ret < 0) | |
696 | /* No more formats */ | |
697 | return 0; | |
698 | ||
699 | fmt = soc_mbus_get_fmtdesc(code); | |
700 | if (!fmt) { | |
7dfff953 | 701 | dev_err(icd->parent, |
195ebc43 JW |
702 | "Invalid format code #%u: %d\n", idx, code); |
703 | return 0; | |
704 | } | |
705 | ||
706 | /* This also checks support for the requested bits-per-sample */ | |
707 | ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample); | |
708 | if (ret < 0) { | |
7dfff953 | 709 | dev_err(icd->parent, |
195ebc43 JW |
710 | "Fail to try the bus parameters.\n"); |
711 | return 0; | |
712 | } | |
713 | ||
714 | switch (code) { | |
715 | case V4L2_MBUS_FMT_UYVY8_2X8: | |
716 | case V4L2_MBUS_FMT_VYUY8_2X8: | |
717 | case V4L2_MBUS_FMT_YUYV8_2X8: | |
718 | case V4L2_MBUS_FMT_YVYU8_2X8: | |
719 | formats++; | |
720 | if (xlate) { | |
721 | xlate->host_fmt = &isi_camera_formats[0]; | |
722 | xlate->code = code; | |
723 | xlate++; | |
7dfff953 | 724 | dev_dbg(icd->parent, "Providing format %s using code %d\n", |
195ebc43 JW |
725 | isi_camera_formats[0].name, code); |
726 | } | |
727 | break; | |
728 | default: | |
729 | if (!isi_camera_packing_supported(fmt)) | |
730 | return 0; | |
731 | if (xlate) | |
7dfff953 | 732 | dev_dbg(icd->parent, |
195ebc43 JW |
733 | "Providing format %s in pass-through mode\n", |
734 | fmt->name); | |
735 | } | |
736 | ||
737 | /* Generic pass-through */ | |
738 | formats++; | |
739 | if (xlate) { | |
740 | xlate->host_fmt = fmt; | |
741 | xlate->code = code; | |
742 | xlate++; | |
743 | } | |
744 | ||
745 | return formats; | |
746 | } | |
747 | ||
748 | /* Called with .video_lock held */ | |
749 | static int isi_camera_add_device(struct soc_camera_device *icd) | |
750 | { | |
7dfff953 | 751 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
752 | struct atmel_isi *isi = ici->priv; |
753 | int ret; | |
754 | ||
755 | if (isi->icd) | |
756 | return -EBUSY; | |
757 | ||
758 | ret = clk_enable(isi->pclk); | |
759 | if (ret) | |
760 | return ret; | |
761 | ||
d8ec0961 JW |
762 | ret = clk_enable(isi->mck); |
763 | if (ret) { | |
764 | clk_disable(isi->pclk); | |
765 | return ret; | |
766 | } | |
767 | ||
195ebc43 | 768 | isi->icd = icd; |
7dfff953 | 769 | dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n", |
195ebc43 JW |
770 | icd->devnum); |
771 | return 0; | |
772 | } | |
773 | /* Called with .video_lock held */ | |
774 | static void isi_camera_remove_device(struct soc_camera_device *icd) | |
775 | { | |
7dfff953 | 776 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 JW |
777 | struct atmel_isi *isi = ici->priv; |
778 | ||
779 | BUG_ON(icd != isi->icd); | |
780 | ||
d8ec0961 | 781 | clk_disable(isi->mck); |
195ebc43 JW |
782 | clk_disable(isi->pclk); |
783 | isi->icd = NULL; | |
784 | ||
7dfff953 | 785 | dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n", |
195ebc43 JW |
786 | icd->devnum); |
787 | } | |
788 | ||
789 | static unsigned int isi_camera_poll(struct file *file, poll_table *pt) | |
790 | { | |
791 | struct soc_camera_device *icd = file->private_data; | |
792 | ||
793 | return vb2_poll(&icd->vb2_vidq, file, pt); | |
794 | } | |
795 | ||
796 | static int isi_camera_querycap(struct soc_camera_host *ici, | |
797 | struct v4l2_capability *cap) | |
798 | { | |
799 | strcpy(cap->driver, "atmel-isi"); | |
800 | strcpy(cap->card, "Atmel Image Sensor Interface"); | |
801 | cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE | | |
802 | V4L2_CAP_STREAMING); | |
803 | return 0; | |
804 | } | |
805 | ||
8843d119 | 806 | static int isi_camera_set_bus_param(struct soc_camera_device *icd) |
195ebc43 | 807 | { |
a4e9f10b | 808 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
7dfff953 | 809 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
195ebc43 | 810 | struct atmel_isi *isi = ici->priv; |
a4e9f10b GL |
811 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; |
812 | unsigned long common_flags; | |
195ebc43 JW |
813 | int ret; |
814 | u32 cfg1 = 0; | |
815 | ||
a4e9f10b GL |
816 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); |
817 | if (!ret) { | |
818 | common_flags = soc_mbus_config_compatible(&cfg, | |
819 | ISI_BUS_PARAM); | |
820 | if (!common_flags) { | |
821 | dev_warn(icd->parent, | |
822 | "Flags incompatible: camera 0x%x, host 0x%x\n", | |
823 | cfg.flags, ISI_BUS_PARAM); | |
824 | return -EINVAL; | |
825 | } | |
826 | } else if (ret != -ENOIOCTLCMD) { | |
827 | return ret; | |
828 | } else { | |
829 | common_flags = ISI_BUS_PARAM; | |
830 | } | |
831 | dev_dbg(icd->parent, "Flags cam: 0x%x host: 0x%x common: 0x%lx\n", | |
832 | cfg.flags, ISI_BUS_PARAM, common_flags); | |
195ebc43 JW |
833 | |
834 | /* Make choises, based on platform preferences */ | |
a4e9f10b GL |
835 | if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) && |
836 | (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) { | |
195ebc43 | 837 | if (isi->pdata->hsync_act_low) |
a4e9f10b | 838 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH; |
195ebc43 | 839 | else |
a4e9f10b | 840 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW; |
195ebc43 JW |
841 | } |
842 | ||
a4e9f10b GL |
843 | if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) && |
844 | (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) { | |
195ebc43 | 845 | if (isi->pdata->vsync_act_low) |
a4e9f10b | 846 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH; |
195ebc43 | 847 | else |
a4e9f10b | 848 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW; |
195ebc43 JW |
849 | } |
850 | ||
a4e9f10b GL |
851 | if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) && |
852 | (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) { | |
195ebc43 | 853 | if (isi->pdata->pclk_act_falling) |
a4e9f10b | 854 | common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING; |
195ebc43 | 855 | else |
a4e9f10b | 856 | common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING; |
195ebc43 JW |
857 | } |
858 | ||
a4e9f10b GL |
859 | cfg.flags = common_flags; |
860 | ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg); | |
861 | if (ret < 0 && ret != -ENOIOCTLCMD) { | |
862 | dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n", | |
195ebc43 JW |
863 | common_flags, ret); |
864 | return ret; | |
865 | } | |
866 | ||
867 | /* set bus param for ISI */ | |
a4e9f10b | 868 | if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) |
195ebc43 | 869 | cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; |
a4e9f10b | 870 | if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) |
195ebc43 | 871 | cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; |
a4e9f10b | 872 | if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) |
195ebc43 JW |
873 | cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; |
874 | ||
875 | if (isi->pdata->has_emb_sync) | |
876 | cfg1 |= ISI_CFG1_EMB_SYNC; | |
d8ec0961 | 877 | if (isi->pdata->full_mode) |
195ebc43 JW |
878 | cfg1 |= ISI_CFG1_FULL_MODE; |
879 | ||
880 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | |
881 | isi_writel(isi, ISI_CFG1, cfg1); | |
882 | ||
883 | return 0; | |
884 | } | |
885 | ||
886 | static struct soc_camera_host_ops isi_soc_camera_host_ops = { | |
887 | .owner = THIS_MODULE, | |
888 | .add = isi_camera_add_device, | |
889 | .remove = isi_camera_remove_device, | |
890 | .set_fmt = isi_camera_set_fmt, | |
891 | .try_fmt = isi_camera_try_fmt, | |
892 | .get_formats = isi_camera_get_formats, | |
893 | .init_videobuf2 = isi_camera_init_videobuf, | |
894 | .poll = isi_camera_poll, | |
895 | .querycap = isi_camera_querycap, | |
896 | .set_bus_param = isi_camera_set_bus_param, | |
897 | }; | |
898 | ||
899 | /* -----------------------------------------------------------------------*/ | |
900 | static int __devexit atmel_isi_remove(struct platform_device *pdev) | |
901 | { | |
902 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | |
903 | struct atmel_isi *isi = container_of(soc_host, | |
904 | struct atmel_isi, soc_host); | |
905 | ||
906 | free_irq(isi->irq, isi); | |
907 | soc_camera_host_unregister(soc_host); | |
908 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | |
909 | dma_free_coherent(&pdev->dev, | |
910 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
911 | isi->p_fb_descriptors, | |
912 | isi->fb_descriptors_phys); | |
913 | ||
914 | iounmap(isi->regs); | |
03652e0a | 915 | clk_unprepare(isi->mck); |
d8ec0961 | 916 | clk_put(isi->mck); |
03652e0a | 917 | clk_unprepare(isi->pclk); |
195ebc43 JW |
918 | clk_put(isi->pclk); |
919 | kfree(isi); | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
924 | static int __devinit atmel_isi_probe(struct platform_device *pdev) | |
925 | { | |
926 | unsigned int irq; | |
927 | struct atmel_isi *isi; | |
928 | struct clk *pclk; | |
929 | struct resource *regs; | |
930 | int ret, i; | |
931 | struct device *dev = &pdev->dev; | |
932 | struct soc_camera_host *soc_host; | |
933 | struct isi_platform_data *pdata; | |
934 | ||
935 | pdata = dev->platform_data; | |
d8ec0961 | 936 | if (!pdata || !pdata->data_width_flags || !pdata->mck_hz) { |
195ebc43 JW |
937 | dev_err(&pdev->dev, |
938 | "No config available for Atmel ISI\n"); | |
939 | return -EINVAL; | |
940 | } | |
941 | ||
942 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
943 | if (!regs) | |
944 | return -ENXIO; | |
945 | ||
946 | pclk = clk_get(&pdev->dev, "isi_clk"); | |
947 | if (IS_ERR(pclk)) | |
948 | return PTR_ERR(pclk); | |
949 | ||
03652e0a JW |
950 | ret = clk_prepare(pclk); |
951 | if (ret) | |
952 | goto err_clk_prepare_pclk; | |
953 | ||
195ebc43 JW |
954 | isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL); |
955 | if (!isi) { | |
956 | ret = -ENOMEM; | |
957 | dev_err(&pdev->dev, "Can't allocate interface!\n"); | |
958 | goto err_alloc_isi; | |
959 | } | |
960 | ||
961 | isi->pclk = pclk; | |
962 | isi->pdata = pdata; | |
963 | isi->active = NULL; | |
964 | spin_lock_init(&isi->lock); | |
965 | init_waitqueue_head(&isi->vsync_wq); | |
966 | INIT_LIST_HEAD(&isi->video_buffer_list); | |
967 | INIT_LIST_HEAD(&isi->dma_desc_head); | |
968 | ||
d8ec0961 JW |
969 | /* Get ISI_MCK, provided by programmable clock or external clock */ |
970 | isi->mck = clk_get(dev, "isi_mck"); | |
971 | if (IS_ERR(isi->mck)) { | |
972 | dev_err(dev, "Failed to get isi_mck\n"); | |
973 | ret = PTR_ERR(isi->mck); | |
974 | goto err_clk_get; | |
975 | } | |
976 | ||
03652e0a JW |
977 | ret = clk_prepare(isi->mck); |
978 | if (ret) | |
979 | goto err_clk_prepare_mck; | |
980 | ||
d8ec0961 JW |
981 | /* Set ISI_MCK's frequency, it should be faster than pixel clock */ |
982 | ret = clk_set_rate(isi->mck, pdata->mck_hz); | |
983 | if (ret < 0) | |
984 | goto err_set_mck_rate; | |
985 | ||
195ebc43 JW |
986 | isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev, |
987 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
988 | &isi->fb_descriptors_phys, | |
989 | GFP_KERNEL); | |
990 | if (!isi->p_fb_descriptors) { | |
991 | ret = -ENOMEM; | |
992 | dev_err(&pdev->dev, "Can't allocate descriptors!\n"); | |
993 | goto err_alloc_descriptors; | |
994 | } | |
995 | ||
996 | for (i = 0; i < MAX_BUFFER_NUM; i++) { | |
997 | isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i; | |
998 | isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys + | |
999 | i * sizeof(struct fbd); | |
1000 | list_add(&isi->dma_desc[i].list, &isi->dma_desc_head); | |
1001 | } | |
1002 | ||
1003 | isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | |
1004 | if (IS_ERR(isi->alloc_ctx)) { | |
1005 | ret = PTR_ERR(isi->alloc_ctx); | |
1006 | goto err_alloc_ctx; | |
1007 | } | |
1008 | ||
1009 | isi->regs = ioremap(regs->start, resource_size(regs)); | |
1010 | if (!isi->regs) { | |
1011 | ret = -ENOMEM; | |
1012 | goto err_ioremap; | |
1013 | } | |
1014 | ||
a4e9f10b GL |
1015 | if (pdata->data_width_flags & ISI_DATAWIDTH_8) |
1016 | isi->width_flags = 1 << 7; | |
1017 | if (pdata->data_width_flags & ISI_DATAWIDTH_10) | |
1018 | isi->width_flags |= 1 << 9; | |
1019 | ||
195ebc43 JW |
1020 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); |
1021 | ||
1022 | irq = platform_get_irq(pdev, 0); | |
1023 | if (irq < 0) { | |
1024 | ret = irq; | |
1025 | goto err_req_irq; | |
1026 | } | |
1027 | ||
1028 | ret = request_irq(irq, isi_interrupt, 0, "isi", isi); | |
1029 | if (ret) { | |
1030 | dev_err(&pdev->dev, "Unable to request irq %d\n", irq); | |
1031 | goto err_req_irq; | |
1032 | } | |
1033 | isi->irq = irq; | |
1034 | ||
1035 | soc_host = &isi->soc_host; | |
1036 | soc_host->drv_name = "isi-camera"; | |
1037 | soc_host->ops = &isi_soc_camera_host_ops; | |
1038 | soc_host->priv = isi; | |
1039 | soc_host->v4l2_dev.dev = &pdev->dev; | |
1040 | soc_host->nr = pdev->id; | |
1041 | ||
1042 | ret = soc_camera_host_register(soc_host); | |
1043 | if (ret) { | |
1044 | dev_err(&pdev->dev, "Unable to register soc camera host\n"); | |
1045 | goto err_register_soc_camera_host; | |
1046 | } | |
1047 | return 0; | |
1048 | ||
1049 | err_register_soc_camera_host: | |
1050 | free_irq(isi->irq, isi); | |
1051 | err_req_irq: | |
1052 | iounmap(isi->regs); | |
1053 | err_ioremap: | |
1054 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | |
1055 | err_alloc_ctx: | |
1056 | dma_free_coherent(&pdev->dev, | |
1057 | sizeof(struct fbd) * MAX_BUFFER_NUM, | |
1058 | isi->p_fb_descriptors, | |
1059 | isi->fb_descriptors_phys); | |
1060 | err_alloc_descriptors: | |
d8ec0961 | 1061 | err_set_mck_rate: |
03652e0a JW |
1062 | clk_unprepare(isi->mck); |
1063 | err_clk_prepare_mck: | |
d8ec0961 JW |
1064 | clk_put(isi->mck); |
1065 | err_clk_get: | |
195ebc43 JW |
1066 | kfree(isi); |
1067 | err_alloc_isi: | |
03652e0a JW |
1068 | clk_unprepare(pclk); |
1069 | err_clk_prepare_pclk: | |
0a4524d7 | 1070 | clk_put(pclk); |
195ebc43 JW |
1071 | |
1072 | return ret; | |
1073 | } | |
1074 | ||
1075 | static struct platform_driver atmel_isi_driver = { | |
1076 | .probe = atmel_isi_probe, | |
1077 | .remove = __devexit_p(atmel_isi_remove), | |
1078 | .driver = { | |
1079 | .name = "atmel_isi", | |
1080 | .owner = THIS_MODULE, | |
1081 | }, | |
1082 | }; | |
1083 | ||
1084 | static int __init atmel_isi_init_module(void) | |
1085 | { | |
1086 | return platform_driver_probe(&atmel_isi_driver, &atmel_isi_probe); | |
1087 | } | |
1088 | ||
1089 | static void __exit atmel_isi_exit(void) | |
1090 | { | |
1091 | platform_driver_unregister(&atmel_isi_driver); | |
1092 | } | |
1093 | module_init(atmel_isi_init_module); | |
1094 | module_exit(atmel_isi_exit); | |
1095 | ||
1096 | MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>"); | |
1097 | MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux"); | |
1098 | MODULE_LICENSE("GPL"); | |
1099 | MODULE_SUPPORTED_DEVICE("video"); |